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Merge git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / mwl8k.c
1 /*
2 * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
3 *
4 * Copyright (C) 2008 Marvell Semiconductor Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spinlock.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/delay.h>
18 #include <linux/completion.h>
19 #include <linux/etherdevice.h>
20 #include <net/mac80211.h>
21 #include <linux/moduleparam.h>
22 #include <linux/firmware.h>
23 #include <linux/workqueue.h>
24
25 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
26 #define MWL8K_NAME KBUILD_MODNAME
27 #define MWL8K_VERSION "0.9.1"
28
29 MODULE_DESCRIPTION(MWL8K_DESC);
30 MODULE_VERSION(MWL8K_VERSION);
31 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
32 MODULE_LICENSE("GPL");
33
34 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
35 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
36 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
37 { }
38 };
39 MODULE_DEVICE_TABLE(pci, mwl8k_table);
40
41 #define IEEE80211_ADDR_LEN ETH_ALEN
42
43 /* Register definitions */
44 #define MWL8K_HIU_GEN_PTR 0x00000c10
45 #define MWL8K_MODE_STA 0x0000005a
46 #define MWL8K_MODE_AP 0x000000a5
47 #define MWL8K_HIU_INT_CODE 0x00000c14
48 #define MWL8K_FWSTA_READY 0xf0f1f2f4
49 #define MWL8K_FWAP_READY 0xf1f2f4a5
50 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
51 #define MWL8K_HIU_SCRATCH 0x00000c40
52
53 /* Host->device communications */
54 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
55 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
56 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
57 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
58 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
59 #define MWL8K_H2A_INT_DUMMY (1 << 20)
60 #define MWL8K_H2A_INT_RESET (1 << 15)
61 #define MWL8K_H2A_INT_PS (1 << 2)
62 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
63 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
64
65 /* Device->host communications */
66 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
67 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
68 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
69 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
70 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
71 #define MWL8K_A2H_INT_DUMMY (1 << 20)
72 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
73 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
74 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
75 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
76 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
77 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
78 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
79 #define MWL8K_A2H_INT_RX_READY (1 << 1)
80 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
81
82 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
83 MWL8K_A2H_INT_CHNL_SWITCHED | \
84 MWL8K_A2H_INT_QUEUE_EMPTY | \
85 MWL8K_A2H_INT_RADAR_DETECT | \
86 MWL8K_A2H_INT_RADIO_ON | \
87 MWL8K_A2H_INT_RADIO_OFF | \
88 MWL8K_A2H_INT_MAC_EVENT | \
89 MWL8K_A2H_INT_OPC_DONE | \
90 MWL8K_A2H_INT_RX_READY | \
91 MWL8K_A2H_INT_TX_DONE)
92
93 /* WME stream classes */
94 #define WME_AC_BE 0 /* best effort */
95 #define WME_AC_BK 1 /* background */
96 #define WME_AC_VI 2 /* video */
97 #define WME_AC_VO 3 /* voice */
98
99 #define MWL8K_RX_QUEUES 1
100 #define MWL8K_TX_QUEUES 4
101
102 struct mwl8k_rx_queue {
103 int rx_desc_count;
104
105 /* hw receives here */
106 int rx_head;
107
108 /* refill descs here */
109 int rx_tail;
110
111 struct mwl8k_rx_desc *rx_desc_area;
112 dma_addr_t rx_desc_dma;
113 struct sk_buff **rx_skb;
114 };
115
116 struct mwl8k_skb {
117 /*
118 * The DMA engine requires a modification to the payload.
119 * If the skbuff is shared/cloned, it needs to be unshared.
120 * This method is used to ensure the stack always gets back
121 * the skbuff it sent for transmission.
122 */
123 struct sk_buff *clone;
124 struct sk_buff *skb;
125 };
126
127 struct mwl8k_tx_queue {
128 /* hw transmits here */
129 int tx_head;
130
131 /* sw appends here */
132 int tx_tail;
133
134 struct ieee80211_tx_queue_stats tx_stats;
135 struct mwl8k_tx_desc *tx_desc_area;
136 dma_addr_t tx_desc_dma;
137 struct mwl8k_skb *tx_skb;
138 };
139
140 /* Pointers to the firmware data and meta information about it. */
141 struct mwl8k_firmware {
142 /* Microcode */
143 struct firmware *ucode;
144
145 /* Boot helper code */
146 struct firmware *helper;
147 };
148
149 struct mwl8k_priv {
150 void __iomem *regs;
151 struct ieee80211_hw *hw;
152
153 struct pci_dev *pdev;
154 u8 name[16];
155 /* firmware access lock */
156 spinlock_t fw_lock;
157
158 /* firmware files and meta data */
159 struct mwl8k_firmware fw;
160 u32 part_num;
161
162 /* lock held over TX and TX reap */
163 spinlock_t tx_lock;
164 u32 int_mask;
165
166 struct ieee80211_vif *vif;
167 struct list_head vif_list;
168
169 struct ieee80211_channel *current_channel;
170
171 /* power management status cookie from firmware */
172 u32 *cookie;
173 dma_addr_t cookie_dma;
174
175 u16 num_mcaddrs;
176 u16 region_code;
177 u8 hw_rev;
178 __le32 fw_rev;
179 u32 wep_enabled;
180
181 /*
182 * Running count of TX packets in flight, to avoid
183 * iterating over the transmit rings each time.
184 */
185 int pending_tx_pkts;
186
187 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
188 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
189
190 /* PHY parameters */
191 struct ieee80211_supported_band band;
192 struct ieee80211_channel channels[14];
193 struct ieee80211_rate rates[12];
194
195 /* RF preamble: Short, Long or Auto */
196 u8 radio_preamble;
197 u8 radio_state;
198
199 /* WMM MODE 1 for enabled; 0 for disabled */
200 bool wmm_mode;
201
202 /* Set if PHY config is in progress */
203 bool inconfig;
204
205 /* XXX need to convert this to handle multiple interfaces */
206 bool capture_beacon;
207 u8 capture_bssid[IEEE80211_ADDR_LEN];
208 struct sk_buff *beacon_skb;
209
210 /*
211 * This FJ worker has to be global as it is scheduled from the
212 * RX handler. At this point we don't know which interface it
213 * belongs to until the list of bssids waiting to complete join
214 * is checked.
215 */
216 struct work_struct finalize_join_worker;
217
218 /* Tasklet to reclaim TX descriptors and buffers after tx */
219 struct tasklet_struct tx_reclaim_task;
220
221 /* Work thread to serialize configuration requests */
222 struct workqueue_struct *config_wq;
223 struct completion *hostcmd_wait;
224 struct completion *tx_wait;
225 };
226
227 /* Per interface specific private data */
228 struct mwl8k_vif {
229 struct list_head node;
230
231 /* backpointer to parent config block */
232 struct mwl8k_priv *priv;
233
234 /* BSS config of AP or IBSS from mac80211*/
235 struct ieee80211_bss_conf bss_info;
236
237 /* BSSID of AP or IBSS */
238 u8 bssid[IEEE80211_ADDR_LEN];
239 u8 mac_addr[IEEE80211_ADDR_LEN];
240
241 /*
242 * Subset of supported legacy rates.
243 * Intersection of AP and STA supported rates.
244 */
245 struct ieee80211_rate legacy_rates[12];
246
247 /* number of supported legacy rates */
248 u8 legacy_nrates;
249
250 /* Number of supported MCS rates. Work in progress */
251 u8 mcs_nrates;
252
253 /* Index into station database.Returned by update_sta_db call */
254 u8 peer_id;
255
256 /* Non AMPDU sequence number assigned by driver */
257 u16 seqno;
258
259 /* Note:There is no channel info,
260 * refer to the master channel info in priv
261 */
262 };
263
264 #define MWL8K_VIF(_vif) (struct mwl8k_vif *)(&((_vif)->drv_priv))
265
266 static const struct ieee80211_channel mwl8k_channels[] = {
267 { .center_freq = 2412, .hw_value = 1, },
268 { .center_freq = 2417, .hw_value = 2, },
269 { .center_freq = 2422, .hw_value = 3, },
270 { .center_freq = 2427, .hw_value = 4, },
271 { .center_freq = 2432, .hw_value = 5, },
272 { .center_freq = 2437, .hw_value = 6, },
273 { .center_freq = 2442, .hw_value = 7, },
274 { .center_freq = 2447, .hw_value = 8, },
275 { .center_freq = 2452, .hw_value = 9, },
276 { .center_freq = 2457, .hw_value = 10, },
277 { .center_freq = 2462, .hw_value = 11, },
278 };
279
280 static const struct ieee80211_rate mwl8k_rates[] = {
281 { .bitrate = 10, .hw_value = 2, },
282 { .bitrate = 20, .hw_value = 4, },
283 { .bitrate = 55, .hw_value = 11, },
284 { .bitrate = 60, .hw_value = 12, },
285 { .bitrate = 90, .hw_value = 18, },
286 { .bitrate = 110, .hw_value = 22, },
287 { .bitrate = 120, .hw_value = 24, },
288 { .bitrate = 180, .hw_value = 36, },
289 { .bitrate = 240, .hw_value = 48, },
290 { .bitrate = 360, .hw_value = 72, },
291 { .bitrate = 480, .hw_value = 96, },
292 { .bitrate = 540, .hw_value = 108, },
293 };
294
295 /* Radio settings */
296 #define MWL8K_RADIO_FORCE 0x2
297 #define MWL8K_RADIO_ENABLE 0x1
298 #define MWL8K_RADIO_DISABLE 0x0
299 #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
300 #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
301 #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
302
303 /* WMM */
304 #define MWL8K_WMM_ENABLE 1
305 #define MWL8K_WMM_DISABLE 0
306
307 #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
308
309 /* Slot time */
310
311 /* Short Slot: 9us slot time */
312 #define MWL8K_SHORT_SLOTTIME 1
313
314 /* Long slot: 20us slot time */
315 #define MWL8K_LONG_SLOTTIME 0
316
317 /* Set or get info from Firmware */
318 #define MWL8K_CMD_SET 0x0001
319 #define MWL8K_CMD_GET 0x0000
320
321 /* Firmware command codes */
322 #define MWL8K_CMD_CODE_DNLD 0x0001
323 #define MWL8K_CMD_GET_HW_SPEC 0x0003
324 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
325 #define MWL8K_CMD_GET_STAT 0x0014
326 #define MWL8K_CMD_RADIO_CONTROL 0x001C
327 #define MWL8K_CMD_RF_TX_POWER 0x001E
328 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
329 #define MWL8K_CMD_SET_POST_SCAN 0x0108
330 #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
331 #define MWL8K_CMD_SET_SLOT 0x0114
332 #define MWL8K_CMD_MIMO_CONFIG 0x0125
333 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
334 #define MWL8K_CMD_SET_WMM_MODE 0x0123
335 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
336 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
337 #define MWL8K_CMD_UPDATE_STADB 0x1123
338 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
339 #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
340 #define MWL8K_CMD_SET_AID 0x010d
341 #define MWL8K_CMD_SET_RATE 0x0110
342 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
343 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
344 #define MWL8K_CMD_ENCRYPTION 0x1122
345
346 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
347 {
348 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
349 snprintf(buf, bufsize, "%s", #x);\
350 return buf;\
351 } while (0)
352 switch (cmd & (~0x8000)) {
353 MWL8K_CMDNAME(CODE_DNLD);
354 MWL8K_CMDNAME(GET_HW_SPEC);
355 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
356 MWL8K_CMDNAME(GET_STAT);
357 MWL8K_CMDNAME(RADIO_CONTROL);
358 MWL8K_CMDNAME(RF_TX_POWER);
359 MWL8K_CMDNAME(SET_PRE_SCAN);
360 MWL8K_CMDNAME(SET_POST_SCAN);
361 MWL8K_CMDNAME(SET_RF_CHANNEL);
362 MWL8K_CMDNAME(SET_SLOT);
363 MWL8K_CMDNAME(MIMO_CONFIG);
364 MWL8K_CMDNAME(ENABLE_SNIFFER);
365 MWL8K_CMDNAME(SET_WMM_MODE);
366 MWL8K_CMDNAME(SET_EDCA_PARAMS);
367 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
368 MWL8K_CMDNAME(UPDATE_STADB);
369 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
370 MWL8K_CMDNAME(SET_LINKADAPT_MODE);
371 MWL8K_CMDNAME(SET_AID);
372 MWL8K_CMDNAME(SET_RATE);
373 MWL8K_CMDNAME(USE_FIXED_RATE);
374 MWL8K_CMDNAME(RTS_THRESHOLD);
375 MWL8K_CMDNAME(ENCRYPTION);
376 default:
377 snprintf(buf, bufsize, "0x%x", cmd);
378 }
379 #undef MWL8K_CMDNAME
380
381 return buf;
382 }
383
384 /* Hardware and firmware reset */
385 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
386 {
387 iowrite32(MWL8K_H2A_INT_RESET,
388 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
389 iowrite32(MWL8K_H2A_INT_RESET,
390 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
391 msleep(20);
392 }
393
394 /* Release fw image */
395 static void mwl8k_release_fw(struct firmware **fw)
396 {
397 if (*fw == NULL)
398 return;
399 release_firmware(*fw);
400 *fw = NULL;
401 }
402
403 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
404 {
405 mwl8k_release_fw(&priv->fw.ucode);
406 mwl8k_release_fw(&priv->fw.helper);
407 }
408
409 /* Request fw image */
410 static int mwl8k_request_fw(struct mwl8k_priv *priv,
411 const char *fname, struct firmware **fw)
412 {
413 /* release current image */
414 if (*fw != NULL)
415 mwl8k_release_fw(fw);
416
417 return request_firmware((const struct firmware **)fw,
418 fname, &priv->pdev->dev);
419 }
420
421 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
422 {
423 u8 filename[64];
424 int rc;
425
426 priv->part_num = part_num;
427
428 snprintf(filename, sizeof(filename),
429 "mwl8k/helper_%u.fw", priv->part_num);
430
431 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
432 if (rc) {
433 printk(KERN_ERR
434 "%s Error requesting helper firmware file %s\n",
435 pci_name(priv->pdev), filename);
436 return rc;
437 }
438
439 snprintf(filename, sizeof(filename),
440 "mwl8k/fmimage_%u.fw", priv->part_num);
441
442 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
443 if (rc) {
444 printk(KERN_ERR "%s Error requesting firmware file %s\n",
445 pci_name(priv->pdev), filename);
446 mwl8k_release_fw(&priv->fw.helper);
447 return rc;
448 }
449
450 return 0;
451 }
452
453 struct mwl8k_cmd_pkt {
454 __le16 code;
455 __le16 length;
456 __le16 seq_num;
457 __le16 result;
458 char payload[0];
459 } __attribute__((packed));
460
461 /*
462 * Firmware loading.
463 */
464 static int
465 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
466 {
467 void __iomem *regs = priv->regs;
468 dma_addr_t dma_addr;
469 int rc;
470 int loops;
471
472 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
473 if (pci_dma_mapping_error(priv->pdev, dma_addr))
474 return -ENOMEM;
475
476 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
477 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
478 iowrite32(MWL8K_H2A_INT_DOORBELL,
479 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
480 iowrite32(MWL8K_H2A_INT_DUMMY,
481 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
482
483 rc = -ETIMEDOUT;
484 loops = 1000;
485 do {
486 u32 int_code;
487
488 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
489 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
490 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
491 rc = 0;
492 break;
493 }
494
495 udelay(1);
496 } while (--loops);
497
498 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
499
500 /*
501 * Clear 'command done' interrupt bit.
502 */
503 loops = 1000;
504 do {
505 u32 status;
506
507 status = ioread32(priv->regs +
508 MWL8K_HIU_A2H_INTERRUPT_STATUS);
509 if (status & MWL8K_A2H_INT_OPC_DONE) {
510 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
511 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
512 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
513 break;
514 }
515
516 udelay(1);
517 } while (--loops);
518
519 return rc;
520 }
521
522 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
523 const u8 *data, size_t length)
524 {
525 struct mwl8k_cmd_pkt *cmd;
526 int done;
527 int rc = 0;
528
529 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
530 if (cmd == NULL)
531 return -ENOMEM;
532
533 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
534 cmd->seq_num = 0;
535 cmd->result = 0;
536
537 done = 0;
538 while (length) {
539 int block_size = length > 256 ? 256 : length;
540
541 memcpy(cmd->payload, data + done, block_size);
542 cmd->length = cpu_to_le16(block_size);
543
544 rc = mwl8k_send_fw_load_cmd(priv, cmd,
545 sizeof(*cmd) + block_size);
546 if (rc)
547 break;
548
549 done += block_size;
550 length -= block_size;
551 }
552
553 if (!rc) {
554 cmd->length = 0;
555 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
556 }
557
558 kfree(cmd);
559
560 return rc;
561 }
562
563 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
564 const u8 *data, size_t length)
565 {
566 unsigned char *buffer;
567 int may_continue, rc = 0;
568 u32 done, prev_block_size;
569
570 buffer = kmalloc(1024, GFP_KERNEL);
571 if (buffer == NULL)
572 return -ENOMEM;
573
574 done = 0;
575 prev_block_size = 0;
576 may_continue = 1000;
577 while (may_continue > 0) {
578 u32 block_size;
579
580 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
581 if (block_size & 1) {
582 block_size &= ~1;
583 may_continue--;
584 } else {
585 done += prev_block_size;
586 length -= prev_block_size;
587 }
588
589 if (block_size > 1024 || block_size > length) {
590 rc = -EOVERFLOW;
591 break;
592 }
593
594 if (length == 0) {
595 rc = 0;
596 break;
597 }
598
599 if (block_size == 0) {
600 rc = -EPROTO;
601 may_continue--;
602 udelay(1);
603 continue;
604 }
605
606 prev_block_size = block_size;
607 memcpy(buffer, data + done, block_size);
608
609 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
610 if (rc)
611 break;
612 }
613
614 if (!rc && length != 0)
615 rc = -EREMOTEIO;
616
617 kfree(buffer);
618
619 return rc;
620 }
621
622 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
623 {
624 int loops, rc;
625
626 const u8 *ucode = priv->fw.ucode->data;
627 size_t ucode_len = priv->fw.ucode->size;
628 const u8 *helper = priv->fw.helper->data;
629 size_t helper_len = priv->fw.helper->size;
630
631 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
632 rc = mwl8k_load_fw_image(priv, helper, helper_len);
633 if (rc) {
634 printk(KERN_ERR "%s: unable to load firmware "
635 "helper image\n", pci_name(priv->pdev));
636 return rc;
637 }
638 msleep(1);
639
640 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
641 } else {
642 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
643 }
644
645 if (rc) {
646 printk(KERN_ERR "%s: unable to load firmware data\n",
647 pci_name(priv->pdev));
648 return rc;
649 }
650
651 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
652 msleep(1);
653
654 loops = 200000;
655 do {
656 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
657 == MWL8K_FWSTA_READY)
658 break;
659 udelay(1);
660 } while (--loops);
661
662 return loops ? 0 : -ETIMEDOUT;
663 }
664
665
666 /*
667 * Defines shared between transmission and reception.
668 */
669 /* HT control fields for firmware */
670 struct ewc_ht_info {
671 __le16 control1;
672 __le16 control2;
673 __le16 control3;
674 } __attribute__((packed));
675
676 /* Firmware Station database operations */
677 #define MWL8K_STA_DB_ADD_ENTRY 0
678 #define MWL8K_STA_DB_MODIFY_ENTRY 1
679 #define MWL8K_STA_DB_DEL_ENTRY 2
680 #define MWL8K_STA_DB_FLUSH 3
681
682 /* Peer Entry flags - used to define the type of the peer node */
683 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
684 #define MWL8K_PEER_TYPE_ADHOC_STATION 4
685
686 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
687 #define MWL8K_MCS_BITMAP_SIZE 16
688 #define pad_size 16
689
690 struct peer_capability_info {
691 /* Peer type - AP vs. STA. */
692 __u8 peer_type;
693
694 /* Basic 802.11 capabilities from assoc resp. */
695 __le16 basic_caps;
696
697 /* Set if peer supports 802.11n high throughput (HT). */
698 __u8 ht_support;
699
700 /* Valid if HT is supported. */
701 __le16 ht_caps;
702 __u8 extended_ht_caps;
703 struct ewc_ht_info ewc_info;
704
705 /* Legacy rate table. Intersection of our rates and peer rates. */
706 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
707
708 /* HT rate table. Intersection of our rates and peer rates. */
709 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
710 __u8 pad[pad_size];
711
712 /* If set, interoperability mode, no proprietary extensions. */
713 __u8 interop;
714 __u8 pad2;
715 __u8 station_id;
716 __le16 amsdu_enabled;
717 } __attribute__((packed));
718
719 /* Inline functions to manipulate QoS field in data descriptor. */
720 static inline u16 mwl8k_qos_setbit_tid(u16 qos, u8 tid)
721 {
722 u16 val_mask = 0x000f;
723 u16 qos_mask = ~val_mask;
724
725 /* TID bits 0-3 */
726 return (qos & qos_mask) | (tid & val_mask);
727 }
728
729 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
730 {
731 u16 val_mask = 1 << 4;
732
733 /* End of Service Period Bit 4 */
734 return qos | val_mask;
735 }
736
737 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
738 {
739 u16 val_mask = 0x3;
740 u8 shift = 5;
741 u16 qos_mask = ~(val_mask << shift);
742
743 /* Ack Policy Bit 5-6 */
744 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
745 }
746
747 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
748 {
749 u16 val_mask = 1 << 7;
750
751 /* AMSDU present Bit 7 */
752 return qos | val_mask;
753 }
754
755 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
756 {
757 u16 val_mask = 0xff;
758 u8 shift = 8;
759 u16 qos_mask = ~(val_mask << shift);
760
761 /* Queue Length Bits 8-15 */
762 return (qos & qos_mask) | ((len & val_mask) << shift);
763 }
764
765 /* DMA header used by firmware and hardware. */
766 struct mwl8k_dma_data {
767 __le16 fwlen;
768 struct ieee80211_hdr wh;
769 } __attribute__((packed));
770
771 /* Routines to add/remove DMA header from skb. */
772 static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
773 {
774 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
775 void *dst, *src = &tr->wh;
776 __le16 fc = tr->wh.frame_control;
777 int hdrlen = ieee80211_hdrlen(fc);
778 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
779
780 dst = (void *)tr + space;
781 if (dst != src) {
782 memmove(dst, src, hdrlen);
783 skb_pull(skb, space);
784 }
785
786 return 0;
787 }
788
789 static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
790 {
791 struct ieee80211_hdr *wh;
792 u32 hdrlen, pktlen;
793 struct mwl8k_dma_data *tr;
794
795 wh = (struct ieee80211_hdr *)skb->data;
796 hdrlen = ieee80211_hdrlen(wh->frame_control);
797 pktlen = skb->len;
798
799 /*
800 * Copy up/down the 802.11 header; the firmware requires
801 * we present a 2-byte payload length followed by a
802 * 4-address header (w/o QoS), followed (optionally) by
803 * any WEP/ExtIV header (but only filled in for CCMP).
804 */
805 if (hdrlen != sizeof(struct mwl8k_dma_data))
806 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
807
808 tr = (struct mwl8k_dma_data *)skb->data;
809 if (wh != &tr->wh)
810 memmove(&tr->wh, wh, hdrlen);
811
812 /* Clear addr4 */
813 memset(tr->wh.addr4, 0, IEEE80211_ADDR_LEN);
814
815 /*
816 * Firmware length is the length of the fully formed "802.11
817 * payload". That is, everything except for the 802.11 header.
818 * This includes all crypto material including the MIC.
819 */
820 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
821
822 return skb;
823 }
824
825
826 /*
827 * Packet reception.
828 */
829 #define MWL8K_RX_CTRL_KEY_INDEX_MASK 0x30
830 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
831 #define MWL8K_RX_CTRL_AMPDU 0x01
832
833 struct mwl8k_rx_desc {
834 __le16 pkt_len;
835 __u8 link_quality;
836 __u8 noise_level;
837 __le32 pkt_phys_addr;
838 __le32 next_rx_desc_phys_addr;
839 __le16 qos_control;
840 __le16 rate_info;
841 __le32 pad0[4];
842 __u8 rssi;
843 __u8 channel;
844 __le16 pad1;
845 __u8 rx_ctrl;
846 __u8 rx_status;
847 __u8 pad2[2];
848 } __attribute__((packed));
849
850 #define MWL8K_RX_DESCS 256
851 #define MWL8K_RX_MAXSZ 3800
852
853 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
854 {
855 struct mwl8k_priv *priv = hw->priv;
856 struct mwl8k_rx_queue *rxq = priv->rxq + index;
857 int size;
858 int i;
859
860 rxq->rx_desc_count = 0;
861 rxq->rx_head = 0;
862 rxq->rx_tail = 0;
863
864 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
865
866 rxq->rx_desc_area =
867 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
868 if (rxq->rx_desc_area == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
870 priv->name);
871 return -ENOMEM;
872 }
873 memset(rxq->rx_desc_area, 0, size);
874
875 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
876 sizeof(*rxq->rx_skb), GFP_KERNEL);
877 if (rxq->rx_skb == NULL) {
878 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
879 priv->name);
880 pci_free_consistent(priv->pdev, size,
881 rxq->rx_desc_area, rxq->rx_desc_dma);
882 return -ENOMEM;
883 }
884 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
885
886 for (i = 0; i < MWL8K_RX_DESCS; i++) {
887 struct mwl8k_rx_desc *rx_desc;
888 int nexti;
889
890 rx_desc = rxq->rx_desc_area + i;
891 nexti = (i + 1) % MWL8K_RX_DESCS;
892
893 rx_desc->next_rx_desc_phys_addr =
894 cpu_to_le32(rxq->rx_desc_dma
895 + nexti * sizeof(*rx_desc));
896 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
897 }
898
899 return 0;
900 }
901
902 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
903 {
904 struct mwl8k_priv *priv = hw->priv;
905 struct mwl8k_rx_queue *rxq = priv->rxq + index;
906 int refilled;
907
908 refilled = 0;
909 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
910 struct sk_buff *skb;
911 int rx;
912
913 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
914 if (skb == NULL)
915 break;
916
917 rxq->rx_desc_count++;
918
919 rx = rxq->rx_tail;
920 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
921
922 rxq->rx_desc_area[rx].pkt_phys_addr =
923 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
924 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
925
926 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
927 rxq->rx_skb[rx] = skb;
928 wmb();
929 rxq->rx_desc_area[rx].rx_ctrl = 0;
930
931 refilled++;
932 }
933
934 return refilled;
935 }
936
937 /* Must be called only when the card's reception is completely halted */
938 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
939 {
940 struct mwl8k_priv *priv = hw->priv;
941 struct mwl8k_rx_queue *rxq = priv->rxq + index;
942 int i;
943
944 for (i = 0; i < MWL8K_RX_DESCS; i++) {
945 if (rxq->rx_skb[i] != NULL) {
946 unsigned long addr;
947
948 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
949 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
950 PCI_DMA_FROMDEVICE);
951 kfree_skb(rxq->rx_skb[i]);
952 rxq->rx_skb[i] = NULL;
953 }
954 }
955
956 kfree(rxq->rx_skb);
957 rxq->rx_skb = NULL;
958
959 pci_free_consistent(priv->pdev,
960 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
961 rxq->rx_desc_area, rxq->rx_desc_dma);
962 rxq->rx_desc_area = NULL;
963 }
964
965
966 /*
967 * Scan a list of BSSIDs to process for finalize join.
968 * Allows for extension to process multiple BSSIDs.
969 */
970 static inline int
971 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
972 {
973 return priv->capture_beacon &&
974 ieee80211_is_beacon(wh->frame_control) &&
975 !compare_ether_addr(wh->addr3, priv->capture_bssid);
976 }
977
978 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
979 struct sk_buff *skb)
980 {
981 priv->capture_beacon = false;
982 memset(priv->capture_bssid, 0, IEEE80211_ADDR_LEN);
983
984 /*
985 * Use GFP_ATOMIC as rxq_process is called from
986 * the primary interrupt handler, memory allocation call
987 * must not sleep.
988 */
989 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
990 if (priv->beacon_skb != NULL)
991 queue_work(priv->config_wq,
992 &priv->finalize_join_worker);
993 }
994
995 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
996 {
997 struct mwl8k_priv *priv = hw->priv;
998 struct mwl8k_rx_queue *rxq = priv->rxq + index;
999 int processed;
1000
1001 processed = 0;
1002 while (rxq->rx_desc_count && limit--) {
1003 struct mwl8k_rx_desc *rx_desc;
1004 struct sk_buff *skb;
1005 struct ieee80211_rx_status status;
1006 unsigned long addr;
1007 struct ieee80211_hdr *wh;
1008
1009 rx_desc = rxq->rx_desc_area + rxq->rx_head;
1010 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
1011 break;
1012 rmb();
1013
1014 skb = rxq->rx_skb[rxq->rx_head];
1015 rxq->rx_skb[rxq->rx_head] = NULL;
1016
1017 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
1018 rxq->rx_desc_count--;
1019
1020 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
1021 pci_unmap_single(priv->pdev, addr,
1022 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1023
1024 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
1025 if (mwl8k_remove_dma_header(skb)) {
1026 dev_kfree_skb(skb);
1027 continue;
1028 }
1029
1030 wh = (struct ieee80211_hdr *)skb->data;
1031
1032 /*
1033 * Check for pending join operation. save a copy of
1034 * the beacon and schedule a tasklet to send finalize
1035 * join command to the firmware.
1036 */
1037 if (mwl8k_capture_bssid(priv, wh))
1038 mwl8k_save_beacon(priv, skb);
1039
1040 memset(&status, 0, sizeof(status));
1041 status.mactime = 0;
1042 status.signal = -rx_desc->rssi;
1043 status.noise = -rx_desc->noise_level;
1044 status.qual = rx_desc->link_quality;
1045 status.antenna = 1;
1046 status.rate_idx = 1;
1047 status.flag = 0;
1048 status.band = IEEE80211_BAND_2GHZ;
1049 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
1050 ieee80211_rx_irqsafe(hw, skb, &status);
1051
1052 processed++;
1053 }
1054
1055 return processed;
1056 }
1057
1058
1059 /*
1060 * Packet transmission.
1061 */
1062
1063 /* Transmit queue assignment. */
1064 enum {
1065 MWL8K_WME_AC_BK = 0, /* background access */
1066 MWL8K_WME_AC_BE = 1, /* best effort access */
1067 MWL8K_WME_AC_VI = 2, /* video access */
1068 MWL8K_WME_AC_VO = 3, /* voice access */
1069 };
1070
1071 /* Transmit packet ACK policy */
1072 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1073 #define MWL8K_TXD_ACK_POLICY_NONE 1
1074 #define MWL8K_TXD_ACK_POLICY_NO_EXPLICIT 2
1075 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1076
1077 #define GET_TXQ(_ac) (\
1078 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1079 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1080 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1081 MWL8K_WME_AC_BE)
1082
1083 #define MWL8K_TXD_STATUS_IDLE 0x00000000
1084 #define MWL8K_TXD_STATUS_USED 0x00000001
1085 #define MWL8K_TXD_STATUS_OK 0x00000001
1086 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1087 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1088 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1089 #define MWL8K_TXD_STATUS_BROADCAST_TX 0x00000010
1090 #define MWL8K_TXD_STATUS_FAILED_LINK_ERROR 0x00000020
1091 #define MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040
1092 #define MWL8K_TXD_STATUS_FAILED_AGING 0x00000080
1093 #define MWL8K_TXD_STATUS_HOST_CMD 0x40000000
1094 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1095 #define MWL8K_TXD_SOFTSTALE 0x80
1096 #define MWL8K_TXD_SOFTSTALE_MGMT_RETRY 0x01
1097
1098 struct mwl8k_tx_desc {
1099 __le32 status;
1100 __u8 data_rate;
1101 __u8 tx_priority;
1102 __le16 qos_control;
1103 __le32 pkt_phys_addr;
1104 __le16 pkt_len;
1105 __u8 dest_MAC_addr[IEEE80211_ADDR_LEN];
1106 __le32 next_tx_desc_phys_addr;
1107 __le32 reserved;
1108 __le16 rate_info;
1109 __u8 peer_id;
1110 __u8 tx_frag_cnt;
1111 } __attribute__((packed));
1112
1113 #define MWL8K_TX_DESCS 128
1114
1115 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1116 {
1117 struct mwl8k_priv *priv = hw->priv;
1118 struct mwl8k_tx_queue *txq = priv->txq + index;
1119 int size;
1120 int i;
1121
1122 memset(&txq->tx_stats, 0,
1123 sizeof(struct ieee80211_tx_queue_stats));
1124 txq->tx_stats.limit = MWL8K_TX_DESCS;
1125 txq->tx_head = 0;
1126 txq->tx_tail = 0;
1127
1128 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1129
1130 txq->tx_desc_area =
1131 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1132 if (txq->tx_desc_area == NULL) {
1133 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1134 priv->name);
1135 return -ENOMEM;
1136 }
1137 memset(txq->tx_desc_area, 0, size);
1138
1139 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1140 GFP_KERNEL);
1141 if (txq->tx_skb == NULL) {
1142 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1143 priv->name);
1144 pci_free_consistent(priv->pdev, size,
1145 txq->tx_desc_area, txq->tx_desc_dma);
1146 return -ENOMEM;
1147 }
1148 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1149
1150 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1151 struct mwl8k_tx_desc *tx_desc;
1152 int nexti;
1153
1154 tx_desc = txq->tx_desc_area + i;
1155 nexti = (i + 1) % MWL8K_TX_DESCS;
1156
1157 tx_desc->status = 0;
1158 tx_desc->next_tx_desc_phys_addr =
1159 cpu_to_le32(txq->tx_desc_dma +
1160 nexti * sizeof(*tx_desc));
1161 }
1162
1163 return 0;
1164 }
1165
1166 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1167 {
1168 iowrite32(MWL8K_H2A_INT_PPA_READY,
1169 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1170 iowrite32(MWL8K_H2A_INT_DUMMY,
1171 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1172 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1173 }
1174
1175 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1176 {
1177 return priv->pending_tx_pkts;
1178 }
1179
1180 struct mwl8k_txq_info {
1181 u32 fw_owned;
1182 u32 drv_owned;
1183 u32 unused;
1184 u32 len;
1185 u32 head;
1186 u32 tail;
1187 };
1188
1189 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1190 struct mwl8k_txq_info txinfo[],
1191 u32 num_queues)
1192 {
1193 int count, desc, status;
1194 struct mwl8k_tx_queue *txq;
1195 struct mwl8k_tx_desc *tx_desc;
1196 int ndescs = 0;
1197
1198 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1199 spin_lock_bh(&priv->tx_lock);
1200 for (count = 0; count < num_queues; count++) {
1201 txq = priv->txq + count;
1202 txinfo[count].len = txq->tx_stats.len;
1203 txinfo[count].head = txq->tx_head;
1204 txinfo[count].tail = txq->tx_tail;
1205 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1206 tx_desc = txq->tx_desc_area + desc;
1207 status = le32_to_cpu(tx_desc->status);
1208
1209 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1210 txinfo[count].fw_owned++;
1211 else
1212 txinfo[count].drv_owned++;
1213
1214 if (tx_desc->pkt_len == 0)
1215 txinfo[count].unused++;
1216 }
1217 }
1218 spin_unlock_bh(&priv->tx_lock);
1219
1220 return ndescs;
1221 }
1222
1223 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1224 {
1225 u32 count = 0;
1226 unsigned long timeout = 0;
1227 struct mwl8k_priv *priv = hw->priv;
1228 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1229
1230 might_sleep();
1231
1232 if (priv->tx_wait != NULL)
1233 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1234
1235 spin_lock_bh(&priv->tx_lock);
1236 count = mwl8k_txq_busy(priv);
1237 if (count) {
1238 priv->tx_wait = &cmd_wait;
1239 if (priv->radio_state)
1240 mwl8k_tx_start(priv);
1241 }
1242 spin_unlock_bh(&priv->tx_lock);
1243
1244 if (count) {
1245 struct mwl8k_txq_info txinfo[4];
1246 int index;
1247 int newcount;
1248
1249 timeout = wait_for_completion_timeout(&cmd_wait,
1250 msecs_to_jiffies(delay_ms));
1251 if (timeout)
1252 return 0;
1253
1254 spin_lock_bh(&priv->tx_lock);
1255 priv->tx_wait = NULL;
1256 newcount = mwl8k_txq_busy(priv);
1257 spin_unlock_bh(&priv->tx_lock);
1258
1259 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1260 __func__, __LINE__, delay_ms, count, newcount);
1261
1262 mwl8k_scan_tx_ring(priv, txinfo, 4);
1263 for (index = 0 ; index < 4; index++)
1264 printk(KERN_ERR
1265 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1266 index,
1267 txinfo[index].len,
1268 txinfo[index].head,
1269 txinfo[index].tail,
1270 txinfo[index].fw_owned,
1271 txinfo[index].drv_owned,
1272 txinfo[index].unused);
1273 return -ETIMEDOUT;
1274 }
1275
1276 return 0;
1277 }
1278
1279 #define MWL8K_TXD_OK (MWL8K_TXD_STATUS_OK | \
1280 MWL8K_TXD_STATUS_OK_RETRY | \
1281 MWL8K_TXD_STATUS_OK_MORE_RETRY)
1282 #define MWL8K_TXD_SUCCESS(stat) ((stat) & MWL8K_TXD_OK)
1283 #define MWL8K_TXD_FAIL_RETRY(stat) \
1284 ((stat) & (MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT))
1285
1286 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1287 {
1288 struct mwl8k_priv *priv = hw->priv;
1289 struct mwl8k_tx_queue *txq = priv->txq + index;
1290 int wake = 0;
1291
1292 while (txq->tx_stats.len > 0) {
1293 int tx;
1294 int rc;
1295 struct mwl8k_tx_desc *tx_desc;
1296 unsigned long addr;
1297 size_t size;
1298 struct sk_buff *skb;
1299 struct ieee80211_tx_info *info;
1300 u32 status;
1301
1302 rc = 0;
1303 tx = txq->tx_head;
1304 tx_desc = txq->tx_desc_area + tx;
1305
1306 status = le32_to_cpu(tx_desc->status);
1307
1308 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1309 if (!force)
1310 break;
1311 tx_desc->status &=
1312 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1313 }
1314
1315 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1316 BUG_ON(txq->tx_stats.len == 0);
1317 txq->tx_stats.len--;
1318 priv->pending_tx_pkts--;
1319
1320 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1321 size = (u32)(le16_to_cpu(tx_desc->pkt_len));
1322 skb = txq->tx_skb[tx].skb;
1323 txq->tx_skb[tx].skb = NULL;
1324
1325 BUG_ON(skb == NULL);
1326 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1327
1328 rc = mwl8k_remove_dma_header(skb);
1329
1330 /* Mark descriptor as unused */
1331 tx_desc->pkt_phys_addr = 0;
1332 tx_desc->pkt_len = 0;
1333
1334 if (txq->tx_skb[tx].clone) {
1335 /* Replace with original skb
1336 * before returning to stack
1337 * as buffer has been cloned
1338 */
1339 dev_kfree_skb(skb);
1340 skb = txq->tx_skb[tx].clone;
1341 txq->tx_skb[tx].clone = NULL;
1342 }
1343
1344 if (rc) {
1345 /* Something has gone wrong here.
1346 * Failed to remove DMA header.
1347 * Print error message and drop packet.
1348 */
1349 printk(KERN_ERR "%s: Error removing DMA header from "
1350 "tx skb 0x%p.\n", priv->name, skb);
1351
1352 dev_kfree_skb(skb);
1353 continue;
1354 }
1355
1356 info = IEEE80211_SKB_CB(skb);
1357 ieee80211_tx_info_clear_status(info);
1358
1359 /* Convert firmware status stuff into tx_status */
1360 if (MWL8K_TXD_SUCCESS(status)) {
1361 /* Transmit OK */
1362 info->flags |= IEEE80211_TX_STAT_ACK;
1363 }
1364
1365 ieee80211_tx_status_irqsafe(hw, skb);
1366
1367 wake = !priv->inconfig && priv->radio_state;
1368 }
1369
1370 if (wake)
1371 ieee80211_wake_queue(hw, index);
1372 }
1373
1374 /* must be called only when the card's transmit is completely halted */
1375 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1376 {
1377 struct mwl8k_priv *priv = hw->priv;
1378 struct mwl8k_tx_queue *txq = priv->txq + index;
1379
1380 mwl8k_txq_reclaim(hw, index, 1);
1381
1382 kfree(txq->tx_skb);
1383 txq->tx_skb = NULL;
1384
1385 pci_free_consistent(priv->pdev,
1386 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1387 txq->tx_desc_area, txq->tx_desc_dma);
1388 txq->tx_desc_area = NULL;
1389 }
1390
1391 static int
1392 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1393 {
1394 struct mwl8k_priv *priv = hw->priv;
1395 struct ieee80211_tx_info *tx_info;
1396 struct ieee80211_hdr *wh;
1397 struct mwl8k_tx_queue *txq;
1398 struct mwl8k_tx_desc *tx;
1399 struct mwl8k_dma_data *tr;
1400 struct mwl8k_vif *mwl8k_vif;
1401 struct sk_buff *org_skb = skb;
1402 dma_addr_t dma;
1403 u16 qos = 0;
1404 bool qosframe = false, ampduframe = false;
1405 bool mcframe = false, eapolframe = false;
1406 bool amsduframe = false;
1407 __le16 fc;
1408
1409 txq = priv->txq + index;
1410 tx = txq->tx_desc_area + txq->tx_tail;
1411
1412 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1413
1414 /*
1415 * Append HW DMA header to start of packet. Drop packet if
1416 * there is not enough space or a failure to unshare/unclone
1417 * the skb.
1418 */
1419 skb = mwl8k_add_dma_header(skb);
1420
1421 if (skb == NULL) {
1422 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1423 "header, dropping TX frame.\n", priv->name);
1424 dev_kfree_skb(org_skb);
1425 return NETDEV_TX_OK;
1426 }
1427
1428 tx_info = IEEE80211_SKB_CB(skb);
1429 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1430 tr = (struct mwl8k_dma_data *)skb->data;
1431 wh = &tr->wh;
1432 fc = wh->frame_control;
1433 qosframe = ieee80211_is_data_qos(fc);
1434 mcframe = is_multicast_ether_addr(wh->addr1);
1435 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1436
1437 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1438 u16 seqno = mwl8k_vif->seqno;
1439 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1440 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1441 mwl8k_vif->seqno = seqno++ % 4096;
1442 }
1443
1444 if (qosframe)
1445 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1446
1447 dma = pci_map_single(priv->pdev, skb->data,
1448 skb->len, PCI_DMA_TODEVICE);
1449
1450 if (pci_dma_mapping_error(priv->pdev, dma)) {
1451 printk(KERN_DEBUG "%s: failed to dma map skb, "
1452 "dropping TX frame.\n", priv->name);
1453
1454 if (org_skb != NULL)
1455 dev_kfree_skb(org_skb);
1456 if (skb != NULL)
1457 dev_kfree_skb(skb);
1458 return NETDEV_TX_OK;
1459 }
1460
1461 /* Set desc header, cpu bit order. */
1462 tx->status = 0;
1463 tx->data_rate = 0;
1464 tx->tx_priority = index;
1465 tx->qos_control = 0;
1466 tx->rate_info = 0;
1467 tx->peer_id = mwl8k_vif->peer_id;
1468
1469 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1470
1471 /* Setup firmware control bit fields for each frame type. */
1472 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1473 tx->data_rate = 0;
1474 qos = mwl8k_qos_setbit_eosp(qos);
1475 /* Set Queue size to unspecified */
1476 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1477 } else if (ieee80211_is_data(fc)) {
1478 tx->data_rate = 1;
1479 if (mcframe)
1480 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1481
1482 /*
1483 * Tell firmware to not send EAPOL pkts in an
1484 * aggregate. Verify against mac80211 tx path. If
1485 * stack turns off AMPDU for an EAPOL frame this
1486 * check will be removed.
1487 */
1488 if (eapolframe) {
1489 qos = mwl8k_qos_setbit_ack(qos,
1490 MWL8K_TXD_ACK_POLICY_NORMAL);
1491 } else {
1492 /* Send pkt in an aggregate if AMPDU frame. */
1493 if (ampduframe)
1494 qos = mwl8k_qos_setbit_ack(qos,
1495 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1496 else
1497 qos = mwl8k_qos_setbit_ack(qos,
1498 MWL8K_TXD_ACK_POLICY_NORMAL);
1499
1500 if (amsduframe)
1501 qos = mwl8k_qos_setbit_amsdu(qos);
1502 }
1503 }
1504
1505 /* Convert to little endian */
1506 tx->qos_control = cpu_to_le16(qos);
1507 tx->status = cpu_to_le32(tx->status);
1508 tx->pkt_phys_addr = cpu_to_le32(dma);
1509 tx->pkt_len = cpu_to_le16(skb->len);
1510
1511 txq->tx_skb[txq->tx_tail].skb = skb;
1512 txq->tx_skb[txq->tx_tail].clone =
1513 skb == org_skb ? NULL : org_skb;
1514
1515 spin_lock_bh(&priv->tx_lock);
1516
1517 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1518 MWL8K_TXD_STATUS_FW_OWNED);
1519 wmb();
1520 txq->tx_stats.len++;
1521 priv->pending_tx_pkts++;
1522 txq->tx_stats.count++;
1523 txq->tx_tail++;
1524
1525 if (txq->tx_tail == MWL8K_TX_DESCS)
1526 txq->tx_tail = 0;
1527 if (txq->tx_head == txq->tx_tail)
1528 ieee80211_stop_queue(hw, index);
1529
1530 if (priv->inconfig) {
1531 /*
1532 * Silently queue packet when we are in the middle of
1533 * a config cycle. Notify firmware only if we are
1534 * waiting for TXQs to empty. If a packet is sent
1535 * before .config() is complete, perhaps it is better
1536 * to drop the packet, as the channel is being changed
1537 * and the packet will end up on the wrong channel.
1538 */
1539 printk(KERN_ERR "%s(): WARNING TX activity while "
1540 "in config\n", __func__);
1541
1542 if (priv->tx_wait != NULL)
1543 mwl8k_tx_start(priv);
1544 } else
1545 mwl8k_tx_start(priv);
1546
1547 spin_unlock_bh(&priv->tx_lock);
1548
1549 return NETDEV_TX_OK;
1550 }
1551
1552
1553 /*
1554 * Command processing.
1555 */
1556
1557 /* Timeout firmware commands after 2000ms */
1558 #define MWL8K_CMD_TIMEOUT_MS 2000
1559
1560 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1561 {
1562 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1563 struct mwl8k_priv *priv = hw->priv;
1564 void __iomem *regs = priv->regs;
1565 dma_addr_t dma_addr;
1566 unsigned int dma_size;
1567 int rc;
1568 u16 __iomem *result;
1569 unsigned long timeout = 0;
1570 u8 buf[32];
1571
1572 cmd->result = 0xFFFF;
1573 dma_size = le16_to_cpu(cmd->length);
1574 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1575 PCI_DMA_BIDIRECTIONAL);
1576 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1577 return -ENOMEM;
1578
1579 if (priv->hostcmd_wait != NULL)
1580 printk(KERN_ERR "WARNING host command in progress\n");
1581
1582 spin_lock_irq(&priv->fw_lock);
1583 priv->hostcmd_wait = &cmd_wait;
1584 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1585 iowrite32(MWL8K_H2A_INT_DOORBELL,
1586 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1587 iowrite32(MWL8K_H2A_INT_DUMMY,
1588 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1589 spin_unlock_irq(&priv->fw_lock);
1590
1591 timeout = wait_for_completion_timeout(&cmd_wait,
1592 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1593
1594 result = &cmd->result;
1595 if (!timeout) {
1596 spin_lock_irq(&priv->fw_lock);
1597 priv->hostcmd_wait = NULL;
1598 spin_unlock_irq(&priv->fw_lock);
1599 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1600 priv->name,
1601 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1602 MWL8K_CMD_TIMEOUT_MS);
1603 rc = -ETIMEDOUT;
1604 } else {
1605 rc = *result ? -EINVAL : 0;
1606 if (rc)
1607 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1608 priv->name,
1609 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1610 *result);
1611 }
1612
1613 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1614 PCI_DMA_BIDIRECTIONAL);
1615 return rc;
1616 }
1617
1618 /*
1619 * GET_HW_SPEC.
1620 */
1621 struct mwl8k_cmd_get_hw_spec {
1622 struct mwl8k_cmd_pkt header;
1623 __u8 hw_rev;
1624 __u8 host_interface;
1625 __le16 num_mcaddrs;
1626 __u8 perm_addr[IEEE80211_ADDR_LEN];
1627 __le16 region_code;
1628 __le32 fw_rev;
1629 __le32 ps_cookie;
1630 __le32 caps;
1631 __u8 mcs_bitmap[16];
1632 __le32 rx_queue_ptr;
1633 __le32 num_tx_queues;
1634 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1635 __le32 caps2;
1636 __le32 num_tx_desc_per_queue;
1637 __le32 total_rx_desc;
1638 } __attribute__((packed));
1639
1640 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1641 {
1642 struct mwl8k_priv *priv = hw->priv;
1643 struct mwl8k_cmd_get_hw_spec *cmd;
1644 int rc;
1645 int i;
1646
1647 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1648 if (cmd == NULL)
1649 return -ENOMEM;
1650
1651 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1652 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1653
1654 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1655 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1656 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1657 cmd->num_tx_queues = MWL8K_TX_QUEUES;
1658 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1659 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1660 cmd->num_tx_desc_per_queue = MWL8K_TX_DESCS;
1661 cmd->total_rx_desc = MWL8K_RX_DESCS;
1662
1663 rc = mwl8k_post_cmd(hw, &cmd->header);
1664
1665 if (!rc) {
1666 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1667 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1668 priv->fw_rev = cmd->fw_rev;
1669 priv->hw_rev = cmd->hw_rev;
1670 priv->region_code = le16_to_cpu(cmd->region_code);
1671 }
1672
1673 kfree(cmd);
1674 return rc;
1675 }
1676
1677 /*
1678 * CMD_MAC_MULTICAST_ADR.
1679 */
1680 struct mwl8k_cmd_mac_multicast_adr {
1681 struct mwl8k_cmd_pkt header;
1682 __le16 action;
1683 __le16 numaddr;
1684 __u8 addr[1][IEEE80211_ADDR_LEN];
1685 };
1686
1687 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1688 static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1689 int mc_count,
1690 struct dev_addr_list *mclist)
1691 {
1692 struct mwl8k_cmd_mac_multicast_adr *cmd;
1693 int index = 0;
1694 int rc;
1695 int size = sizeof(*cmd) + ((mc_count - 1) * IEEE80211_ADDR_LEN);
1696 cmd = kzalloc(size, GFP_KERNEL);
1697 if (cmd == NULL)
1698 return -ENOMEM;
1699
1700 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1701 cmd->header.length = cpu_to_le16(size);
1702 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1703 cmd->numaddr = cpu_to_le16(mc_count);
1704 while ((index < mc_count) && mclist) {
1705 if (mclist->da_addrlen != IEEE80211_ADDR_LEN) {
1706 rc = -EINVAL;
1707 goto mwl8k_cmd_mac_multicast_adr_exit;
1708 }
1709 memcpy(cmd->addr[index], mclist->da_addr, IEEE80211_ADDR_LEN);
1710 index++;
1711 mclist = mclist->next;
1712 }
1713
1714 rc = mwl8k_post_cmd(hw, &cmd->header);
1715
1716 mwl8k_cmd_mac_multicast_adr_exit:
1717 kfree(cmd);
1718 return rc;
1719 }
1720
1721 /*
1722 * CMD_802_11_GET_STAT.
1723 */
1724 struct mwl8k_cmd_802_11_get_stat {
1725 struct mwl8k_cmd_pkt header;
1726 __le16 action;
1727 __le32 stats[64];
1728 } __attribute__((packed));
1729
1730 #define MWL8K_STAT_ACK_FAILURE 9
1731 #define MWL8K_STAT_RTS_FAILURE 12
1732 #define MWL8K_STAT_FCS_ERROR 24
1733 #define MWL8K_STAT_RTS_SUCCESS 11
1734
1735 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1736 struct ieee80211_low_level_stats *stats)
1737 {
1738 struct mwl8k_cmd_802_11_get_stat *cmd;
1739 int rc;
1740
1741 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1742 if (cmd == NULL)
1743 return -ENOMEM;
1744
1745 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1746 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1747 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1748
1749 rc = mwl8k_post_cmd(hw, &cmd->header);
1750 if (!rc) {
1751 stats->dot11ACKFailureCount =
1752 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1753 stats->dot11RTSFailureCount =
1754 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1755 stats->dot11FCSErrorCount =
1756 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1757 stats->dot11RTSSuccessCount =
1758 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1759 }
1760 kfree(cmd);
1761
1762 return rc;
1763 }
1764
1765 /*
1766 * CMD_802_11_RADIO_CONTROL.
1767 */
1768 struct mwl8k_cmd_802_11_radio_control {
1769 struct mwl8k_cmd_pkt header;
1770 __le16 action;
1771 __le16 control;
1772 __le16 radio_on;
1773 } __attribute__((packed));
1774
1775 static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
1776 {
1777 struct mwl8k_priv *priv = hw->priv;
1778 struct mwl8k_cmd_802_11_radio_control *cmd;
1779 int rc;
1780
1781 if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
1782 !(enable & MWL8K_RADIO_FORCE))
1783 return 0;
1784
1785 enable &= MWL8K_RADIO_ENABLE;
1786
1787 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1788 if (cmd == NULL)
1789 return -ENOMEM;
1790
1791 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1792 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1793 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1794 cmd->control = cpu_to_le16(priv->radio_preamble);
1795 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1796
1797 rc = mwl8k_post_cmd(hw, &cmd->header);
1798 kfree(cmd);
1799
1800 if (!rc)
1801 priv->radio_state = enable;
1802
1803 return rc;
1804 }
1805
1806 static int
1807 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1808 {
1809 struct mwl8k_priv *priv;
1810
1811 if (hw == NULL || hw->priv == NULL)
1812 return -EINVAL;
1813 priv = hw->priv;
1814
1815 priv->radio_preamble = (short_preamble ?
1816 MWL8K_RADIO_SHORT_PREAMBLE :
1817 MWL8K_RADIO_LONG_PREAMBLE);
1818
1819 return mwl8k_cmd_802_11_radio_control(hw,
1820 MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
1821 }
1822
1823 /*
1824 * CMD_802_11_RF_TX_POWER.
1825 */
1826 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1827
1828 struct mwl8k_cmd_802_11_rf_tx_power {
1829 struct mwl8k_cmd_pkt header;
1830 __le16 action;
1831 __le16 support_level;
1832 __le16 current_level;
1833 __le16 reserved;
1834 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1835 } __attribute__((packed));
1836
1837 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1838 {
1839 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1840 int rc;
1841
1842 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1843 if (cmd == NULL)
1844 return -ENOMEM;
1845
1846 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1847 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1848 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1849 cmd->support_level = cpu_to_le16(dBm);
1850
1851 rc = mwl8k_post_cmd(hw, &cmd->header);
1852 kfree(cmd);
1853
1854 return rc;
1855 }
1856
1857 /*
1858 * CMD_SET_PRE_SCAN.
1859 */
1860 struct mwl8k_cmd_set_pre_scan {
1861 struct mwl8k_cmd_pkt header;
1862 } __attribute__((packed));
1863
1864 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1865 {
1866 struct mwl8k_cmd_set_pre_scan *cmd;
1867 int rc;
1868
1869 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1870 if (cmd == NULL)
1871 return -ENOMEM;
1872
1873 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1874 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1875
1876 rc = mwl8k_post_cmd(hw, &cmd->header);
1877 kfree(cmd);
1878
1879 return rc;
1880 }
1881
1882 /*
1883 * CMD_SET_POST_SCAN.
1884 */
1885 struct mwl8k_cmd_set_post_scan {
1886 struct mwl8k_cmd_pkt header;
1887 __le32 isibss;
1888 __u8 bssid[IEEE80211_ADDR_LEN];
1889 } __attribute__((packed));
1890
1891 static int
1892 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[IEEE80211_ADDR_LEN])
1893 {
1894 struct mwl8k_cmd_set_post_scan *cmd;
1895 int rc;
1896
1897 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1898 if (cmd == NULL)
1899 return -ENOMEM;
1900
1901 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1902 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1903 cmd->isibss = 0;
1904 memcpy(cmd->bssid, mac, IEEE80211_ADDR_LEN);
1905
1906 rc = mwl8k_post_cmd(hw, &cmd->header);
1907 kfree(cmd);
1908
1909 return rc;
1910 }
1911
1912 /*
1913 * CMD_SET_RF_CHANNEL.
1914 */
1915 struct mwl8k_cmd_set_rf_channel {
1916 struct mwl8k_cmd_pkt header;
1917 __le16 action;
1918 __u8 current_channel;
1919 __le32 channel_flags;
1920 } __attribute__((packed));
1921
1922 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1923 struct ieee80211_channel *channel)
1924 {
1925 struct mwl8k_cmd_set_rf_channel *cmd;
1926 int rc;
1927
1928 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1929 if (cmd == NULL)
1930 return -ENOMEM;
1931
1932 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1933 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1934 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1935 cmd->current_channel = channel->hw_value;
1936 if (channel->band == IEEE80211_BAND_2GHZ)
1937 cmd->channel_flags = cpu_to_le32(0x00000081);
1938 else
1939 cmd->channel_flags = cpu_to_le32(0x00000000);
1940
1941 rc = mwl8k_post_cmd(hw, &cmd->header);
1942 kfree(cmd);
1943
1944 return rc;
1945 }
1946
1947 /*
1948 * CMD_SET_SLOT.
1949 */
1950 struct mwl8k_cmd_set_slot {
1951 struct mwl8k_cmd_pkt header;
1952 __le16 action;
1953 __u8 short_slot;
1954 } __attribute__((packed));
1955
1956 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1957 {
1958 struct mwl8k_cmd_set_slot *cmd;
1959 int rc;
1960
1961 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1962 if (cmd == NULL)
1963 return -ENOMEM;
1964
1965 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1966 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1967 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1968 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1969
1970 rc = mwl8k_post_cmd(hw, &cmd->header);
1971 kfree(cmd);
1972
1973 return rc;
1974 }
1975
1976 /*
1977 * CMD_MIMO_CONFIG.
1978 */
1979 struct mwl8k_cmd_mimo_config {
1980 struct mwl8k_cmd_pkt header;
1981 __le32 action;
1982 __u8 rx_antenna_map;
1983 __u8 tx_antenna_map;
1984 } __attribute__((packed));
1985
1986 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1987 {
1988 struct mwl8k_cmd_mimo_config *cmd;
1989 int rc;
1990
1991 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1992 if (cmd == NULL)
1993 return -ENOMEM;
1994
1995 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1996 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1997 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1998 cmd->rx_antenna_map = rx;
1999 cmd->tx_antenna_map = tx;
2000
2001 rc = mwl8k_post_cmd(hw, &cmd->header);
2002 kfree(cmd);
2003
2004 return rc;
2005 }
2006
2007 /*
2008 * CMD_ENABLE_SNIFFER.
2009 */
2010 struct mwl8k_cmd_enable_sniffer {
2011 struct mwl8k_cmd_pkt header;
2012 __le32 action;
2013 } __attribute__((packed));
2014
2015 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2016 {
2017 struct mwl8k_cmd_enable_sniffer *cmd;
2018 int rc;
2019
2020 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2021 if (cmd == NULL)
2022 return -ENOMEM;
2023
2024 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2025 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2026 cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
2027
2028 rc = mwl8k_post_cmd(hw, &cmd->header);
2029 kfree(cmd);
2030
2031 return rc;
2032 }
2033
2034 /*
2035 * CMD_SET_RATE_ADAPT_MODE.
2036 */
2037 struct mwl8k_cmd_set_rate_adapt_mode {
2038 struct mwl8k_cmd_pkt header;
2039 __le16 action;
2040 __le16 mode;
2041 } __attribute__((packed));
2042
2043 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2044 {
2045 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2046 int rc;
2047
2048 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2049 if (cmd == NULL)
2050 return -ENOMEM;
2051
2052 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2053 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2054 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2055 cmd->mode = cpu_to_le16(mode);
2056
2057 rc = mwl8k_post_cmd(hw, &cmd->header);
2058 kfree(cmd);
2059
2060 return rc;
2061 }
2062
2063 /*
2064 * CMD_SET_WMM_MODE.
2065 */
2066 struct mwl8k_cmd_set_wmm {
2067 struct mwl8k_cmd_pkt header;
2068 __le16 action;
2069 } __attribute__((packed));
2070
2071 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2072 {
2073 struct mwl8k_priv *priv = hw->priv;
2074 struct mwl8k_cmd_set_wmm *cmd;
2075 int rc;
2076
2077 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2078 if (cmd == NULL)
2079 return -ENOMEM;
2080
2081 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2082 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2083 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2084
2085 rc = mwl8k_post_cmd(hw, &cmd->header);
2086 kfree(cmd);
2087
2088 if (!rc)
2089 priv->wmm_mode = enable;
2090
2091 return rc;
2092 }
2093
2094 /*
2095 * CMD_SET_RTS_THRESHOLD.
2096 */
2097 struct mwl8k_cmd_rts_threshold {
2098 struct mwl8k_cmd_pkt header;
2099 __le16 action;
2100 __le16 threshold;
2101 } __attribute__((packed));
2102
2103 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2104 u16 action, u16 *threshold)
2105 {
2106 struct mwl8k_cmd_rts_threshold *cmd;
2107 int rc;
2108
2109 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2110 if (cmd == NULL)
2111 return -ENOMEM;
2112
2113 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2114 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2115 cmd->action = cpu_to_le16(action);
2116 cmd->threshold = cpu_to_le16(*threshold);
2117
2118 rc = mwl8k_post_cmd(hw, &cmd->header);
2119 kfree(cmd);
2120
2121 return rc;
2122 }
2123
2124 /*
2125 * CMD_SET_EDCA_PARAMS.
2126 */
2127 struct mwl8k_cmd_set_edca_params {
2128 struct mwl8k_cmd_pkt header;
2129
2130 /* See MWL8K_SET_EDCA_XXX below */
2131 __le16 action;
2132
2133 /* TX opportunity in units of 32 us */
2134 __le16 txop;
2135
2136 /* Log exponent of max contention period: 0...15*/
2137 __u8 log_cw_max;
2138
2139 /* Log exponent of min contention period: 0...15 */
2140 __u8 log_cw_min;
2141
2142 /* Adaptive interframe spacing in units of 32us */
2143 __u8 aifs;
2144
2145 /* TX queue to configure */
2146 __u8 txq;
2147 } __attribute__((packed));
2148
2149 #define MWL8K_GET_EDCA_ALL 0
2150 #define MWL8K_SET_EDCA_CW 0x01
2151 #define MWL8K_SET_EDCA_TXOP 0x02
2152 #define MWL8K_SET_EDCA_AIFS 0x04
2153
2154 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2155 MWL8K_SET_EDCA_TXOP | \
2156 MWL8K_SET_EDCA_AIFS)
2157
2158 static int
2159 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2160 __u16 cw_min, __u16 cw_max,
2161 __u8 aifs, __u16 txop)
2162 {
2163 struct mwl8k_cmd_set_edca_params *cmd;
2164 u32 log_cw_min, log_cw_max;
2165 int rc;
2166
2167 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2168 if (cmd == NULL)
2169 return -ENOMEM;
2170
2171 log_cw_min = ilog2(cw_min+1);
2172 log_cw_max = ilog2(cw_max+1);
2173 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2174 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2175
2176 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2177 cmd->txop = cpu_to_le16(txop);
2178 cmd->log_cw_max = (u8)log_cw_max;
2179 cmd->log_cw_min = (u8)log_cw_min;
2180 cmd->aifs = aifs;
2181 cmd->txq = qnum;
2182
2183 rc = mwl8k_post_cmd(hw, &cmd->header);
2184 kfree(cmd);
2185
2186 return rc;
2187 }
2188
2189 /*
2190 * CMD_FINALIZE_JOIN.
2191 */
2192
2193 /* FJ beacon buffer size is compiled into the firmware. */
2194 #define MWL8K_FJ_BEACON_MAXLEN 128
2195
2196 struct mwl8k_cmd_finalize_join {
2197 struct mwl8k_cmd_pkt header;
2198 __le32 sleep_interval; /* Number of beacon periods to sleep */
2199 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2200 } __attribute__((packed));
2201
2202 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2203 __u16 framelen, __u16 dtim)
2204 {
2205 struct mwl8k_cmd_finalize_join *cmd;
2206 struct ieee80211_mgmt *payload = frame;
2207 u16 hdrlen;
2208 u32 payload_len;
2209 int rc;
2210
2211 if (frame == NULL)
2212 return -EINVAL;
2213
2214 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2215 if (cmd == NULL)
2216 return -ENOMEM;
2217
2218 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2219 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2220
2221 if (dtim)
2222 cmd->sleep_interval = cpu_to_le32(dtim);
2223 else
2224 cmd->sleep_interval = cpu_to_le32(1);
2225
2226 hdrlen = ieee80211_hdrlen(payload->frame_control);
2227
2228 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2229
2230 /* XXX TBD Might just have to abort and return an error */
2231 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2232 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2233 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2234 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2235
2236 payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
2237 MWL8K_FJ_BEACON_MAXLEN : payload_len;
2238
2239 if (payload && payload_len)
2240 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2241
2242 rc = mwl8k_post_cmd(hw, &cmd->header);
2243 kfree(cmd);
2244 return rc;
2245 }
2246
2247 /*
2248 * CMD_UPDATE_STADB.
2249 */
2250 struct mwl8k_cmd_update_sta_db {
2251 struct mwl8k_cmd_pkt header;
2252
2253 /* See STADB_ACTION_TYPE */
2254 __le32 action;
2255
2256 /* Peer MAC address */
2257 __u8 peer_addr[IEEE80211_ADDR_LEN];
2258
2259 __le32 reserved;
2260
2261 /* Peer info - valid during add/update. */
2262 struct peer_capability_info peer_info;
2263 } __attribute__((packed));
2264
2265 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2266 struct ieee80211_vif *vif, __u32 action)
2267 {
2268 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2269 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2270 struct mwl8k_cmd_update_sta_db *cmd;
2271 struct peer_capability_info *peer_info;
2272 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2273 DECLARE_MAC_BUF(mac);
2274 int rc;
2275 __u8 count, *rates;
2276
2277 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2278 if (cmd == NULL)
2279 return -ENOMEM;
2280
2281 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2282 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2283
2284 cmd->action = cpu_to_le32(action);
2285 peer_info = &cmd->peer_info;
2286 memcpy(cmd->peer_addr, mv_vif->bssid, IEEE80211_ADDR_LEN);
2287
2288 switch (action) {
2289 case MWL8K_STA_DB_ADD_ENTRY:
2290 case MWL8K_STA_DB_MODIFY_ENTRY:
2291 /* Build peer_info block */
2292 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2293 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2294 peer_info->interop = 1;
2295 peer_info->amsdu_enabled = 0;
2296
2297 rates = peer_info->legacy_rates;
2298 for (count = 0 ; count < mv_vif->legacy_nrates; count++)
2299 rates[count] = bitrates[count].hw_value;
2300
2301 rc = mwl8k_post_cmd(hw, &cmd->header);
2302 if (rc == 0)
2303 mv_vif->peer_id = peer_info->station_id;
2304
2305 break;
2306
2307 case MWL8K_STA_DB_DEL_ENTRY:
2308 case MWL8K_STA_DB_FLUSH:
2309 default:
2310 rc = mwl8k_post_cmd(hw, &cmd->header);
2311 if (rc == 0)
2312 mv_vif->peer_id = 0;
2313 break;
2314 }
2315 kfree(cmd);
2316
2317 return rc;
2318 }
2319
2320 /*
2321 * CMD_SET_AID.
2322 */
2323 #define IEEE80211_OPMODE_DISABLED 0x00
2324 #define IEEE80211_OPMODE_NON_MEMBER_PROT_MODE 0x01
2325 #define IEEE80211_OPMODE_ONE_20MHZ_STA_PROT_MODE 0x02
2326 #define IEEE80211_OPMODE_HTMIXED_PROT_MODE 0x03
2327
2328 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2329
2330 #define MWL8K_FRAME_PROT_DISABLED 0x00
2331 #define MWL8K_FRAME_PROT_11G 0x07
2332 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2333 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2334 #define MWL8K_FRAME_PROT_MASK 0x07
2335
2336 struct mwl8k_cmd_update_set_aid {
2337 struct mwl8k_cmd_pkt header;
2338 __le16 aid;
2339
2340 /* AP's MAC address (BSSID) */
2341 __u8 bssid[IEEE80211_ADDR_LEN];
2342 __le16 protection_mode;
2343 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2344 } __attribute__((packed));
2345
2346 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2347 struct ieee80211_vif *vif)
2348 {
2349 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2350 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2351 struct mwl8k_cmd_update_set_aid *cmd;
2352 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2353 int count;
2354 u16 prot_mode;
2355 int rc;
2356
2357 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2358 if (cmd == NULL)
2359 return -ENOMEM;
2360
2361 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2362 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2363 cmd->aid = cpu_to_le16(info->aid);
2364
2365 memcpy(cmd->bssid, mv_vif->bssid, IEEE80211_ADDR_LEN);
2366
2367 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2368
2369 if (info->use_cts_prot) {
2370 prot_mode = MWL8K_FRAME_PROT_11G;
2371 } else {
2372 switch (info->ht.operation_mode &
2373 IEEE80211_HT_OP_MODE_PROTECTION) {
2374 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2375 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2376 break;
2377 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2378 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2379 break;
2380 default:
2381 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2382 break;
2383 }
2384 }
2385
2386 cmd->protection_mode = cpu_to_le16(prot_mode);
2387
2388 for (count = 0; count < mv_vif->legacy_nrates; count++)
2389 cmd->supp_rates[count] = bitrates[count].hw_value;
2390
2391 rc = mwl8k_post_cmd(hw, &cmd->header);
2392 kfree(cmd);
2393
2394 return rc;
2395 }
2396
2397 /*
2398 * CMD_SET_RATE.
2399 */
2400 struct mwl8k_cmd_update_rateset {
2401 struct mwl8k_cmd_pkt header;
2402 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2403
2404 /* Bitmap for supported MCS codes. */
2405 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2406 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2407 } __attribute__((packed));
2408
2409 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2410 struct ieee80211_vif *vif)
2411 {
2412 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2413 struct mwl8k_cmd_update_rateset *cmd;
2414 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2415 int count;
2416 int rc;
2417
2418 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2419 if (cmd == NULL)
2420 return -ENOMEM;
2421
2422 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2423 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2424
2425 for (count = 0; count < mv_vif->legacy_nrates; count++)
2426 cmd->legacy_rates[count] = bitrates[count].hw_value;
2427
2428 rc = mwl8k_post_cmd(hw, &cmd->header);
2429 kfree(cmd);
2430
2431 return rc;
2432 }
2433
2434 /*
2435 * CMD_USE_FIXED_RATE.
2436 */
2437 #define MWL8K_RATE_TABLE_SIZE 8
2438 #define MWL8K_UCAST_RATE 0
2439 #define MWL8K_MCAST_RATE 1
2440 #define MWL8K_BCAST_RATE 2
2441
2442 #define MWL8K_USE_FIXED_RATE 0x0001
2443 #define MWL8K_USE_AUTO_RATE 0x0002
2444
2445 struct mwl8k_rate_entry {
2446 /* Set to 1 if HT rate, 0 if legacy. */
2447 __le32 is_ht_rate;
2448
2449 /* Set to 1 to use retry_count field. */
2450 __le32 enable_retry;
2451
2452 /* Specified legacy rate or MCS. */
2453 __le32 rate;
2454
2455 /* Number of allowed retries. */
2456 __le32 retry_count;
2457 } __attribute__((packed));
2458
2459 struct mwl8k_rate_table {
2460 /* 1 to allow specified rate and below */
2461 __le32 allow_rate_drop;
2462 __le32 num_rates;
2463 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2464 } __attribute__((packed));
2465
2466 struct mwl8k_cmd_use_fixed_rate {
2467 struct mwl8k_cmd_pkt header;
2468 __le32 action;
2469 struct mwl8k_rate_table rate_table;
2470
2471 /* Unicast, Broadcast or Multicast */
2472 __le32 rate_type;
2473 __le32 reserved1;
2474 __le32 reserved2;
2475 } __attribute__((packed));
2476
2477 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2478 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2479 {
2480 struct mwl8k_cmd_use_fixed_rate *cmd;
2481 int count;
2482 int rc;
2483
2484 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2485 if (cmd == NULL)
2486 return -ENOMEM;
2487
2488 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2489 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2490
2491 cmd->action = cpu_to_le32(action);
2492 cmd->rate_type = cpu_to_le32(rate_type);
2493
2494 if (rate_table != NULL) {
2495 /* Copy over each field manually so
2496 * that bitflipping can be done
2497 */
2498 cmd->rate_table.allow_rate_drop =
2499 cpu_to_le32(rate_table->allow_rate_drop);
2500 cmd->rate_table.num_rates =
2501 cpu_to_le32(rate_table->num_rates);
2502
2503 for (count = 0; count < rate_table->num_rates; count++) {
2504 struct mwl8k_rate_entry *dst =
2505 &cmd->rate_table.rate_entry[count];
2506 struct mwl8k_rate_entry *src =
2507 &rate_table->rate_entry[count];
2508
2509 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2510 dst->enable_retry = cpu_to_le32(src->enable_retry);
2511 dst->rate = cpu_to_le32(src->rate);
2512 dst->retry_count = cpu_to_le32(src->retry_count);
2513 }
2514 }
2515
2516 rc = mwl8k_post_cmd(hw, &cmd->header);
2517 kfree(cmd);
2518
2519 return rc;
2520 }
2521
2522
2523 /*
2524 * Interrupt handling.
2525 */
2526 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2527 {
2528 struct ieee80211_hw *hw = dev_id;
2529 struct mwl8k_priv *priv = hw->priv;
2530 u32 status;
2531
2532 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2533 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2534
2535 status &= priv->int_mask;
2536 if (!status)
2537 return IRQ_NONE;
2538
2539 if (status & MWL8K_A2H_INT_TX_DONE)
2540 tasklet_schedule(&priv->tx_reclaim_task);
2541
2542 if (status & MWL8K_A2H_INT_RX_READY) {
2543 while (rxq_process(hw, 0, 1))
2544 rxq_refill(hw, 0, 1);
2545 }
2546
2547 if (status & MWL8K_A2H_INT_OPC_DONE) {
2548 if (priv->hostcmd_wait != NULL) {
2549 complete(priv->hostcmd_wait);
2550 priv->hostcmd_wait = NULL;
2551 }
2552 }
2553
2554 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2555 if (!priv->inconfig &&
2556 priv->radio_state &&
2557 mwl8k_txq_busy(priv))
2558 mwl8k_tx_start(priv);
2559 }
2560
2561 return IRQ_HANDLED;
2562 }
2563
2564
2565 /*
2566 * Core driver operations.
2567 */
2568 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2569 {
2570 struct mwl8k_priv *priv = hw->priv;
2571 int index = skb_get_queue_mapping(skb);
2572 int rc;
2573
2574 if (priv->current_channel == NULL) {
2575 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2576 "disabled\n", priv->name);
2577 dev_kfree_skb(skb);
2578 return NETDEV_TX_OK;
2579 }
2580
2581 rc = mwl8k_txq_xmit(hw, index, skb);
2582
2583 return rc;
2584 }
2585
2586 struct mwl8k_work_struct {
2587 /* Initialized by mwl8k_queue_work(). */
2588 struct work_struct wt;
2589
2590 /* Required field passed in to mwl8k_queue_work(). */
2591 struct ieee80211_hw *hw;
2592
2593 /* Required field passed in to mwl8k_queue_work(). */
2594 int (*wfunc)(struct work_struct *w);
2595
2596 /* Initialized by mwl8k_queue_work(). */
2597 struct completion *cmd_wait;
2598
2599 /* Result code. */
2600 int rc;
2601
2602 /*
2603 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2604 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2605 */
2606 u32 options;
2607
2608 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2609 unsigned long timeout_ms;
2610
2611 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2612 u32 txwait_attempts;
2613
2614 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2615 u32 tx_timeout_ms;
2616 u32 step;
2617 };
2618
2619 /* Flags controlling behavior of config queue requests */
2620
2621 /* Caller spins while waiting for completion. */
2622 #define MWL8K_WQ_SPIN 0x00000001
2623
2624 /* Wait for TX queues to empty before proceeding with configuration. */
2625 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2626
2627 /* Queue request and return immediately. */
2628 #define MWL8K_WQ_POST_REQUEST 0x00000004
2629
2630 /*
2631 * Caller sleeps and waits for task complete notification.
2632 * Do not use in atomic context.
2633 */
2634 #define MWL8K_WQ_SLEEP 0x00000008
2635
2636 /* Free work struct when task is done. */
2637 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2638
2639 /*
2640 * Config request is queued and returns to caller imediately. Use
2641 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2642 * when this flag is set.
2643 */
2644 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2645 MWL8K_WQ_FREE_WORKSTRUCT)
2646
2647 /* Default work queue behavior is to sleep and wait for tx completion. */
2648 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2649
2650 /*
2651 * Default config request timeout. Add adjustments to make sure the
2652 * config thread waits long enough for both tx wait and cmd wait before
2653 * timing out.
2654 */
2655
2656 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2657 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2658
2659 /* Default number of TX wait attempts. */
2660 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2661
2662 /* Total time to wait for TXQ to drain. */
2663 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2664 MWL8K_WQ_TXWAIT_ATTEMPTS)
2665
2666 /* Scheduling slop. */
2667 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2668
2669 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2670 MWL8K_TXWAIT_MS + \
2671 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2672
2673 static void mwl8k_config_thread(struct work_struct *wt)
2674 {
2675 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2676 struct ieee80211_hw *hw = worker->hw;
2677 struct mwl8k_priv *priv = hw->priv;
2678 int rc = 0;
2679
2680 spin_lock_irq(&priv->tx_lock);
2681 priv->inconfig = true;
2682 spin_unlock_irq(&priv->tx_lock);
2683
2684 ieee80211_stop_queues(hw);
2685
2686 /*
2687 * Wait for host queues to drain before doing PHY
2688 * reconfiguration. This avoids interrupting any in-flight
2689 * DMA transfers to the hardware.
2690 */
2691 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2692 u32 timeout;
2693 u32 time_remaining;
2694 u32 iter;
2695 u32 tx_wait_attempts = worker->txwait_attempts;
2696
2697 time_remaining = worker->tx_timeout_ms;
2698 if (!tx_wait_attempts)
2699 tx_wait_attempts = 1;
2700
2701 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2702 if (!timeout)
2703 timeout = 1;
2704
2705 iter = tx_wait_attempts;
2706 do {
2707 int wait_time;
2708
2709 if (time_remaining > timeout) {
2710 time_remaining -= timeout;
2711 wait_time = timeout;
2712 } else
2713 wait_time = time_remaining;
2714
2715 if (!wait_time)
2716 wait_time = 1;
2717
2718 rc = mwl8k_tx_wait_empty(hw, wait_time);
2719 if (rc)
2720 printk(KERN_ERR "%s() txwait timeout=%ums "
2721 "Retry:%u/%u\n", __func__, timeout,
2722 tx_wait_attempts - iter + 1,
2723 tx_wait_attempts);
2724
2725 } while (rc && --iter);
2726
2727 rc = iter ? 0 : -ETIMEDOUT;
2728 }
2729 if (!rc)
2730 rc = worker->wfunc(wt);
2731
2732 spin_lock_irq(&priv->tx_lock);
2733 priv->inconfig = false;
2734 if (priv->pending_tx_pkts && priv->radio_state)
2735 mwl8k_tx_start(priv);
2736 spin_unlock_irq(&priv->tx_lock);
2737 ieee80211_wake_queues(hw);
2738
2739 worker->rc = rc;
2740 if (worker->options & MWL8K_WQ_SLEEP)
2741 complete(worker->cmd_wait);
2742
2743 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2744 kfree(wt);
2745 }
2746
2747 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2748 struct mwl8k_work_struct *worker,
2749 struct workqueue_struct *wqueue,
2750 int (*wfunc)(struct work_struct *w))
2751 {
2752 unsigned long timeout = 0;
2753 int rc = 0;
2754
2755 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2756
2757 if (!worker->timeout_ms)
2758 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2759
2760 if (!worker->options)
2761 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2762
2763 if (!worker->txwait_attempts)
2764 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2765
2766 if (!worker->tx_timeout_ms)
2767 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2768
2769 worker->hw = hw;
2770 worker->cmd_wait = &cmd_wait;
2771 worker->rc = 1;
2772 worker->wfunc = wfunc;
2773
2774 INIT_WORK(&worker->wt, mwl8k_config_thread);
2775 queue_work(wqueue, &worker->wt);
2776
2777 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2778 rc = 0;
2779 } else {
2780 if (worker->options & MWL8K_WQ_SPIN) {
2781 timeout = worker->timeout_ms;
2782 while (timeout && (worker->rc > 0)) {
2783 mdelay(1);
2784 timeout--;
2785 }
2786 } else if (worker->options & MWL8K_WQ_SLEEP)
2787 timeout = wait_for_completion_timeout(&cmd_wait,
2788 msecs_to_jiffies(worker->timeout_ms));
2789
2790 if (timeout)
2791 rc = worker->rc;
2792 else {
2793 cancel_work_sync(&worker->wt);
2794 rc = -ETIMEDOUT;
2795 }
2796 }
2797
2798 return rc;
2799 }
2800
2801 struct mwl8k_start_worker {
2802 struct mwl8k_work_struct header;
2803 };
2804
2805 static int mwl8k_start_wt(struct work_struct *wt)
2806 {
2807 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2808 struct ieee80211_hw *hw = worker->header.hw;
2809 struct mwl8k_priv *priv = hw->priv;
2810 int rc = 0;
2811
2812 if (priv->vif != NULL) {
2813 rc = -EIO;
2814 goto mwl8k_start_exit;
2815 }
2816
2817 /* Turn on radio */
2818 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2819 rc = -EIO;
2820 goto mwl8k_start_exit;
2821 }
2822
2823 /* Purge TX/RX HW queues */
2824 if (mwl8k_cmd_set_pre_scan(hw)) {
2825 rc = -EIO;
2826 goto mwl8k_start_exit;
2827 }
2828
2829 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2830 rc = -EIO;
2831 goto mwl8k_start_exit;
2832 }
2833
2834 /* Enable firmware rate adaptation */
2835 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2836 rc = -EIO;
2837 goto mwl8k_start_exit;
2838 }
2839
2840 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2841 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2842 rc = -EIO;
2843 goto mwl8k_start_exit;
2844 }
2845
2846 /* Disable sniffer mode */
2847 if (mwl8k_enable_sniffer(hw, 0))
2848 rc = -EIO;
2849
2850 mwl8k_start_exit:
2851 return rc;
2852 }
2853
2854 static int mwl8k_start(struct ieee80211_hw *hw)
2855 {
2856 struct mwl8k_start_worker *worker;
2857 struct mwl8k_priv *priv = hw->priv;
2858 int rc;
2859
2860 /* Enable tx reclaim tasklet */
2861 tasklet_enable(&priv->tx_reclaim_task);
2862
2863 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2864 IRQF_SHARED, MWL8K_NAME, hw);
2865 if (rc) {
2866 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2867 priv->name);
2868 rc = -EIO;
2869 goto mwl8k_start_disable_tasklet;
2870 }
2871
2872 /* Enable interrupts */
2873 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2874
2875 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2876 if (worker == NULL) {
2877 rc = -ENOMEM;
2878 goto mwl8k_start_disable_irq;
2879 }
2880
2881 rc = mwl8k_queue_work(hw, &worker->header,
2882 priv->config_wq, mwl8k_start_wt);
2883 kfree(worker);
2884 if (!rc)
2885 return rc;
2886
2887 if (rc == -ETIMEDOUT)
2888 printk(KERN_ERR "%s() timed out\n", __func__);
2889
2890 rc = -EIO;
2891
2892 mwl8k_start_disable_irq:
2893 spin_lock_irq(&priv->tx_lock);
2894 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2895 spin_unlock_irq(&priv->tx_lock);
2896 free_irq(priv->pdev->irq, hw);
2897
2898 mwl8k_start_disable_tasklet:
2899 tasklet_disable(&priv->tx_reclaim_task);
2900
2901 return rc;
2902 }
2903
2904 struct mwl8k_stop_worker {
2905 struct mwl8k_work_struct header;
2906 };
2907
2908 static int mwl8k_stop_wt(struct work_struct *wt)
2909 {
2910 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2911 struct ieee80211_hw *hw = worker->header.hw;
2912 int rc;
2913
2914 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
2915
2916 return rc;
2917 }
2918
2919 static void mwl8k_stop(struct ieee80211_hw *hw)
2920 {
2921 int rc;
2922 struct mwl8k_stop_worker *worker;
2923 struct mwl8k_priv *priv = hw->priv;
2924 int i;
2925
2926 if (priv->vif != NULL)
2927 return;
2928
2929 ieee80211_stop_queues(hw);
2930
2931 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2932 if (worker == NULL)
2933 return;
2934
2935 rc = mwl8k_queue_work(hw, &worker->header,
2936 priv->config_wq, mwl8k_stop_wt);
2937 kfree(worker);
2938 if (rc == -ETIMEDOUT)
2939 printk(KERN_ERR "%s() timed out\n", __func__);
2940
2941 /* Disable interrupts */
2942 spin_lock_irq(&priv->tx_lock);
2943 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2944 spin_unlock_irq(&priv->tx_lock);
2945 free_irq(priv->pdev->irq, hw);
2946
2947 /* Stop finalize join worker */
2948 cancel_work_sync(&priv->finalize_join_worker);
2949 if (priv->beacon_skb != NULL)
2950 dev_kfree_skb(priv->beacon_skb);
2951
2952 /* Stop tx reclaim tasklet */
2953 tasklet_disable(&priv->tx_reclaim_task);
2954
2955 /* Stop config thread */
2956 flush_workqueue(priv->config_wq);
2957
2958 /* Return all skbs to mac80211 */
2959 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2960 mwl8k_txq_reclaim(hw, i, 1);
2961 }
2962
2963 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2964 struct ieee80211_if_init_conf *conf)
2965 {
2966 struct mwl8k_priv *priv = hw->priv;
2967 struct mwl8k_vif *mwl8k_vif;
2968
2969 /*
2970 * We only support one active interface at a time.
2971 */
2972 if (priv->vif != NULL)
2973 return -EBUSY;
2974
2975 /*
2976 * We only support managed interfaces for now.
2977 */
2978 if (conf->type != NL80211_IFTYPE_STATION &&
2979 conf->type != NL80211_IFTYPE_MONITOR)
2980 return -EINVAL;
2981
2982 /* Clean out driver private area */
2983 mwl8k_vif = MWL8K_VIF(conf->vif);
2984 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2985
2986 /* Save the mac address */
2987 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, IEEE80211_ADDR_LEN);
2988
2989 /* Back pointer to parent config block */
2990 mwl8k_vif->priv = priv;
2991
2992 /* Setup initial PHY parameters */
2993 memcpy(mwl8k_vif->legacy_rates ,
2994 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2995 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2996
2997 /* Set Initial sequence number to zero */
2998 mwl8k_vif->seqno = 0;
2999
3000 priv->vif = conf->vif;
3001 priv->current_channel = NULL;
3002
3003 return 0;
3004 }
3005
3006 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3007 struct ieee80211_if_init_conf *conf)
3008 {
3009 struct mwl8k_priv *priv = hw->priv;
3010
3011 if (priv->vif == NULL)
3012 return;
3013
3014 priv->vif = NULL;
3015 }
3016
3017 struct mwl8k_config_worker {
3018 struct mwl8k_work_struct header;
3019 u32 changed;
3020 };
3021
3022 static int mwl8k_config_wt(struct work_struct *wt)
3023 {
3024 struct mwl8k_config_worker *worker =
3025 (struct mwl8k_config_worker *)wt;
3026 struct ieee80211_hw *hw = worker->header.hw;
3027 struct ieee80211_conf *conf = &hw->conf;
3028 struct mwl8k_priv *priv = hw->priv;
3029 int rc = 0;
3030
3031 if (!conf->radio_enabled) {
3032 mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3033 priv->current_channel = NULL;
3034 rc = 0;
3035 goto mwl8k_config_exit;
3036 }
3037
3038 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
3039 rc = -EINVAL;
3040 goto mwl8k_config_exit;
3041 }
3042
3043 priv->current_channel = conf->channel;
3044
3045 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
3046 rc = -EINVAL;
3047 goto mwl8k_config_exit;
3048 }
3049
3050 if (conf->power_level > 18)
3051 conf->power_level = 18;
3052 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
3053 rc = -EINVAL;
3054 goto mwl8k_config_exit;
3055 }
3056
3057 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
3058 rc = -EINVAL;
3059
3060 mwl8k_config_exit:
3061 return rc;
3062 }
3063
3064 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3065 {
3066 int rc = 0;
3067 struct mwl8k_config_worker *worker;
3068 struct mwl8k_priv *priv = hw->priv;
3069
3070 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3071 if (worker == NULL)
3072 return -ENOMEM;
3073
3074 worker->changed = changed;
3075 rc = mwl8k_queue_work(hw, &worker->header,
3076 priv->config_wq, mwl8k_config_wt);
3077 if (rc == -ETIMEDOUT) {
3078 printk(KERN_ERR "%s() timed out.\n", __func__);
3079 rc = -EINVAL;
3080 }
3081
3082 kfree(worker);
3083
3084 /*
3085 * mac80211 will crash on anything other than -EINVAL on
3086 * error. Looks like wireless extensions which calls mac80211
3087 * may be the actual culprit...
3088 */
3089 return rc ? -EINVAL : 0;
3090 }
3091
3092 static int mwl8k_config_interface(struct ieee80211_hw *hw,
3093 struct ieee80211_vif *vif,
3094 struct ieee80211_if_conf *conf)
3095 {
3096 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3097 u32 changed = conf->changed;
3098
3099 if (changed & IEEE80211_IFCC_BSSID)
3100 memcpy(mv_vif->bssid, conf->bssid, IEEE80211_ADDR_LEN);
3101
3102 return 0;
3103 }
3104
3105 struct mwl8k_bss_info_changed_worker {
3106 struct mwl8k_work_struct header;
3107 struct ieee80211_vif *vif;
3108 struct ieee80211_bss_conf *info;
3109 u32 changed;
3110 };
3111
3112 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3113 {
3114 struct mwl8k_bss_info_changed_worker *worker =
3115 (struct mwl8k_bss_info_changed_worker *)wt;
3116 struct ieee80211_hw *hw = worker->header.hw;
3117 struct ieee80211_vif *vif = worker->vif;
3118 struct ieee80211_bss_conf *info = worker->info;
3119 u32 changed;
3120 int rc;
3121
3122 struct mwl8k_priv *priv = hw->priv;
3123 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3124
3125 changed = worker->changed;
3126 priv->capture_beacon = false;
3127
3128 if (info->assoc) {
3129 memcpy(&mwl8k_vif->bss_info, info,
3130 sizeof(struct ieee80211_bss_conf));
3131
3132 /* Install rates */
3133 if (mwl8k_update_rateset(hw, vif))
3134 goto mwl8k_bss_info_changed_exit;
3135
3136 /* Turn on rate adaptation */
3137 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3138 MWL8K_UCAST_RATE, NULL))
3139 goto mwl8k_bss_info_changed_exit;
3140
3141 /* Set radio preamble */
3142 if (mwl8k_set_radio_preamble(hw,
3143 info->use_short_preamble))
3144 goto mwl8k_bss_info_changed_exit;
3145
3146 /* Set slot time */
3147 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3148 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3149 goto mwl8k_bss_info_changed_exit;
3150
3151 /* Update peer rate info */
3152 if (mwl8k_cmd_update_sta_db(hw, vif,
3153 MWL8K_STA_DB_MODIFY_ENTRY))
3154 goto mwl8k_bss_info_changed_exit;
3155
3156 /* Set AID */
3157 if (mwl8k_cmd_set_aid(hw, vif))
3158 goto mwl8k_bss_info_changed_exit;
3159
3160 /*
3161 * Finalize the join. Tell rx handler to process
3162 * next beacon from our BSSID.
3163 */
3164 memcpy(priv->capture_bssid,
3165 mwl8k_vif->bssid, IEEE80211_ADDR_LEN);
3166 priv->capture_beacon = true;
3167 } else {
3168 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3169 memset(&mwl8k_vif->bss_info, 0,
3170 sizeof(struct ieee80211_bss_conf));
3171 memset(mwl8k_vif->bssid, 0, IEEE80211_ADDR_LEN);
3172 }
3173
3174 mwl8k_bss_info_changed_exit:
3175 rc = 0;
3176 return rc;
3177 }
3178
3179 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3180 struct ieee80211_vif *vif,
3181 struct ieee80211_bss_conf *info,
3182 u32 changed)
3183 {
3184 struct mwl8k_bss_info_changed_worker *worker;
3185 struct mwl8k_priv *priv = hw->priv;
3186 int rc;
3187
3188 if ((changed & BSS_CHANGED_ASSOC) == 0)
3189 return;
3190
3191 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3192 if (worker == NULL)
3193 return;
3194
3195 worker->vif = vif;
3196 worker->info = info;
3197 worker->changed = changed;
3198 rc = mwl8k_queue_work(hw, &worker->header,
3199 priv->config_wq,
3200 mwl8k_bss_info_changed_wt);
3201 kfree(worker);
3202 if (rc == -ETIMEDOUT)
3203 printk(KERN_ERR "%s() timed out\n", __func__);
3204 }
3205
3206 struct mwl8k_configure_filter_worker {
3207 struct mwl8k_work_struct header;
3208 unsigned int changed_flags;
3209 unsigned int *total_flags;
3210 int mc_count;
3211 struct dev_addr_list *mclist;
3212 };
3213
3214 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3215
3216 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3217 {
3218 struct mwl8k_configure_filter_worker *worker =
3219 (struct mwl8k_configure_filter_worker *)wt;
3220
3221 struct ieee80211_hw *hw = worker->header.hw;
3222 unsigned int changed_flags = worker->changed_flags;
3223 unsigned int *total_flags = worker->total_flags;
3224 int mc_count = worker->mc_count;
3225 struct dev_addr_list *mclist = worker->mclist;
3226
3227 struct mwl8k_priv *priv = hw->priv;
3228 struct mwl8k_vif *mv_vif;
3229 int rc = 0;
3230
3231 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3232 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3233 rc = mwl8k_cmd_set_pre_scan(hw);
3234 else {
3235 mv_vif = MWL8K_VIF(priv->vif);
3236 rc = mwl8k_cmd_set_post_scan(hw, mv_vif->bssid);
3237 }
3238 }
3239
3240 if (rc)
3241 goto mwl8k_configure_filter_exit;
3242 if (mc_count) {
3243 mc_count = mc_count < priv->num_mcaddrs ?
3244 mc_count : priv->num_mcaddrs;
3245 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3246 if (rc)
3247 printk(KERN_ERR
3248 "%s()Error setting multicast addresses\n",
3249 __func__);
3250 }
3251
3252 mwl8k_configure_filter_exit:
3253 return rc;
3254 }
3255
3256 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3257 unsigned int changed_flags,
3258 unsigned int *total_flags,
3259 int mc_count,
3260 struct dev_addr_list *mclist)
3261 {
3262
3263 struct mwl8k_configure_filter_worker *worker;
3264 struct mwl8k_priv *priv = hw->priv;
3265
3266 /* Clear unsupported feature flags */
3267 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3268
3269 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS) && !mc_count)
3270 return;
3271
3272 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3273 if (worker == NULL)
3274 return;
3275
3276 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3277 worker->changed_flags = changed_flags;
3278 worker->total_flags = total_flags;
3279 worker->mc_count = mc_count;
3280 worker->mclist = mclist;
3281
3282 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3283 mwl8k_configure_filter_wt);
3284 }
3285
3286 struct mwl8k_set_rts_threshold_worker {
3287 struct mwl8k_work_struct header;
3288 u32 value;
3289 };
3290
3291 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3292 {
3293 struct mwl8k_set_rts_threshold_worker *worker =
3294 (struct mwl8k_set_rts_threshold_worker *)wt;
3295
3296 struct ieee80211_hw *hw = worker->header.hw;
3297 u16 threshold = (u16)(worker->value);
3298 int rc;
3299
3300 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3301
3302 return rc;
3303 }
3304
3305 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3306 {
3307 int rc;
3308 struct mwl8k_set_rts_threshold_worker *worker;
3309 struct mwl8k_priv *priv = hw->priv;
3310
3311 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3312 if (worker == NULL)
3313 return -ENOMEM;
3314
3315 worker->value = value;
3316
3317 rc = mwl8k_queue_work(hw, &worker->header,
3318 priv->config_wq,
3319 mwl8k_set_rts_threshold_wt);
3320 kfree(worker);
3321
3322 if (rc == -ETIMEDOUT) {
3323 printk(KERN_ERR "%s() timed out\n", __func__);
3324 rc = -EINVAL;
3325 }
3326
3327 return rc;
3328 }
3329
3330 struct mwl8k_conf_tx_worker {
3331 struct mwl8k_work_struct header;
3332 u16 queue;
3333 const struct ieee80211_tx_queue_params *params;
3334 };
3335
3336 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3337 {
3338 struct mwl8k_conf_tx_worker *worker =
3339 (struct mwl8k_conf_tx_worker *)wt;
3340
3341 struct ieee80211_hw *hw = worker->header.hw;
3342 u16 queue = worker->queue;
3343 const struct ieee80211_tx_queue_params *params = worker->params;
3344
3345 struct mwl8k_priv *priv = hw->priv;
3346 int rc = 0;
3347
3348 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3349 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3350 rc = -EINVAL;
3351 goto mwl8k_conf_tx_exit;
3352 }
3353
3354 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3355 params->cw_max, params->aifs, params->txop))
3356 rc = -EINVAL;
3357 mwl8k_conf_tx_exit:
3358 return rc;
3359 }
3360
3361 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3362 const struct ieee80211_tx_queue_params *params)
3363 {
3364 int rc;
3365 struct mwl8k_conf_tx_worker *worker;
3366 struct mwl8k_priv *priv = hw->priv;
3367
3368 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3369 if (worker == NULL)
3370 return -ENOMEM;
3371
3372 worker->queue = queue;
3373 worker->params = params;
3374 rc = mwl8k_queue_work(hw, &worker->header,
3375 priv->config_wq, mwl8k_conf_tx_wt);
3376 kfree(worker);
3377 if (rc == -ETIMEDOUT) {
3378 printk(KERN_ERR "%s() timed out\n", __func__);
3379 rc = -EINVAL;
3380 }
3381 return rc;
3382 }
3383
3384 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3385 struct ieee80211_tx_queue_stats *stats)
3386 {
3387 struct mwl8k_priv *priv = hw->priv;
3388 struct mwl8k_tx_queue *txq;
3389 int index;
3390
3391 spin_lock_bh(&priv->tx_lock);
3392 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3393 txq = priv->txq + index;
3394 memcpy(&stats[index], &txq->tx_stats,
3395 sizeof(struct ieee80211_tx_queue_stats));
3396 }
3397 spin_unlock_bh(&priv->tx_lock);
3398 return 0;
3399 }
3400
3401 struct mwl8k_get_stats_worker {
3402 struct mwl8k_work_struct header;
3403 struct ieee80211_low_level_stats *stats;
3404 };
3405
3406 static int mwl8k_get_stats_wt(struct work_struct *wt)
3407 {
3408 struct mwl8k_get_stats_worker *worker =
3409 (struct mwl8k_get_stats_worker *)wt;
3410
3411 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3412 }
3413
3414 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3415 struct ieee80211_low_level_stats *stats)
3416 {
3417 int rc;
3418 struct mwl8k_get_stats_worker *worker;
3419 struct mwl8k_priv *priv = hw->priv;
3420
3421 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3422 if (worker == NULL)
3423 return -ENOMEM;
3424
3425 worker->stats = stats;
3426 rc = mwl8k_queue_work(hw, &worker->header,
3427 priv->config_wq, mwl8k_get_stats_wt);
3428
3429 kfree(worker);
3430 if (rc == -ETIMEDOUT) {
3431 printk(KERN_ERR "%s() timed out\n", __func__);
3432 rc = -EINVAL;
3433 }
3434
3435 return rc;
3436 }
3437
3438 static const struct ieee80211_ops mwl8k_ops = {
3439 .tx = mwl8k_tx,
3440 .start = mwl8k_start,
3441 .stop = mwl8k_stop,
3442 .add_interface = mwl8k_add_interface,
3443 .remove_interface = mwl8k_remove_interface,
3444 .config = mwl8k_config,
3445 .config_interface = mwl8k_config_interface,
3446 .bss_info_changed = mwl8k_bss_info_changed,
3447 .configure_filter = mwl8k_configure_filter,
3448 .set_rts_threshold = mwl8k_set_rts_threshold,
3449 .conf_tx = mwl8k_conf_tx,
3450 .get_tx_stats = mwl8k_get_tx_stats,
3451 .get_stats = mwl8k_get_stats,
3452 };
3453
3454 static void mwl8k_tx_reclaim_handler(unsigned long data)
3455 {
3456 int i;
3457 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3458 struct mwl8k_priv *priv = hw->priv;
3459
3460 spin_lock_bh(&priv->tx_lock);
3461 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3462 mwl8k_txq_reclaim(hw, i, 0);
3463
3464 if (priv->tx_wait != NULL) {
3465 int count = mwl8k_txq_busy(priv);
3466 if (count == 0) {
3467 complete(priv->tx_wait);
3468 priv->tx_wait = NULL;
3469 }
3470 }
3471 spin_unlock_bh(&priv->tx_lock);
3472 }
3473
3474 static void mwl8k_finalize_join_worker(struct work_struct *work)
3475 {
3476 struct mwl8k_priv *priv =
3477 container_of(work, struct mwl8k_priv, finalize_join_worker);
3478 struct sk_buff *skb = priv->beacon_skb;
3479 u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
3480
3481 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3482 dev_kfree_skb(skb);
3483
3484 priv->beacon_skb = NULL;
3485 }
3486
3487 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3488 const struct pci_device_id *id)
3489 {
3490 struct ieee80211_hw *hw;
3491 struct mwl8k_priv *priv;
3492 DECLARE_MAC_BUF(mac);
3493 int rc;
3494 int i;
3495 u8 *fw;
3496
3497 rc = pci_enable_device(pdev);
3498 if (rc) {
3499 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3500 MWL8K_NAME);
3501 return rc;
3502 }
3503
3504 rc = pci_request_regions(pdev, MWL8K_NAME);
3505 if (rc) {
3506 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3507 MWL8K_NAME);
3508 return rc;
3509 }
3510
3511 pci_set_master(pdev);
3512
3513 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3514 if (hw == NULL) {
3515 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3516 rc = -ENOMEM;
3517 goto err_free_reg;
3518 }
3519
3520 priv = hw->priv;
3521 priv->hw = hw;
3522 priv->pdev = pdev;
3523 priv->hostcmd_wait = NULL;
3524 priv->tx_wait = NULL;
3525 priv->inconfig = false;
3526 priv->wep_enabled = 0;
3527 priv->wmm_mode = false;
3528 priv->pending_tx_pkts = 0;
3529 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3530
3531 spin_lock_init(&priv->fw_lock);
3532
3533 SET_IEEE80211_DEV(hw, &pdev->dev);
3534 pci_set_drvdata(pdev, hw);
3535
3536 priv->regs = pci_iomap(pdev, 1, 0x10000);
3537 if (priv->regs == NULL) {
3538 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3539 goto err_iounmap;
3540 }
3541
3542 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3543 priv->band.band = IEEE80211_BAND_2GHZ;
3544 priv->band.channels = priv->channels;
3545 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3546 priv->band.bitrates = priv->rates;
3547 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3548 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3549
3550 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3551 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3552
3553 /*
3554 * Extra headroom is the size of the required DMA header
3555 * minus the size of the smallest 802.11 frame (CTS frame).
3556 */
3557 hw->extra_tx_headroom =
3558 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3559
3560 hw->channel_change_time = 10;
3561
3562 hw->queues = MWL8K_TX_QUEUES;
3563
3564 hw->wiphy->interface_modes =
3565 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3566
3567 /* Set rssi and noise values to dBm */
3568 hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
3569 hw->vif_data_size = sizeof(struct mwl8k_vif);
3570 priv->vif = NULL;
3571
3572 /* Set default radio state and preamble */
3573 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3574 priv->radio_state = MWL8K_RADIO_DISABLE;
3575
3576 /* Finalize join worker */
3577 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3578
3579 /* TX reclaim tasklet */
3580 tasklet_init(&priv->tx_reclaim_task,
3581 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3582 tasklet_disable(&priv->tx_reclaim_task);
3583
3584 /* Config workthread */
3585 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3586 if (priv->config_wq == NULL)
3587 goto err_iounmap;
3588
3589 /* Power management cookie */
3590 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3591 if (priv->cookie == NULL)
3592 goto err_iounmap;
3593
3594 rc = mwl8k_rxq_init(hw, 0);
3595 if (rc)
3596 goto err_iounmap;
3597 rxq_refill(hw, 0, INT_MAX);
3598
3599 spin_lock_init(&priv->tx_lock);
3600
3601 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3602 rc = mwl8k_txq_init(hw, i);
3603 if (rc)
3604 goto err_free_queues;
3605 }
3606
3607 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3608 priv->int_mask = 0;
3609 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3610 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3611 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3612
3613 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3614 IRQF_SHARED, MWL8K_NAME, hw);
3615 if (rc) {
3616 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3617 priv->name);
3618 goto err_free_queues;
3619 }
3620
3621 /* Reset firmware and hardware */
3622 mwl8k_hw_reset(priv);
3623
3624 /* Ask userland hotplug daemon for the device firmware */
3625 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3626 if (rc) {
3627 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3628 goto err_free_irq;
3629 }
3630
3631 /* Load firmware into hardware */
3632 rc = mwl8k_load_firmware(priv);
3633 if (rc) {
3634 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3635 goto err_stop_firmware;
3636 }
3637
3638 /* Reclaim memory once firmware is successfully loaded */
3639 mwl8k_release_firmware(priv);
3640
3641 /*
3642 * Temporarily enable interrupts. Initial firmware host
3643 * commands use interrupts and avoids polling. Disable
3644 * interrupts when done.
3645 */
3646 priv->int_mask |= MWL8K_A2H_EVENTS;
3647
3648 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3649
3650 /* Get config data, mac addrs etc */
3651 rc = mwl8k_cmd_get_hw_spec(hw);
3652 if (rc) {
3653 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3654 goto err_stop_firmware;
3655 }
3656
3657 /* Turn radio off */
3658 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3659 if (rc) {
3660 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3661 goto err_stop_firmware;
3662 }
3663
3664 /* Disable interrupts */
3665 spin_lock_irq(&priv->tx_lock);
3666 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3667 spin_unlock_irq(&priv->tx_lock);
3668 free_irq(priv->pdev->irq, hw);
3669
3670 rc = ieee80211_register_hw(hw);
3671 if (rc) {
3672 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3673 goto err_stop_firmware;
3674 }
3675
3676 fw = (u8 *)&priv->fw_rev;
3677 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3678 MWL8K_DESC);
3679 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3680 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3681 printk(KERN_INFO "%s: MAC Address: %s\n", priv->name,
3682 print_mac(mac, hw->wiphy->perm_addr));
3683
3684 return 0;
3685
3686 err_stop_firmware:
3687 mwl8k_hw_reset(priv);
3688 mwl8k_release_firmware(priv);
3689
3690 err_free_irq:
3691 spin_lock_irq(&priv->tx_lock);
3692 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3693 spin_unlock_irq(&priv->tx_lock);
3694 free_irq(priv->pdev->irq, hw);
3695
3696 err_free_queues:
3697 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3698 mwl8k_txq_deinit(hw, i);
3699 mwl8k_rxq_deinit(hw, 0);
3700
3701 err_iounmap:
3702 if (priv->cookie != NULL)
3703 pci_free_consistent(priv->pdev, 4,
3704 priv->cookie, priv->cookie_dma);
3705
3706 if (priv->regs != NULL)
3707 pci_iounmap(pdev, priv->regs);
3708
3709 if (priv->config_wq != NULL)
3710 destroy_workqueue(priv->config_wq);
3711
3712 pci_set_drvdata(pdev, NULL);
3713 ieee80211_free_hw(hw);
3714
3715 err_free_reg:
3716 pci_release_regions(pdev);
3717 pci_disable_device(pdev);
3718
3719 return rc;
3720 }
3721
3722 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3723 {
3724 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3725 }
3726
3727 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3728 {
3729 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3730 struct mwl8k_priv *priv;
3731 int i;
3732
3733 if (hw == NULL)
3734 return;
3735 priv = hw->priv;
3736
3737 ieee80211_stop_queues(hw);
3738
3739 /* Remove tx reclaim tasklet */
3740 tasklet_kill(&priv->tx_reclaim_task);
3741
3742 /* Stop config thread */
3743 destroy_workqueue(priv->config_wq);
3744
3745 /* Stop hardware */
3746 mwl8k_hw_reset(priv);
3747
3748 /* Return all skbs to mac80211 */
3749 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3750 mwl8k_txq_reclaim(hw, i, 1);
3751
3752 ieee80211_unregister_hw(hw);
3753
3754 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3755 mwl8k_txq_deinit(hw, i);
3756
3757 mwl8k_rxq_deinit(hw, 0);
3758
3759 pci_free_consistent(priv->pdev, 4,
3760 priv->cookie, priv->cookie_dma);
3761
3762 pci_iounmap(pdev, priv->regs);
3763 pci_set_drvdata(pdev, NULL);
3764 ieee80211_free_hw(hw);
3765 pci_release_regions(pdev);
3766 pci_disable_device(pdev);
3767 }
3768
3769 static struct pci_driver mwl8k_driver = {
3770 .name = MWL8K_NAME,
3771 .id_table = mwl8k_table,
3772 .probe = mwl8k_probe,
3773 .remove = __devexit_p(mwl8k_remove),
3774 .shutdown = __devexit_p(mwl8k_shutdown),
3775 };
3776
3777 static int __init mwl8k_init(void)
3778 {
3779 return pci_register_driver(&mwl8k_driver);
3780 }
3781
3782 static void __exit mwl8k_exit(void)
3783 {
3784 pci_unregister_driver(&mwl8k_driver);
3785 }
3786
3787 module_init(mwl8k_init);
3788 module_exit(mwl8k_exit);
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