2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/completion.h>
20 #include <linux/etherdevice.h>
21 #include <net/mac80211.h>
22 #include <linux/moduleparam.h>
23 #include <linux/firmware.h>
24 #include <linux/workqueue.h>
26 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27 #define MWL8K_NAME KBUILD_MODNAME
28 #define MWL8K_VERSION "0.10"
30 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table
) = {
31 { PCI_VDEVICE(MARVELL
, 0x2a2b), .driver_data
= 8687, },
32 { PCI_VDEVICE(MARVELL
, 0x2a30), .driver_data
= 8687, },
35 MODULE_DEVICE_TABLE(pci
, mwl8k_table
);
37 /* Register definitions */
38 #define MWL8K_HIU_GEN_PTR 0x00000c10
39 #define MWL8K_MODE_STA 0x0000005a
40 #define MWL8K_MODE_AP 0x000000a5
41 #define MWL8K_HIU_INT_CODE 0x00000c14
42 #define MWL8K_FWSTA_READY 0xf0f1f2f4
43 #define MWL8K_FWAP_READY 0xf1f2f4a5
44 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
45 #define MWL8K_HIU_SCRATCH 0x00000c40
47 /* Host->device communications */
48 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
49 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
50 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
51 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
52 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
53 #define MWL8K_H2A_INT_DUMMY (1 << 20)
54 #define MWL8K_H2A_INT_RESET (1 << 15)
55 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
56 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
58 /* Device->host communications */
59 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
60 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
61 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
62 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
63 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
64 #define MWL8K_A2H_INT_DUMMY (1 << 20)
65 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
66 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
67 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
68 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
69 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
70 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
71 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
72 #define MWL8K_A2H_INT_RX_READY (1 << 1)
73 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
75 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
76 MWL8K_A2H_INT_CHNL_SWITCHED | \
77 MWL8K_A2H_INT_QUEUE_EMPTY | \
78 MWL8K_A2H_INT_RADAR_DETECT | \
79 MWL8K_A2H_INT_RADIO_ON | \
80 MWL8K_A2H_INT_RADIO_OFF | \
81 MWL8K_A2H_INT_MAC_EVENT | \
82 MWL8K_A2H_INT_OPC_DONE | \
83 MWL8K_A2H_INT_RX_READY | \
84 MWL8K_A2H_INT_TX_DONE)
86 /* WME stream classes */
87 #define WME_AC_BE 0 /* best effort */
88 #define WME_AC_BK 1 /* background */
89 #define WME_AC_VI 2 /* video */
90 #define WME_AC_VO 3 /* voice */
92 #define MWL8K_RX_QUEUES 1
93 #define MWL8K_TX_QUEUES 4
95 struct mwl8k_rx_queue
{
98 /* hw receives here */
101 /* refill descs here */
104 struct mwl8k_rx_desc
*rx_desc_area
;
105 dma_addr_t rx_desc_dma
;
106 struct sk_buff
**rx_skb
;
109 struct mwl8k_tx_queue
{
110 /* hw transmits here */
113 /* sw appends here */
116 struct ieee80211_tx_queue_stats tx_stats
;
117 struct mwl8k_tx_desc
*tx_desc_area
;
118 dma_addr_t tx_desc_dma
;
119 struct sk_buff
**tx_skb
;
122 /* Pointers to the firmware data and meta information about it. */
123 struct mwl8k_firmware
{
125 struct firmware
*ucode
;
127 /* Boot helper code */
128 struct firmware
*helper
;
133 struct ieee80211_hw
*hw
;
135 struct pci_dev
*pdev
;
137 /* firmware files and meta data */
138 struct mwl8k_firmware fw
;
141 /* firmware access */
142 struct mutex fw_mutex
;
143 struct task_struct
*fw_mutex_owner
;
145 struct completion
*hostcmd_wait
;
147 /* lock held over TX and TX reap */
150 /* TX quiesce completion, protected by fw_mutex and tx_lock */
151 struct completion
*tx_wait
;
153 struct ieee80211_vif
*vif
;
155 struct ieee80211_channel
*current_channel
;
157 /* power management status cookie from firmware */
159 dma_addr_t cookie_dma
;
166 * Running count of TX packets in flight, to avoid
167 * iterating over the transmit rings each time.
171 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
172 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
175 struct ieee80211_supported_band band
;
176 struct ieee80211_channel channels
[14];
177 struct ieee80211_rate rates
[12];
180 bool radio_short_preamble
;
183 /* XXX need to convert this to handle multiple interfaces */
185 u8 capture_bssid
[ETH_ALEN
];
186 struct sk_buff
*beacon_skb
;
189 * This FJ worker has to be global as it is scheduled from the
190 * RX handler. At this point we don't know which interface it
191 * belongs to until the list of bssids waiting to complete join
194 struct work_struct finalize_join_worker
;
196 /* Tasklet to reclaim TX descriptors and buffers after tx */
197 struct tasklet_struct tx_reclaim_task
;
200 /* Per interface specific private data */
202 /* backpointer to parent config block */
203 struct mwl8k_priv
*priv
;
205 /* BSS config of AP or IBSS from mac80211*/
206 struct ieee80211_bss_conf bss_info
;
208 /* BSSID of AP or IBSS */
210 u8 mac_addr
[ETH_ALEN
];
213 * Subset of supported legacy rates.
214 * Intersection of AP and STA supported rates.
216 struct ieee80211_rate legacy_rates
[12];
218 /* number of supported legacy rates */
221 /* Index into station database.Returned by update_sta_db call */
224 /* Non AMPDU sequence number assigned by driver */
228 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
230 static const struct ieee80211_channel mwl8k_channels
[] = {
231 { .center_freq
= 2412, .hw_value
= 1, },
232 { .center_freq
= 2417, .hw_value
= 2, },
233 { .center_freq
= 2422, .hw_value
= 3, },
234 { .center_freq
= 2427, .hw_value
= 4, },
235 { .center_freq
= 2432, .hw_value
= 5, },
236 { .center_freq
= 2437, .hw_value
= 6, },
237 { .center_freq
= 2442, .hw_value
= 7, },
238 { .center_freq
= 2447, .hw_value
= 8, },
239 { .center_freq
= 2452, .hw_value
= 9, },
240 { .center_freq
= 2457, .hw_value
= 10, },
241 { .center_freq
= 2462, .hw_value
= 11, },
244 static const struct ieee80211_rate mwl8k_rates
[] = {
245 { .bitrate
= 10, .hw_value
= 2, },
246 { .bitrate
= 20, .hw_value
= 4, },
247 { .bitrate
= 55, .hw_value
= 11, },
248 { .bitrate
= 60, .hw_value
= 12, },
249 { .bitrate
= 90, .hw_value
= 18, },
250 { .bitrate
= 110, .hw_value
= 22, },
251 { .bitrate
= 120, .hw_value
= 24, },
252 { .bitrate
= 180, .hw_value
= 36, },
253 { .bitrate
= 240, .hw_value
= 48, },
254 { .bitrate
= 360, .hw_value
= 72, },
255 { .bitrate
= 480, .hw_value
= 96, },
256 { .bitrate
= 540, .hw_value
= 108, },
259 /* Set or get info from Firmware */
260 #define MWL8K_CMD_SET 0x0001
261 #define MWL8K_CMD_GET 0x0000
263 /* Firmware command codes */
264 #define MWL8K_CMD_CODE_DNLD 0x0001
265 #define MWL8K_CMD_GET_HW_SPEC 0x0003
266 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
267 #define MWL8K_CMD_GET_STAT 0x0014
268 #define MWL8K_CMD_RADIO_CONTROL 0x001c
269 #define MWL8K_CMD_RF_TX_POWER 0x001e
270 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
271 #define MWL8K_CMD_SET_POST_SCAN 0x0108
272 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
273 #define MWL8K_CMD_SET_AID 0x010d
274 #define MWL8K_CMD_SET_RATE 0x0110
275 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
276 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
277 #define MWL8K_CMD_SET_SLOT 0x0114
278 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
279 #define MWL8K_CMD_SET_WMM_MODE 0x0123
280 #define MWL8K_CMD_MIMO_CONFIG 0x0125
281 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
282 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
283 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
284 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
285 #define MWL8K_CMD_UPDATE_STADB 0x1123
287 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
289 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
290 snprintf(buf, bufsize, "%s", #x);\
293 switch (cmd
& ~0x8000) {
294 MWL8K_CMDNAME(CODE_DNLD
);
295 MWL8K_CMDNAME(GET_HW_SPEC
);
296 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
297 MWL8K_CMDNAME(GET_STAT
);
298 MWL8K_CMDNAME(RADIO_CONTROL
);
299 MWL8K_CMDNAME(RF_TX_POWER
);
300 MWL8K_CMDNAME(SET_PRE_SCAN
);
301 MWL8K_CMDNAME(SET_POST_SCAN
);
302 MWL8K_CMDNAME(SET_RF_CHANNEL
);
303 MWL8K_CMDNAME(SET_AID
);
304 MWL8K_CMDNAME(SET_RATE
);
305 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
306 MWL8K_CMDNAME(RTS_THRESHOLD
);
307 MWL8K_CMDNAME(SET_SLOT
);
308 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
309 MWL8K_CMDNAME(SET_WMM_MODE
);
310 MWL8K_CMDNAME(MIMO_CONFIG
);
311 MWL8K_CMDNAME(USE_FIXED_RATE
);
312 MWL8K_CMDNAME(ENABLE_SNIFFER
);
313 MWL8K_CMDNAME(SET_MAC_ADDR
);
314 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
315 MWL8K_CMDNAME(UPDATE_STADB
);
317 snprintf(buf
, bufsize
, "0x%x", cmd
);
324 /* Hardware and firmware reset */
325 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
327 iowrite32(MWL8K_H2A_INT_RESET
,
328 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
329 iowrite32(MWL8K_H2A_INT_RESET
,
330 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
334 /* Release fw image */
335 static void mwl8k_release_fw(struct firmware
**fw
)
339 release_firmware(*fw
);
343 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
345 mwl8k_release_fw(&priv
->fw
.ucode
);
346 mwl8k_release_fw(&priv
->fw
.helper
);
349 /* Request fw image */
350 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
351 const char *fname
, struct firmware
**fw
)
353 /* release current image */
355 mwl8k_release_fw(fw
);
357 return request_firmware((const struct firmware
**)fw
,
358 fname
, &priv
->pdev
->dev
);
361 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
, u32 part_num
)
366 priv
->part_num
= part_num
;
368 snprintf(filename
, sizeof(filename
),
369 "mwl8k/helper_%u.fw", priv
->part_num
);
371 rc
= mwl8k_request_fw(priv
, filename
, &priv
->fw
.helper
);
373 printk(KERN_ERR
"%s: Error requesting helper firmware "
374 "file %s\n", pci_name(priv
->pdev
), filename
);
378 snprintf(filename
, sizeof(filename
),
379 "mwl8k/fmimage_%u.fw", priv
->part_num
);
381 rc
= mwl8k_request_fw(priv
, filename
, &priv
->fw
.ucode
);
383 printk(KERN_ERR
"%s: Error requesting firmware file %s\n",
384 pci_name(priv
->pdev
), filename
);
385 mwl8k_release_fw(&priv
->fw
.helper
);
392 struct mwl8k_cmd_pkt
{
398 } __attribute__((packed
));
404 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
406 void __iomem
*regs
= priv
->regs
;
410 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
411 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
414 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
415 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
416 iowrite32(MWL8K_H2A_INT_DOORBELL
,
417 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
418 iowrite32(MWL8K_H2A_INT_DUMMY
,
419 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
425 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
426 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
427 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
434 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
436 return loops
? 0 : -ETIMEDOUT
;
439 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
440 const u8
*data
, size_t length
)
442 struct mwl8k_cmd_pkt
*cmd
;
446 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
450 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
456 int block_size
= length
> 256 ? 256 : length
;
458 memcpy(cmd
->payload
, data
+ done
, block_size
);
459 cmd
->length
= cpu_to_le16(block_size
);
461 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
462 sizeof(*cmd
) + block_size
);
467 length
-= block_size
;
472 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
480 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
481 const u8
*data
, size_t length
)
483 unsigned char *buffer
;
484 int may_continue
, rc
= 0;
485 u32 done
, prev_block_size
;
487 buffer
= kmalloc(1024, GFP_KERNEL
);
494 while (may_continue
> 0) {
497 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
498 if (block_size
& 1) {
502 done
+= prev_block_size
;
503 length
-= prev_block_size
;
506 if (block_size
> 1024 || block_size
> length
) {
516 if (block_size
== 0) {
523 prev_block_size
= block_size
;
524 memcpy(buffer
, data
+ done
, block_size
);
526 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
531 if (!rc
&& length
!= 0)
539 static int mwl8k_load_firmware(struct ieee80211_hw
*hw
)
541 struct mwl8k_priv
*priv
= hw
->priv
;
542 struct firmware
*fw
= priv
->fw
.ucode
;
546 if (!memcmp(fw
->data
, "\x01\x00\x00\x00", 4)) {
547 struct firmware
*helper
= priv
->fw
.helper
;
549 if (helper
== NULL
) {
550 printk(KERN_ERR
"%s: helper image needed but none "
551 "given\n", pci_name(priv
->pdev
));
555 rc
= mwl8k_load_fw_image(priv
, helper
->data
, helper
->size
);
557 printk(KERN_ERR
"%s: unable to load firmware "
558 "helper image\n", pci_name(priv
->pdev
));
563 rc
= mwl8k_feed_fw_image(priv
, fw
->data
, fw
->size
);
565 rc
= mwl8k_load_fw_image(priv
, fw
->data
, fw
->size
);
569 printk(KERN_ERR
"%s: unable to load firmware image\n",
570 pci_name(priv
->pdev
));
574 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
579 if (ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
)
580 == MWL8K_FWSTA_READY
)
585 return loops
? 0 : -ETIMEDOUT
;
590 * Defines shared between transmission and reception.
592 /* HT control fields for firmware */
597 } __attribute__((packed
));
599 /* Firmware Station database operations */
600 #define MWL8K_STA_DB_ADD_ENTRY 0
601 #define MWL8K_STA_DB_MODIFY_ENTRY 1
602 #define MWL8K_STA_DB_DEL_ENTRY 2
603 #define MWL8K_STA_DB_FLUSH 3
605 /* Peer Entry flags - used to define the type of the peer node */
606 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
608 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
609 #define MWL8K_MCS_BITMAP_SIZE 16
611 struct peer_capability_info
{
612 /* Peer type - AP vs. STA. */
615 /* Basic 802.11 capabilities from assoc resp. */
618 /* Set if peer supports 802.11n high throughput (HT). */
621 /* Valid if HT is supported. */
623 __u8 extended_ht_caps
;
624 struct ewc_ht_info ewc_info
;
626 /* Legacy rate table. Intersection of our rates and peer rates. */
627 __u8 legacy_rates
[MWL8K_IEEE_LEGACY_DATA_RATES
];
629 /* HT rate table. Intersection of our rates and peer rates. */
630 __u8 ht_rates
[MWL8K_MCS_BITMAP_SIZE
];
633 /* If set, interoperability mode, no proprietary extensions. */
637 __le16 amsdu_enabled
;
638 } __attribute__((packed
));
640 /* Inline functions to manipulate QoS field in data descriptor. */
641 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
643 u16 val_mask
= 1 << 4;
645 /* End of Service Period Bit 4 */
646 return qos
| val_mask
;
649 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
653 u16 qos_mask
= ~(val_mask
<< shift
);
655 /* Ack Policy Bit 5-6 */
656 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
659 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
661 u16 val_mask
= 1 << 7;
663 /* AMSDU present Bit 7 */
664 return qos
| val_mask
;
667 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
671 u16 qos_mask
= ~(val_mask
<< shift
);
673 /* Queue Length Bits 8-15 */
674 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
677 /* DMA header used by firmware and hardware. */
678 struct mwl8k_dma_data
{
680 struct ieee80211_hdr wh
;
681 } __attribute__((packed
));
683 /* Routines to add/remove DMA header from skb. */
684 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
)
686 struct mwl8k_dma_data
*tr
= (struct mwl8k_dma_data
*)skb
->data
;
687 void *dst
, *src
= &tr
->wh
;
688 int hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
689 u16 space
= sizeof(struct mwl8k_dma_data
) - hdrlen
;
691 dst
= (void *)tr
+ space
;
693 memmove(dst
, src
, hdrlen
);
694 skb_pull(skb
, space
);
698 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
700 struct ieee80211_hdr
*wh
;
702 struct mwl8k_dma_data
*tr
;
704 wh
= (struct ieee80211_hdr
*)skb
->data
;
705 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
709 * Copy up/down the 802.11 header; the firmware requires
710 * we present a 2-byte payload length followed by a
711 * 4-address header (w/o QoS), followed (optionally) by
712 * any WEP/ExtIV header (but only filled in for CCMP).
714 if (hdrlen
!= sizeof(struct mwl8k_dma_data
))
715 skb_push(skb
, sizeof(struct mwl8k_dma_data
) - hdrlen
);
717 tr
= (struct mwl8k_dma_data
*)skb
->data
;
719 memmove(&tr
->wh
, wh
, hdrlen
);
722 memset(tr
->wh
.addr4
, 0, ETH_ALEN
);
725 * Firmware length is the length of the fully formed "802.11
726 * payload". That is, everything except for the 802.11 header.
727 * This includes all crypto material including the MIC.
729 tr
->fwlen
= cpu_to_le16(pktlen
- hdrlen
);
736 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
738 struct mwl8k_rx_desc
{
742 __le32 pkt_phys_addr
;
743 __le32 next_rx_desc_phys_addr
;
753 } __attribute__((packed
));
755 #define MWL8K_RX_DESCS 256
756 #define MWL8K_RX_MAXSZ 3800
758 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
760 struct mwl8k_priv
*priv
= hw
->priv
;
761 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
765 rxq
->rx_desc_count
= 0;
769 size
= MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
);
772 pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rx_desc_dma
);
773 if (rxq
->rx_desc_area
== NULL
) {
774 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
775 wiphy_name(hw
->wiphy
));
778 memset(rxq
->rx_desc_area
, 0, size
);
780 rxq
->rx_skb
= kmalloc(MWL8K_RX_DESCS
*
781 sizeof(*rxq
->rx_skb
), GFP_KERNEL
);
782 if (rxq
->rx_skb
== NULL
) {
783 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
784 wiphy_name(hw
->wiphy
));
785 pci_free_consistent(priv
->pdev
, size
,
786 rxq
->rx_desc_area
, rxq
->rx_desc_dma
);
789 memset(rxq
->rx_skb
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->rx_skb
));
791 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
792 struct mwl8k_rx_desc
*rx_desc
;
795 rx_desc
= rxq
->rx_desc_area
+ i
;
796 nexti
= (i
+ 1) % MWL8K_RX_DESCS
;
798 rx_desc
->next_rx_desc_phys_addr
=
799 cpu_to_le32(rxq
->rx_desc_dma
800 + nexti
* sizeof(*rx_desc
));
801 rx_desc
->rx_ctrl
= MWL8K_RX_CTRL_OWNED_BY_HOST
;
807 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
809 struct mwl8k_priv
*priv
= hw
->priv
;
810 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
814 while (rxq
->rx_desc_count
< MWL8K_RX_DESCS
&& limit
--) {
818 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
822 rxq
->rx_desc_count
++;
825 rxq
->rx_tail
= (rx
+ 1) % MWL8K_RX_DESCS
;
827 rxq
->rx_desc_area
[rx
].pkt_phys_addr
=
828 cpu_to_le32(pci_map_single(priv
->pdev
, skb
->data
,
829 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
));
831 rxq
->rx_desc_area
[rx
].pkt_len
= cpu_to_le16(MWL8K_RX_MAXSZ
);
832 rxq
->rx_skb
[rx
] = skb
;
834 rxq
->rx_desc_area
[rx
].rx_ctrl
= 0;
842 /* Must be called only when the card's reception is completely halted */
843 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
845 struct mwl8k_priv
*priv
= hw
->priv
;
846 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
849 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
850 if (rxq
->rx_skb
[i
] != NULL
) {
853 addr
= le32_to_cpu(rxq
->rx_desc_area
[i
].pkt_phys_addr
);
854 pci_unmap_single(priv
->pdev
, addr
, MWL8K_RX_MAXSZ
,
856 kfree_skb(rxq
->rx_skb
[i
]);
857 rxq
->rx_skb
[i
] = NULL
;
864 pci_free_consistent(priv
->pdev
,
865 MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
),
866 rxq
->rx_desc_area
, rxq
->rx_desc_dma
);
867 rxq
->rx_desc_area
= NULL
;
872 * Scan a list of BSSIDs to process for finalize join.
873 * Allows for extension to process multiple BSSIDs.
876 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
878 return priv
->capture_beacon
&&
879 ieee80211_is_beacon(wh
->frame_control
) &&
880 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
883 static inline void mwl8k_save_beacon(struct ieee80211_hw
*hw
,
886 struct mwl8k_priv
*priv
= hw
->priv
;
888 priv
->capture_beacon
= false;
889 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
892 * Use GFP_ATOMIC as rxq_process is called from
893 * the primary interrupt handler, memory allocation call
896 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
897 if (priv
->beacon_skb
!= NULL
)
898 ieee80211_queue_work(hw
, &priv
->finalize_join_worker
);
901 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
903 struct mwl8k_priv
*priv
= hw
->priv
;
904 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
908 while (rxq
->rx_desc_count
&& limit
--) {
909 struct mwl8k_rx_desc
*rx_desc
;
911 struct ieee80211_rx_status status
;
913 struct ieee80211_hdr
*wh
;
915 rx_desc
= rxq
->rx_desc_area
+ rxq
->rx_head
;
916 if (!(rx_desc
->rx_ctrl
& MWL8K_RX_CTRL_OWNED_BY_HOST
))
920 skb
= rxq
->rx_skb
[rxq
->rx_head
];
923 rxq
->rx_skb
[rxq
->rx_head
] = NULL
;
925 rxq
->rx_head
= (rxq
->rx_head
+ 1) % MWL8K_RX_DESCS
;
926 rxq
->rx_desc_count
--;
928 addr
= le32_to_cpu(rx_desc
->pkt_phys_addr
);
929 pci_unmap_single(priv
->pdev
, addr
,
930 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
932 skb_put(skb
, le16_to_cpu(rx_desc
->pkt_len
));
933 mwl8k_remove_dma_header(skb
);
935 wh
= (struct ieee80211_hdr
*)skb
->data
;
938 * Check for a pending join operation. Save a
939 * copy of the beacon and schedule a tasklet to
940 * send a FINALIZE_JOIN command to the firmware.
942 if (mwl8k_capture_bssid(priv
, wh
))
943 mwl8k_save_beacon(hw
, skb
);
945 memset(&status
, 0, sizeof(status
));
947 status
.signal
= -rx_desc
->rssi
;
948 status
.noise
= -rx_desc
->noise_level
;
949 status
.qual
= rx_desc
->link_quality
;
953 status
.band
= IEEE80211_BAND_2GHZ
;
954 status
.freq
= ieee80211_channel_to_frequency(rx_desc
->channel
);
955 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
956 ieee80211_rx_irqsafe(hw
, skb
);
966 * Packet transmission.
969 /* Transmit queue assignment. */
971 MWL8K_WME_AC_BK
= 0, /* background access */
972 MWL8K_WME_AC_BE
= 1, /* best effort access */
973 MWL8K_WME_AC_VI
= 2, /* video access */
974 MWL8K_WME_AC_VO
= 3, /* voice access */
977 /* Transmit packet ACK policy */
978 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
979 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
981 #define GET_TXQ(_ac) (\
982 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
983 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
984 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
987 #define MWL8K_TXD_STATUS_OK 0x00000001
988 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
989 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
990 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
991 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
993 struct mwl8k_tx_desc
{
998 __le32 pkt_phys_addr
;
1000 __u8 dest_MAC_addr
[ETH_ALEN
];
1001 __le32 next_tx_desc_phys_addr
;
1006 } __attribute__((packed
));
1008 #define MWL8K_TX_DESCS 128
1010 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
1012 struct mwl8k_priv
*priv
= hw
->priv
;
1013 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1017 memset(&txq
->tx_stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1018 txq
->tx_stats
.limit
= MWL8K_TX_DESCS
;
1022 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1025 pci_alloc_consistent(priv
->pdev
, size
, &txq
->tx_desc_dma
);
1026 if (txq
->tx_desc_area
== NULL
) {
1027 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1028 wiphy_name(hw
->wiphy
));
1031 memset(txq
->tx_desc_area
, 0, size
);
1033 txq
->tx_skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->tx_skb
),
1035 if (txq
->tx_skb
== NULL
) {
1036 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1037 wiphy_name(hw
->wiphy
));
1038 pci_free_consistent(priv
->pdev
, size
,
1039 txq
->tx_desc_area
, txq
->tx_desc_dma
);
1042 memset(txq
->tx_skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->tx_skb
));
1044 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1045 struct mwl8k_tx_desc
*tx_desc
;
1048 tx_desc
= txq
->tx_desc_area
+ i
;
1049 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1051 tx_desc
->status
= 0;
1052 tx_desc
->next_tx_desc_phys_addr
=
1053 cpu_to_le32(txq
->tx_desc_dma
+
1054 nexti
* sizeof(*tx_desc
));
1060 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1062 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1063 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1064 iowrite32(MWL8K_H2A_INT_DUMMY
,
1065 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1066 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1069 struct mwl8k_txq_info
{
1078 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1079 struct mwl8k_txq_info
*txinfo
)
1081 int count
, desc
, status
;
1082 struct mwl8k_tx_queue
*txq
;
1083 struct mwl8k_tx_desc
*tx_desc
;
1086 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1088 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1089 txq
= priv
->txq
+ count
;
1090 txinfo
[count
].len
= txq
->tx_stats
.len
;
1091 txinfo
[count
].head
= txq
->tx_head
;
1092 txinfo
[count
].tail
= txq
->tx_tail
;
1093 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1094 tx_desc
= txq
->tx_desc_area
+ desc
;
1095 status
= le32_to_cpu(tx_desc
->status
);
1097 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1098 txinfo
[count
].fw_owned
++;
1100 txinfo
[count
].drv_owned
++;
1102 if (tx_desc
->pkt_len
== 0)
1103 txinfo
[count
].unused
++;
1111 * Must be called with priv->fw_mutex held and tx queues stopped.
1113 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1115 struct mwl8k_priv
*priv
= hw
->priv
;
1116 DECLARE_COMPLETION_ONSTACK(tx_wait
);
1118 unsigned long timeout
;
1122 spin_lock_bh(&priv
->tx_lock
);
1123 count
= priv
->pending_tx_pkts
;
1125 priv
->tx_wait
= &tx_wait
;
1126 spin_unlock_bh(&priv
->tx_lock
);
1129 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1133 timeout
= wait_for_completion_timeout(&tx_wait
,
1134 msecs_to_jiffies(5000));
1138 spin_lock_bh(&priv
->tx_lock
);
1139 priv
->tx_wait
= NULL
;
1140 newcount
= priv
->pending_tx_pkts
;
1141 mwl8k_scan_tx_ring(priv
, txinfo
);
1142 spin_unlock_bh(&priv
->tx_lock
);
1144 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1145 __func__
, __LINE__
, count
, newcount
);
1147 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1148 printk(KERN_ERR
"TXQ:%u L:%u H:%u T:%u FW:%u "
1154 txinfo
[index
].fw_owned
,
1155 txinfo
[index
].drv_owned
,
1156 txinfo
[index
].unused
);
1164 #define MWL8K_TXD_SUCCESS(status) \
1165 ((status) & (MWL8K_TXD_STATUS_OK | \
1166 MWL8K_TXD_STATUS_OK_RETRY | \
1167 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1169 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1171 struct mwl8k_priv
*priv
= hw
->priv
;
1172 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1175 while (txq
->tx_stats
.len
> 0) {
1177 struct mwl8k_tx_desc
*tx_desc
;
1180 struct sk_buff
*skb
;
1181 struct ieee80211_tx_info
*info
;
1185 tx_desc
= txq
->tx_desc_area
+ tx
;
1187 status
= le32_to_cpu(tx_desc
->status
);
1189 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1193 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1196 txq
->tx_head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1197 BUG_ON(txq
->tx_stats
.len
== 0);
1198 txq
->tx_stats
.len
--;
1199 priv
->pending_tx_pkts
--;
1201 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1202 size
= le16_to_cpu(tx_desc
->pkt_len
);
1203 skb
= txq
->tx_skb
[tx
];
1204 txq
->tx_skb
[tx
] = NULL
;
1206 BUG_ON(skb
== NULL
);
1207 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1209 mwl8k_remove_dma_header(skb
);
1211 /* Mark descriptor as unused */
1212 tx_desc
->pkt_phys_addr
= 0;
1213 tx_desc
->pkt_len
= 0;
1215 info
= IEEE80211_SKB_CB(skb
);
1216 ieee80211_tx_info_clear_status(info
);
1217 if (MWL8K_TXD_SUCCESS(status
))
1218 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1220 ieee80211_tx_status_irqsafe(hw
, skb
);
1225 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1226 ieee80211_wake_queue(hw
, index
);
1229 /* must be called only when the card's transmit is completely halted */
1230 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1232 struct mwl8k_priv
*priv
= hw
->priv
;
1233 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1235 mwl8k_txq_reclaim(hw
, index
, 1);
1240 pci_free_consistent(priv
->pdev
,
1241 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1242 txq
->tx_desc_area
, txq
->tx_desc_dma
);
1243 txq
->tx_desc_area
= NULL
;
1247 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1249 struct mwl8k_priv
*priv
= hw
->priv
;
1250 struct ieee80211_tx_info
*tx_info
;
1251 struct mwl8k_vif
*mwl8k_vif
;
1252 struct ieee80211_hdr
*wh
;
1253 struct mwl8k_tx_queue
*txq
;
1254 struct mwl8k_tx_desc
*tx
;
1260 wh
= (struct ieee80211_hdr
*)skb
->data
;
1261 if (ieee80211_is_data_qos(wh
->frame_control
))
1262 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1266 mwl8k_add_dma_header(skb
);
1267 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1269 tx_info
= IEEE80211_SKB_CB(skb
);
1270 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1272 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1273 u16 seqno
= mwl8k_vif
->seqno
;
1275 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1276 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1277 mwl8k_vif
->seqno
= seqno
++ % 4096;
1280 /* Setup firmware control bit fields for each frame type. */
1283 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1284 ieee80211_is_ctl(wh
->frame_control
)) {
1286 qos
= mwl8k_qos_setbit_eosp(qos
);
1287 /* Set Queue size to unspecified */
1288 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1289 } else if (ieee80211_is_data(wh
->frame_control
)) {
1291 if (is_multicast_ether_addr(wh
->addr1
))
1292 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1294 /* Send pkt in an aggregate if AMPDU frame. */
1295 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1296 qos
= mwl8k_qos_setbit_ack(qos
,
1297 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1299 qos
= mwl8k_qos_setbit_ack(qos
,
1300 MWL8K_TXD_ACK_POLICY_NORMAL
);
1302 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1303 qos
= mwl8k_qos_setbit_amsdu(qos
);
1306 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1307 skb
->len
, PCI_DMA_TODEVICE
);
1309 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1310 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1311 "dropping TX frame.\n", wiphy_name(hw
->wiphy
));
1313 return NETDEV_TX_OK
;
1316 spin_lock_bh(&priv
->tx_lock
);
1318 txq
= priv
->txq
+ index
;
1320 BUG_ON(txq
->tx_skb
[txq
->tx_tail
] != NULL
);
1321 txq
->tx_skb
[txq
->tx_tail
] = skb
;
1323 tx
= txq
->tx_desc_area
+ txq
->tx_tail
;
1324 tx
->data_rate
= txdatarate
;
1325 tx
->tx_priority
= index
;
1326 tx
->qos_control
= cpu_to_le16(qos
);
1327 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1328 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1330 tx
->peer_id
= mwl8k_vif
->peer_id
;
1332 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1334 txq
->tx_stats
.count
++;
1335 txq
->tx_stats
.len
++;
1336 priv
->pending_tx_pkts
++;
1339 if (txq
->tx_tail
== MWL8K_TX_DESCS
)
1342 if (txq
->tx_head
== txq
->tx_tail
)
1343 ieee80211_stop_queue(hw
, index
);
1345 mwl8k_tx_start(priv
);
1347 spin_unlock_bh(&priv
->tx_lock
);
1349 return NETDEV_TX_OK
;
1356 * We have the following requirements for issuing firmware commands:
1357 * - Some commands require that the packet transmit path is idle when
1358 * the command is issued. (For simplicity, we'll just quiesce the
1359 * transmit path for every command.)
1360 * - There are certain sequences of commands that need to be issued to
1361 * the hardware sequentially, with no other intervening commands.
1363 * This leads to an implementation of a "firmware lock" as a mutex that
1364 * can be taken recursively, and which is taken by both the low-level
1365 * command submission function (mwl8k_post_cmd) as well as any users of
1366 * that function that require issuing of an atomic sequence of commands,
1367 * and quiesces the transmit path whenever it's taken.
1369 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1371 struct mwl8k_priv
*priv
= hw
->priv
;
1373 if (priv
->fw_mutex_owner
!= current
) {
1376 mutex_lock(&priv
->fw_mutex
);
1377 ieee80211_stop_queues(hw
);
1379 rc
= mwl8k_tx_wait_empty(hw
);
1381 ieee80211_wake_queues(hw
);
1382 mutex_unlock(&priv
->fw_mutex
);
1387 priv
->fw_mutex_owner
= current
;
1390 priv
->fw_mutex_depth
++;
1395 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1397 struct mwl8k_priv
*priv
= hw
->priv
;
1399 if (!--priv
->fw_mutex_depth
) {
1400 ieee80211_wake_queues(hw
);
1401 priv
->fw_mutex_owner
= NULL
;
1402 mutex_unlock(&priv
->fw_mutex
);
1408 * Command processing.
1411 /* Timeout firmware commands after 2000ms */
1412 #define MWL8K_CMD_TIMEOUT_MS 2000
1414 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1416 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1417 struct mwl8k_priv
*priv
= hw
->priv
;
1418 void __iomem
*regs
= priv
->regs
;
1419 dma_addr_t dma_addr
;
1420 unsigned int dma_size
;
1422 unsigned long timeout
= 0;
1425 cmd
->result
= 0xffff;
1426 dma_size
= le16_to_cpu(cmd
->length
);
1427 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1428 PCI_DMA_BIDIRECTIONAL
);
1429 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1432 rc
= mwl8k_fw_lock(hw
);
1434 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1435 PCI_DMA_BIDIRECTIONAL
);
1439 priv
->hostcmd_wait
= &cmd_wait
;
1440 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1441 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1442 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1443 iowrite32(MWL8K_H2A_INT_DUMMY
,
1444 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1446 timeout
= wait_for_completion_timeout(&cmd_wait
,
1447 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1449 priv
->hostcmd_wait
= NULL
;
1451 mwl8k_fw_unlock(hw
);
1453 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1454 PCI_DMA_BIDIRECTIONAL
);
1457 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1458 wiphy_name(hw
->wiphy
),
1459 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1460 MWL8K_CMD_TIMEOUT_MS
);
1463 rc
= cmd
->result
? -EINVAL
: 0;
1465 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1466 wiphy_name(hw
->wiphy
),
1467 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1468 le16_to_cpu(cmd
->result
));
1477 struct mwl8k_cmd_get_hw_spec
{
1478 struct mwl8k_cmd_pkt header
;
1480 __u8 host_interface
;
1482 __u8 perm_addr
[ETH_ALEN
];
1487 __u8 mcs_bitmap
[16];
1488 __le32 rx_queue_ptr
;
1489 __le32 num_tx_queues
;
1490 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1492 __le32 num_tx_desc_per_queue
;
1493 __le32 total_rx_desc
;
1494 } __attribute__((packed
));
1496 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw
*hw
)
1498 struct mwl8k_priv
*priv
= hw
->priv
;
1499 struct mwl8k_cmd_get_hw_spec
*cmd
;
1503 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1507 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1508 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1510 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1511 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1512 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rx_desc_dma
);
1513 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1514 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1515 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].tx_desc_dma
);
1516 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1517 cmd
->total_rx_desc
= cpu_to_le32(MWL8K_RX_DESCS
);
1519 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1522 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1523 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1524 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1525 priv
->hw_rev
= cmd
->hw_rev
;
1533 * CMD_MAC_MULTICAST_ADR.
1535 struct mwl8k_cmd_mac_multicast_adr
{
1536 struct mwl8k_cmd_pkt header
;
1539 __u8 addr
[0][ETH_ALEN
];
1542 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1543 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1544 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1545 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1547 static struct mwl8k_cmd_pkt
*
1548 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
, int allmulti
,
1549 int mc_count
, struct dev_addr_list
*mclist
)
1551 struct mwl8k_priv
*priv
= hw
->priv
;
1552 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1555 if (allmulti
|| mc_count
> priv
->num_mcaddrs
) {
1560 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1562 cmd
= kzalloc(size
, GFP_ATOMIC
);
1566 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1567 cmd
->header
.length
= cpu_to_le16(size
);
1568 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED
|
1569 MWL8K_ENABLE_RX_BROADCAST
);
1572 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST
);
1573 } else if (mc_count
) {
1576 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1577 cmd
->numaddr
= cpu_to_le16(mc_count
);
1578 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1579 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1583 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1584 mclist
= mclist
->next
;
1588 return &cmd
->header
;
1592 * CMD_802_11_GET_STAT.
1594 struct mwl8k_cmd_802_11_get_stat
{
1595 struct mwl8k_cmd_pkt header
;
1597 } __attribute__((packed
));
1599 #define MWL8K_STAT_ACK_FAILURE 9
1600 #define MWL8K_STAT_RTS_FAILURE 12
1601 #define MWL8K_STAT_FCS_ERROR 24
1602 #define MWL8K_STAT_RTS_SUCCESS 11
1604 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1605 struct ieee80211_low_level_stats
*stats
)
1607 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1610 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1614 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1615 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1617 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1619 stats
->dot11ACKFailureCount
=
1620 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1621 stats
->dot11RTSFailureCount
=
1622 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1623 stats
->dot11FCSErrorCount
=
1624 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1625 stats
->dot11RTSSuccessCount
=
1626 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1634 * CMD_802_11_RADIO_CONTROL.
1636 struct mwl8k_cmd_802_11_radio_control
{
1637 struct mwl8k_cmd_pkt header
;
1641 } __attribute__((packed
));
1644 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1646 struct mwl8k_priv
*priv
= hw
->priv
;
1647 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1650 if (enable
== priv
->radio_on
&& !force
)
1653 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1657 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1658 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1659 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1660 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1661 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1663 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1667 priv
->radio_on
= enable
;
1672 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1674 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1677 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1679 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1683 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1685 struct mwl8k_priv
*priv
;
1687 if (hw
== NULL
|| hw
->priv
== NULL
)
1691 priv
->radio_short_preamble
= short_preamble
;
1693 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1697 * CMD_802_11_RF_TX_POWER.
1699 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1701 struct mwl8k_cmd_802_11_rf_tx_power
{
1702 struct mwl8k_cmd_pkt header
;
1704 __le16 support_level
;
1705 __le16 current_level
;
1707 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1708 } __attribute__((packed
));
1710 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
1712 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
1715 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1719 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
1720 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1721 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1722 cmd
->support_level
= cpu_to_le16(dBm
);
1724 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1733 struct mwl8k_cmd_set_pre_scan
{
1734 struct mwl8k_cmd_pkt header
;
1735 } __attribute__((packed
));
1737 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
1739 struct mwl8k_cmd_set_pre_scan
*cmd
;
1742 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1746 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
1747 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1749 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1756 * CMD_SET_POST_SCAN.
1758 struct mwl8k_cmd_set_post_scan
{
1759 struct mwl8k_cmd_pkt header
;
1761 __u8 bssid
[ETH_ALEN
];
1762 } __attribute__((packed
));
1765 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
1767 struct mwl8k_cmd_set_post_scan
*cmd
;
1770 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1774 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
1775 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1777 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
1779 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1786 * CMD_SET_RF_CHANNEL.
1788 struct mwl8k_cmd_set_rf_channel
{
1789 struct mwl8k_cmd_pkt header
;
1791 __u8 current_channel
;
1792 __le32 channel_flags
;
1793 } __attribute__((packed
));
1795 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
1796 struct ieee80211_channel
*channel
)
1798 struct mwl8k_cmd_set_rf_channel
*cmd
;
1801 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1805 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
1806 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1807 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1808 cmd
->current_channel
= channel
->hw_value
;
1809 if (channel
->band
== IEEE80211_BAND_2GHZ
)
1810 cmd
->channel_flags
= cpu_to_le32(0x00000081);
1812 cmd
->channel_flags
= cpu_to_le32(0x00000000);
1814 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1823 struct mwl8k_cmd_set_slot
{
1824 struct mwl8k_cmd_pkt header
;
1827 } __attribute__((packed
));
1829 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
1831 struct mwl8k_cmd_set_slot
*cmd
;
1834 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1838 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
1839 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1840 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1841 cmd
->short_slot
= short_slot_time
;
1843 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1852 struct mwl8k_cmd_mimo_config
{
1853 struct mwl8k_cmd_pkt header
;
1855 __u8 rx_antenna_map
;
1856 __u8 tx_antenna_map
;
1857 } __attribute__((packed
));
1859 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
1861 struct mwl8k_cmd_mimo_config
*cmd
;
1864 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1868 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
1869 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1870 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
1871 cmd
->rx_antenna_map
= rx
;
1872 cmd
->tx_antenna_map
= tx
;
1874 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1881 * CMD_ENABLE_SNIFFER.
1883 struct mwl8k_cmd_enable_sniffer
{
1884 struct mwl8k_cmd_pkt header
;
1886 } __attribute__((packed
));
1888 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
1890 struct mwl8k_cmd_enable_sniffer
*cmd
;
1893 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1897 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
1898 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1899 cmd
->action
= cpu_to_le32(!!enable
);
1901 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1910 struct mwl8k_cmd_set_mac_addr
{
1911 struct mwl8k_cmd_pkt header
;
1912 __u8 mac_addr
[ETH_ALEN
];
1913 } __attribute__((packed
));
1915 static int mwl8k_set_mac_addr(struct ieee80211_hw
*hw
, u8
*mac
)
1917 struct mwl8k_cmd_set_mac_addr
*cmd
;
1920 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1924 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR
);
1925 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1926 memcpy(cmd
->mac_addr
, mac
, ETH_ALEN
);
1928 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1936 * CMD_SET_RATEADAPT_MODE.
1938 struct mwl8k_cmd_set_rate_adapt_mode
{
1939 struct mwl8k_cmd_pkt header
;
1942 } __attribute__((packed
));
1944 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
1946 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
1949 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1953 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
1954 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1955 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1956 cmd
->mode
= cpu_to_le16(mode
);
1958 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1967 struct mwl8k_cmd_set_wmm
{
1968 struct mwl8k_cmd_pkt header
;
1970 } __attribute__((packed
));
1972 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
1974 struct mwl8k_priv
*priv
= hw
->priv
;
1975 struct mwl8k_cmd_set_wmm
*cmd
;
1978 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1982 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
1983 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1984 cmd
->action
= cpu_to_le16(!!enable
);
1986 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1990 priv
->wmm_enabled
= enable
;
1996 * CMD_SET_RTS_THRESHOLD.
1998 struct mwl8k_cmd_rts_threshold
{
1999 struct mwl8k_cmd_pkt header
;
2002 } __attribute__((packed
));
2004 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
2005 u16 action
, u16 threshold
)
2007 struct mwl8k_cmd_rts_threshold
*cmd
;
2010 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2014 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
2015 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2016 cmd
->action
= cpu_to_le16(action
);
2017 cmd
->threshold
= cpu_to_le16(threshold
);
2019 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2026 * CMD_SET_EDCA_PARAMS.
2028 struct mwl8k_cmd_set_edca_params
{
2029 struct mwl8k_cmd_pkt header
;
2031 /* See MWL8K_SET_EDCA_XXX below */
2034 /* TX opportunity in units of 32 us */
2037 /* Log exponent of max contention period: 0...15*/
2040 /* Log exponent of min contention period: 0...15 */
2043 /* Adaptive interframe spacing in units of 32us */
2046 /* TX queue to configure */
2048 } __attribute__((packed
));
2050 #define MWL8K_SET_EDCA_CW 0x01
2051 #define MWL8K_SET_EDCA_TXOP 0x02
2052 #define MWL8K_SET_EDCA_AIFS 0x04
2054 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2055 MWL8K_SET_EDCA_TXOP | \
2056 MWL8K_SET_EDCA_AIFS)
2059 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2060 __u16 cw_min
, __u16 cw_max
,
2061 __u8 aifs
, __u16 txop
)
2063 struct mwl8k_cmd_set_edca_params
*cmd
;
2066 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2070 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2071 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2072 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2073 cmd
->txop
= cpu_to_le16(txop
);
2074 cmd
->log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2075 cmd
->log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2079 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2086 * CMD_FINALIZE_JOIN.
2089 /* FJ beacon buffer size is compiled into the firmware. */
2090 #define MWL8K_FJ_BEACON_MAXLEN 128
2092 struct mwl8k_cmd_finalize_join
{
2093 struct mwl8k_cmd_pkt header
;
2094 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2095 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2096 } __attribute__((packed
));
2098 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2099 __u16 framelen
, __u16 dtim
)
2101 struct mwl8k_cmd_finalize_join
*cmd
;
2102 struct ieee80211_mgmt
*payload
= frame
;
2110 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2114 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2115 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2116 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2118 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2120 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2122 /* XXX TBD Might just have to abort and return an error */
2123 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2124 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2125 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2126 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2128 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2129 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2131 if (payload
&& payload_len
)
2132 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2134 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2142 struct mwl8k_cmd_update_sta_db
{
2143 struct mwl8k_cmd_pkt header
;
2145 /* See STADB_ACTION_TYPE */
2148 /* Peer MAC address */
2149 __u8 peer_addr
[ETH_ALEN
];
2153 /* Peer info - valid during add/update. */
2154 struct peer_capability_info peer_info
;
2155 } __attribute__((packed
));
2157 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2158 struct ieee80211_vif
*vif
, __u32 action
)
2160 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2161 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2162 struct mwl8k_cmd_update_sta_db
*cmd
;
2163 struct peer_capability_info
*peer_info
;
2164 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2168 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2172 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2173 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2175 cmd
->action
= cpu_to_le32(action
);
2176 peer_info
= &cmd
->peer_info
;
2177 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2180 case MWL8K_STA_DB_ADD_ENTRY
:
2181 case MWL8K_STA_DB_MODIFY_ENTRY
:
2182 /* Build peer_info block */
2183 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2184 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2185 peer_info
->interop
= 1;
2186 peer_info
->amsdu_enabled
= 0;
2188 rates
= peer_info
->legacy_rates
;
2189 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2190 rates
[count
] = bitrates
[count
].hw_value
;
2192 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2194 mv_vif
->peer_id
= peer_info
->station_id
;
2198 case MWL8K_STA_DB_DEL_ENTRY
:
2199 case MWL8K_STA_DB_FLUSH
:
2201 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2203 mv_vif
->peer_id
= 0;
2214 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2216 #define MWL8K_FRAME_PROT_DISABLED 0x00
2217 #define MWL8K_FRAME_PROT_11G 0x07
2218 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2219 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2221 struct mwl8k_cmd_update_set_aid
{
2222 struct mwl8k_cmd_pkt header
;
2225 /* AP's MAC address (BSSID) */
2226 __u8 bssid
[ETH_ALEN
];
2227 __le16 protection_mode
;
2228 __u8 supp_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2229 } __attribute__((packed
));
2231 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2232 struct ieee80211_vif
*vif
)
2234 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2235 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2236 struct mwl8k_cmd_update_set_aid
*cmd
;
2237 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2242 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2246 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2247 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2248 cmd
->aid
= cpu_to_le16(info
->aid
);
2250 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2252 if (info
->use_cts_prot
) {
2253 prot_mode
= MWL8K_FRAME_PROT_11G
;
2255 switch (info
->ht_operation_mode
&
2256 IEEE80211_HT_OP_MODE_PROTECTION
) {
2257 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2258 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2260 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2261 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2264 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2268 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2270 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2271 cmd
->supp_rates
[count
] = bitrates
[count
].hw_value
;
2273 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2282 struct mwl8k_cmd_update_rateset
{
2283 struct mwl8k_cmd_pkt header
;
2284 __u8 legacy_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2286 /* Bitmap for supported MCS codes. */
2287 __u8 mcs_set
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2288 __u8 reserved
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2289 } __attribute__((packed
));
2291 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2292 struct ieee80211_vif
*vif
)
2294 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2295 struct mwl8k_cmd_update_rateset
*cmd
;
2296 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2300 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2304 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2305 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2307 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2308 cmd
->legacy_rates
[count
] = bitrates
[count
].hw_value
;
2310 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2317 * CMD_USE_FIXED_RATE.
2319 #define MWL8K_RATE_TABLE_SIZE 8
2320 #define MWL8K_UCAST_RATE 0
2321 #define MWL8K_USE_AUTO_RATE 0x0002
2323 struct mwl8k_rate_entry
{
2324 /* Set to 1 if HT rate, 0 if legacy. */
2327 /* Set to 1 to use retry_count field. */
2328 __le32 enable_retry
;
2330 /* Specified legacy rate or MCS. */
2333 /* Number of allowed retries. */
2335 } __attribute__((packed
));
2337 struct mwl8k_rate_table
{
2338 /* 1 to allow specified rate and below */
2339 __le32 allow_rate_drop
;
2341 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2342 } __attribute__((packed
));
2344 struct mwl8k_cmd_use_fixed_rate
{
2345 struct mwl8k_cmd_pkt header
;
2347 struct mwl8k_rate_table rate_table
;
2349 /* Unicast, Broadcast or Multicast */
2353 } __attribute__((packed
));
2355 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2356 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2358 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2362 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2366 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2367 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2369 cmd
->action
= cpu_to_le32(action
);
2370 cmd
->rate_type
= cpu_to_le32(rate_type
);
2372 if (rate_table
!= NULL
) {
2374 * Copy over each field manually so that endian
2375 * conversion can be done.
2377 cmd
->rate_table
.allow_rate_drop
=
2378 cpu_to_le32(rate_table
->allow_rate_drop
);
2379 cmd
->rate_table
.num_rates
=
2380 cpu_to_le32(rate_table
->num_rates
);
2382 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2383 struct mwl8k_rate_entry
*dst
=
2384 &cmd
->rate_table
.rate_entry
[count
];
2385 struct mwl8k_rate_entry
*src
=
2386 &rate_table
->rate_entry
[count
];
2388 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2389 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2390 dst
->rate
= cpu_to_le32(src
->rate
);
2391 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2395 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2403 * Interrupt handling.
2405 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2407 struct ieee80211_hw
*hw
= dev_id
;
2408 struct mwl8k_priv
*priv
= hw
->priv
;
2411 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2412 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2417 if (status
& MWL8K_A2H_INT_TX_DONE
)
2418 tasklet_schedule(&priv
->tx_reclaim_task
);
2420 if (status
& MWL8K_A2H_INT_RX_READY
) {
2421 while (rxq_process(hw
, 0, 1))
2422 rxq_refill(hw
, 0, 1);
2425 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2426 if (priv
->hostcmd_wait
!= NULL
)
2427 complete(priv
->hostcmd_wait
);
2430 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2431 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2432 priv
->radio_on
&& priv
->pending_tx_pkts
)
2433 mwl8k_tx_start(priv
);
2441 * Core driver operations.
2443 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2445 struct mwl8k_priv
*priv
= hw
->priv
;
2446 int index
= skb_get_queue_mapping(skb
);
2449 if (priv
->current_channel
== NULL
) {
2450 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2451 "disabled\n", wiphy_name(hw
->wiphy
));
2453 return NETDEV_TX_OK
;
2456 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2461 static int mwl8k_start(struct ieee80211_hw
*hw
)
2463 struct mwl8k_priv
*priv
= hw
->priv
;
2466 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2467 IRQF_SHARED
, MWL8K_NAME
, hw
);
2469 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2470 wiphy_name(hw
->wiphy
));
2474 /* Enable tx reclaim tasklet */
2475 tasklet_enable(&priv
->tx_reclaim_task
);
2477 /* Enable interrupts */
2478 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2480 rc
= mwl8k_fw_lock(hw
);
2482 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2485 rc
= mwl8k_cmd_set_pre_scan(hw
);
2488 rc
= mwl8k_cmd_set_post_scan(hw
,
2489 "\x00\x00\x00\x00\x00\x00");
2492 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2495 rc
= mwl8k_set_wmm(hw
, 0);
2498 rc
= mwl8k_enable_sniffer(hw
, 0);
2500 mwl8k_fw_unlock(hw
);
2504 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2505 free_irq(priv
->pdev
->irq
, hw
);
2506 tasklet_disable(&priv
->tx_reclaim_task
);
2512 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2514 struct mwl8k_priv
*priv
= hw
->priv
;
2517 mwl8k_cmd_802_11_radio_disable(hw
);
2519 ieee80211_stop_queues(hw
);
2521 /* Disable interrupts */
2522 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2523 free_irq(priv
->pdev
->irq
, hw
);
2525 /* Stop finalize join worker */
2526 cancel_work_sync(&priv
->finalize_join_worker
);
2527 if (priv
->beacon_skb
!= NULL
)
2528 dev_kfree_skb(priv
->beacon_skb
);
2530 /* Stop tx reclaim tasklet */
2531 tasklet_disable(&priv
->tx_reclaim_task
);
2533 /* Return all skbs to mac80211 */
2534 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2535 mwl8k_txq_reclaim(hw
, i
, 1);
2538 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2539 struct ieee80211_if_init_conf
*conf
)
2541 struct mwl8k_priv
*priv
= hw
->priv
;
2542 struct mwl8k_vif
*mwl8k_vif
;
2545 * We only support one active interface at a time.
2547 if (priv
->vif
!= NULL
)
2551 * We only support managed interfaces for now.
2553 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2556 /* Clean out driver private area */
2557 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2558 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2560 /* Set and save the mac address */
2561 mwl8k_set_mac_addr(hw
, conf
->mac_addr
);
2562 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2564 /* Back pointer to parent config block */
2565 mwl8k_vif
->priv
= priv
;
2567 /* Setup initial PHY parameters */
2568 memcpy(mwl8k_vif
->legacy_rates
,
2569 priv
->rates
, sizeof(mwl8k_vif
->legacy_rates
));
2570 mwl8k_vif
->legacy_nrates
= ARRAY_SIZE(priv
->rates
);
2572 /* Set Initial sequence number to zero */
2573 mwl8k_vif
->seqno
= 0;
2575 priv
->vif
= conf
->vif
;
2576 priv
->current_channel
= NULL
;
2581 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2582 struct ieee80211_if_init_conf
*conf
)
2584 struct mwl8k_priv
*priv
= hw
->priv
;
2586 if (priv
->vif
== NULL
)
2589 mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
2594 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2596 struct ieee80211_conf
*conf
= &hw
->conf
;
2597 struct mwl8k_priv
*priv
= hw
->priv
;
2600 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2601 mwl8k_cmd_802_11_radio_disable(hw
);
2602 priv
->current_channel
= NULL
;
2606 rc
= mwl8k_fw_lock(hw
);
2610 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2614 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2618 priv
->current_channel
= conf
->channel
;
2620 if (conf
->power_level
> 18)
2621 conf
->power_level
= 18;
2622 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2626 if (mwl8k_cmd_mimo_config(hw
, 0x7, 0x7))
2630 mwl8k_fw_unlock(hw
);
2635 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
2636 struct ieee80211_vif
*vif
,
2637 struct ieee80211_bss_conf
*info
,
2640 struct mwl8k_priv
*priv
= hw
->priv
;
2641 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
2644 if (changed
& BSS_CHANGED_BSSID
)
2645 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
2647 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
2650 priv
->capture_beacon
= false;
2652 rc
= mwl8k_fw_lock(hw
);
2657 memcpy(&mwl8k_vif
->bss_info
, info
,
2658 sizeof(struct ieee80211_bss_conf
));
2661 rc
= mwl8k_update_rateset(hw
, vif
);
2665 /* Turn on rate adaptation */
2666 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
2667 MWL8K_UCAST_RATE
, NULL
);
2671 /* Set radio preamble */
2672 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
2677 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
2681 /* Update peer rate info */
2682 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
2683 MWL8K_STA_DB_MODIFY_ENTRY
);
2688 rc
= mwl8k_cmd_set_aid(hw
, vif
);
2693 * Finalize the join. Tell rx handler to process
2694 * next beacon from our BSSID.
2696 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
2697 priv
->capture_beacon
= true;
2699 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
2700 memset(&mwl8k_vif
->bss_info
, 0,
2701 sizeof(struct ieee80211_bss_conf
));
2702 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
2706 mwl8k_fw_unlock(hw
);
2709 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
2710 int mc_count
, struct dev_addr_list
*mclist
)
2712 struct mwl8k_cmd_pkt
*cmd
;
2715 * Synthesize and return a command packet that programs the
2716 * hardware multicast address filter. At this point we don't
2717 * know whether FIF_ALLMULTI is being requested, but if it is,
2718 * we'll end up throwing this packet away and creating a new
2719 * one in mwl8k_configure_filter().
2721 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 0, mc_count
, mclist
);
2723 return (unsigned long)cmd
;
2726 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
2727 unsigned int changed_flags
,
2728 unsigned int *total_flags
,
2731 struct mwl8k_priv
*priv
= hw
->priv
;
2732 struct mwl8k_cmd_pkt
*cmd
;
2734 /* Clear unsupported feature flags */
2735 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
2737 if (mwl8k_fw_lock(hw
))
2740 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
2741 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
) {
2743 * Disable the BSS filter.
2745 mwl8k_cmd_set_pre_scan(hw
);
2750 * Enable the BSS filter.
2752 * If there is an active STA interface, use that
2753 * interface's BSSID, otherwise use a dummy one
2754 * (where the OUI part needs to be nonzero for
2755 * the BSSID to be accepted by POST_SCAN).
2757 bssid
= "\x01\x00\x00\x00\x00\x00";
2758 if (priv
->vif
!= NULL
)
2759 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
2761 mwl8k_cmd_set_post_scan(hw
, bssid
);
2765 cmd
= (void *)(unsigned long)multicast
;
2768 * If FIF_ALLMULTI is being requested, throw away the command
2769 * packet that ->prepare_multicast() built and replace it with
2770 * a command packet that enables reception of all multicast
2773 if (*total_flags
& FIF_ALLMULTI
) {
2775 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 1, 0, NULL
);
2779 mwl8k_post_cmd(hw
, cmd
);
2783 mwl8k_fw_unlock(hw
);
2786 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
2788 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
2791 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2792 const struct ieee80211_tx_queue_params
*params
)
2794 struct mwl8k_priv
*priv
= hw
->priv
;
2797 rc
= mwl8k_fw_lock(hw
);
2799 if (!priv
->wmm_enabled
)
2800 rc
= mwl8k_set_wmm(hw
, 1);
2803 rc
= mwl8k_set_edca_params(hw
, queue
,
2809 mwl8k_fw_unlock(hw
);
2815 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
2816 struct ieee80211_tx_queue_stats
*stats
)
2818 struct mwl8k_priv
*priv
= hw
->priv
;
2819 struct mwl8k_tx_queue
*txq
;
2822 spin_lock_bh(&priv
->tx_lock
);
2823 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
2824 txq
= priv
->txq
+ index
;
2825 memcpy(&stats
[index
], &txq
->tx_stats
,
2826 sizeof(struct ieee80211_tx_queue_stats
));
2828 spin_unlock_bh(&priv
->tx_lock
);
2833 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
2834 struct ieee80211_low_level_stats
*stats
)
2836 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
2839 static const struct ieee80211_ops mwl8k_ops
= {
2841 .start
= mwl8k_start
,
2843 .add_interface
= mwl8k_add_interface
,
2844 .remove_interface
= mwl8k_remove_interface
,
2845 .config
= mwl8k_config
,
2846 .bss_info_changed
= mwl8k_bss_info_changed
,
2847 .prepare_multicast
= mwl8k_prepare_multicast
,
2848 .configure_filter
= mwl8k_configure_filter
,
2849 .set_rts_threshold
= mwl8k_set_rts_threshold
,
2850 .conf_tx
= mwl8k_conf_tx
,
2851 .get_tx_stats
= mwl8k_get_tx_stats
,
2852 .get_stats
= mwl8k_get_stats
,
2855 static void mwl8k_tx_reclaim_handler(unsigned long data
)
2858 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
2859 struct mwl8k_priv
*priv
= hw
->priv
;
2861 spin_lock_bh(&priv
->tx_lock
);
2862 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2863 mwl8k_txq_reclaim(hw
, i
, 0);
2865 if (priv
->tx_wait
!= NULL
&& !priv
->pending_tx_pkts
) {
2866 complete(priv
->tx_wait
);
2867 priv
->tx_wait
= NULL
;
2869 spin_unlock_bh(&priv
->tx_lock
);
2872 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
2874 struct mwl8k_priv
*priv
=
2875 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
2876 struct sk_buff
*skb
= priv
->beacon_skb
;
2877 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
2879 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
2882 priv
->beacon_skb
= NULL
;
2885 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
2886 const struct pci_device_id
*id
)
2888 static int printed_version
= 0;
2889 struct ieee80211_hw
*hw
;
2890 struct mwl8k_priv
*priv
;
2894 if (!printed_version
) {
2895 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
2896 printed_version
= 1;
2899 rc
= pci_enable_device(pdev
);
2901 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
2906 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
2908 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
2913 pci_set_master(pdev
);
2915 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
2917 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
2925 priv
->wmm_enabled
= false;
2926 priv
->pending_tx_pkts
= 0;
2928 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
2929 pci_set_drvdata(pdev
, hw
);
2931 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
2932 if (priv
->regs
== NULL
) {
2933 printk(KERN_ERR
"%s: Cannot map device memory\n",
2934 wiphy_name(hw
->wiphy
));
2938 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
2939 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
2940 priv
->band
.channels
= priv
->channels
;
2941 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
2942 priv
->band
.bitrates
= priv
->rates
;
2943 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
2944 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
2946 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
2947 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
2950 * Extra headroom is the size of the required DMA header
2951 * minus the size of the smallest 802.11 frame (CTS frame).
2953 hw
->extra_tx_headroom
=
2954 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
2956 hw
->channel_change_time
= 10;
2958 hw
->queues
= MWL8K_TX_QUEUES
;
2960 hw
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
2962 /* Set rssi and noise values to dBm */
2963 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
2964 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
2967 /* Set default radio state and preamble */
2969 priv
->radio_short_preamble
= 0;
2971 /* Finalize join worker */
2972 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
2974 /* TX reclaim tasklet */
2975 tasklet_init(&priv
->tx_reclaim_task
,
2976 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
2977 tasklet_disable(&priv
->tx_reclaim_task
);
2979 /* Power management cookie */
2980 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
2981 if (priv
->cookie
== NULL
)
2984 rc
= mwl8k_rxq_init(hw
, 0);
2987 rxq_refill(hw
, 0, INT_MAX
);
2989 mutex_init(&priv
->fw_mutex
);
2990 priv
->fw_mutex_owner
= NULL
;
2991 priv
->fw_mutex_depth
= 0;
2992 priv
->hostcmd_wait
= NULL
;
2994 spin_lock_init(&priv
->tx_lock
);
2996 priv
->tx_wait
= NULL
;
2998 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
2999 rc
= mwl8k_txq_init(hw
, i
);
3001 goto err_free_queues
;
3004 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
3005 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3006 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
3007 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
3009 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
3010 IRQF_SHARED
, MWL8K_NAME
, hw
);
3012 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
3013 wiphy_name(hw
->wiphy
));
3014 goto err_free_queues
;
3017 /* Reset firmware and hardware */
3018 mwl8k_hw_reset(priv
);
3020 /* Ask userland hotplug daemon for the device firmware */
3021 rc
= mwl8k_request_firmware(priv
, (u32
)id
->driver_data
);
3023 printk(KERN_ERR
"%s: Firmware files not found\n",
3024 wiphy_name(hw
->wiphy
));
3028 /* Load firmware into hardware */
3029 rc
= mwl8k_load_firmware(hw
);
3031 printk(KERN_ERR
"%s: Cannot start firmware\n",
3032 wiphy_name(hw
->wiphy
));
3033 goto err_stop_firmware
;
3036 /* Reclaim memory once firmware is successfully loaded */
3037 mwl8k_release_firmware(priv
);
3040 * Temporarily enable interrupts. Initial firmware host
3041 * commands use interrupts and avoids polling. Disable
3042 * interrupts when done.
3044 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3046 /* Get config data, mac addrs etc */
3047 rc
= mwl8k_cmd_get_hw_spec(hw
);
3049 printk(KERN_ERR
"%s: Cannot initialise firmware\n",
3050 wiphy_name(hw
->wiphy
));
3051 goto err_stop_firmware
;
3054 /* Turn radio off */
3055 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
3057 printk(KERN_ERR
"%s: Cannot disable\n", wiphy_name(hw
->wiphy
));
3058 goto err_stop_firmware
;
3061 /* Clear MAC address */
3062 rc
= mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
3064 printk(KERN_ERR
"%s: Cannot clear MAC address\n",
3065 wiphy_name(hw
->wiphy
));
3066 goto err_stop_firmware
;
3069 /* Disable interrupts */
3070 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3071 free_irq(priv
->pdev
->irq
, hw
);
3073 rc
= ieee80211_register_hw(hw
);
3075 printk(KERN_ERR
"%s: Cannot register device\n",
3076 wiphy_name(hw
->wiphy
));
3077 goto err_stop_firmware
;
3080 printk(KERN_INFO
"%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n",
3081 wiphy_name(hw
->wiphy
), priv
->part_num
, priv
->hw_rev
,
3082 hw
->wiphy
->perm_addr
,
3083 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3084 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3089 mwl8k_hw_reset(priv
);
3090 mwl8k_release_firmware(priv
);
3093 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3094 free_irq(priv
->pdev
->irq
, hw
);
3097 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3098 mwl8k_txq_deinit(hw
, i
);
3099 mwl8k_rxq_deinit(hw
, 0);
3102 if (priv
->cookie
!= NULL
)
3103 pci_free_consistent(priv
->pdev
, 4,
3104 priv
->cookie
, priv
->cookie_dma
);
3106 if (priv
->regs
!= NULL
)
3107 pci_iounmap(pdev
, priv
->regs
);
3109 pci_set_drvdata(pdev
, NULL
);
3110 ieee80211_free_hw(hw
);
3113 pci_release_regions(pdev
);
3114 pci_disable_device(pdev
);
3119 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3121 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3124 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3126 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3127 struct mwl8k_priv
*priv
;
3134 ieee80211_stop_queues(hw
);
3136 ieee80211_unregister_hw(hw
);
3138 /* Remove tx reclaim tasklet */
3139 tasklet_kill(&priv
->tx_reclaim_task
);
3142 mwl8k_hw_reset(priv
);
3144 /* Return all skbs to mac80211 */
3145 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3146 mwl8k_txq_reclaim(hw
, i
, 1);
3148 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3149 mwl8k_txq_deinit(hw
, i
);
3151 mwl8k_rxq_deinit(hw
, 0);
3153 pci_free_consistent(priv
->pdev
, 4, priv
->cookie
, priv
->cookie_dma
);
3155 pci_iounmap(pdev
, priv
->regs
);
3156 pci_set_drvdata(pdev
, NULL
);
3157 ieee80211_free_hw(hw
);
3158 pci_release_regions(pdev
);
3159 pci_disable_device(pdev
);
3162 static struct pci_driver mwl8k_driver
= {
3164 .id_table
= mwl8k_table
,
3165 .probe
= mwl8k_probe
,
3166 .remove
= __devexit_p(mwl8k_remove
),
3167 .shutdown
= __devexit_p(mwl8k_shutdown
),
3170 static int __init
mwl8k_init(void)
3172 return pci_register_driver(&mwl8k_driver
);
3175 static void __exit
mwl8k_exit(void)
3177 pci_unregister_driver(&mwl8k_driver
);
3180 module_init(mwl8k_init
);
3181 module_exit(mwl8k_exit
);
3183 MODULE_DESCRIPTION(MWL8K_DESC
);
3184 MODULE_VERSION(MWL8K_VERSION
);
3185 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3186 MODULE_LICENSE("GPL");