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1 /*
2 * Common code for mac80211 Prism54 drivers
3 *
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7 *
8 * Based on:
9 * - the islsm (softmac prism54) driver, which is:
10 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
11 * - stlc45xx driver
12 * C\ 2 Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19 #include <linux/init.h>
20 #include <linux/firmware.h>
21 #include <linux/etherdevice.h>
22
23 #include <net/mac80211.h>
24
25 #include "p54.h"
26 #include "p54common.h"
27
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_DESCRIPTION("Softmac Prism54 common code");
30 MODULE_LICENSE("GPL");
31 MODULE_ALIAS("prism54common");
32
33 static struct ieee80211_rate p54_bgrates[] = {
34 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
36 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
37 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
38 { .bitrate = 60, .hw_value = 4, },
39 { .bitrate = 90, .hw_value = 5, },
40 { .bitrate = 120, .hw_value = 6, },
41 { .bitrate = 180, .hw_value = 7, },
42 { .bitrate = 240, .hw_value = 8, },
43 { .bitrate = 360, .hw_value = 9, },
44 { .bitrate = 480, .hw_value = 10, },
45 { .bitrate = 540, .hw_value = 11, },
46 };
47
48 static struct ieee80211_channel p54_bgchannels[] = {
49 { .center_freq = 2412, .hw_value = 1, },
50 { .center_freq = 2417, .hw_value = 2, },
51 { .center_freq = 2422, .hw_value = 3, },
52 { .center_freq = 2427, .hw_value = 4, },
53 { .center_freq = 2432, .hw_value = 5, },
54 { .center_freq = 2437, .hw_value = 6, },
55 { .center_freq = 2442, .hw_value = 7, },
56 { .center_freq = 2447, .hw_value = 8, },
57 { .center_freq = 2452, .hw_value = 9, },
58 { .center_freq = 2457, .hw_value = 10, },
59 { .center_freq = 2462, .hw_value = 11, },
60 { .center_freq = 2467, .hw_value = 12, },
61 { .center_freq = 2472, .hw_value = 13, },
62 { .center_freq = 2484, .hw_value = 14, },
63 };
64
65 static struct ieee80211_supported_band band_2GHz = {
66 .channels = p54_bgchannels,
67 .n_channels = ARRAY_SIZE(p54_bgchannels),
68 .bitrates = p54_bgrates,
69 .n_bitrates = ARRAY_SIZE(p54_bgrates),
70 };
71
72 static struct ieee80211_rate p54_arates[] = {
73 { .bitrate = 60, .hw_value = 4, },
74 { .bitrate = 90, .hw_value = 5, },
75 { .bitrate = 120, .hw_value = 6, },
76 { .bitrate = 180, .hw_value = 7, },
77 { .bitrate = 240, .hw_value = 8, },
78 { .bitrate = 360, .hw_value = 9, },
79 { .bitrate = 480, .hw_value = 10, },
80 { .bitrate = 540, .hw_value = 11, },
81 };
82
83 static struct ieee80211_channel p54_achannels[] = {
84 { .center_freq = 4920 },
85 { .center_freq = 4940 },
86 { .center_freq = 4960 },
87 { .center_freq = 4980 },
88 { .center_freq = 5040 },
89 { .center_freq = 5060 },
90 { .center_freq = 5080 },
91 { .center_freq = 5170 },
92 { .center_freq = 5180 },
93 { .center_freq = 5190 },
94 { .center_freq = 5200 },
95 { .center_freq = 5210 },
96 { .center_freq = 5220 },
97 { .center_freq = 5230 },
98 { .center_freq = 5240 },
99 { .center_freq = 5260 },
100 { .center_freq = 5280 },
101 { .center_freq = 5300 },
102 { .center_freq = 5320 },
103 { .center_freq = 5500 },
104 { .center_freq = 5520 },
105 { .center_freq = 5540 },
106 { .center_freq = 5560 },
107 { .center_freq = 5580 },
108 { .center_freq = 5600 },
109 { .center_freq = 5620 },
110 { .center_freq = 5640 },
111 { .center_freq = 5660 },
112 { .center_freq = 5680 },
113 { .center_freq = 5700 },
114 { .center_freq = 5745 },
115 { .center_freq = 5765 },
116 { .center_freq = 5785 },
117 { .center_freq = 5805 },
118 { .center_freq = 5825 },
119 };
120
121 static struct ieee80211_supported_band band_5GHz = {
122 .channels = p54_achannels,
123 .n_channels = ARRAY_SIZE(p54_achannels),
124 .bitrates = p54_arates,
125 .n_bitrates = ARRAY_SIZE(p54_arates),
126 };
127
128 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
129 {
130 struct p54_common *priv = dev->priv;
131 struct bootrec_exp_if *exp_if;
132 struct bootrec *bootrec;
133 u32 *data = (u32 *)fw->data;
134 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
135 u8 *fw_version = NULL;
136 size_t len;
137 int i;
138
139 if (priv->rx_start)
140 return 0;
141
142 while (data < end_data && *data)
143 data++;
144
145 while (data < end_data && !*data)
146 data++;
147
148 bootrec = (struct bootrec *) data;
149
150 while (bootrec->data <= end_data &&
151 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
152 u32 code = le32_to_cpu(bootrec->code);
153 switch (code) {
154 case BR_CODE_COMPONENT_ID:
155 priv->fw_interface = be32_to_cpup((__be32 *)
156 bootrec->data);
157 switch (priv->fw_interface) {
158 case FW_FMAC:
159 printk(KERN_INFO "p54: FreeMAC firmware\n");
160 break;
161 case FW_LM20:
162 printk(KERN_INFO "p54: LM20 firmware\n");
163 break;
164 case FW_LM86:
165 printk(KERN_INFO "p54: LM86 firmware\n");
166 break;
167 case FW_LM87:
168 printk(KERN_INFO "p54: LM87 firmware\n");
169 break;
170 default:
171 printk(KERN_INFO "p54: unknown firmware\n");
172 break;
173 }
174 break;
175 case BR_CODE_COMPONENT_VERSION:
176 /* 24 bytes should be enough for all firmwares */
177 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
178 fw_version = (unsigned char*)bootrec->data;
179 break;
180 case BR_CODE_DESCR: {
181 struct bootrec_desc *desc =
182 (struct bootrec_desc *)bootrec->data;
183 priv->rx_start = le32_to_cpu(desc->rx_start);
184 /* FIXME add sanity checking */
185 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
186 priv->headroom = desc->headroom;
187 priv->tailroom = desc->tailroom;
188 if (le32_to_cpu(bootrec->len) == 11)
189 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
190 else
191 priv->rx_mtu = (size_t)
192 0x620 - priv->tx_hdr_len;
193 break;
194 }
195 case BR_CODE_EXPOSED_IF:
196 exp_if = (struct bootrec_exp_if *) bootrec->data;
197 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
198 if (exp_if[i].if_id == cpu_to_le16(0x1a))
199 priv->fw_var = le16_to_cpu(exp_if[i].variant);
200 break;
201 case BR_CODE_DEPENDENT_IF:
202 break;
203 case BR_CODE_END_OF_BRA:
204 case LEGACY_BR_CODE_END_OF_BRA:
205 end_data = NULL;
206 break;
207 default:
208 break;
209 }
210 bootrec = (struct bootrec *)&bootrec->data[len];
211 }
212
213 if (fw_version)
214 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
215 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
216
217 if (priv->fw_var < 0x500)
218 printk(KERN_INFO "p54: you are using an obsolete firmware. "
219 "visit http://wireless.kernel.org/en/users/Drivers/p54 "
220 "and grab one for \"kernel >= 2.6.28\"!\n");
221
222 if (priv->fw_var >= 0x300) {
223 /* Firmware supports QoS, use it! */
224 priv->tx_stats[4].limit = 3; /* AC_VO */
225 priv->tx_stats[5].limit = 4; /* AC_VI */
226 priv->tx_stats[6].limit = 3; /* AC_BE */
227 priv->tx_stats[7].limit = 2; /* AC_BK */
228 dev->queues = 4;
229 }
230
231 return 0;
232 }
233 EXPORT_SYMBOL_GPL(p54_parse_firmware);
234
235 static int p54_convert_rev0(struct ieee80211_hw *dev,
236 struct pda_pa_curve_data *curve_data)
237 {
238 struct p54_common *priv = dev->priv;
239 struct p54_pa_curve_data_sample *dst;
240 struct pda_pa_curve_data_sample_rev0 *src;
241 size_t cd_len = sizeof(*curve_data) +
242 (curve_data->points_per_channel*sizeof(*dst) + 2) *
243 curve_data->channels;
244 unsigned int i, j;
245 void *source, *target;
246
247 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
248 if (!priv->curve_data)
249 return -ENOMEM;
250
251 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
252 source = curve_data->data;
253 target = priv->curve_data->data;
254 for (i = 0; i < curve_data->channels; i++) {
255 __le16 *freq = source;
256 source += sizeof(__le16);
257 *((__le16 *)target) = *freq;
258 target += sizeof(__le16);
259 for (j = 0; j < curve_data->points_per_channel; j++) {
260 dst = target;
261 src = source;
262
263 dst->rf_power = src->rf_power;
264 dst->pa_detector = src->pa_detector;
265 dst->data_64qam = src->pcv;
266 /* "invent" the points for the other modulations */
267 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
268 dst->data_16qam = SUB(src->pcv, 12);
269 dst->data_qpsk = SUB(dst->data_16qam, 12);
270 dst->data_bpsk = SUB(dst->data_qpsk, 12);
271 dst->data_barker = SUB(dst->data_bpsk, 14);
272 #undef SUB
273 target += sizeof(*dst);
274 source += sizeof(*src);
275 }
276 }
277
278 return 0;
279 }
280
281 static int p54_convert_rev1(struct ieee80211_hw *dev,
282 struct pda_pa_curve_data *curve_data)
283 {
284 struct p54_common *priv = dev->priv;
285 struct p54_pa_curve_data_sample *dst;
286 struct pda_pa_curve_data_sample_rev1 *src;
287 size_t cd_len = sizeof(*curve_data) +
288 (curve_data->points_per_channel*sizeof(*dst) + 2) *
289 curve_data->channels;
290 unsigned int i, j;
291 void *source, *target;
292
293 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
294 if (!priv->curve_data)
295 return -ENOMEM;
296
297 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
298 source = curve_data->data;
299 target = priv->curve_data->data;
300 for (i = 0; i < curve_data->channels; i++) {
301 __le16 *freq = source;
302 source += sizeof(__le16);
303 *((__le16 *)target) = *freq;
304 target += sizeof(__le16);
305 for (j = 0; j < curve_data->points_per_channel; j++) {
306 memcpy(target, source, sizeof(*src));
307
308 target += sizeof(*dst);
309 source += sizeof(*src);
310 }
311 source++;
312 }
313
314 return 0;
315 }
316
317 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
318 "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
319 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
320
321 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
322 {
323 struct p54_common *priv = dev->priv;
324 struct eeprom_pda_wrap *wrap = NULL;
325 struct pda_entry *entry;
326 unsigned int data_len, entry_len;
327 void *tmp;
328 int err;
329 u8 *end = (u8 *)eeprom + len;
330 u16 synth = 0;
331
332 wrap = (struct eeprom_pda_wrap *) eeprom;
333 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
334
335 /* verify that at least the entry length/code fits */
336 while ((u8 *)entry <= end - sizeof(*entry)) {
337 entry_len = le16_to_cpu(entry->len);
338 data_len = ((entry_len - 1) << 1);
339
340 /* abort if entry exceeds whole structure */
341 if ((u8 *)entry + sizeof(*entry) + data_len > end)
342 break;
343
344 switch (le16_to_cpu(entry->code)) {
345 case PDR_MAC_ADDRESS:
346 SET_IEEE80211_PERM_ADDR(dev, entry->data);
347 break;
348 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
349 if (data_len < 2) {
350 err = -EINVAL;
351 goto err;
352 }
353
354 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
355 err = -EINVAL;
356 goto err;
357 }
358
359 priv->output_limit = kmalloc(entry->data[1] *
360 sizeof(*priv->output_limit), GFP_KERNEL);
361
362 if (!priv->output_limit) {
363 err = -ENOMEM;
364 goto err;
365 }
366
367 memcpy(priv->output_limit, &entry->data[2],
368 entry->data[1]*sizeof(*priv->output_limit));
369 priv->output_limit_len = entry->data[1];
370 break;
371 case PDR_PRISM_PA_CAL_CURVE_DATA: {
372 struct pda_pa_curve_data *curve_data =
373 (struct pda_pa_curve_data *)entry->data;
374 if (data_len < sizeof(*curve_data)) {
375 err = -EINVAL;
376 goto err;
377 }
378
379 switch (curve_data->cal_method_rev) {
380 case 0:
381 err = p54_convert_rev0(dev, curve_data);
382 break;
383 case 1:
384 err = p54_convert_rev1(dev, curve_data);
385 break;
386 default:
387 printk(KERN_ERR "p54: unknown curve data "
388 "revision %d\n",
389 curve_data->cal_method_rev);
390 err = -ENODEV;
391 break;
392 }
393 if (err)
394 goto err;
395
396 }
397 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
398 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
399 if (!priv->iq_autocal) {
400 err = -ENOMEM;
401 goto err;
402 }
403
404 memcpy(priv->iq_autocal, entry->data, data_len);
405 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
406 break;
407 case PDR_INTERFACE_LIST:
408 tmp = entry->data;
409 while ((u8 *)tmp < entry->data + data_len) {
410 struct bootrec_exp_if *exp_if = tmp;
411 if (le16_to_cpu(exp_if->if_id) == 0xf)
412 synth = le16_to_cpu(exp_if->variant);
413 tmp += sizeof(struct bootrec_exp_if);
414 }
415 break;
416 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
417 priv->version = *(u8 *)(entry->data + 1);
418 break;
419 case PDR_END:
420 /* make it overrun */
421 entry_len = len;
422 break;
423 default:
424 printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
425 le16_to_cpu(entry->code));
426 break;
427 }
428
429 entry = (void *)entry + (entry_len + 1)*2;
430 }
431
432 if (!synth || !priv->iq_autocal || !priv->output_limit ||
433 !priv->curve_data) {
434 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
435 err = -EINVAL;
436 goto err;
437 }
438
439 priv->rxhw = synth & PDR_SYNTH_FRONTEND_MASK;
440 if (priv->rxhw == 4)
441 p54_init_xbow_synth(dev);
442 if (!(synth & PDR_SYNTH_24_GHZ_DISABLED))
443 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
444 if (!(synth & PDR_SYNTH_5_GHZ_DISABLED))
445 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
446
447 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
448 u8 perm_addr[ETH_ALEN];
449
450 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
451 wiphy_name(dev->wiphy));
452 random_ether_addr(perm_addr);
453 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
454 }
455
456 printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
457 wiphy_name(dev->wiphy),
458 dev->wiphy->perm_addr,
459 priv->version, p54_rf_chips[priv->rxhw]);
460
461 return 0;
462
463 err:
464 if (priv->iq_autocal) {
465 kfree(priv->iq_autocal);
466 priv->iq_autocal = NULL;
467 }
468
469 if (priv->output_limit) {
470 kfree(priv->output_limit);
471 priv->output_limit = NULL;
472 }
473
474 if (priv->curve_data) {
475 kfree(priv->curve_data);
476 priv->curve_data = NULL;
477 }
478
479 printk(KERN_ERR "p54: eeprom parse failed!\n");
480 return err;
481 }
482
483 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
484 {
485 /* TODO: get the rssi_add & rssi_mul data from the eeprom */
486 return ((rssi * 0x83) / 64 - 400) / 4;
487 }
488
489 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
490 {
491 struct p54_common *priv = dev->priv;
492 struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
493 struct ieee80211_rx_status rx_status = {0};
494 u16 freq = le16_to_cpu(hdr->freq);
495 size_t header_len = sizeof(*hdr);
496 u32 tsf32;
497
498 if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD))) {
499 if (priv->filter_flags & FIF_FCSFAIL)
500 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
501 else
502 return 0;
503 }
504
505 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
506 rx_status.noise = priv->noise;
507 /* XX correct? */
508 rx_status.qual = (100 * hdr->rssi) / 127;
509 rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
510 hdr->rate : (hdr->rate - 4)) & 0xf;
511 rx_status.freq = freq;
512 rx_status.band = dev->conf.channel->band;
513 rx_status.antenna = hdr->antenna;
514
515 tsf32 = le32_to_cpu(hdr->tsf32);
516 if (tsf32 < priv->tsf_low32)
517 priv->tsf_high32++;
518 rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
519 priv->tsf_low32 = tsf32;
520
521 rx_status.flag |= RX_FLAG_TSFT;
522
523 if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
524 header_len += hdr->align[0];
525
526 skb_pull(skb, header_len);
527 skb_trim(skb, le16_to_cpu(hdr->len));
528
529 ieee80211_rx_irqsafe(dev, skb, &rx_status);
530
531 return -1;
532 }
533
534 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
535 {
536 struct p54_common *priv = dev->priv;
537 int i;
538
539 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
540 return ;
541
542 for (i = 0; i < dev->queues; i++)
543 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
544 ieee80211_wake_queue(dev, i);
545 }
546
547 void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
548 {
549 struct p54_common *priv = dev->priv;
550 struct ieee80211_tx_info *info;
551 struct memrecord *range;
552 unsigned long flags;
553 u32 freed = 0, last_addr = priv->rx_start;
554
555 if (!skb || !dev)
556 return;
557
558 spin_lock_irqsave(&priv->tx_queue.lock, flags);
559 info = IEEE80211_SKB_CB(skb);
560 range = (void *)info->rate_driver_data;
561 if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
562 struct ieee80211_tx_info *ni;
563 struct memrecord *mr;
564
565 ni = IEEE80211_SKB_CB(skb->prev);
566 mr = (struct memrecord *)ni->rate_driver_data;
567 last_addr = mr->end_addr;
568 }
569 if (skb->next != (struct sk_buff *)&priv->tx_queue) {
570 struct ieee80211_tx_info *ni;
571 struct memrecord *mr;
572
573 ni = IEEE80211_SKB_CB(skb->next);
574 mr = (struct memrecord *)ni->rate_driver_data;
575 freed = mr->start_addr - last_addr;
576 } else
577 freed = priv->rx_end - last_addr;
578 __skb_unlink(skb, &priv->tx_queue);
579 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
580 kfree_skb(skb);
581
582 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
583 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
584 p54_wake_free_queues(dev);
585 }
586 EXPORT_SYMBOL_GPL(p54_free_skb);
587
588 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
589 {
590 struct p54_common *priv = dev->priv;
591 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
592 struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
593 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
594 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
595 struct memrecord *range = NULL;
596 u32 freed = 0;
597 u32 last_addr = priv->rx_start;
598 unsigned long flags;
599 int count, idx;
600
601 spin_lock_irqsave(&priv->tx_queue.lock, flags);
602 while (entry != (struct sk_buff *)&priv->tx_queue) {
603 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
604 struct p54_hdr *entry_hdr;
605 struct p54_tx_data *entry_data;
606 int pad = 0;
607
608 range = (void *)info->rate_driver_data;
609 if (range->start_addr != addr) {
610 last_addr = range->end_addr;
611 entry = entry->next;
612 continue;
613 }
614
615 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
616 struct ieee80211_tx_info *ni;
617 struct memrecord *mr;
618
619 ni = IEEE80211_SKB_CB(entry->next);
620 mr = (struct memrecord *)ni->rate_driver_data;
621 freed = mr->start_addr - last_addr;
622 } else
623 freed = priv->rx_end - last_addr;
624
625 last_addr = range->end_addr;
626 __skb_unlink(entry, &priv->tx_queue);
627 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
628
629 if (unlikely(entry == priv->cached_beacon)) {
630 kfree_skb(entry);
631 priv->cached_beacon = NULL;
632 goto out;
633 }
634
635 /*
636 * Clear manually, ieee80211_tx_info_clear_status would
637 * clear the counts too and we need them.
638 */
639 memset(&info->status.ampdu_ack_len, 0,
640 sizeof(struct ieee80211_tx_info) -
641 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
642 BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
643 status.ampdu_ack_len) != 23);
644
645 entry_hdr = (struct p54_hdr *) entry->data;
646 entry_data = (struct p54_tx_data *) entry_hdr->data;
647 if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
648 pad = entry_data->align[0];
649
650 /* walk through the rates array and adjust the counts */
651 count = payload->tries;
652 for (idx = 0; idx < 4; idx++) {
653 if (count >= info->status.rates[idx].count) {
654 count -= info->status.rates[idx].count;
655 } else if (count > 0) {
656 info->status.rates[idx].count = count;
657 count = 0;
658 } else {
659 info->status.rates[idx].idx = -1;
660 info->status.rates[idx].count = 0;
661 }
662 }
663
664 priv->tx_stats[entry_data->hw_queue].len--;
665 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
666 (!payload->status))
667 info->flags |= IEEE80211_TX_STAT_ACK;
668 if (payload->status & P54_TX_PSM_CANCELLED)
669 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
670 info->status.ack_signal = p54_rssi_to_dbm(dev,
671 (int)payload->ack_rssi);
672 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
673 ieee80211_tx_status_irqsafe(dev, entry);
674 goto out;
675 }
676 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
677
678 out:
679 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
680 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
681 p54_wake_free_queues(dev);
682 }
683
684 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
685 struct sk_buff *skb)
686 {
687 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
688 struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
689 struct p54_common *priv = dev->priv;
690
691 if (!priv->eeprom)
692 return ;
693
694 memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
695
696 complete(&priv->eeprom_comp);
697 }
698
699 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
700 {
701 struct p54_common *priv = dev->priv;
702 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
703 struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
704 u32 tsf32 = le32_to_cpu(stats->tsf32);
705
706 if (tsf32 < priv->tsf_low32)
707 priv->tsf_high32++;
708 priv->tsf_low32 = tsf32;
709
710 priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
711 priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
712 priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
713
714 priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
715 complete(&priv->stats_comp);
716
717 mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
718 }
719
720 static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb)
721 {
722 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
723 struct p54_trap *trap = (struct p54_trap *) hdr->data;
724 u16 event = le16_to_cpu(trap->event);
725 u16 freq = le16_to_cpu(trap->frequency);
726
727 switch (event) {
728 case P54_TRAP_BEACON_TX:
729 break;
730 case P54_TRAP_RADAR:
731 printk(KERN_INFO "%s: radar (freq:%d MHz)\n",
732 wiphy_name(dev->wiphy), freq);
733 break;
734 case P54_TRAP_NO_BEACON:
735 break;
736 case P54_TRAP_SCAN:
737 break;
738 case P54_TRAP_TBTT:
739 break;
740 case P54_TRAP_TIMER:
741 break;
742 default:
743 printk(KERN_INFO "%s: received event:%x freq:%d\n",
744 wiphy_name(dev->wiphy), event, freq);
745 break;
746 }
747 }
748
749 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
750 {
751 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
752
753 switch (le16_to_cpu(hdr->type)) {
754 case P54_CONTROL_TYPE_TXDONE:
755 p54_rx_frame_sent(dev, skb);
756 break;
757 case P54_CONTROL_TYPE_TRAP:
758 p54_rx_trap(dev, skb);
759 break;
760 case P54_CONTROL_TYPE_BBP:
761 break;
762 case P54_CONTROL_TYPE_STAT_READBACK:
763 p54_rx_stats(dev, skb);
764 break;
765 case P54_CONTROL_TYPE_EEPROM_READBACK:
766 p54_rx_eeprom_readback(dev, skb);
767 break;
768 default:
769 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
770 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
771 break;
772 }
773
774 return 0;
775 }
776
777 /* returns zero if skb can be reused */
778 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
779 {
780 u16 type = le16_to_cpu(*((__le16 *)skb->data));
781
782 if (type & P54_HDR_FLAG_CONTROL)
783 return p54_rx_control(dev, skb);
784 else
785 return p54_rx_data(dev, skb);
786 }
787 EXPORT_SYMBOL_GPL(p54_rx);
788
789 /*
790 * So, the firmware is somewhat stupid and doesn't know what places in its
791 * memory incoming data should go to. By poking around in the firmware, we
792 * can find some unused memory to upload our packets to. However, data that we
793 * want the card to TX needs to stay intact until the card has told us that
794 * it is done with it. This function finds empty places we can upload to and
795 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
796 * allocated areas.
797 */
798 static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
799 struct p54_hdr *data, u32 len)
800 {
801 struct p54_common *priv = dev->priv;
802 struct sk_buff *entry = priv->tx_queue.next;
803 struct sk_buff *target_skb = NULL;
804 struct ieee80211_tx_info *info;
805 struct memrecord *range;
806 u32 last_addr = priv->rx_start;
807 u32 largest_hole = 0;
808 u32 target_addr = priv->rx_start;
809 unsigned long flags;
810 unsigned int left;
811 len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
812
813 if (!skb)
814 return -EINVAL;
815
816 spin_lock_irqsave(&priv->tx_queue.lock, flags);
817 left = skb_queue_len(&priv->tx_queue);
818 while (left--) {
819 u32 hole_size;
820 info = IEEE80211_SKB_CB(entry);
821 range = (void *)info->rate_driver_data;
822 hole_size = range->start_addr - last_addr;
823 if (!target_skb && hole_size >= len) {
824 target_skb = entry->prev;
825 hole_size -= len;
826 target_addr = last_addr;
827 }
828 largest_hole = max(largest_hole, hole_size);
829 last_addr = range->end_addr;
830 entry = entry->next;
831 }
832 if (!target_skb && priv->rx_end - last_addr >= len) {
833 target_skb = priv->tx_queue.prev;
834 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
835 if (!skb_queue_empty(&priv->tx_queue)) {
836 info = IEEE80211_SKB_CB(target_skb);
837 range = (void *)info->rate_driver_data;
838 target_addr = range->end_addr;
839 }
840 } else
841 largest_hole = max(largest_hole, priv->rx_end - last_addr);
842
843 if (!target_skb) {
844 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
845 ieee80211_stop_queues(dev);
846 return -ENOMEM;
847 }
848
849 info = IEEE80211_SKB_CB(skb);
850 range = (void *)info->rate_driver_data;
851 range->start_addr = target_addr;
852 range->end_addr = target_addr + len;
853 __skb_queue_after(&priv->tx_queue, target_skb, skb);
854 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
855
856 if (largest_hole < priv->headroom + sizeof(struct p54_hdr) +
857 48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
858 ieee80211_stop_queues(dev);
859
860 data->req_id = cpu_to_le32(target_addr + priv->headroom);
861 return 0;
862 }
863
864 static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev,
865 u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
866 {
867 struct p54_common *priv = dev->priv;
868 struct p54_hdr *hdr;
869 struct sk_buff *skb;
870
871 skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
872 if (!skb)
873 return NULL;
874 skb_reserve(skb, priv->tx_hdr_len);
875
876 hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
877 hdr->flags = cpu_to_le16(hdr_flags);
878 hdr->len = cpu_to_le16(len - sizeof(*hdr));
879 hdr->type = cpu_to_le16(type);
880 hdr->tries = hdr->rts_tries = 0;
881
882 if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
883 kfree_skb(skb);
884 return NULL;
885 }
886 return skb;
887 }
888
889 int p54_read_eeprom(struct ieee80211_hw *dev)
890 {
891 struct p54_common *priv = dev->priv;
892 struct p54_hdr *hdr = NULL;
893 struct p54_eeprom_lm86 *eeprom_hdr;
894 struct sk_buff *skb;
895 size_t eeprom_size = 0x2020, offset = 0, blocksize;
896 int ret = -ENOMEM;
897 void *eeprom = NULL;
898
899 skb = p54_alloc_skb(dev, 0x8000, sizeof(*hdr) + sizeof(*eeprom_hdr) +
900 EEPROM_READBACK_LEN,
901 P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
902 if (!skb)
903 goto free;
904 priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
905 if (!priv->eeprom)
906 goto free;
907 eeprom = kzalloc(eeprom_size, GFP_KERNEL);
908 if (!eeprom)
909 goto free;
910
911 eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
912 sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN);
913
914 while (eeprom_size) {
915 blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
916 eeprom_hdr->offset = cpu_to_le16(offset);
917 eeprom_hdr->len = cpu_to_le16(blocksize);
918 priv->tx(dev, skb, 0);
919
920 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
921 printk(KERN_ERR "%s: device does not respond!\n",
922 wiphy_name(dev->wiphy));
923 ret = -EBUSY;
924 goto free;
925 }
926
927 memcpy(eeprom + offset, priv->eeprom, blocksize);
928 offset += blocksize;
929 eeprom_size -= blocksize;
930 }
931
932 ret = p54_parse_eeprom(dev, eeprom, offset);
933 free:
934 kfree(priv->eeprom);
935 priv->eeprom = NULL;
936 p54_free_skb(dev, skb);
937 kfree(eeprom);
938
939 return ret;
940 }
941 EXPORT_SYMBOL_GPL(p54_read_eeprom);
942
943 static int p54_set_tim(struct ieee80211_hw *dev, struct ieee80211_sta *sta,
944 bool set)
945 {
946 struct p54_common *priv = dev->priv;
947 struct sk_buff *skb;
948 struct p54_tim *tim;
949
950 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
951 sizeof(struct p54_hdr) + sizeof(*tim),
952 P54_CONTROL_TYPE_TIM, GFP_KERNEL);
953 if (!skb)
954 return -ENOMEM;
955
956 tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
957 tim->count = 1;
958 tim->entry[0] = cpu_to_le16(set ? (sta->aid | 0x8000) : sta->aid);
959 priv->tx(dev, skb, 1);
960 return 0;
961 }
962
963 static int p54_sta_unlock(struct ieee80211_hw *dev, u8 *addr)
964 {
965 struct p54_common *priv = dev->priv;
966 struct sk_buff *skb;
967 struct p54_sta_unlock *sta;
968
969 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
970 sizeof(struct p54_hdr) + sizeof(*sta),
971 P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
972 if (!skb)
973 return -ENOMEM;
974
975 sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
976 memcpy(sta->addr, addr, ETH_ALEN);
977 priv->tx(dev, skb, 1);
978 return 0;
979 }
980
981 static int p54_tx_cancel(struct ieee80211_hw *dev, struct sk_buff *entry)
982 {
983 struct p54_common *priv = dev->priv;
984 struct sk_buff *skb;
985 struct p54_hdr *hdr;
986 struct p54_txcancel *cancel;
987
988 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
989 sizeof(struct p54_hdr) + sizeof(*cancel),
990 P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
991 if (!skb)
992 return -ENOMEM;
993
994 hdr = (void *)entry->data;
995 cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
996 cancel->req_id = hdr->req_id;
997 priv->tx(dev, skb, 1);
998 return 0;
999 }
1000
1001 static int p54_tx_fill(struct ieee80211_hw *dev, struct sk_buff *skb,
1002 struct ieee80211_tx_info *info, u8 *queue, size_t *extra_len,
1003 u16 *flags, u16 *aid)
1004 {
1005 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1006 struct p54_common *priv = dev->priv;
1007 int ret = 0;
1008
1009 if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
1010 if (ieee80211_is_beacon(hdr->frame_control)) {
1011 *aid = 0;
1012 *queue = 0;
1013 *extra_len = IEEE80211_MAX_TIM_LEN;
1014 *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP;
1015 return 0;
1016 } else if (ieee80211_is_probe_resp(hdr->frame_control)) {
1017 *aid = 0;
1018 *queue = 2;
1019 *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP |
1020 P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1021 return 0;
1022 } else {
1023 *queue = 2;
1024 ret = 0;
1025 }
1026 } else {
1027 *queue += 4;
1028 ret = 1;
1029 }
1030
1031 switch (priv->mode) {
1032 case NL80211_IFTYPE_STATION:
1033 *aid = 1;
1034 break;
1035 case NL80211_IFTYPE_AP:
1036 case NL80211_IFTYPE_ADHOC:
1037 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
1038 *aid = 0;
1039 *queue = 3;
1040 return 0;
1041 }
1042 if (info->control.sta)
1043 *aid = info->control.sta->aid;
1044 else
1045 *flags = P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1046 }
1047 return ret;
1048 }
1049
1050 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
1051 {
1052 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1053 struct ieee80211_tx_queue_stats *current_queue = NULL;
1054 struct p54_common *priv = dev->priv;
1055 struct p54_hdr *hdr;
1056 struct p54_tx_data *txhdr;
1057 size_t padding, len, tim_len = 0;
1058 int i, j, ridx;
1059 u16 hdr_flags = 0, aid = 0;
1060 u8 rate, queue;
1061 u8 cts_rate = 0x20;
1062 u8 rc_flags;
1063 u8 calculated_tries[4];
1064 u8 nrates = 0, nremaining = 8;
1065
1066 queue = skb_get_queue_mapping(skb);
1067
1068 if (p54_tx_fill(dev, skb, info, &queue, &tim_len, &hdr_flags, &aid)) {
1069 current_queue = &priv->tx_stats[queue];
1070 if (unlikely(current_queue->len > current_queue->limit))
1071 return NETDEV_TX_BUSY;
1072 current_queue->len++;
1073 current_queue->count++;
1074 if (current_queue->len == current_queue->limit)
1075 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
1076 }
1077
1078 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
1079 len = skb->len;
1080
1081 if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) {
1082 if (info->control.sta)
1083 if (p54_sta_unlock(dev, info->control.sta->addr)) {
1084 if (current_queue) {
1085 current_queue->len--;
1086 current_queue->count--;
1087 }
1088 return NETDEV_TX_BUSY;
1089 }
1090 }
1091
1092 txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
1093 hdr = (struct p54_hdr *) skb_push(skb, sizeof(*hdr));
1094
1095 if (padding)
1096 hdr_flags |= P54_HDR_FLAG_DATA_ALIGN;
1097 hdr->len = cpu_to_le16(len);
1098 hdr->type = cpu_to_le16(aid);
1099 hdr->rts_tries = info->control.rates[0].count;
1100
1101 /*
1102 * we register the rates in perfect order, and
1103 * RTS/CTS won't happen on 5 GHz
1104 */
1105 cts_rate = info->control.rts_cts_rate_idx;
1106
1107 memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
1108
1109 /* see how many rates got used */
1110 for (i = 0; i < 4; i++) {
1111 if (info->control.rates[i].idx < 0)
1112 break;
1113 nrates++;
1114 }
1115
1116 /* limit tries to 8/nrates per rate */
1117 for (i = 0; i < nrates; i++) {
1118 /*
1119 * The magic expression here is equivalent to 8/nrates for
1120 * all values that matter, but avoids division and jumps.
1121 * Note that nrates can only take the values 1 through 4.
1122 */
1123 calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
1124 info->control.rates[i].count);
1125 nremaining -= calculated_tries[i];
1126 }
1127
1128 /* if there are tries left, distribute from back to front */
1129 for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
1130 int tmp = info->control.rates[i].count - calculated_tries[i];
1131
1132 if (tmp <= 0)
1133 continue;
1134 /* RC requested more tries at this rate */
1135
1136 tmp = min_t(int, tmp, nremaining);
1137 calculated_tries[i] += tmp;
1138 nremaining -= tmp;
1139 }
1140
1141 ridx = 0;
1142 for (i = 0; i < nrates && ridx < 8; i++) {
1143 /* we register the rates in perfect order */
1144 rate = info->control.rates[i].idx;
1145 if (info->band == IEEE80211_BAND_5GHZ)
1146 rate += 4;
1147
1148 /* store the count we actually calculated for TX status */
1149 info->control.rates[i].count = calculated_tries[i];
1150
1151 rc_flags = info->control.rates[i].flags;
1152 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
1153 rate |= 0x10;
1154 cts_rate |= 0x10;
1155 }
1156 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
1157 rate |= 0x40;
1158 else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
1159 rate |= 0x20;
1160 for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
1161 txhdr->rateset[ridx] = rate;
1162 ridx++;
1163 }
1164 }
1165
1166 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
1167 hdr_flags |= P54_HDR_FLAG_DATA_OUT_SEQNR;
1168
1169 /* TODO: enable bursting */
1170 hdr->flags = cpu_to_le16(hdr_flags);
1171 hdr->tries = ridx;
1172 txhdr->crypt_offset = 0;
1173 txhdr->rts_rate_idx = 0;
1174 txhdr->key_type = 0;
1175 txhdr->key_len = 0;
1176 txhdr->hw_queue = queue;
1177 txhdr->backlog = 32;
1178 memset(txhdr->durations, 0, sizeof(txhdr->durations));
1179 txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
1180 2 : info->antenna_sel_tx - 1;
1181 txhdr->output_power = priv->output_power;
1182 txhdr->cts_rate = cts_rate;
1183 if (padding)
1184 txhdr->align[0] = padding;
1185
1186 /* modifies skb->cb and with it info, so must be last! */
1187 if (unlikely(p54_assign_address(dev, skb, hdr, skb->len + tim_len))) {
1188 skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
1189 if (current_queue) {
1190 current_queue->len--;
1191 current_queue->count--;
1192 }
1193 return NETDEV_TX_BUSY;
1194 }
1195 priv->tx(dev, skb, 0);
1196 return 0;
1197 }
1198
1199 static int p54_setup_mac(struct ieee80211_hw *dev, u16 mode, const u8 *bssid)
1200 {
1201 struct p54_common *priv = dev->priv;
1202 struct sk_buff *skb;
1203 struct p54_setup_mac *setup;
1204
1205 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup) +
1206 sizeof(struct p54_hdr), P54_CONTROL_TYPE_SETUP,
1207 GFP_ATOMIC);
1208 if (!skb)
1209 return -ENOMEM;
1210
1211 setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
1212 priv->mac_mode = mode;
1213 setup->mac_mode = cpu_to_le16(mode);
1214 memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
1215 if (!bssid)
1216 memset(setup->bssid, ~0, ETH_ALEN);
1217 else
1218 memcpy(setup->bssid, bssid, ETH_ALEN);
1219 setup->rx_antenna = priv->rx_antenna;
1220 if (priv->fw_var < 0x500) {
1221 setup->v1.basic_rate_mask = cpu_to_le32(0x15f);
1222 setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
1223 setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
1224 setup->v1.rxhw = cpu_to_le16(priv->rxhw);
1225 setup->v1.wakeup_timer = cpu_to_le16(500);
1226 setup->v1.unalloc0 = cpu_to_le16(0);
1227 } else {
1228 setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
1229 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
1230 setup->v2.rxhw = cpu_to_le16(priv->rxhw);
1231 setup->v2.timer = cpu_to_le16(1000);
1232 setup->v2.truncate = cpu_to_le16(48896);
1233 setup->v2.basic_rate_mask = cpu_to_le32(0x15f);
1234 setup->v2.sbss_offset = 0;
1235 setup->v2.mcast_window = 0;
1236 setup->v2.rx_rssi_threshold = 0;
1237 setup->v2.rx_ed_threshold = 0;
1238 setup->v2.ref_clock = cpu_to_le32(644245094);
1239 setup->v2.lpf_bandwidth = cpu_to_le16(65535);
1240 setup->v2.osc_start_delay = cpu_to_le16(65535);
1241 }
1242 priv->tx(dev, skb, 1);
1243 return 0;
1244 }
1245
1246 static int p54_set_freq(struct ieee80211_hw *dev, u16 frequency)
1247 {
1248 struct p54_common *priv = dev->priv;
1249 struct sk_buff *skb;
1250 struct p54_scan *chan;
1251 unsigned int i;
1252 void *entry;
1253 __le16 freq = cpu_to_le16(frequency);
1254
1255 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*chan) +
1256 sizeof(struct p54_hdr), P54_CONTROL_TYPE_SCAN,
1257 GFP_ATOMIC);
1258 if (!skb)
1259 return -ENOMEM;
1260
1261 chan = (struct p54_scan *) skb_put(skb, sizeof(*chan));
1262 memset(chan->padding1, 0, sizeof(chan->padding1));
1263 chan->mode = cpu_to_le16(P54_SCAN_EXIT);
1264 chan->dwell = cpu_to_le16(0x0);
1265
1266 for (i = 0; i < priv->iq_autocal_len; i++) {
1267 if (priv->iq_autocal[i].freq != freq)
1268 continue;
1269
1270 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
1271 sizeof(*priv->iq_autocal));
1272 break;
1273 }
1274 if (i == priv->iq_autocal_len)
1275 goto err;
1276
1277 for (i = 0; i < priv->output_limit_len; i++) {
1278 if (priv->output_limit[i].freq != freq)
1279 continue;
1280
1281 chan->val_barker = 0x38;
1282 chan->val_bpsk = chan->dup_bpsk =
1283 priv->output_limit[i].val_bpsk;
1284 chan->val_qpsk = chan->dup_qpsk =
1285 priv->output_limit[i].val_qpsk;
1286 chan->val_16qam = chan->dup_16qam =
1287 priv->output_limit[i].val_16qam;
1288 chan->val_64qam = chan->dup_64qam =
1289 priv->output_limit[i].val_64qam;
1290 break;
1291 }
1292 if (i == priv->output_limit_len)
1293 goto err;
1294
1295 entry = priv->curve_data->data;
1296 for (i = 0; i < priv->curve_data->channels; i++) {
1297 if (*((__le16 *)entry) != freq) {
1298 entry += sizeof(__le16);
1299 entry += sizeof(struct p54_pa_curve_data_sample) *
1300 priv->curve_data->points_per_channel;
1301 continue;
1302 }
1303
1304 entry += sizeof(__le16);
1305 chan->pa_points_per_curve =
1306 min(priv->curve_data->points_per_channel, (u8) 8);
1307
1308 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
1309 chan->pa_points_per_curve);
1310 break;
1311 }
1312
1313 if (priv->fw_var < 0x500) {
1314 chan->v1.rssical_mul = cpu_to_le16(130);
1315 chan->v1.rssical_add = cpu_to_le16(0xfe70);
1316 } else {
1317 chan->v2.rssical_mul = cpu_to_le16(130);
1318 chan->v2.rssical_add = cpu_to_le16(0xfe70);
1319 chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
1320 memset(chan->v2.rts_rates, 0, 8);
1321 }
1322 priv->tx(dev, skb, 1);
1323 return 0;
1324
1325 err:
1326 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1327 kfree_skb(skb);
1328 return -EINVAL;
1329 }
1330
1331 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1332 {
1333 struct p54_common *priv = dev->priv;
1334 struct sk_buff *skb;
1335 struct p54_led *led;
1336
1337 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led) +
1338 sizeof(struct p54_hdr), P54_CONTROL_TYPE_LED,
1339 GFP_ATOMIC);
1340 if (!skb)
1341 return -ENOMEM;
1342
1343 led = (struct p54_led *)skb_put(skb, sizeof(*led));
1344 led->mode = cpu_to_le16(mode);
1345 led->led_permanent = cpu_to_le16(link);
1346 led->led_temporary = cpu_to_le16(act);
1347 led->duration = cpu_to_le16(1000);
1348 priv->tx(dev, skb, 1);
1349 return 0;
1350 }
1351
1352 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
1353 do { \
1354 queue.aifs = cpu_to_le16(ai_fs); \
1355 queue.cwmin = cpu_to_le16(cw_min); \
1356 queue.cwmax = cpu_to_le16(cw_max); \
1357 queue.txop = cpu_to_le16(_txop); \
1358 } while(0)
1359
1360 static int p54_set_edcf(struct ieee80211_hw *dev)
1361 {
1362 struct p54_common *priv = dev->priv;
1363 struct sk_buff *skb;
1364 struct p54_edcf *edcf;
1365
1366 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf) +
1367 sizeof(struct p54_hdr), P54_CONTROL_TYPE_DCFINIT,
1368 GFP_ATOMIC);
1369 if (!skb)
1370 return -ENOMEM;
1371
1372 edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
1373 if (priv->use_short_slot) {
1374 edcf->slottime = 9;
1375 edcf->sifs = 0x10;
1376 edcf->eofpad = 0x00;
1377 } else {
1378 edcf->slottime = 20;
1379 edcf->sifs = 0x0a;
1380 edcf->eofpad = 0x06;
1381 }
1382 /* (see prism54/isl_oid.h for further details) */
1383 edcf->frameburst = cpu_to_le16(0);
1384 edcf->round_trip_delay = cpu_to_le16(0);
1385 memset(edcf->mapping, 0, sizeof(edcf->mapping));
1386 memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
1387 priv->tx(dev, skb, 1);
1388 return 0;
1389 }
1390
1391 static int p54_init_stats(struct ieee80211_hw *dev)
1392 {
1393 struct p54_common *priv = dev->priv;
1394
1395 priv->cached_stats = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL,
1396 sizeof(struct p54_hdr) + sizeof(struct p54_statistics),
1397 P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
1398 if (!priv->cached_stats)
1399 return -ENOMEM;
1400
1401 mod_timer(&priv->stats_timer, jiffies + HZ);
1402 return 0;
1403 }
1404
1405 static int p54_beacon_tim(struct sk_buff *skb)
1406 {
1407 /*
1408 * the good excuse for this mess is ... the firmware.
1409 * The dummy TIM MUST be at the end of the beacon frame,
1410 * because it'll be overwritten!
1411 */
1412
1413 struct ieee80211_mgmt *mgmt = (void *)skb->data;
1414 u8 *pos, *end;
1415
1416 if (skb->len <= sizeof(mgmt)) {
1417 printk(KERN_ERR "p54: beacon is too short!\n");
1418 return -EINVAL;
1419 }
1420
1421 pos = (u8 *)mgmt->u.beacon.variable;
1422 end = skb->data + skb->len;
1423 while (pos < end) {
1424 if (pos + 2 + pos[1] > end) {
1425 printk(KERN_ERR "p54: parsing beacon failed\n");
1426 return -EINVAL;
1427 }
1428
1429 if (pos[0] == WLAN_EID_TIM) {
1430 u8 dtim_len = pos[1];
1431 u8 dtim_period = pos[3];
1432 u8 *next = pos + 2 + dtim_len;
1433
1434 if (dtim_len < 3) {
1435 printk(KERN_ERR "p54: invalid dtim len!\n");
1436 return -EINVAL;
1437 }
1438 memmove(pos, next, end - next);
1439
1440 if (dtim_len > 3)
1441 skb_trim(skb, skb->len - (dtim_len - 3));
1442
1443 pos = end - (dtim_len + 2);
1444
1445 /* add the dummy at the end */
1446 pos[0] = WLAN_EID_TIM;
1447 pos[1] = 3;
1448 pos[2] = 0;
1449 pos[3] = dtim_period;
1450 pos[4] = 0;
1451 return 0;
1452 }
1453 pos += 2 + pos[1];
1454 }
1455 return 0;
1456 }
1457
1458 static int p54_beacon_update(struct ieee80211_hw *dev,
1459 struct ieee80211_vif *vif)
1460 {
1461 struct p54_common *priv = dev->priv;
1462 struct sk_buff *beacon;
1463 int ret;
1464
1465 if (priv->cached_beacon) {
1466 p54_tx_cancel(dev, priv->cached_beacon);
1467 /* wait for the last beacon the be freed */
1468 msleep(10);
1469 }
1470
1471 beacon = ieee80211_beacon_get(dev, vif);
1472 if (!beacon)
1473 return -ENOMEM;
1474 ret = p54_beacon_tim(beacon);
1475 if (ret)
1476 return ret;
1477 ret = p54_tx(dev, beacon);
1478 if (ret)
1479 return ret;
1480 priv->cached_beacon = beacon;
1481 priv->tsf_high32 = 0;
1482 priv->tsf_low32 = 0;
1483
1484 return 0;
1485 }
1486
1487 static int p54_start(struct ieee80211_hw *dev)
1488 {
1489 struct p54_common *priv = dev->priv;
1490 int err;
1491
1492 mutex_lock(&priv->conf_mutex);
1493 err = priv->open(dev);
1494 if (!err)
1495 priv->mode = NL80211_IFTYPE_MONITOR;
1496 P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
1497 P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
1498 P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
1499 P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
1500 err = p54_set_edcf(dev);
1501 if (!err)
1502 err = p54_init_stats(dev);
1503
1504 mutex_unlock(&priv->conf_mutex);
1505 return err;
1506 }
1507
1508 static void p54_stop(struct ieee80211_hw *dev)
1509 {
1510 struct p54_common *priv = dev->priv;
1511 struct sk_buff *skb;
1512
1513 mutex_lock(&priv->conf_mutex);
1514 del_timer(&priv->stats_timer);
1515 p54_free_skb(dev, priv->cached_stats);
1516 priv->cached_stats = NULL;
1517 if (priv->cached_beacon)
1518 p54_tx_cancel(dev, priv->cached_beacon);
1519
1520 while ((skb = skb_dequeue(&priv->tx_queue)))
1521 kfree_skb(skb);
1522
1523 kfree(priv->cached_beacon);
1524 priv->cached_beacon = NULL;
1525 priv->stop(dev);
1526 priv->tsf_high32 = priv->tsf_low32 = 0;
1527 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1528 mutex_unlock(&priv->conf_mutex);
1529 }
1530
1531 static int p54_add_interface(struct ieee80211_hw *dev,
1532 struct ieee80211_if_init_conf *conf)
1533 {
1534 struct p54_common *priv = dev->priv;
1535
1536 mutex_lock(&priv->conf_mutex);
1537 if (priv->mode != NL80211_IFTYPE_MONITOR) {
1538 mutex_unlock(&priv->conf_mutex);
1539 return -EOPNOTSUPP;
1540 }
1541
1542 switch (conf->type) {
1543 case NL80211_IFTYPE_STATION:
1544 case NL80211_IFTYPE_ADHOC:
1545 case NL80211_IFTYPE_AP:
1546 priv->mode = conf->type;
1547 break;
1548 default:
1549 mutex_unlock(&priv->conf_mutex);
1550 return -EOPNOTSUPP;
1551 }
1552
1553 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1554
1555 p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
1556
1557 switch (conf->type) {
1558 case NL80211_IFTYPE_STATION:
1559 p54_setup_mac(dev, P54_FILTER_TYPE_STATION, NULL);
1560 break;
1561 case NL80211_IFTYPE_AP:
1562 p54_setup_mac(dev, P54_FILTER_TYPE_AP, priv->mac_addr);
1563 break;
1564 case NL80211_IFTYPE_ADHOC:
1565 p54_setup_mac(dev, P54_FILTER_TYPE_IBSS, NULL);
1566 break;
1567 default:
1568 BUG(); /* impossible */
1569 break;
1570 }
1571
1572 p54_set_leds(dev, 1, 0, 0);
1573
1574 mutex_unlock(&priv->conf_mutex);
1575 return 0;
1576 }
1577
1578 static void p54_remove_interface(struct ieee80211_hw *dev,
1579 struct ieee80211_if_init_conf *conf)
1580 {
1581 struct p54_common *priv = dev->priv;
1582
1583 mutex_lock(&priv->conf_mutex);
1584 if (priv->cached_beacon)
1585 p54_tx_cancel(dev, priv->cached_beacon);
1586 p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
1587 priv->mode = NL80211_IFTYPE_MONITOR;
1588 memset(priv->mac_addr, 0, ETH_ALEN);
1589 mutex_unlock(&priv->conf_mutex);
1590 }
1591
1592 static int p54_config(struct ieee80211_hw *dev, u32 changed)
1593 {
1594 int ret;
1595 struct p54_common *priv = dev->priv;
1596 struct ieee80211_conf *conf = &dev->conf;
1597
1598 mutex_lock(&priv->conf_mutex);
1599 priv->rx_antenna = 2; /* automatic */
1600 priv->output_power = conf->power_level << 2;
1601 ret = p54_set_freq(dev, conf->channel->center_freq);
1602 if (!ret)
1603 ret = p54_set_edcf(dev);
1604 mutex_unlock(&priv->conf_mutex);
1605 return ret;
1606 }
1607
1608 static int p54_config_interface(struct ieee80211_hw *dev,
1609 struct ieee80211_vif *vif,
1610 struct ieee80211_if_conf *conf)
1611 {
1612 struct p54_common *priv = dev->priv;
1613 int ret = 0;
1614
1615 mutex_lock(&priv->conf_mutex);
1616 switch (priv->mode) {
1617 case NL80211_IFTYPE_STATION:
1618 ret = p54_setup_mac(dev, P54_FILTER_TYPE_STATION, conf->bssid);
1619 if (ret)
1620 goto out;
1621 ret = p54_set_leds(dev, 1,
1622 !is_multicast_ether_addr(conf->bssid), 0);
1623 if (ret)
1624 goto out;
1625 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1626 break;
1627 case NL80211_IFTYPE_AP:
1628 case NL80211_IFTYPE_ADHOC:
1629 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1630 ret = p54_set_freq(dev, dev->conf.channel->center_freq);
1631 if (ret)
1632 goto out;
1633 ret = p54_setup_mac(dev, priv->mac_mode, priv->bssid);
1634 if (ret)
1635 goto out;
1636 if (conf->changed & IEEE80211_IFCC_BEACON) {
1637 ret = p54_beacon_update(dev, vif);
1638 if (ret)
1639 goto out;
1640 ret = p54_set_edcf(dev);
1641 if (ret)
1642 goto out;
1643 }
1644 }
1645 out:
1646 mutex_unlock(&priv->conf_mutex);
1647 return ret;
1648 }
1649
1650 static void p54_configure_filter(struct ieee80211_hw *dev,
1651 unsigned int changed_flags,
1652 unsigned int *total_flags,
1653 int mc_count, struct dev_mc_list *mclist)
1654 {
1655 struct p54_common *priv = dev->priv;
1656
1657 *total_flags &= FIF_BCN_PRBRESP_PROMISC |
1658 FIF_PROMISC_IN_BSS |
1659 FIF_FCSFAIL;
1660
1661 priv->filter_flags = *total_flags;
1662
1663 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1664 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1665 p54_setup_mac(dev, priv->mac_mode, NULL);
1666 else
1667 p54_setup_mac(dev, priv->mac_mode, priv->bssid);
1668 }
1669
1670 if (changed_flags & FIF_PROMISC_IN_BSS) {
1671 if (*total_flags & FIF_PROMISC_IN_BSS)
1672 p54_setup_mac(dev, priv->mac_mode | 0x8, NULL);
1673 else
1674 p54_setup_mac(dev, priv->mac_mode & ~0x8, priv->bssid);
1675 }
1676 }
1677
1678 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1679 const struct ieee80211_tx_queue_params *params)
1680 {
1681 struct p54_common *priv = dev->priv;
1682 int ret;
1683
1684 mutex_lock(&priv->conf_mutex);
1685 if ((params) && !(queue > 4)) {
1686 P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
1687 params->cw_min, params->cw_max, params->txop);
1688 } else
1689 ret = -EINVAL;
1690 if (!ret)
1691 ret = p54_set_edcf(dev);
1692 mutex_unlock(&priv->conf_mutex);
1693 return ret;
1694 }
1695
1696 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1697 {
1698 struct p54_common *priv = dev->priv;
1699 struct sk_buff *skb;
1700 struct p54_xbow_synth *xbow;
1701
1702 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow) +
1703 sizeof(struct p54_hdr),
1704 P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
1705 GFP_KERNEL);
1706 if (!skb)
1707 return -ENOMEM;
1708
1709 xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
1710 xbow->magic1 = cpu_to_le16(0x1);
1711 xbow->magic2 = cpu_to_le16(0x2);
1712 xbow->freq = cpu_to_le16(5390);
1713 memset(xbow->padding, 0, sizeof(xbow->padding));
1714 priv->tx(dev, skb, 1);
1715 return 0;
1716 }
1717
1718 static void p54_statistics_timer(unsigned long data)
1719 {
1720 struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
1721 struct p54_common *priv = dev->priv;
1722
1723 BUG_ON(!priv->cached_stats);
1724
1725 priv->tx(dev, priv->cached_stats, 0);
1726 }
1727
1728 static int p54_get_stats(struct ieee80211_hw *dev,
1729 struct ieee80211_low_level_stats *stats)
1730 {
1731 struct p54_common *priv = dev->priv;
1732
1733 del_timer(&priv->stats_timer);
1734 p54_statistics_timer((unsigned long)dev);
1735
1736 if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
1737 printk(KERN_ERR "%s: device does not respond!\n",
1738 wiphy_name(dev->wiphy));
1739 return -EBUSY;
1740 }
1741
1742 memcpy(stats, &priv->stats, sizeof(*stats));
1743
1744 return 0;
1745 }
1746
1747 static int p54_get_tx_stats(struct ieee80211_hw *dev,
1748 struct ieee80211_tx_queue_stats *stats)
1749 {
1750 struct p54_common *priv = dev->priv;
1751
1752 memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
1753
1754 return 0;
1755 }
1756
1757 static void p54_bss_info_changed(struct ieee80211_hw *dev,
1758 struct ieee80211_vif *vif,
1759 struct ieee80211_bss_conf *info,
1760 u32 changed)
1761 {
1762 struct p54_common *priv = dev->priv;
1763
1764 if (changed & BSS_CHANGED_ERP_SLOT) {
1765 priv->use_short_slot = info->use_short_slot;
1766 p54_set_edcf(dev);
1767 }
1768 }
1769
1770 static const struct ieee80211_ops p54_ops = {
1771 .tx = p54_tx,
1772 .start = p54_start,
1773 .stop = p54_stop,
1774 .add_interface = p54_add_interface,
1775 .remove_interface = p54_remove_interface,
1776 .set_tim = p54_set_tim,
1777 .config = p54_config,
1778 .config_interface = p54_config_interface,
1779 .bss_info_changed = p54_bss_info_changed,
1780 .configure_filter = p54_configure_filter,
1781 .conf_tx = p54_conf_tx,
1782 .get_stats = p54_get_stats,
1783 .get_tx_stats = p54_get_tx_stats
1784 };
1785
1786 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
1787 {
1788 struct ieee80211_hw *dev;
1789 struct p54_common *priv;
1790
1791 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
1792 if (!dev)
1793 return NULL;
1794
1795 priv = dev->priv;
1796 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1797 skb_queue_head_init(&priv->tx_queue);
1798 dev->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1799 IEEE80211_HW_SIGNAL_DBM |
1800 IEEE80211_HW_NOISE_DBM;
1801
1802 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION |
1803 NL80211_IFTYPE_ADHOC |
1804 NL80211_IFTYPE_AP);
1805
1806 dev->channel_change_time = 1000; /* TODO: find actual value */
1807 priv->tx_stats[0].limit = 1; /* Beacon queue */
1808 priv->tx_stats[1].limit = 1; /* Probe queue for HW scan */
1809 priv->tx_stats[2].limit = 3; /* queue for MLMEs */
1810 priv->tx_stats[3].limit = 3; /* Broadcast / MC queue */
1811 priv->tx_stats[4].limit = 5; /* Data */
1812 dev->queues = 1;
1813 priv->noise = -94;
1814 /*
1815 * We support at most 8 tries no matter which rate they're at,
1816 * we cannot support max_rates * max_rate_tries as we set it
1817 * here, but setting it correctly to 4/2 or so would limit us
1818 * artificially if the RC algorithm wants just two rates, so
1819 * let's say 4/7, we'll redistribute it at TX time, see the
1820 * comments there.
1821 */
1822 dev->max_rates = 4;
1823 dev->max_rate_tries = 7;
1824 dev->extra_tx_headroom = sizeof(struct p54_hdr) + 4 +
1825 sizeof(struct p54_tx_data);
1826
1827 mutex_init(&priv->conf_mutex);
1828 init_completion(&priv->eeprom_comp);
1829 init_completion(&priv->stats_comp);
1830 setup_timer(&priv->stats_timer, p54_statistics_timer,
1831 (unsigned long)dev);
1832
1833 return dev;
1834 }
1835 EXPORT_SYMBOL_GPL(p54_init_common);
1836
1837 void p54_free_common(struct ieee80211_hw *dev)
1838 {
1839 struct p54_common *priv = dev->priv;
1840 del_timer(&priv->stats_timer);
1841 kfree_skb(priv->cached_stats);
1842 kfree(priv->iq_autocal);
1843 kfree(priv->output_limit);
1844 kfree(priv->curve_data);
1845 }
1846 EXPORT_SYMBOL_GPL(p54_free_common);
1847
1848 static int __init p54_init(void)
1849 {
1850 return 0;
1851 }
1852
1853 static void __exit p54_exit(void)
1854 {
1855 }
1856
1857 module_init(p54_init);
1858 module_exit(p54_exit);