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p54: integrate parts of lmac_longbow.h and other parts of stlc45xx
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1 #ifndef P54COMMON_H
2 #define P54COMMON_H
3
4 /*
5 * Common code specific definitions for mac80211 Prism54 drivers
6 *
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
9 *
10 * Based on:
11 * - the islsm (softmac prism54) driver, which is:
12 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
13 *
14 * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
15 * Copyright (C) 2007 Conexant Systems, Inc.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22 struct bootrec {
23 __le32 code;
24 __le32 len;
25 u32 data[10];
26 } __attribute__((packed));
27
28 struct bootrec_exp_if {
29 __le16 role;
30 __le16 if_id;
31 __le16 variant;
32 __le16 btm_compat;
33 __le16 top_compat;
34 } __attribute__((packed));
35
36 #define BR_DESC_PRIV_CAP_WEP BIT(0)
37 #define BR_DESC_PRIV_CAP_TKIP BIT(1)
38 #define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
39 #define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
40 #define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
41 #define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
42
43 struct bootrec_desc {
44 __le16 modes;
45 __le16 flags;
46 __le32 rx_start;
47 __le32 rx_end;
48 u8 headroom;
49 u8 tailroom;
50 u8 tx_queues;
51 u8 tx_depth;
52 u8 privacy_caps;
53 u8 rx_keycache_size;
54 u8 time_size;
55 u8 padding;
56 u8 rates[16];
57 u8 padding2[4];
58 __le16 rx_mtu;
59 } __attribute__((packed));
60
61 #define BR_CODE_MIN 0x80000000
62 #define BR_CODE_COMPONENT_ID 0x80000001
63 #define BR_CODE_COMPONENT_VERSION 0x80000002
64 #define BR_CODE_DEPENDENT_IF 0x80000003
65 #define BR_CODE_EXPOSED_IF 0x80000004
66 #define BR_CODE_DESCR 0x80000101
67 #define BR_CODE_MAX 0x8FFFFFFF
68 #define BR_CODE_END_OF_BRA 0xFF0000FF
69 #define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
70
71 #define P54_HDR_FLAG_CONTROL BIT(15)
72 #define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0))
73
74 #define P54_HDR_FLAG_DATA_ALIGN BIT(14)
75 #define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
76 #define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
77 #define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
78 #define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
79 #define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
80 #define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
81 #define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
82 #define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
83 #define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
84 #define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
85 #define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
86 #define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
87
88 #define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
89 #define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
90 #define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
91 #define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
92 #define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
93 #define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
94 #define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
95 #define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
96 #define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
97 #define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
98
99 /* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
100
101 struct pda_entry {
102 __le16 len; /* includes both code and data */
103 __le16 code;
104 u8 data[0];
105 } __attribute__ ((packed));
106
107 struct eeprom_pda_wrap {
108 __le32 magic;
109 __le16 pad;
110 __le16 len;
111 __le32 arm_opcode;
112 u8 data[0];
113 } __attribute__ ((packed));
114
115 struct pda_iq_autocal_entry {
116 __le16 freq;
117 __le16 iq_param[4];
118 } __attribute__ ((packed));
119
120 struct pda_channel_output_limit {
121 __le16 freq;
122 u8 val_bpsk;
123 u8 val_qpsk;
124 u8 val_16qam;
125 u8 val_64qam;
126 u8 rate_set_mask;
127 u8 rate_set_size;
128 } __attribute__ ((packed));
129
130 struct pda_pa_curve_data_sample_rev0 {
131 u8 rf_power;
132 u8 pa_detector;
133 u8 pcv;
134 } __attribute__ ((packed));
135
136 struct pda_pa_curve_data_sample_rev1 {
137 u8 rf_power;
138 u8 pa_detector;
139 u8 data_barker;
140 u8 data_bpsk;
141 u8 data_qpsk;
142 u8 data_16qam;
143 u8 data_64qam;
144 } __attribute__ ((packed));
145
146 struct p54_pa_curve_data_sample {
147 u8 rf_power;
148 u8 pa_detector;
149 u8 data_barker;
150 u8 data_bpsk;
151 u8 data_qpsk;
152 u8 data_16qam;
153 u8 data_64qam;
154 u8 padding;
155 } __attribute__ ((packed));
156
157 struct pda_pa_curve_data {
158 u8 cal_method_rev;
159 u8 channels;
160 u8 points_per_channel;
161 u8 padding;
162 u8 data[0];
163 } __attribute__ ((packed));
164
165 /*
166 * this defines the PDR codes used to build PDAs as defined in document
167 * number 553155. The current implementation mirrors version 1.1 of the
168 * document and lists only PDRs supported by the ARM platform.
169 */
170
171 /* common and choice range (0x0000 - 0x0fff) */
172 #define PDR_END 0x0000
173 #define PDR_MANUFACTURING_PART_NUMBER 0x0001
174 #define PDR_PDA_VERSION 0x0002
175 #define PDR_NIC_SERIAL_NUMBER 0x0003
176
177 #define PDR_MAC_ADDRESS 0x0101
178 #define PDR_REGULATORY_DOMAIN_LIST 0x0103
179 #define PDR_TEMPERATURE_TYPE 0x0107
180
181 #define PDR_PRISM_PCI_IDENTIFIER 0x0402
182
183 /* ARM range (0x1000 - 0x1fff) */
184 #define PDR_COUNTRY_INFORMATION 0x1000
185 #define PDR_INTERFACE_LIST 0x1001
186 #define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
187 #define PDR_OEM_NAME 0x1003
188 #define PDR_PRODUCT_NAME 0x1004
189 #define PDR_UTF8_OEM_NAME 0x1005
190 #define PDR_UTF8_PRODUCT_NAME 0x1006
191 #define PDR_COUNTRY_LIST 0x1007
192 #define PDR_DEFAULT_COUNTRY 0x1008
193
194 #define PDR_ANTENNA_GAIN 0x1100
195
196 #define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
197 #define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
198 #define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
199 #define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
200 #define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
201 #define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
202 #define PDR_REGULATORY_POWER_LIMITS 0x1907
203 #define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
204 #define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
205 #define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
206
207 /* reserved range (0x2000 - 0x7fff) */
208
209 /* customer range (0x8000 - 0xffff) */
210 #define PDR_BASEBAND_REGISTERS 0x8000
211 #define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
212
213 /* stored in skb->cb */
214 struct memrecord {
215 u32 start_addr;
216 u32 end_addr;
217 };
218
219 struct p54_eeprom_lm86 {
220 __le16 offset;
221 __le16 len;
222 u8 data[0];
223 } __attribute__ ((packed));
224
225 enum p54_rx_decrypt_status {
226 P54_DECRYPT_NONE = 0,
227 P54_DECRYPT_OK,
228 P54_DECRYPT_NOKEY,
229 P54_DECRYPT_NOMICHAEL,
230 P54_DECRYPT_NOCKIPMIC,
231 P54_DECRYPT_FAIL_WEP,
232 P54_DECRYPT_FAIL_TKIP,
233 P54_DECRYPT_FAIL_MICAHEL,
234 P54_DECRYPT_FAIL_CKIPKP,
235 P54_DECRYPT_FAIL_CKIPMIC,
236 P54_DECRYPT_FAIL_AESCCMP
237 };
238
239 struct p54_rx_data {
240 __le16 flags;
241 __le16 len;
242 __le16 freq;
243 u8 antenna;
244 u8 rate;
245 u8 rssi;
246 u8 quality;
247 u8 decrypt_status;
248 u8 rssi_raw;
249 __le32 tsf32;
250 __le32 unalloc0;
251 u8 align[0];
252 } __attribute__ ((packed));
253
254 enum p54_trap_type {
255 P54_TRAP_SCAN = 0,
256 P54_TRAP_TIMER,
257 P54_TRAP_BEACON_TX,
258 P54_TRAP_FAA_RADIO_ON,
259 P54_TRAP_FAA_RADIO_OFF,
260 P54_TRAP_RADAR,
261 P54_TRAP_NO_BEACON,
262 P54_TRAP_TBTT,
263 P54_TRAP_SCO_ENTER,
264 P54_TRAP_SCO_EXIT
265 };
266
267 struct p54_trap {
268 __le16 event;
269 __le16 frequency;
270 } __attribute__ ((packed));
271
272 enum p54_frame_sent_status {
273 P54_TX_OK = 0,
274 P54_TX_FAILED,
275 P54_TX_PSM,
276 P54_TX_PSM_CANCELLED
277 };
278
279 struct p54_frame_sent {
280 u8 status;
281 u8 tries;
282 u8 ack_rssi;
283 u8 quality;
284 __le16 seq;
285 u8 antenna;
286 u8 padding;
287 } __attribute__ ((packed));
288
289 enum p54_tx_data_crypt {
290 P54_CRYPTO_NONE = 0,
291 P54_CRYPTO_WEP,
292 P54_CRYPTO_TKIP,
293 P54_CRYPTO_TKIPMICHAEL,
294 P54_CRYPTO_CCX_WEPMIC,
295 P54_CRYPTO_CCX_KPMIC,
296 P54_CRYPTO_CCX_KP,
297 P54_CRYPTO_AESCCMP
298 };
299
300 struct p54_tx_data {
301 u8 rateset[8];
302 u8 rts_rate_idx;
303 u8 crypt_offset;
304 u8 key_type;
305 u8 key_len;
306 u8 key[16];
307 u8 hw_queue;
308 u8 backlog;
309 __le16 durations[4];
310 u8 tx_antenna;
311 u8 output_power;
312 u8 cts_rate;
313 u8 unalloc2[3];
314 u8 align[0];
315 } __attribute__ ((packed));
316
317 #define P54_FILTER_TYPE_NONE 0
318 #define P54_FILTER_TYPE_STATION BIT(0)
319 #define P54_FILTER_TYPE_IBSS BIT(1)
320 #define P54_FILTER_TYPE_AP BIT(2)
321 #define P54_FILTER_TYPE_TRANSPARENT BIT(3)
322 #define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
323 #define P54_FILTER_TYPE_HIBERNATE BIT(5)
324 #define P54_FILTER_TYPE_NOACK BIT(6)
325 #define P54_FILTER_TYPE_RX_DISABLED BIT(7)
326
327 struct p54_setup_mac {
328 __le16 mac_mode;
329 u8 mac_addr[ETH_ALEN];
330 u8 bssid[ETH_ALEN];
331 u8 rx_antenna;
332 u8 rx_align;
333 union {
334 struct {
335 __le32 basic_rate_mask;
336 u8 rts_rates[8];
337 __le32 rx_addr;
338 __le16 max_rx;
339 __le16 rxhw;
340 __le16 wakeup_timer;
341 __le16 unalloc0;
342 } v1 __attribute__ ((packed));
343 struct {
344 __le32 rx_addr;
345 __le16 max_rx;
346 __le16 rxhw;
347 __le16 timer;
348 __le16 truncate;
349 __le32 basic_rate_mask;
350 u8 sbss_offset;
351 u8 mcast_window;
352 u8 rx_rssi_threshold;
353 u8 rx_ed_threshold;
354 __le32 ref_clock;
355 __le16 lpf_bandwidth;
356 __le16 osc_start_delay;
357 } v2 __attribute__ ((packed));
358 } __attribute__ ((packed));
359 } __attribute__ ((packed));
360
361 #define P54_SETUP_V1_LEN 40
362 #define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
363
364 #define P54_SCAN_EXIT BIT(0)
365 #define P54_SCAN_TRAP BIT(1)
366 #define P54_SCAN_ACTIVE BIT(2)
367 #define P54_SCAN_FILTER BIT(3)
368
369 struct p54_scan {
370 __le16 mode;
371 __le16 dwell;
372 u8 padding1[20];
373 struct pda_iq_autocal_entry iq_autocal;
374 u8 pa_points_per_curve;
375 u8 val_barker;
376 u8 val_bpsk;
377 u8 val_qpsk;
378 u8 val_16qam;
379 u8 val_64qam;
380 struct p54_pa_curve_data_sample curve_data[8];
381 u8 dup_bpsk;
382 u8 dup_qpsk;
383 u8 dup_16qam;
384 u8 dup_64qam;
385 union {
386 struct {
387 __le16 rssical_mul;
388 __le16 rssical_add;
389 } v1 __attribute__ ((packed));
390
391 struct {
392 __le32 basic_rate_mask;
393 u8 rts_rates[8];
394 __le16 rssical_mul;
395 __le16 rssical_add;
396 } v2 __attribute__ ((packed));
397 } __attribute__ ((packed));
398 } __attribute__ ((packed));
399
400 #define P54_SCAN_V1_LEN (sizeof(struct p54_scan)-12)
401 #define P54_SCAN_V2_LEN (sizeof(struct p54_scan))
402
403 struct p54_led {
404 __le16 mode;
405 __le16 led_temporary;
406 __le16 led_permanent;
407 __le16 duration;
408 } __attribute__ ((packed));
409
410 struct p54_edcf {
411 u8 flags;
412 u8 slottime;
413 u8 sifs;
414 u8 eofpad;
415 struct p54_edcf_queue_param queue[8];
416 u8 mapping[4];
417 __le16 frameburst;
418 __le16 round_trip_delay;
419 } __attribute__ ((packed));
420
421 struct p54_statistics {
422 __le32 rx_success;
423 __le32 rx_bad_fcs;
424 __le32 rx_abort;
425 __le32 rx_abort_phy;
426 __le32 rts_success;
427 __le32 rts_fail;
428 __le32 tsf32;
429 __le32 airtime;
430 __le32 noise;
431 __le32 sample_noise[8];
432 __le32 sample_cca;
433 __le32 sample_tx;
434 } __attribute__ ((packed));
435
436 struct p54_xbow_synth {
437 __le16 magic1;
438 __le16 magic2;
439 __le16 freq;
440 u32 padding[5];
441 } __attribute__ ((packed));
442
443 struct p54_timer {
444 __le32 interval;
445 } __attribute__ ((packed));
446
447 struct p54_keycache {
448 u8 entry;
449 u8 key_id;
450 u8 mac[ETH_ALEN];
451 u8 padding[2];
452 u8 key_type;
453 u8 key_len;
454 u8 key[24];
455 } __attribute__ ((packed));
456
457 struct p54_burst {
458 u8 flags;
459 u8 queue;
460 u8 backlog;
461 u8 pad;
462 __le16 durations[32];
463 } __attribute__ ((packed));
464
465 struct p54_psm_interval {
466 __le16 interval;
467 __le16 periods;
468 } __attribute__ ((packed));
469
470 #define P54_PSM BIT(0)
471 #define P54_PSM_DTIM BIT(1)
472 #define P54_PSM_MCBC BIT(2)
473 #define P54_PSM_CHECKSUM BIT(3)
474 #define P54_PSM_SKIP_MORE_DATA BIT(4)
475 #define P54_PSM_BEACON_TIMEOUT BIT(5)
476 #define P54_PSM_HFOSLEEP BIT(6)
477 #define P54_PSM_AUTOSWITCH_SLEEP BIT(7)
478 #define P54_PSM_LPIT BIT(8)
479 #define P54_PSM_BF_UCAST_SKIP BIT(9)
480 #define P54_PSM_BF_MCAST_SKIP BIT(10)
481
482 struct p54_psm {
483 __le16 mode;
484 __le16 aid;
485 struct p54_psm_interval intervals[4];
486 u8 beacon_rssi_skip_max;
487 u8 rssi_delta_threshold;
488 u8 nr;
489 u8 exclude[1];
490 } __attribute__ ((packed));
491
492 #define MC_FILTER_ADDRESS_NUM 4
493
494 struct p54_group_address_table {
495 __le16 filter_enable;
496 __le16 num_address;
497 u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
498 } __attribute__ ((packed));
499
500 struct p54_txcancel {
501 __le32 req_id;
502 } __attribute__ ((packed));
503
504 struct p54_sta_unlock {
505 u8 addr[ETH_ALEN];
506 u16 padding;
507 } __attribute__ ((packed));
508
509 #define P54_TIM_CLEAR BIT(15)
510 struct p54_tx_control_tim {
511 u8 count;
512 u8 padding[3];
513 __le16 entry[8];
514 } __attribute__ ((packed));
515
516 struct p54_cce_quiet {
517 __le32 period;
518 } __attribute__ ((packed));
519
520 struct p54_bt_balancer {
521 __le16 prio_thresh;
522 __le16 acl_thresh;
523 } __attribute__ ((packed));
524
525 struct p54_arp_table {
526 __le16 filter_enable;
527 u8 ipv4_addr[4];
528 } __attribute__ ((packed));
529
530 #endif /* P54COMMON_H */