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1 #ifndef P54COMMON_H
2 #define P54COMMON_H
3
4 /*
5 * Common code specific definitions for mac80211 Prism54 drivers
6 *
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
9 *
10 * Based on:
11 * - the islsm (softmac prism54) driver, which is:
12 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
13 *
14 * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
15 * Copyright (C) 2007 Conexant Systems, Inc.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22 struct bootrec {
23 __le32 code;
24 __le32 len;
25 u32 data[10];
26 } __attribute__((packed));
27
28 #define PDR_SYNTH_FRONTEND_MASK 0x0007
29 #define PDR_SYNTH_IQ_CAL_MASK 0x0018
30 #define PDR_SYNTH_IQ_CAL_PA_DETECTOR 0x0000
31 #define PDR_SYNTH_IQ_CAL_DISABLED 0x0008
32 #define PDR_SYNTH_IQ_CAL_ZIF 0x0010
33 #define PDR_SYNTH_FAA_SWITCH_MASK 0x0020
34 #define PDR_SYNTH_FAA_SWITCH_ENABLED 0x0001
35 #define PDR_SYNTH_24_GHZ_MASK 0x0040
36 #define PDR_SYNTH_24_GHZ_DISABLED 0x0040
37 #define PDR_SYNTH_5_GHZ_MASK 0x0080
38 #define PDR_SYNTH_5_GHZ_DISABLED 0x0080
39 #define PDR_SYNTH_RX_DIV_MASK 0x0100
40 #define PDR_SYNTH_RX_DIV_SUPPORTED 0x0100
41 #define PDR_SYNTH_TX_DIV_MASK 0x0200
42 #define PDR_SYNTH_TX_DIV_SUPPORTED 0x0200
43
44 struct bootrec_exp_if {
45 __le16 role;
46 __le16 if_id;
47 __le16 variant;
48 __le16 btm_compat;
49 __le16 top_compat;
50 } __attribute__((packed));
51
52 #define BR_DESC_PRIV_CAP_WEP BIT(0)
53 #define BR_DESC_PRIV_CAP_TKIP BIT(1)
54 #define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
55 #define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
56 #define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
57 #define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
58
59 struct bootrec_desc {
60 __le16 modes;
61 __le16 flags;
62 __le32 rx_start;
63 __le32 rx_end;
64 u8 headroom;
65 u8 tailroom;
66 u8 tx_queues;
67 u8 tx_depth;
68 u8 privacy_caps;
69 u8 rx_keycache_size;
70 u8 time_size;
71 u8 padding;
72 u8 rates[16];
73 u8 padding2[4];
74 __le16 rx_mtu;
75 } __attribute__((packed));
76
77 #define BR_CODE_MIN 0x80000000
78 #define BR_CODE_COMPONENT_ID 0x80000001
79 #define BR_CODE_COMPONENT_VERSION 0x80000002
80 #define BR_CODE_DEPENDENT_IF 0x80000003
81 #define BR_CODE_EXPOSED_IF 0x80000004
82 #define BR_CODE_DESCR 0x80000101
83 #define BR_CODE_MAX 0x8FFFFFFF
84 #define BR_CODE_END_OF_BRA 0xFF0000FF
85 #define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
86
87 #define P54_HDR_FLAG_CONTROL BIT(15)
88 #define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0))
89
90 #define P54_HDR_FLAG_DATA_ALIGN BIT(14)
91 #define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
92 #define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
93 #define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
94 #define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
95 #define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
96 #define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
97 #define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
98 #define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
99 #define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
100 #define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
101 #define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
102 #define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
103
104 #define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
105 #define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
106 #define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
107 #define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
108 #define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
109 #define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
110 #define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
111 #define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
112 #define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
113 #define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
114
115 /* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
116
117 struct pda_entry {
118 __le16 len; /* includes both code and data */
119 __le16 code;
120 u8 data[0];
121 } __attribute__ ((packed));
122
123 struct eeprom_pda_wrap {
124 __le32 magic;
125 __le16 pad;
126 __le16 len;
127 __le32 arm_opcode;
128 u8 data[0];
129 } __attribute__ ((packed));
130
131 struct pda_iq_autocal_entry {
132 __le16 freq;
133 __le16 iq_param[4];
134 } __attribute__ ((packed));
135
136 struct pda_channel_output_limit {
137 __le16 freq;
138 u8 val_bpsk;
139 u8 val_qpsk;
140 u8 val_16qam;
141 u8 val_64qam;
142 u8 rate_set_mask;
143 u8 rate_set_size;
144 } __attribute__ ((packed));
145
146 struct pda_pa_curve_data_sample_rev0 {
147 u8 rf_power;
148 u8 pa_detector;
149 u8 pcv;
150 } __attribute__ ((packed));
151
152 struct pda_pa_curve_data_sample_rev1 {
153 u8 rf_power;
154 u8 pa_detector;
155 u8 data_barker;
156 u8 data_bpsk;
157 u8 data_qpsk;
158 u8 data_16qam;
159 u8 data_64qam;
160 } __attribute__ ((packed));
161
162 struct p54_pa_curve_data_sample {
163 u8 rf_power;
164 u8 pa_detector;
165 u8 data_barker;
166 u8 data_bpsk;
167 u8 data_qpsk;
168 u8 data_16qam;
169 u8 data_64qam;
170 u8 padding;
171 } __attribute__ ((packed));
172
173 struct pda_pa_curve_data {
174 u8 cal_method_rev;
175 u8 channels;
176 u8 points_per_channel;
177 u8 padding;
178 u8 data[0];
179 } __attribute__ ((packed));
180
181 /*
182 * this defines the PDR codes used to build PDAs as defined in document
183 * number 553155. The current implementation mirrors version 1.1 of the
184 * document and lists only PDRs supported by the ARM platform.
185 */
186
187 /* common and choice range (0x0000 - 0x0fff) */
188 #define PDR_END 0x0000
189 #define PDR_MANUFACTURING_PART_NUMBER 0x0001
190 #define PDR_PDA_VERSION 0x0002
191 #define PDR_NIC_SERIAL_NUMBER 0x0003
192
193 #define PDR_MAC_ADDRESS 0x0101
194 #define PDR_REGULATORY_DOMAIN_LIST 0x0103
195 #define PDR_TEMPERATURE_TYPE 0x0107
196
197 #define PDR_PRISM_PCI_IDENTIFIER 0x0402
198
199 /* ARM range (0x1000 - 0x1fff) */
200 #define PDR_COUNTRY_INFORMATION 0x1000
201 #define PDR_INTERFACE_LIST 0x1001
202 #define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
203 #define PDR_OEM_NAME 0x1003
204 #define PDR_PRODUCT_NAME 0x1004
205 #define PDR_UTF8_OEM_NAME 0x1005
206 #define PDR_UTF8_PRODUCT_NAME 0x1006
207 #define PDR_COUNTRY_LIST 0x1007
208 #define PDR_DEFAULT_COUNTRY 0x1008
209
210 #define PDR_ANTENNA_GAIN 0x1100
211
212 #define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
213 #define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
214 #define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
215 #define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
216 #define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
217 #define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
218 #define PDR_REGULATORY_POWER_LIMITS 0x1907
219 #define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
220 #define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
221 #define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
222
223 /* reserved range (0x2000 - 0x7fff) */
224
225 /* customer range (0x8000 - 0xffff) */
226 #define PDR_BASEBAND_REGISTERS 0x8000
227 #define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
228
229 /* PDR definitions for default country & country list */
230 #define PDR_COUNTRY_CERT_CODE 0x80
231 #define PDR_COUNTRY_CERT_CODE_REAL 0x00
232 #define PDR_COUNTRY_CERT_CODE_PSEUDO 0x80
233 #define PDR_COUNTRY_CERT_BAND 0x40
234 #define PDR_COUNTRY_CERT_BAND_2GHZ 0x00
235 #define PDR_COUNTRY_CERT_BAND_5GHZ 0x40
236 #define PDR_COUNTRY_CERT_IODOOR 0x30
237 #define PDR_COUNTRY_CERT_IODOOR_BOTH 0x00
238 #define PDR_COUNTRY_CERT_IODOOR_INDOOR 0x20
239 #define PDR_COUNTRY_CERT_IODOOR_OUTDOOR 0x30
240 #define PDR_COUNTRY_CERT_INDEX 0x0F
241
242 /* stored in skb->cb */
243 struct memrecord {
244 u32 start_addr;
245 u32 end_addr;
246 };
247
248 struct p54_eeprom_lm86 {
249 __le16 offset;
250 __le16 len;
251 u8 data[0];
252 } __attribute__ ((packed));
253
254 enum p54_rx_decrypt_status {
255 P54_DECRYPT_NONE = 0,
256 P54_DECRYPT_OK,
257 P54_DECRYPT_NOKEY,
258 P54_DECRYPT_NOMICHAEL,
259 P54_DECRYPT_NOCKIPMIC,
260 P54_DECRYPT_FAIL_WEP,
261 P54_DECRYPT_FAIL_TKIP,
262 P54_DECRYPT_FAIL_MICHAEL,
263 P54_DECRYPT_FAIL_CKIPKP,
264 P54_DECRYPT_FAIL_CKIPMIC,
265 P54_DECRYPT_FAIL_AESCCMP
266 };
267
268 struct p54_rx_data {
269 __le16 flags;
270 __le16 len;
271 __le16 freq;
272 u8 antenna;
273 u8 rate;
274 u8 rssi;
275 u8 quality;
276 u8 decrypt_status;
277 u8 rssi_raw;
278 __le32 tsf32;
279 __le32 unalloc0;
280 u8 align[0];
281 } __attribute__ ((packed));
282
283 enum p54_trap_type {
284 P54_TRAP_SCAN = 0,
285 P54_TRAP_TIMER,
286 P54_TRAP_BEACON_TX,
287 P54_TRAP_FAA_RADIO_ON,
288 P54_TRAP_FAA_RADIO_OFF,
289 P54_TRAP_RADAR,
290 P54_TRAP_NO_BEACON,
291 P54_TRAP_TBTT,
292 P54_TRAP_SCO_ENTER,
293 P54_TRAP_SCO_EXIT
294 };
295
296 struct p54_trap {
297 __le16 event;
298 __le16 frequency;
299 } __attribute__ ((packed));
300
301 enum p54_frame_sent_status {
302 P54_TX_OK = 0,
303 P54_TX_FAILED,
304 P54_TX_PSM,
305 P54_TX_PSM_CANCELLED
306 };
307
308 struct p54_frame_sent {
309 u8 status;
310 u8 tries;
311 u8 ack_rssi;
312 u8 quality;
313 __le16 seq;
314 u8 antenna;
315 u8 padding;
316 } __attribute__ ((packed));
317
318 enum p54_tx_data_crypt {
319 P54_CRYPTO_NONE = 0,
320 P54_CRYPTO_WEP,
321 P54_CRYPTO_TKIP,
322 P54_CRYPTO_TKIPMICHAEL,
323 P54_CRYPTO_CCX_WEPMIC,
324 P54_CRYPTO_CCX_KPMIC,
325 P54_CRYPTO_CCX_KP,
326 P54_CRYPTO_AESCCMP
327 };
328
329 struct p54_tx_data {
330 u8 rateset[8];
331 u8 rts_rate_idx;
332 u8 crypt_offset;
333 u8 key_type;
334 u8 key_len;
335 u8 key[16];
336 u8 hw_queue;
337 u8 backlog;
338 __le16 durations[4];
339 u8 tx_antenna;
340 u8 output_power;
341 u8 cts_rate;
342 u8 unalloc2[3];
343 u8 align[0];
344 } __attribute__ ((packed));
345
346 #define P54_FILTER_TYPE_NONE 0
347 #define P54_FILTER_TYPE_STATION BIT(0)
348 #define P54_FILTER_TYPE_IBSS BIT(1)
349 #define P54_FILTER_TYPE_AP BIT(2)
350 #define P54_FILTER_TYPE_TRANSPARENT BIT(3)
351 #define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
352 #define P54_FILTER_TYPE_HIBERNATE BIT(5)
353 #define P54_FILTER_TYPE_NOACK BIT(6)
354 #define P54_FILTER_TYPE_RX_DISABLED BIT(7)
355
356 struct p54_setup_mac {
357 __le16 mac_mode;
358 u8 mac_addr[ETH_ALEN];
359 u8 bssid[ETH_ALEN];
360 u8 rx_antenna;
361 u8 rx_align;
362 union {
363 struct {
364 __le32 basic_rate_mask;
365 u8 rts_rates[8];
366 __le32 rx_addr;
367 __le16 max_rx;
368 __le16 rxhw;
369 __le16 wakeup_timer;
370 __le16 unalloc0;
371 } v1 __attribute__ ((packed));
372 struct {
373 __le32 rx_addr;
374 __le16 max_rx;
375 __le16 rxhw;
376 __le16 timer;
377 __le16 truncate;
378 __le32 basic_rate_mask;
379 u8 sbss_offset;
380 u8 mcast_window;
381 u8 rx_rssi_threshold;
382 u8 rx_ed_threshold;
383 __le32 ref_clock;
384 __le16 lpf_bandwidth;
385 __le16 osc_start_delay;
386 } v2 __attribute__ ((packed));
387 } __attribute__ ((packed));
388 } __attribute__ ((packed));
389
390 #define P54_SETUP_V1_LEN 40
391 #define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
392
393 #define P54_SCAN_EXIT BIT(0)
394 #define P54_SCAN_TRAP BIT(1)
395 #define P54_SCAN_ACTIVE BIT(2)
396 #define P54_SCAN_FILTER BIT(3)
397
398 struct p54_scan {
399 __le16 mode;
400 __le16 dwell;
401 u8 padding1[20];
402 struct pda_iq_autocal_entry iq_autocal;
403 u8 pa_points_per_curve;
404 u8 val_barker;
405 u8 val_bpsk;
406 u8 val_qpsk;
407 u8 val_16qam;
408 u8 val_64qam;
409 struct p54_pa_curve_data_sample curve_data[8];
410 u8 dup_bpsk;
411 u8 dup_qpsk;
412 u8 dup_16qam;
413 u8 dup_64qam;
414 union {
415 struct {
416 __le16 rssical_mul;
417 __le16 rssical_add;
418 } v1 __attribute__ ((packed));
419
420 struct {
421 __le32 basic_rate_mask;
422 u8 rts_rates[8];
423 __le16 rssical_mul;
424 __le16 rssical_add;
425 } v2 __attribute__ ((packed));
426 } __attribute__ ((packed));
427 } __attribute__ ((packed));
428
429 #define P54_SCAN_V1_LEN (sizeof(struct p54_scan)-12)
430 #define P54_SCAN_V2_LEN (sizeof(struct p54_scan))
431
432 struct p54_led {
433 __le16 mode;
434 __le16 led_temporary;
435 __le16 led_permanent;
436 __le16 duration;
437 } __attribute__ ((packed));
438
439 struct p54_edcf {
440 u8 flags;
441 u8 slottime;
442 u8 sifs;
443 u8 eofpad;
444 struct p54_edcf_queue_param queue[8];
445 u8 mapping[4];
446 __le16 frameburst;
447 __le16 round_trip_delay;
448 } __attribute__ ((packed));
449
450 struct p54_statistics {
451 __le32 rx_success;
452 __le32 rx_bad_fcs;
453 __le32 rx_abort;
454 __le32 rx_abort_phy;
455 __le32 rts_success;
456 __le32 rts_fail;
457 __le32 tsf32;
458 __le32 airtime;
459 __le32 noise;
460 __le32 sample_noise[8];
461 __le32 sample_cca;
462 __le32 sample_tx;
463 } __attribute__ ((packed));
464
465 struct p54_xbow_synth {
466 __le16 magic1;
467 __le16 magic2;
468 __le16 freq;
469 u32 padding[5];
470 } __attribute__ ((packed));
471
472 struct p54_timer {
473 __le32 interval;
474 } __attribute__ ((packed));
475
476 struct p54_keycache {
477 u8 entry;
478 u8 key_id;
479 u8 mac[ETH_ALEN];
480 u8 padding[2];
481 u8 key_type;
482 u8 key_len;
483 u8 key[24];
484 } __attribute__ ((packed));
485
486 struct p54_burst {
487 u8 flags;
488 u8 queue;
489 u8 backlog;
490 u8 pad;
491 __le16 durations[32];
492 } __attribute__ ((packed));
493
494 struct p54_psm_interval {
495 __le16 interval;
496 __le16 periods;
497 } __attribute__ ((packed));
498
499 #define P54_PSM BIT(0)
500 #define P54_PSM_DTIM BIT(1)
501 #define P54_PSM_MCBC BIT(2)
502 #define P54_PSM_CHECKSUM BIT(3)
503 #define P54_PSM_SKIP_MORE_DATA BIT(4)
504 #define P54_PSM_BEACON_TIMEOUT BIT(5)
505 #define P54_PSM_HFOSLEEP BIT(6)
506 #define P54_PSM_AUTOSWITCH_SLEEP BIT(7)
507 #define P54_PSM_LPIT BIT(8)
508 #define P54_PSM_BF_UCAST_SKIP BIT(9)
509 #define P54_PSM_BF_MCAST_SKIP BIT(10)
510
511 struct p54_psm {
512 __le16 mode;
513 __le16 aid;
514 struct p54_psm_interval intervals[4];
515 u8 beacon_rssi_skip_max;
516 u8 rssi_delta_threshold;
517 u8 nr;
518 u8 exclude[1];
519 } __attribute__ ((packed));
520
521 #define MC_FILTER_ADDRESS_NUM 4
522
523 struct p54_group_address_table {
524 __le16 filter_enable;
525 __le16 num_address;
526 u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
527 } __attribute__ ((packed));
528
529 struct p54_txcancel {
530 __le32 req_id;
531 } __attribute__ ((packed));
532
533 struct p54_sta_unlock {
534 u8 addr[ETH_ALEN];
535 u16 padding;
536 } __attribute__ ((packed));
537
538 #define P54_TIM_CLEAR BIT(15)
539 struct p54_tim {
540 u8 count;
541 u8 padding[3];
542 __le16 entry[8];
543 } __attribute__ ((packed));
544
545 struct p54_cce_quiet {
546 __le32 period;
547 } __attribute__ ((packed));
548
549 struct p54_bt_balancer {
550 __le16 prio_thresh;
551 __le16 acl_thresh;
552 } __attribute__ ((packed));
553
554 struct p54_arp_table {
555 __le16 filter_enable;
556 u8 ipv4_addr[4];
557 } __attribute__ ((packed));
558
559 #endif /* P54COMMON_H */