3 * Linux device driver for PCI based Prism54
5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6 * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
8 * Based on the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/pci.h>
18 #include <linux/firmware.h>
19 #include <linux/etherdevice.h>
20 #include <linux/delay.h>
21 #include <linux/completion.h>
22 #include <net/mac80211.h>
27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
29 MODULE_LICENSE("GPL");
30 MODULE_ALIAS("prism54pci");
32 static struct pci_device_id p54p_table
[] __devinitdata
= {
33 /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
34 { PCI_DEVICE(0x1260, 0x3890) },
35 /* 3COM 3CRWE154G72 Wireless LAN adapter */
36 { PCI_DEVICE(0x10b7, 0x6001) },
37 /* Intersil PRISM Indigo Wireless LAN adapter */
38 { PCI_DEVICE(0x1260, 0x3877) },
39 /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
40 { PCI_DEVICE(0x1260, 0x3886) },
44 MODULE_DEVICE_TABLE(pci
, p54p_table
);
46 static int p54p_upload_firmware(struct ieee80211_hw
*dev
)
48 struct p54p_priv
*priv
= dev
->priv
;
49 const struct firmware
*fw_entry
= NULL
;
53 u32 remains
, left
, device_addr
;
55 P54P_WRITE(int_enable
, cpu_to_le32(0));
56 P54P_READ(int_enable
);
59 reg
= P54P_READ(ctrl_stat
);
60 reg
&= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET
);
61 reg
&= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT
);
62 P54P_WRITE(ctrl_stat
, reg
);
66 reg
|= cpu_to_le32(ISL38XX_CTRL_STAT_RESET
);
67 P54P_WRITE(ctrl_stat
, reg
);
71 reg
&= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET
);
72 P54P_WRITE(ctrl_stat
, reg
);
75 err
= request_firmware(&fw_entry
, "isl3886", &priv
->pdev
->dev
);
77 printk(KERN_ERR
"%s (p54pci): cannot find firmware "
78 "(isl3886)\n", pci_name(priv
->pdev
));
82 err
= p54_parse_firmware(dev
, fw_entry
);
84 release_firmware(fw_entry
);
88 data
= (__le32
*) fw_entry
->data
;
89 remains
= fw_entry
->size
;
90 device_addr
= ISL38XX_DEV_FIRMWARE_ADDR
;
93 left
= min((u32
)0x1000, remains
);
94 P54P_WRITE(direct_mem_base
, cpu_to_le32(device_addr
));
95 P54P_READ(int_enable
);
97 device_addr
+= 0x1000;
99 P54P_WRITE(direct_mem_win
[i
], *data
++);
104 P54P_READ(int_enable
);
107 release_firmware(fw_entry
);
109 reg
= P54P_READ(ctrl_stat
);
110 reg
&= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN
);
111 reg
&= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET
);
112 reg
|= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT
);
113 P54P_WRITE(ctrl_stat
, reg
);
114 P54P_READ(ctrl_stat
);
117 reg
|= cpu_to_le32(ISL38XX_CTRL_STAT_RESET
);
118 P54P_WRITE(ctrl_stat
, reg
);
122 reg
&= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET
);
123 P54P_WRITE(ctrl_stat
, reg
);
127 /* wait for the firmware to boot properly */
133 static void p54p_refill_rx_ring(struct ieee80211_hw
*dev
,
134 int ring_index
, struct p54p_desc
*ring
, u32 ring_limit
,
135 struct sk_buff
**rx_buf
)
137 struct p54p_priv
*priv
= dev
->priv
;
138 struct p54p_ring_control
*ring_control
= priv
->ring_control
;
141 idx
= le32_to_cpu(ring_control
->host_idx
[ring_index
]);
143 limit
-= le32_to_cpu(ring_control
->device_idx
[ring_index
]);
144 limit
= ring_limit
- limit
;
146 i
= idx
% ring_limit
;
147 while (limit
-- > 1) {
148 struct p54p_desc
*desc
= &ring
[i
];
150 if (!desc
->host_addr
) {
153 skb
= dev_alloc_skb(priv
->common
.rx_mtu
+ 32);
157 mapping
= pci_map_single(priv
->pdev
,
158 skb_tail_pointer(skb
),
159 priv
->common
.rx_mtu
+ 32,
161 desc
->host_addr
= cpu_to_le32(mapping
);
162 desc
->device_addr
= 0; // FIXME: necessary?
163 desc
->len
= cpu_to_le16(priv
->common
.rx_mtu
+ 32);
174 ring_control
->host_idx
[ring_index
] = cpu_to_le32(idx
);
177 static void p54p_check_rx_ring(struct ieee80211_hw
*dev
, u32
*index
,
178 int ring_index
, struct p54p_desc
*ring
, u32 ring_limit
,
179 struct sk_buff
**rx_buf
)
181 struct p54p_priv
*priv
= dev
->priv
;
182 struct p54p_ring_control
*ring_control
= priv
->ring_control
;
183 struct p54p_desc
*desc
;
186 i
= (*index
) % ring_limit
;
187 (*index
) = idx
= le32_to_cpu(ring_control
->device_idx
[ring_index
]);
193 len
= le16_to_cpu(desc
->len
);
203 if (p54_rx(dev
, skb
)) {
204 pci_unmap_single(priv
->pdev
,
205 le32_to_cpu(desc
->host_addr
),
206 priv
->common
.rx_mtu
+ 32,
212 desc
->len
= cpu_to_le16(priv
->common
.rx_mtu
+ 32);
219 p54p_refill_rx_ring(dev
, ring_index
, ring
, ring_limit
, rx_buf
);
222 /* caller must hold priv->lock */
223 static void p54p_check_tx_ring(struct ieee80211_hw
*dev
, u32
*index
,
224 int ring_index
, struct p54p_desc
*ring
, u32 ring_limit
,
227 struct p54p_priv
*priv
= dev
->priv
;
228 struct p54p_ring_control
*ring_control
= priv
->ring_control
;
229 struct p54p_desc
*desc
;
232 i
= (*index
) % ring_limit
;
233 (*index
) = idx
= le32_to_cpu(ring_control
->device_idx
[1]);
241 pci_unmap_single(priv
->pdev
, le32_to_cpu(desc
->host_addr
),
242 le16_to_cpu(desc
->len
), PCI_DMA_TODEVICE
);
245 desc
->device_addr
= 0;
254 static void p54p_rx_tasklet(unsigned long dev_id
)
256 struct ieee80211_hw
*dev
= (struct ieee80211_hw
*)dev_id
;
257 struct p54p_priv
*priv
= dev
->priv
;
258 struct p54p_ring_control
*ring_control
= priv
->ring_control
;
260 p54p_check_rx_ring(dev
, &priv
->rx_idx_mgmt
, 2, ring_control
->rx_mgmt
,
261 ARRAY_SIZE(ring_control
->rx_mgmt
), priv
->rx_buf_mgmt
);
263 p54p_check_rx_ring(dev
, &priv
->rx_idx_data
, 0, ring_control
->rx_data
,
264 ARRAY_SIZE(ring_control
->rx_data
), priv
->rx_buf_data
);
267 P54P_WRITE(dev_int
, cpu_to_le32(ISL38XX_DEV_INT_UPDATE
));
270 static irqreturn_t
p54p_interrupt(int irq
, void *dev_id
)
272 struct ieee80211_hw
*dev
= dev_id
;
273 struct p54p_priv
*priv
= dev
->priv
;
274 struct p54p_ring_control
*ring_control
= priv
->ring_control
;
277 spin_lock(&priv
->lock
);
278 reg
= P54P_READ(int_ident
);
279 if (unlikely(reg
== cpu_to_le32(0xFFFFFFFF))) {
280 spin_unlock(&priv
->lock
);
284 P54P_WRITE(int_ack
, reg
);
286 reg
&= P54P_READ(int_enable
);
288 if (reg
& cpu_to_le32(ISL38XX_INT_IDENT_UPDATE
)) {
289 p54p_check_tx_ring(dev
, &priv
->tx_idx_mgmt
,
290 3, ring_control
->tx_mgmt
,
291 ARRAY_SIZE(ring_control
->tx_mgmt
),
294 p54p_check_tx_ring(dev
, &priv
->tx_idx_data
,
295 1, ring_control
->tx_data
,
296 ARRAY_SIZE(ring_control
->tx_data
),
299 tasklet_schedule(&priv
->rx_tasklet
);
301 } else if (reg
& cpu_to_le32(ISL38XX_INT_IDENT_INIT
))
302 complete(&priv
->boot_comp
);
304 spin_unlock(&priv
->lock
);
306 return reg
? IRQ_HANDLED
: IRQ_NONE
;
309 static void p54p_tx(struct ieee80211_hw
*dev
, struct p54_control_hdr
*data
,
310 size_t len
, int free_on_tx
)
312 struct p54p_priv
*priv
= dev
->priv
;
313 struct p54p_ring_control
*ring_control
= priv
->ring_control
;
315 struct p54p_desc
*desc
;
317 u32 device_idx
, idx
, i
;
319 spin_lock_irqsave(&priv
->lock
, flags
);
321 device_idx
= le32_to_cpu(ring_control
->device_idx
[1]);
322 idx
= le32_to_cpu(ring_control
->host_idx
[1]);
323 i
= idx
% ARRAY_SIZE(ring_control
->tx_data
);
325 mapping
= pci_map_single(priv
->pdev
, data
, len
, PCI_DMA_TODEVICE
);
326 desc
= &ring_control
->tx_data
[i
];
327 desc
->host_addr
= cpu_to_le32(mapping
);
328 desc
->device_addr
= data
->req_id
;
329 desc
->len
= cpu_to_le16(len
);
333 ring_control
->host_idx
[1] = cpu_to_le32(idx
+ 1);
336 priv
->tx_buf_data
[i
] = data
;
338 spin_unlock_irqrestore(&priv
->lock
, flags
);
340 P54P_WRITE(dev_int
, cpu_to_le32(ISL38XX_DEV_INT_UPDATE
));
343 /* FIXME: unlikely to happen because the device usually runs out of
344 memory before we fill the ring up, but we can make it impossible */
345 if (idx
- device_idx
> ARRAY_SIZE(ring_control
->tx_data
) - 2)
346 printk(KERN_INFO
"%s: tx overflow.\n", wiphy_name(dev
->wiphy
));
349 static int p54p_open(struct ieee80211_hw
*dev
)
351 struct p54p_priv
*priv
= dev
->priv
;
354 init_completion(&priv
->boot_comp
);
355 err
= request_irq(priv
->pdev
->irq
, &p54p_interrupt
,
356 IRQF_SHARED
, "p54pci", dev
);
358 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
359 wiphy_name(dev
->wiphy
));
363 memset(priv
->ring_control
, 0, sizeof(*priv
->ring_control
));
364 err
= p54p_upload_firmware(dev
);
366 free_irq(priv
->pdev
->irq
, dev
);
369 priv
->rx_idx_data
= priv
->tx_idx_data
= 0;
370 priv
->rx_idx_mgmt
= priv
->tx_idx_mgmt
= 0;
372 p54p_refill_rx_ring(dev
, 0, priv
->ring_control
->rx_data
,
373 ARRAY_SIZE(priv
->ring_control
->rx_data
), priv
->rx_buf_data
);
375 p54p_refill_rx_ring(dev
, 2, priv
->ring_control
->rx_mgmt
,
376 ARRAY_SIZE(priv
->ring_control
->rx_mgmt
), priv
->rx_buf_mgmt
);
378 P54P_WRITE(ring_control_base
, cpu_to_le32(priv
->ring_control_dma
));
379 P54P_READ(ring_control_base
);
383 P54P_WRITE(int_enable
, cpu_to_le32(ISL38XX_INT_IDENT_INIT
));
384 P54P_READ(int_enable
);
388 P54P_WRITE(dev_int
, cpu_to_le32(ISL38XX_DEV_INT_RESET
));
391 if (!wait_for_completion_interruptible_timeout(&priv
->boot_comp
, HZ
)) {
392 printk(KERN_ERR
"%s: Cannot boot firmware!\n",
393 wiphy_name(dev
->wiphy
));
394 free_irq(priv
->pdev
->irq
, dev
);
398 P54P_WRITE(int_enable
, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE
));
399 P54P_READ(int_enable
);
403 P54P_WRITE(dev_int
, cpu_to_le32(ISL38XX_DEV_INT_UPDATE
));
411 static void p54p_stop(struct ieee80211_hw
*dev
)
413 struct p54p_priv
*priv
= dev
->priv
;
414 struct p54p_ring_control
*ring_control
= priv
->ring_control
;
416 struct p54p_desc
*desc
;
418 tasklet_kill(&priv
->rx_tasklet
);
420 P54P_WRITE(int_enable
, cpu_to_le32(0));
421 P54P_READ(int_enable
);
424 free_irq(priv
->pdev
->irq
, dev
);
426 P54P_WRITE(dev_int
, cpu_to_le32(ISL38XX_DEV_INT_RESET
));
428 for (i
= 0; i
< ARRAY_SIZE(priv
->rx_buf_data
); i
++) {
429 desc
= &ring_control
->rx_data
[i
];
431 pci_unmap_single(priv
->pdev
,
432 le32_to_cpu(desc
->host_addr
),
433 priv
->common
.rx_mtu
+ 32,
435 kfree_skb(priv
->rx_buf_data
[i
]);
436 priv
->rx_buf_data
[i
] = NULL
;
439 for (i
= 0; i
< ARRAY_SIZE(priv
->rx_buf_mgmt
); i
++) {
440 desc
= &ring_control
->rx_mgmt
[i
];
442 pci_unmap_single(priv
->pdev
,
443 le32_to_cpu(desc
->host_addr
),
444 priv
->common
.rx_mtu
+ 32,
446 kfree_skb(priv
->rx_buf_mgmt
[i
]);
447 priv
->rx_buf_mgmt
[i
] = NULL
;
450 for (i
= 0; i
< ARRAY_SIZE(priv
->tx_buf_data
); i
++) {
451 desc
= &ring_control
->tx_data
[i
];
453 pci_unmap_single(priv
->pdev
,
454 le32_to_cpu(desc
->host_addr
),
455 le16_to_cpu(desc
->len
),
458 kfree(priv
->tx_buf_data
[i
]);
459 priv
->tx_buf_data
[i
] = NULL
;
462 for (i
= 0; i
< ARRAY_SIZE(priv
->tx_buf_mgmt
); i
++) {
463 desc
= &ring_control
->tx_mgmt
[i
];
465 pci_unmap_single(priv
->pdev
,
466 le32_to_cpu(desc
->host_addr
),
467 le16_to_cpu(desc
->len
),
470 kfree(priv
->tx_buf_mgmt
[i
]);
471 priv
->tx_buf_mgmt
[i
] = NULL
;
474 memset(ring_control
, 0, sizeof(*ring_control
));
477 static int __devinit
p54p_probe(struct pci_dev
*pdev
,
478 const struct pci_device_id
*id
)
480 struct p54p_priv
*priv
;
481 struct ieee80211_hw
*dev
;
482 unsigned long mem_addr
, mem_len
;
484 DECLARE_MAC_BUF(mac
);
486 err
= pci_enable_device(pdev
);
488 printk(KERN_ERR
"%s (p54pci): Cannot enable new PCI device\n",
493 mem_addr
= pci_resource_start(pdev
, 0);
494 mem_len
= pci_resource_len(pdev
, 0);
495 if (mem_len
< sizeof(struct p54p_csr
)) {
496 printk(KERN_ERR
"%s (p54pci): Too short PCI resources\n",
498 pci_disable_device(pdev
);
502 err
= pci_request_regions(pdev
, "p54pci");
504 printk(KERN_ERR
"%s (p54pci): Cannot obtain PCI resources\n",
509 if (pci_set_dma_mask(pdev
, DMA_32BIT_MASK
) ||
510 pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
)) {
511 printk(KERN_ERR
"%s (p54pci): No suitable DMA available\n",
516 pci_set_master(pdev
);
517 pci_try_set_mwi(pdev
);
519 pci_write_config_byte(pdev
, 0x40, 0);
520 pci_write_config_byte(pdev
, 0x41, 0);
522 dev
= p54_init_common(sizeof(*priv
));
524 printk(KERN_ERR
"%s (p54pci): ieee80211 alloc failed\n",
533 SET_IEEE80211_DEV(dev
, &pdev
->dev
);
534 pci_set_drvdata(pdev
, dev
);
536 priv
->map
= ioremap(mem_addr
, mem_len
);
538 printk(KERN_ERR
"%s (p54pci): Cannot map device memory\n",
540 err
= -EINVAL
; // TODO: use a better error code?
544 priv
->ring_control
= pci_alloc_consistent(pdev
, sizeof(*priv
->ring_control
),
545 &priv
->ring_control_dma
);
546 if (!priv
->ring_control
) {
547 printk(KERN_ERR
"%s (p54pci): Cannot allocate rings\n",
552 priv
->common
.open
= p54p_open
;
553 priv
->common
.stop
= p54p_stop
;
554 priv
->common
.tx
= p54p_tx
;
556 spin_lock_init(&priv
->lock
);
557 tasklet_init(&priv
->rx_tasklet
, p54p_rx_tasklet
, (unsigned long)dev
);
560 err
= p54_read_eeprom(dev
);
565 err
= ieee80211_register_hw(dev
);
567 printk(KERN_ERR
"%s (p54pci): Cannot register netdevice\n",
569 goto err_free_common
;
575 p54_free_common(dev
);
578 pci_free_consistent(pdev
, sizeof(*priv
->ring_control
),
579 priv
->ring_control
, priv
->ring_control_dma
);
585 pci_set_drvdata(pdev
, NULL
);
586 ieee80211_free_hw(dev
);
589 pci_release_regions(pdev
);
590 pci_disable_device(pdev
);
594 static void __devexit
p54p_remove(struct pci_dev
*pdev
)
596 struct ieee80211_hw
*dev
= pci_get_drvdata(pdev
);
597 struct p54p_priv
*priv
;
602 ieee80211_unregister_hw(dev
);
604 pci_free_consistent(pdev
, sizeof(*priv
->ring_control
),
605 priv
->ring_control
, priv
->ring_control_dma
);
606 p54_free_common(dev
);
608 pci_release_regions(pdev
);
609 pci_disable_device(pdev
);
610 ieee80211_free_hw(dev
);
614 static int p54p_suspend(struct pci_dev
*pdev
, pm_message_t state
)
616 struct ieee80211_hw
*dev
= pci_get_drvdata(pdev
);
617 struct p54p_priv
*priv
= dev
->priv
;
619 if (priv
->common
.mode
!= NL80211_IFTYPE_UNSPECIFIED
) {
620 ieee80211_stop_queues(dev
);
624 pci_save_state(pdev
);
625 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
629 static int p54p_resume(struct pci_dev
*pdev
)
631 struct ieee80211_hw
*dev
= pci_get_drvdata(pdev
);
632 struct p54p_priv
*priv
= dev
->priv
;
634 pci_set_power_state(pdev
, PCI_D0
);
635 pci_restore_state(pdev
);
637 if (priv
->common
.mode
!= NL80211_IFTYPE_UNSPECIFIED
) {
639 ieee80211_wake_queues(dev
);
644 #endif /* CONFIG_PM */
646 static struct pci_driver p54p_driver
= {
648 .id_table
= p54p_table
,
650 .remove
= __devexit_p(p54p_remove
),
652 .suspend
= p54p_suspend
,
653 .resume
= p54p_resume
,
654 #endif /* CONFIG_PM */
657 static int __init
p54p_init(void)
659 return pci_register_driver(&p54p_driver
);
662 static void __exit
p54p_exit(void)
664 pci_unregister_driver(&p54p_driver
);
667 module_init(p54p_init
);
668 module_exit(p54p_exit
);