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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / p54 / p54spi.c
1 /*
2 * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
3 * Copyright 2008 Johannes Berg <johannes@sipsolutions.net>
4 *
5 * This driver is a port from stlc45xx:
6 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 */
22
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/delay.h>
28 #include <linux/irq.h>
29 #include <linux/spi/spi.h>
30 #include <linux/etherdevice.h>
31 #include <linux/gpio.h>
32 #include <linux/slab.h>
33
34 #include "p54spi.h"
35 #include "p54spi_eeprom.h"
36 #include "p54.h"
37
38 #include "lmac.h"
39
40 MODULE_FIRMWARE("3826.arm");
41 MODULE_ALIAS("stlc45xx");
42
43 /*
44 * gpios should be handled in board files and provided via platform data,
45 * but because it's currently impossible for p54spi to have a header file
46 * in include/linux, let's use module paramaters for now
47 */
48
49 static int p54spi_gpio_power = 97;
50 module_param(p54spi_gpio_power, int, 0444);
51 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
52
53 static int p54spi_gpio_irq = 87;
54 module_param(p54spi_gpio_irq, int, 0444);
55 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
56
57 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
58 void *buf, size_t len)
59 {
60 struct spi_transfer t[2];
61 struct spi_message m;
62 __le16 addr;
63
64 /* We first push the address */
65 addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
66
67 spi_message_init(&m);
68 memset(t, 0, sizeof(t));
69
70 t[0].tx_buf = &addr;
71 t[0].len = sizeof(addr);
72 spi_message_add_tail(&t[0], &m);
73
74 t[1].rx_buf = buf;
75 t[1].len = len;
76 spi_message_add_tail(&t[1], &m);
77
78 spi_sync(priv->spi, &m);
79 }
80
81
82 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
83 const void *buf, size_t len)
84 {
85 struct spi_transfer t[3];
86 struct spi_message m;
87 __le16 addr;
88
89 /* We first push the address */
90 addr = cpu_to_le16(address << 8);
91
92 spi_message_init(&m);
93 memset(t, 0, sizeof(t));
94
95 t[0].tx_buf = &addr;
96 t[0].len = sizeof(addr);
97 spi_message_add_tail(&t[0], &m);
98
99 t[1].tx_buf = buf;
100 t[1].len = len & ~1;
101 spi_message_add_tail(&t[1], &m);
102
103 if (len % 2) {
104 __le16 last_word;
105 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
106
107 t[2].tx_buf = &last_word;
108 t[2].len = sizeof(last_word);
109 spi_message_add_tail(&t[2], &m);
110 }
111
112 spi_sync(priv->spi, &m);
113 }
114
115 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
116 {
117 __le32 val;
118
119 p54spi_spi_read(priv, addr, &val, sizeof(val));
120
121 return le32_to_cpu(val);
122 }
123
124 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
125 {
126 p54spi_spi_write(priv, addr, &val, sizeof(val));
127 }
128
129 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
130 {
131 p54spi_spi_write(priv, addr, &val, sizeof(val));
132 }
133
134 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
135 {
136 int i;
137
138 for (i = 0; i < 2000; i++) {
139 u32 buffer = p54spi_read32(priv, reg);
140 if ((buffer & bits) == bits)
141 return 1;
142 }
143 return 0;
144 }
145
146 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
147 const void *buf, size_t len)
148 {
149 if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, HOST_ALLOWED)) {
150 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
151 "to DMA write.\n");
152 return -EAGAIN;
153 }
154
155 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
156 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
157
158 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
159 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
160 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
161 return 0;
162 }
163
164 static int p54spi_request_firmware(struct ieee80211_hw *dev)
165 {
166 struct p54s_priv *priv = dev->priv;
167 int ret;
168
169 /* FIXME: should driver use it's own struct device? */
170 ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
171
172 if (ret < 0) {
173 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
174 return ret;
175 }
176
177 ret = p54_parse_firmware(dev, priv->firmware);
178 if (ret) {
179 release_firmware(priv->firmware);
180 return ret;
181 }
182
183 return 0;
184 }
185
186 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
187 {
188 struct p54s_priv *priv = dev->priv;
189 const struct firmware *eeprom;
190 int ret;
191
192 /*
193 * allow users to customize their eeprom.
194 */
195
196 ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
197 if (ret < 0) {
198 dev_info(&priv->spi->dev, "loading default eeprom...\n");
199 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
200 sizeof(p54spi_eeprom));
201 } else {
202 dev_info(&priv->spi->dev, "loading user eeprom...\n");
203 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
204 (int)eeprom->size);
205 release_firmware(eeprom);
206 }
207 return ret;
208 }
209
210 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
211 {
212 struct p54s_priv *priv = dev->priv;
213 unsigned long fw_len, _fw_len;
214 unsigned int offset = 0;
215 int err = 0;
216 u8 *fw;
217
218 fw_len = priv->firmware->size;
219 fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
220 if (!fw)
221 return -ENOMEM;
222
223 /* stop the device */
224 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
225 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
226 SPI_CTRL_STAT_START_HALTED));
227
228 msleep(TARGET_BOOT_SLEEP);
229
230 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
231 SPI_CTRL_STAT_HOST_OVERRIDE |
232 SPI_CTRL_STAT_START_HALTED));
233
234 msleep(TARGET_BOOT_SLEEP);
235
236 while (fw_len > 0) {
237 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
238
239 err = p54spi_spi_write_dma(priv, cpu_to_le32(
240 ISL38XX_DEV_FIRMWARE_ADDR + offset),
241 (fw + offset), _fw_len);
242 if (err < 0)
243 goto out;
244
245 fw_len -= _fw_len;
246 offset += _fw_len;
247 }
248
249 BUG_ON(fw_len != 0);
250
251 /* enable host interrupts */
252 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
253 cpu_to_le32(SPI_HOST_INTS_DEFAULT));
254
255 /* boot the device */
256 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
257 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
258 SPI_CTRL_STAT_RAM_BOOT));
259
260 msleep(TARGET_BOOT_SLEEP);
261
262 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
263 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
264 msleep(TARGET_BOOT_SLEEP);
265
266 out:
267 kfree(fw);
268 return err;
269 }
270
271 static void p54spi_power_off(struct p54s_priv *priv)
272 {
273 disable_irq(gpio_to_irq(p54spi_gpio_irq));
274 gpio_set_value(p54spi_gpio_power, 0);
275 }
276
277 static void p54spi_power_on(struct p54s_priv *priv)
278 {
279 gpio_set_value(p54spi_gpio_power, 1);
280 enable_irq(gpio_to_irq(p54spi_gpio_irq));
281
282 /*
283 * need to wait a while before device can be accessed, the lenght
284 * is just a guess
285 */
286 msleep(10);
287 }
288
289 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
290 {
291 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
292 }
293
294 static int p54spi_wakeup(struct p54s_priv *priv)
295 {
296 /* wake the chip */
297 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
298 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
299
300 /* And wait for the READY interrupt */
301 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
302 SPI_HOST_INT_READY)) {
303 dev_err(&priv->spi->dev, "INT_READY timeout\n");
304 return -EBUSY;
305 }
306
307 p54spi_int_ack(priv, SPI_HOST_INT_READY);
308 return 0;
309 }
310
311 static inline void p54spi_sleep(struct p54s_priv *priv)
312 {
313 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
314 cpu_to_le32(SPI_TARGET_INT_SLEEP));
315 }
316
317 static void p54spi_int_ready(struct p54s_priv *priv)
318 {
319 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
320 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
321
322 switch (priv->fw_state) {
323 case FW_STATE_BOOTING:
324 priv->fw_state = FW_STATE_READY;
325 complete(&priv->fw_comp);
326 break;
327 case FW_STATE_RESETTING:
328 priv->fw_state = FW_STATE_READY;
329 /* TODO: reinitialize state */
330 break;
331 default:
332 break;
333 }
334 }
335
336 static int p54spi_rx(struct p54s_priv *priv)
337 {
338 struct sk_buff *skb;
339 u16 len;
340 u16 rx_head[2];
341 #define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
342
343 if (p54spi_wakeup(priv) < 0)
344 return -EBUSY;
345
346 /* Read data size and first data word in one SPI transaction
347 * This is workaround for firmware/DMA bug,
348 * when first data word gets lost under high load.
349 */
350 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
351 len = rx_head[0];
352
353 if (len == 0) {
354 p54spi_sleep(priv);
355 dev_err(&priv->spi->dev, "rx request of zero bytes\n");
356 return 0;
357 }
358
359 /* Firmware may insert up to 4 padding bytes after the lmac header,
360 * but it does not amend the size of SPI data transfer.
361 * Such packets has correct data size in header, thus referencing
362 * past the end of allocated skb. Reserve extra 4 bytes for this case */
363 skb = dev_alloc_skb(len + 4);
364 if (!skb) {
365 p54spi_sleep(priv);
366 dev_err(&priv->spi->dev, "could not alloc skb");
367 return -ENOMEM;
368 }
369
370 if (len <= READAHEAD_SZ) {
371 memcpy(skb_put(skb, len), rx_head + 1, len);
372 } else {
373 memcpy(skb_put(skb, READAHEAD_SZ), rx_head + 1, READAHEAD_SZ);
374 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
375 skb_put(skb, len - READAHEAD_SZ),
376 len - READAHEAD_SZ);
377 }
378 p54spi_sleep(priv);
379 /* Put additional bytes to compensate for the possible
380 * alignment-caused truncation */
381 skb_put(skb, 4);
382
383 if (p54_rx(priv->hw, skb) == 0)
384 dev_kfree_skb(skb);
385
386 return 0;
387 }
388
389
390 static irqreturn_t p54spi_interrupt(int irq, void *config)
391 {
392 struct spi_device *spi = config;
393 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
394
395 ieee80211_queue_work(priv->hw, &priv->work);
396
397 return IRQ_HANDLED;
398 }
399
400 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
401 {
402 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
403 int ret = 0;
404
405 if (p54spi_wakeup(priv) < 0)
406 return -EBUSY;
407
408 ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
409 if (ret < 0)
410 goto out;
411
412 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
413 SPI_HOST_INT_WR_READY)) {
414 dev_err(&priv->spi->dev, "WR_READY timeout\n");
415 ret = -EAGAIN;
416 goto out;
417 }
418
419 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
420
421 if (FREE_AFTER_TX(skb))
422 p54_free_skb(priv->hw, skb);
423 out:
424 p54spi_sleep(priv);
425 return ret;
426 }
427
428 static int p54spi_wq_tx(struct p54s_priv *priv)
429 {
430 struct p54s_tx_info *entry;
431 struct sk_buff *skb;
432 struct ieee80211_tx_info *info;
433 struct p54_tx_info *minfo;
434 struct p54s_tx_info *dinfo;
435 unsigned long flags;
436 int ret = 0;
437
438 spin_lock_irqsave(&priv->tx_lock, flags);
439
440 while (!list_empty(&priv->tx_pending)) {
441 entry = list_entry(priv->tx_pending.next,
442 struct p54s_tx_info, tx_list);
443
444 list_del_init(&entry->tx_list);
445
446 spin_unlock_irqrestore(&priv->tx_lock, flags);
447
448 dinfo = container_of((void *) entry, struct p54s_tx_info,
449 tx_list);
450 minfo = container_of((void *) dinfo, struct p54_tx_info,
451 data);
452 info = container_of((void *) minfo, struct ieee80211_tx_info,
453 rate_driver_data);
454 skb = container_of((void *) info, struct sk_buff, cb);
455
456 ret = p54spi_tx_frame(priv, skb);
457
458 if (ret < 0) {
459 p54_free_skb(priv->hw, skb);
460 return ret;
461 }
462
463 spin_lock_irqsave(&priv->tx_lock, flags);
464 }
465 spin_unlock_irqrestore(&priv->tx_lock, flags);
466 return ret;
467 }
468
469 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
470 {
471 struct p54s_priv *priv = dev->priv;
472 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
473 struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
474 struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
475 unsigned long flags;
476
477 BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
478
479 spin_lock_irqsave(&priv->tx_lock, flags);
480 list_add_tail(&di->tx_list, &priv->tx_pending);
481 spin_unlock_irqrestore(&priv->tx_lock, flags);
482
483 ieee80211_queue_work(priv->hw, &priv->work);
484 }
485
486 static void p54spi_work(struct work_struct *work)
487 {
488 struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
489 u32 ints;
490 int ret;
491
492 mutex_lock(&priv->mutex);
493
494 if (priv->fw_state == FW_STATE_OFF)
495 goto out;
496
497 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
498
499 if (ints & SPI_HOST_INT_READY) {
500 p54spi_int_ready(priv);
501 p54spi_int_ack(priv, SPI_HOST_INT_READY);
502 }
503
504 if (priv->fw_state != FW_STATE_READY)
505 goto out;
506
507 if (ints & SPI_HOST_INT_UPDATE) {
508 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
509 ret = p54spi_rx(priv);
510 if (ret < 0)
511 goto out;
512 }
513 if (ints & SPI_HOST_INT_SW_UPDATE) {
514 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
515 ret = p54spi_rx(priv);
516 if (ret < 0)
517 goto out;
518 }
519
520 ret = p54spi_wq_tx(priv);
521 out:
522 mutex_unlock(&priv->mutex);
523 }
524
525 static int p54spi_op_start(struct ieee80211_hw *dev)
526 {
527 struct p54s_priv *priv = dev->priv;
528 unsigned long timeout;
529 int ret = 0;
530
531 if (mutex_lock_interruptible(&priv->mutex)) {
532 ret = -EINTR;
533 goto out;
534 }
535
536 priv->fw_state = FW_STATE_BOOTING;
537
538 p54spi_power_on(priv);
539
540 ret = p54spi_upload_firmware(dev);
541 if (ret < 0) {
542 p54spi_power_off(priv);
543 goto out_unlock;
544 }
545
546 mutex_unlock(&priv->mutex);
547
548 timeout = msecs_to_jiffies(2000);
549 timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
550 timeout);
551 if (!timeout) {
552 dev_err(&priv->spi->dev, "firmware boot failed");
553 p54spi_power_off(priv);
554 ret = -1;
555 goto out;
556 }
557
558 if (mutex_lock_interruptible(&priv->mutex)) {
559 ret = -EINTR;
560 p54spi_power_off(priv);
561 goto out;
562 }
563
564 WARN_ON(priv->fw_state != FW_STATE_READY);
565
566 out_unlock:
567 mutex_unlock(&priv->mutex);
568
569 out:
570 return ret;
571 }
572
573 static void p54spi_op_stop(struct ieee80211_hw *dev)
574 {
575 struct p54s_priv *priv = dev->priv;
576 unsigned long flags;
577
578 if (mutex_lock_interruptible(&priv->mutex)) {
579 /* FIXME: how to handle this error? */
580 return;
581 }
582
583 WARN_ON(priv->fw_state != FW_STATE_READY);
584
585 cancel_work_sync(&priv->work);
586
587 p54spi_power_off(priv);
588 spin_lock_irqsave(&priv->tx_lock, flags);
589 INIT_LIST_HEAD(&priv->tx_pending);
590 spin_unlock_irqrestore(&priv->tx_lock, flags);
591
592 priv->fw_state = FW_STATE_OFF;
593 mutex_unlock(&priv->mutex);
594 }
595
596 static int __devinit p54spi_probe(struct spi_device *spi)
597 {
598 struct p54s_priv *priv = NULL;
599 struct ieee80211_hw *hw;
600 int ret = -EINVAL;
601
602 hw = p54_init_common(sizeof(*priv));
603 if (!hw) {
604 dev_err(&spi->dev, "could not alloc ieee80211_hw");
605 return -ENOMEM;
606 }
607
608 priv = hw->priv;
609 priv->hw = hw;
610 dev_set_drvdata(&spi->dev, priv);
611 priv->spi = spi;
612
613 spi->bits_per_word = 16;
614 spi->max_speed_hz = 24000000;
615
616 ret = spi_setup(spi);
617 if (ret < 0) {
618 dev_err(&priv->spi->dev, "spi_setup failed");
619 goto err_free_common;
620 }
621
622 ret = gpio_request(p54spi_gpio_power, "p54spi power");
623 if (ret < 0) {
624 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
625 goto err_free_common;
626 }
627
628 ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
629 if (ret < 0) {
630 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
631 goto err_free_common;
632 }
633
634 gpio_direction_output(p54spi_gpio_power, 0);
635 gpio_direction_input(p54spi_gpio_irq);
636
637 ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
638 p54spi_interrupt, IRQF_DISABLED, "p54spi",
639 priv->spi);
640 if (ret < 0) {
641 dev_err(&priv->spi->dev, "request_irq() failed");
642 goto err_free_common;
643 }
644
645 set_irq_type(gpio_to_irq(p54spi_gpio_irq),
646 IRQ_TYPE_EDGE_RISING);
647
648 disable_irq(gpio_to_irq(p54spi_gpio_irq));
649
650 INIT_WORK(&priv->work, p54spi_work);
651 init_completion(&priv->fw_comp);
652 INIT_LIST_HEAD(&priv->tx_pending);
653 mutex_init(&priv->mutex);
654 SET_IEEE80211_DEV(hw, &spi->dev);
655 priv->common.open = p54spi_op_start;
656 priv->common.stop = p54spi_op_stop;
657 priv->common.tx = p54spi_op_tx;
658
659 ret = p54spi_request_firmware(hw);
660 if (ret < 0)
661 goto err_free_common;
662
663 ret = p54spi_request_eeprom(hw);
664 if (ret)
665 goto err_free_common;
666
667 ret = p54_register_common(hw, &priv->spi->dev);
668 if (ret)
669 goto err_free_common;
670
671 return 0;
672
673 err_free_common:
674 p54_free_common(priv->hw);
675 return ret;
676 }
677
678 static int __devexit p54spi_remove(struct spi_device *spi)
679 {
680 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
681
682 p54_unregister_common(priv->hw);
683
684 free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
685
686 gpio_free(p54spi_gpio_power);
687 gpio_free(p54spi_gpio_irq);
688 release_firmware(priv->firmware);
689
690 mutex_destroy(&priv->mutex);
691
692 p54_free_common(priv->hw);
693
694 return 0;
695 }
696
697
698 static struct spi_driver p54spi_driver = {
699 .driver = {
700 /* use cx3110x name because board-n800.c uses that for the
701 * SPI port */
702 .name = "cx3110x",
703 .bus = &spi_bus_type,
704 .owner = THIS_MODULE,
705 },
706
707 .probe = p54spi_probe,
708 .remove = __devexit_p(p54spi_remove),
709 };
710
711 static int __init p54spi_init(void)
712 {
713 int ret;
714
715 ret = spi_register_driver(&p54spi_driver);
716 if (ret < 0) {
717 printk(KERN_ERR "failed to register SPI driver: %d", ret);
718 goto out;
719 }
720
721 out:
722 return ret;
723 }
724
725 static void __exit p54spi_exit(void)
726 {
727 spi_unregister_driver(&p54spi_driver);
728 }
729
730 module_init(p54spi_init);
731 module_exit(p54spi_exit);
732
733 MODULE_LICENSE("GPL");
734 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
735 MODULE_ALIAS("spi:cx3110x");