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Merge remote-tracking branches 'asoc/topic/atmel', 'asoc/topic/bcm2835' and 'asoc...
[mirror_ubuntu-zesty-kernel.git] / drivers / net / wireless / ralink / rt2x00 / rt2500usb.c
1 /*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19 /*
20 Module: rt2500usb
21 Abstract: rt2500usb device specific routines.
22 Supported chipsets: RT2570.
23 */
24
25 #include <linux/delay.h>
26 #include <linux/etherdevice.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/slab.h>
30 #include <linux/usb.h>
31
32 #include "rt2x00.h"
33 #include "rt2x00usb.h"
34 #include "rt2500usb.h"
35
36 /*
37 * Allow hardware encryption to be disabled.
38 */
39 static bool modparam_nohwcrypt;
40 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
41 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
42
43 /*
44 * Register access.
45 * All access to the CSR registers will go through the methods
46 * rt2500usb_register_read and rt2500usb_register_write.
47 * BBP and RF register require indirect register access,
48 * and use the CSR registers BBPCSR and RFCSR to achieve this.
49 * These indirect registers work with busy bits,
50 * and we will try maximal REGISTER_USB_BUSY_COUNT times to access
51 * the register while taking a REGISTER_BUSY_DELAY us delay
52 * between each attampt. When the busy bit is still set at that time,
53 * the access attempt is considered to have failed,
54 * and we will print an error.
55 * If the csr_mutex is already held then the _lock variants must
56 * be used instead.
57 */
58 static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
59 const unsigned int offset,
60 u16 *value)
61 {
62 __le16 reg;
63 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
64 USB_VENDOR_REQUEST_IN, offset,
65 &reg, sizeof(reg));
66 *value = le16_to_cpu(reg);
67 }
68
69 static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
70 const unsigned int offset,
71 u16 *value)
72 {
73 __le16 reg;
74 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
75 USB_VENDOR_REQUEST_IN, offset,
76 &reg, sizeof(reg), REGISTER_TIMEOUT);
77 *value = le16_to_cpu(reg);
78 }
79
80 static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
81 const unsigned int offset,
82 void *value, const u16 length)
83 {
84 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
85 USB_VENDOR_REQUEST_IN, offset,
86 value, length);
87 }
88
89 static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
90 const unsigned int offset,
91 u16 value)
92 {
93 __le16 reg = cpu_to_le16(value);
94 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
95 USB_VENDOR_REQUEST_OUT, offset,
96 &reg, sizeof(reg));
97 }
98
99 static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
100 const unsigned int offset,
101 u16 value)
102 {
103 __le16 reg = cpu_to_le16(value);
104 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
105 USB_VENDOR_REQUEST_OUT, offset,
106 &reg, sizeof(reg), REGISTER_TIMEOUT);
107 }
108
109 static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
110 const unsigned int offset,
111 void *value, const u16 length)
112 {
113 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
114 USB_VENDOR_REQUEST_OUT, offset,
115 value, length);
116 }
117
118 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
119 const unsigned int offset,
120 struct rt2x00_field16 field,
121 u16 *reg)
122 {
123 unsigned int i;
124
125 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
126 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
127 if (!rt2x00_get_field16(*reg, field))
128 return 1;
129 udelay(REGISTER_BUSY_DELAY);
130 }
131
132 rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n",
133 offset, *reg);
134 *reg = ~0;
135
136 return 0;
137 }
138
139 #define WAIT_FOR_BBP(__dev, __reg) \
140 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
141 #define WAIT_FOR_RF(__dev, __reg) \
142 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
143
144 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
145 const unsigned int word, const u8 value)
146 {
147 u16 reg;
148
149 mutex_lock(&rt2x00dev->csr_mutex);
150
151 /*
152 * Wait until the BBP becomes available, afterwards we
153 * can safely write the new data into the register.
154 */
155 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
156 reg = 0;
157 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
158 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
159 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
160
161 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
162 }
163
164 mutex_unlock(&rt2x00dev->csr_mutex);
165 }
166
167 static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
168 const unsigned int word, u8 *value)
169 {
170 u16 reg;
171
172 mutex_lock(&rt2x00dev->csr_mutex);
173
174 /*
175 * Wait until the BBP becomes available, afterwards we
176 * can safely write the read request into the register.
177 * After the data has been written, we wait until hardware
178 * returns the correct value, if at any time the register
179 * doesn't become available in time, reg will be 0xffffffff
180 * which means we return 0xff to the caller.
181 */
182 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
183 reg = 0;
184 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
185 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
186
187 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
188
189 if (WAIT_FOR_BBP(rt2x00dev, &reg))
190 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
191 }
192
193 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
194
195 mutex_unlock(&rt2x00dev->csr_mutex);
196 }
197
198 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
199 const unsigned int word, const u32 value)
200 {
201 u16 reg;
202
203 mutex_lock(&rt2x00dev->csr_mutex);
204
205 /*
206 * Wait until the RF becomes available, afterwards we
207 * can safely write the new data into the register.
208 */
209 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
210 reg = 0;
211 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
212 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
213
214 reg = 0;
215 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
216 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
217 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
218 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
219
220 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
221 rt2x00_rf_write(rt2x00dev, word, value);
222 }
223
224 mutex_unlock(&rt2x00dev->csr_mutex);
225 }
226
227 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
228 static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
229 const unsigned int offset,
230 u32 *value)
231 {
232 u16 tmp;
233
234 rt2500usb_register_read(rt2x00dev, offset, &tmp);
235 *value = tmp;
236 }
237
238 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
239 const unsigned int offset,
240 u32 value)
241 {
242 rt2500usb_register_write(rt2x00dev, offset, value);
243 }
244
245 static const struct rt2x00debug rt2500usb_rt2x00debug = {
246 .owner = THIS_MODULE,
247 .csr = {
248 .read = _rt2500usb_register_read,
249 .write = _rt2500usb_register_write,
250 .flags = RT2X00DEBUGFS_OFFSET,
251 .word_base = CSR_REG_BASE,
252 .word_size = sizeof(u16),
253 .word_count = CSR_REG_SIZE / sizeof(u16),
254 },
255 .eeprom = {
256 .read = rt2x00_eeprom_read,
257 .write = rt2x00_eeprom_write,
258 .word_base = EEPROM_BASE,
259 .word_size = sizeof(u16),
260 .word_count = EEPROM_SIZE / sizeof(u16),
261 },
262 .bbp = {
263 .read = rt2500usb_bbp_read,
264 .write = rt2500usb_bbp_write,
265 .word_base = BBP_BASE,
266 .word_size = sizeof(u8),
267 .word_count = BBP_SIZE / sizeof(u8),
268 },
269 .rf = {
270 .read = rt2x00_rf_read,
271 .write = rt2500usb_rf_write,
272 .word_base = RF_BASE,
273 .word_size = sizeof(u32),
274 .word_count = RF_SIZE / sizeof(u32),
275 },
276 };
277 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
278
279 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
280 {
281 u16 reg;
282
283 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
284 return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
285 }
286
287 #ifdef CONFIG_RT2X00_LIB_LEDS
288 static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
289 enum led_brightness brightness)
290 {
291 struct rt2x00_led *led =
292 container_of(led_cdev, struct rt2x00_led, led_dev);
293 unsigned int enabled = brightness != LED_OFF;
294 u16 reg;
295
296 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
297
298 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
299 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
300 else if (led->type == LED_TYPE_ACTIVITY)
301 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
302
303 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
304 }
305
306 static int rt2500usb_blink_set(struct led_classdev *led_cdev,
307 unsigned long *delay_on,
308 unsigned long *delay_off)
309 {
310 struct rt2x00_led *led =
311 container_of(led_cdev, struct rt2x00_led, led_dev);
312 u16 reg;
313
314 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
315 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
316 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
317 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
318
319 return 0;
320 }
321
322 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
323 struct rt2x00_led *led,
324 enum led_type type)
325 {
326 led->rt2x00dev = rt2x00dev;
327 led->type = type;
328 led->led_dev.brightness_set = rt2500usb_brightness_set;
329 led->led_dev.blink_set = rt2500usb_blink_set;
330 led->flags = LED_INITIALIZED;
331 }
332 #endif /* CONFIG_RT2X00_LIB_LEDS */
333
334 /*
335 * Configuration handlers.
336 */
337
338 /*
339 * rt2500usb does not differentiate between shared and pairwise
340 * keys, so we should use the same function for both key types.
341 */
342 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
343 struct rt2x00lib_crypto *crypto,
344 struct ieee80211_key_conf *key)
345 {
346 u32 mask;
347 u16 reg;
348 enum cipher curr_cipher;
349
350 if (crypto->cmd == SET_KEY) {
351 /*
352 * Disallow to set WEP key other than with index 0,
353 * it is known that not work at least on some hardware.
354 * SW crypto will be used in that case.
355 */
356 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
357 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
358 key->keyidx != 0)
359 return -EOPNOTSUPP;
360
361 /*
362 * Pairwise key will always be entry 0, but this
363 * could collide with a shared key on the same
364 * position...
365 */
366 mask = TXRX_CSR0_KEY_ID.bit_mask;
367
368 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
369 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
370 reg &= mask;
371
372 if (reg && reg == mask)
373 return -ENOSPC;
374
375 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
376
377 key->hw_key_idx += reg ? ffz(reg) : 0;
378 /*
379 * Hardware requires that all keys use the same cipher
380 * (e.g. TKIP-only, AES-only, but not TKIP+AES).
381 * If this is not the first key, compare the cipher with the
382 * first one and fall back to SW crypto if not the same.
383 */
384 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
385 return -EOPNOTSUPP;
386
387 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
388 crypto->key, sizeof(crypto->key));
389
390 /*
391 * The driver does not support the IV/EIV generation
392 * in hardware. However it demands the data to be provided
393 * both separately as well as inside the frame.
394 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
395 * to ensure rt2x00lib will not strip the data from the
396 * frame after the copy, now we must tell mac80211
397 * to generate the IV/EIV data.
398 */
399 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
400 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
401 }
402
403 /*
404 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
405 * a particular key is valid.
406 */
407 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
408 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
409 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
410
411 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
412 if (crypto->cmd == SET_KEY)
413 mask |= 1 << key->hw_key_idx;
414 else if (crypto->cmd == DISABLE_KEY)
415 mask &= ~(1 << key->hw_key_idx);
416 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
417 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
418
419 return 0;
420 }
421
422 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
423 const unsigned int filter_flags)
424 {
425 u16 reg;
426
427 /*
428 * Start configuration steps.
429 * Note that the version error will always be dropped
430 * and broadcast frames will always be accepted since
431 * there is no filter for it at this time.
432 */
433 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
434 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
435 !(filter_flags & FIF_FCSFAIL));
436 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
437 !(filter_flags & FIF_PLCPFAIL));
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
439 !(filter_flags & FIF_CONTROL));
440 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
441 !test_bit(CONFIG_MONITORING, &rt2x00dev->flags));
442 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
443 !test_bit(CONFIG_MONITORING, &rt2x00dev->flags) &&
444 !rt2x00dev->intf_ap_count);
445 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
446 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
447 !(filter_flags & FIF_ALLMULTI));
448 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
449 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
450 }
451
452 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
453 struct rt2x00_intf *intf,
454 struct rt2x00intf_conf *conf,
455 const unsigned int flags)
456 {
457 unsigned int bcn_preload;
458 u16 reg;
459
460 if (flags & CONFIG_UPDATE_TYPE) {
461 /*
462 * Enable beacon config
463 */
464 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
465 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
466 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
467 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
468 2 * (conf->type != NL80211_IFTYPE_STATION));
469 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
470
471 /*
472 * Enable synchronisation.
473 */
474 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
475 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
476 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
477
478 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
479 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
480 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
481 }
482
483 if (flags & CONFIG_UPDATE_MAC)
484 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
485 (3 * sizeof(__le16)));
486
487 if (flags & CONFIG_UPDATE_BSSID)
488 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
489 (3 * sizeof(__le16)));
490 }
491
492 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
493 struct rt2x00lib_erp *erp,
494 u32 changed)
495 {
496 u16 reg;
497
498 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
499 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
500 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
501 !!erp->short_preamble);
502 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
503 }
504
505 if (changed & BSS_CHANGED_BASIC_RATES)
506 rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
507 erp->basic_rates);
508
509 if (changed & BSS_CHANGED_BEACON_INT) {
510 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
511 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
512 erp->beacon_int * 4);
513 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
514 }
515
516 if (changed & BSS_CHANGED_ERP_SLOT) {
517 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
518 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
519 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
520 }
521 }
522
523 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
524 struct antenna_setup *ant)
525 {
526 u8 r2;
527 u8 r14;
528 u16 csr5;
529 u16 csr6;
530
531 /*
532 * We should never come here because rt2x00lib is supposed
533 * to catch this and send us the correct antenna explicitely.
534 */
535 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
536 ant->tx == ANTENNA_SW_DIVERSITY);
537
538 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
539 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
540 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
541 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
542
543 /*
544 * Configure the TX antenna.
545 */
546 switch (ant->tx) {
547 case ANTENNA_HW_DIVERSITY:
548 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
549 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
550 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
551 break;
552 case ANTENNA_A:
553 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
554 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
555 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
556 break;
557 case ANTENNA_B:
558 default:
559 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
560 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
561 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
562 break;
563 }
564
565 /*
566 * Configure the RX antenna.
567 */
568 switch (ant->rx) {
569 case ANTENNA_HW_DIVERSITY:
570 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
571 break;
572 case ANTENNA_A:
573 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
574 break;
575 case ANTENNA_B:
576 default:
577 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
578 break;
579 }
580
581 /*
582 * RT2525E and RT5222 need to flip TX I/Q
583 */
584 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
585 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
586 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
587 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
588
589 /*
590 * RT2525E does not need RX I/Q Flip.
591 */
592 if (rt2x00_rf(rt2x00dev, RF2525E))
593 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
594 } else {
595 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
596 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
597 }
598
599 rt2500usb_bbp_write(rt2x00dev, 2, r2);
600 rt2500usb_bbp_write(rt2x00dev, 14, r14);
601 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
602 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
603 }
604
605 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
606 struct rf_channel *rf, const int txpower)
607 {
608 /*
609 * Set TXpower.
610 */
611 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
612
613 /*
614 * For RT2525E we should first set the channel to half band higher.
615 */
616 if (rt2x00_rf(rt2x00dev, RF2525E)) {
617 static const u32 vals[] = {
618 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
619 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
620 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
621 0x00000902, 0x00000906
622 };
623
624 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
625 if (rf->rf4)
626 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
627 }
628
629 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
630 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
631 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
632 if (rf->rf4)
633 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
634 }
635
636 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
637 const int txpower)
638 {
639 u32 rf3;
640
641 rt2x00_rf_read(rt2x00dev, 3, &rf3);
642 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
643 rt2500usb_rf_write(rt2x00dev, 3, rf3);
644 }
645
646 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
647 struct rt2x00lib_conf *libconf)
648 {
649 enum dev_state state =
650 (libconf->conf->flags & IEEE80211_CONF_PS) ?
651 STATE_SLEEP : STATE_AWAKE;
652 u16 reg;
653
654 if (state == STATE_SLEEP) {
655 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
656 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
657 rt2x00dev->beacon_int - 20);
658 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
659 libconf->conf->listen_interval - 1);
660
661 /* We must first disable autowake before it can be enabled */
662 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
663 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
664
665 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
666 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
667 } else {
668 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
669 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
670 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
671 }
672
673 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
674 }
675
676 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
677 struct rt2x00lib_conf *libconf,
678 const unsigned int flags)
679 {
680 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
681 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
682 libconf->conf->power_level);
683 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
684 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
685 rt2500usb_config_txpower(rt2x00dev,
686 libconf->conf->power_level);
687 if (flags & IEEE80211_CONF_CHANGE_PS)
688 rt2500usb_config_ps(rt2x00dev, libconf);
689 }
690
691 /*
692 * Link tuning
693 */
694 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
695 struct link_qual *qual)
696 {
697 u16 reg;
698
699 /*
700 * Update FCS error count from register.
701 */
702 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
703 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
704
705 /*
706 * Update False CCA count from register.
707 */
708 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
709 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
710 }
711
712 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
713 struct link_qual *qual)
714 {
715 u16 eeprom;
716 u16 value;
717
718 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
719 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
720 rt2500usb_bbp_write(rt2x00dev, 24, value);
721
722 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
723 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
724 rt2500usb_bbp_write(rt2x00dev, 25, value);
725
726 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
727 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
728 rt2500usb_bbp_write(rt2x00dev, 61, value);
729
730 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
731 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
732 rt2500usb_bbp_write(rt2x00dev, 17, value);
733
734 qual->vgc_level = value;
735 }
736
737 /*
738 * Queue handlers.
739 */
740 static void rt2500usb_start_queue(struct data_queue *queue)
741 {
742 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
743 u16 reg;
744
745 switch (queue->qid) {
746 case QID_RX:
747 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
748 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
749 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
750 break;
751 case QID_BEACON:
752 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
753 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
754 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
755 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
756 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
757 break;
758 default:
759 break;
760 }
761 }
762
763 static void rt2500usb_stop_queue(struct data_queue *queue)
764 {
765 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
766 u16 reg;
767
768 switch (queue->qid) {
769 case QID_RX:
770 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
771 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
772 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
773 break;
774 case QID_BEACON:
775 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
776 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
777 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
778 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
779 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
780 break;
781 default:
782 break;
783 }
784 }
785
786 /*
787 * Initialization functions.
788 */
789 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
790 {
791 u16 reg;
792
793 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
794 USB_MODE_TEST, REGISTER_TIMEOUT);
795 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
796 0x00f0, REGISTER_TIMEOUT);
797
798 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
799 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
800 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
801
802 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
803 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
804
805 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
806 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
807 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
808 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
809 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
810
811 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
812 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
813 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
814 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
815 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
816
817 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
818 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
819 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
820 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
821 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
822 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
823
824 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
825 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
826 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
827 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
828 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
829 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
830
831 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
832 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
833 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
834 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
835 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
836 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
837
838 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
839 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
840 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
841 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
842 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
843 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
844
845 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
846 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
847 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
848 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
849 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
850 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
851
852 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
853 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
854
855 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
856 return -EBUSY;
857
858 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
859 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
860 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
861 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
862 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
863
864 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
865 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
866 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
867 } else {
868 reg = 0;
869 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
870 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
871 }
872 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
873
874 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
875 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
876 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
877 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
878
879 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
880 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
881 rt2x00dev->rx->data_size);
882 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
883
884 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
885 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
886 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
887 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
888 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
889
890 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
891 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
892 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
893
894 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
895 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
896 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
897
898 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
899 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
900 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
901
902 return 0;
903 }
904
905 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
906 {
907 unsigned int i;
908 u8 value;
909
910 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
911 rt2500usb_bbp_read(rt2x00dev, 0, &value);
912 if ((value != 0xff) && (value != 0x00))
913 return 0;
914 udelay(REGISTER_BUSY_DELAY);
915 }
916
917 rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n");
918 return -EACCES;
919 }
920
921 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
922 {
923 unsigned int i;
924 u16 eeprom;
925 u8 value;
926 u8 reg_id;
927
928 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
929 return -EACCES;
930
931 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
932 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
933 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
934 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
935 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
936 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
937 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
938 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
939 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
940 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
941 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
942 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
943 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
944 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
945 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
946 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
947 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
948 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
949 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
950 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
951 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
952 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
953 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
954 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
955 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
956 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
957 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
958 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
959 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
960 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
961 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
962
963 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
964 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
965
966 if (eeprom != 0xffff && eeprom != 0x0000) {
967 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
968 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
969 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
970 }
971 }
972
973 return 0;
974 }
975
976 /*
977 * Device state switch handlers.
978 */
979 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
980 {
981 /*
982 * Initialize all registers.
983 */
984 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
985 rt2500usb_init_bbp(rt2x00dev)))
986 return -EIO;
987
988 return 0;
989 }
990
991 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
992 {
993 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
994 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
995
996 /*
997 * Disable synchronisation.
998 */
999 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1000
1001 rt2x00usb_disable_radio(rt2x00dev);
1002 }
1003
1004 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1005 enum dev_state state)
1006 {
1007 u16 reg;
1008 u16 reg2;
1009 unsigned int i;
1010 char put_to_sleep;
1011 char bbp_state;
1012 char rf_state;
1013
1014 put_to_sleep = (state != STATE_AWAKE);
1015
1016 reg = 0;
1017 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1018 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1019 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1020 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1021 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1022 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1023
1024 /*
1025 * Device is not guaranteed to be in the requested state yet.
1026 * We must wait until the register indicates that the
1027 * device has entered the correct state.
1028 */
1029 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
1030 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1031 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1032 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1033 if (bbp_state == state && rf_state == state)
1034 return 0;
1035 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1036 msleep(30);
1037 }
1038
1039 return -EBUSY;
1040 }
1041
1042 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1043 enum dev_state state)
1044 {
1045 int retval = 0;
1046
1047 switch (state) {
1048 case STATE_RADIO_ON:
1049 retval = rt2500usb_enable_radio(rt2x00dev);
1050 break;
1051 case STATE_RADIO_OFF:
1052 rt2500usb_disable_radio(rt2x00dev);
1053 break;
1054 case STATE_RADIO_IRQ_ON:
1055 case STATE_RADIO_IRQ_OFF:
1056 /* No support, but no error either */
1057 break;
1058 case STATE_DEEP_SLEEP:
1059 case STATE_SLEEP:
1060 case STATE_STANDBY:
1061 case STATE_AWAKE:
1062 retval = rt2500usb_set_state(rt2x00dev, state);
1063 break;
1064 default:
1065 retval = -ENOTSUPP;
1066 break;
1067 }
1068
1069 if (unlikely(retval))
1070 rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
1071 state, retval);
1072
1073 return retval;
1074 }
1075
1076 /*
1077 * TX descriptor initialization
1078 */
1079 static void rt2500usb_write_tx_desc(struct queue_entry *entry,
1080 struct txentry_desc *txdesc)
1081 {
1082 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1083 __le32 *txd = (__le32 *) entry->skb->data;
1084 u32 word;
1085
1086 /*
1087 * Start writing the descriptor words.
1088 */
1089 rt2x00_desc_read(txd, 0, &word);
1090 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1091 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1092 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1093 rt2x00_set_field32(&word, TXD_W0_ACK,
1094 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1095 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1096 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1097 rt2x00_set_field32(&word, TXD_W0_OFDM,
1098 (txdesc->rate_mode == RATE_MODE_OFDM));
1099 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1100 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1101 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
1102 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1103 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1104 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1105 rt2x00_desc_write(txd, 0, word);
1106
1107 rt2x00_desc_read(txd, 1, &word);
1108 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1109 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
1110 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1111 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
1112 rt2x00_desc_write(txd, 1, word);
1113
1114 rt2x00_desc_read(txd, 2, &word);
1115 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
1116 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
1117 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
1118 txdesc->u.plcp.length_low);
1119 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
1120 txdesc->u.plcp.length_high);
1121 rt2x00_desc_write(txd, 2, word);
1122
1123 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1124 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1125 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1126 }
1127
1128 /*
1129 * Register descriptor details in skb frame descriptor.
1130 */
1131 skbdesc->flags |= SKBDESC_DESC_IN_SKB;
1132 skbdesc->desc = txd;
1133 skbdesc->desc_len = TXD_DESC_SIZE;
1134 }
1135
1136 /*
1137 * TX data initialization
1138 */
1139 static void rt2500usb_beacondone(struct urb *urb);
1140
1141 static void rt2500usb_write_beacon(struct queue_entry *entry,
1142 struct txentry_desc *txdesc)
1143 {
1144 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1145 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1146 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1147 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1148 int length;
1149 u16 reg, reg0;
1150
1151 /*
1152 * Disable beaconing while we are reloading the beacon data,
1153 * otherwise we might be sending out invalid data.
1154 */
1155 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1156 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1157 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1158
1159 /*
1160 * Add space for the descriptor in front of the skb.
1161 */
1162 skb_push(entry->skb, TXD_DESC_SIZE);
1163 memset(entry->skb->data, 0, TXD_DESC_SIZE);
1164
1165 /*
1166 * Write the TX descriptor for the beacon.
1167 */
1168 rt2500usb_write_tx_desc(entry, txdesc);
1169
1170 /*
1171 * Dump beacon to userspace through debugfs.
1172 */
1173 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
1174
1175 /*
1176 * USB devices cannot blindly pass the skb->len as the
1177 * length of the data to usb_fill_bulk_urb. Pass the skb
1178 * to the driver to determine what the length should be.
1179 */
1180 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1181
1182 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1183 entry->skb->data, length, rt2500usb_beacondone,
1184 entry);
1185
1186 /*
1187 * Second we need to create the guardian byte.
1188 * We only need a single byte, so lets recycle
1189 * the 'flags' field we are not using for beacons.
1190 */
1191 bcn_priv->guardian_data = 0;
1192 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1193 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1194 entry);
1195
1196 /*
1197 * Send out the guardian byte.
1198 */
1199 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1200
1201 /*
1202 * Enable beaconing again.
1203 */
1204 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1205 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1206 reg0 = reg;
1207 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1208 /*
1209 * Beacon generation will fail initially.
1210 * To prevent this we need to change the TXRX_CSR19
1211 * register several times (reg0 is the same as reg
1212 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1213 * and 1 in reg).
1214 */
1215 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1216 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1217 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1218 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1219 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1220 }
1221
1222 static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1223 {
1224 int length;
1225
1226 /*
1227 * The length _must_ be a multiple of 2,
1228 * but it must _not_ be a multiple of the USB packet size.
1229 */
1230 length = roundup(entry->skb->len, 2);
1231 length += (2 * !(length % entry->queue->usb_maxpacket));
1232
1233 return length;
1234 }
1235
1236 /*
1237 * RX control handlers
1238 */
1239 static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1240 struct rxdone_entry_desc *rxdesc)
1241 {
1242 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1243 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1244 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1245 __le32 *rxd =
1246 (__le32 *)(entry->skb->data +
1247 (entry_priv->urb->actual_length -
1248 entry->queue->desc_size));
1249 u32 word0;
1250 u32 word1;
1251
1252 /*
1253 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1254 * frame data in rt2x00usb.
1255 */
1256 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1257 rxd = (__le32 *)skbdesc->desc;
1258
1259 /*
1260 * It is now safe to read the descriptor on all architectures.
1261 */
1262 rt2x00_desc_read(rxd, 0, &word0);
1263 rt2x00_desc_read(rxd, 1, &word1);
1264
1265 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1266 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1267 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1268 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1269
1270 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1271 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1272 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1273
1274 if (rxdesc->cipher != CIPHER_NONE) {
1275 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1276 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1277 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1278
1279 /* ICV is located at the end of frame */
1280
1281 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1282 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1283 rxdesc->flags |= RX_FLAG_DECRYPTED;
1284 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1285 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1286 }
1287
1288 /*
1289 * Obtain the status about this packet.
1290 * When frame was received with an OFDM bitrate,
1291 * the signal is the PLCP value. If it was received with
1292 * a CCK bitrate the signal is the rate in 100kbit/s.
1293 */
1294 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1295 rxdesc->rssi =
1296 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1297 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1298
1299 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1300 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1301 else
1302 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1303 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1304 rxdesc->dev_flags |= RXDONE_MY_BSS;
1305
1306 /*
1307 * Adjust the skb memory window to the frame boundaries.
1308 */
1309 skb_trim(entry->skb, rxdesc->size);
1310 }
1311
1312 /*
1313 * Interrupt functions.
1314 */
1315 static void rt2500usb_beacondone(struct urb *urb)
1316 {
1317 struct queue_entry *entry = (struct queue_entry *)urb->context;
1318 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1319
1320 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1321 return;
1322
1323 /*
1324 * Check if this was the guardian beacon,
1325 * if that was the case we need to send the real beacon now.
1326 * Otherwise we should free the sk_buffer, the device
1327 * should be doing the rest of the work now.
1328 */
1329 if (bcn_priv->guardian_urb == urb) {
1330 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1331 } else if (bcn_priv->urb == urb) {
1332 dev_kfree_skb(entry->skb);
1333 entry->skb = NULL;
1334 }
1335 }
1336
1337 /*
1338 * Device probe functions.
1339 */
1340 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1341 {
1342 u16 word;
1343 u8 *mac;
1344 u8 bbp;
1345
1346 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1347
1348 /*
1349 * Start validation of the data that has been read.
1350 */
1351 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1352 if (!is_valid_ether_addr(mac)) {
1353 eth_random_addr(mac);
1354 rt2x00_eeprom_dbg(rt2x00dev, "MAC: %pM\n", mac);
1355 }
1356
1357 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1358 if (word == 0xffff) {
1359 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1360 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1361 ANTENNA_SW_DIVERSITY);
1362 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1363 ANTENNA_SW_DIVERSITY);
1364 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1365 LED_MODE_DEFAULT);
1366 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1367 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1368 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1369 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1370 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
1371 }
1372
1373 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1374 if (word == 0xffff) {
1375 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1376 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1377 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1378 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1379 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word);
1380 }
1381
1382 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1383 if (word == 0xffff) {
1384 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1385 DEFAULT_RSSI_OFFSET);
1386 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1387 rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n",
1388 word);
1389 }
1390
1391 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1392 if (word == 0xffff) {
1393 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1394 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1395 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word);
1396 }
1397
1398 /*
1399 * Switch lower vgc bound to current BBP R17 value,
1400 * lower the value a bit for better quality.
1401 */
1402 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1403 bbp -= 6;
1404
1405 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1406 if (word == 0xffff) {
1407 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1408 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1409 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1410 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1411 } else {
1412 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1413 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1414 }
1415
1416 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1417 if (word == 0xffff) {
1418 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1419 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1420 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1421 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1422 }
1423
1424 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1425 if (word == 0xffff) {
1426 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1427 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1428 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1429 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1430 }
1431
1432 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1433 if (word == 0xffff) {
1434 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1435 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1436 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1437 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1438 }
1439
1440 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1441 if (word == 0xffff) {
1442 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1443 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1444 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1445 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1446 }
1447
1448 return 0;
1449 }
1450
1451 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1452 {
1453 u16 reg;
1454 u16 value;
1455 u16 eeprom;
1456
1457 /*
1458 * Read EEPROM word for configuration.
1459 */
1460 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1461
1462 /*
1463 * Identify RF chipset.
1464 */
1465 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1466 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1467 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1468
1469 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1470 rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n");
1471 return -ENODEV;
1472 }
1473
1474 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1475 !rt2x00_rf(rt2x00dev, RF2523) &&
1476 !rt2x00_rf(rt2x00dev, RF2524) &&
1477 !rt2x00_rf(rt2x00dev, RF2525) &&
1478 !rt2x00_rf(rt2x00dev, RF2525E) &&
1479 !rt2x00_rf(rt2x00dev, RF5222)) {
1480 rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n");
1481 return -ENODEV;
1482 }
1483
1484 /*
1485 * Identify default antenna configuration.
1486 */
1487 rt2x00dev->default_ant.tx =
1488 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1489 rt2x00dev->default_ant.rx =
1490 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1491
1492 /*
1493 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1494 * I am not 100% sure about this, but the legacy drivers do not
1495 * indicate antenna swapping in software is required when
1496 * diversity is enabled.
1497 */
1498 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1499 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1500 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1501 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1502
1503 /*
1504 * Store led mode, for correct led behaviour.
1505 */
1506 #ifdef CONFIG_RT2X00_LIB_LEDS
1507 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1508
1509 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1510 if (value == LED_MODE_TXRX_ACTIVITY ||
1511 value == LED_MODE_DEFAULT ||
1512 value == LED_MODE_ASUS)
1513 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1514 LED_TYPE_ACTIVITY);
1515 #endif /* CONFIG_RT2X00_LIB_LEDS */
1516
1517 /*
1518 * Detect if this device has an hardware controlled radio.
1519 */
1520 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1521 __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
1522
1523 /*
1524 * Read the RSSI <-> dBm offset information.
1525 */
1526 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1527 rt2x00dev->rssi_offset =
1528 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1529
1530 return 0;
1531 }
1532
1533 /*
1534 * RF value list for RF2522
1535 * Supports: 2.4 GHz
1536 */
1537 static const struct rf_channel rf_vals_bg_2522[] = {
1538 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1539 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1540 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1541 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1542 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1543 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1544 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1545 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1546 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1547 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1548 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1549 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1550 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1551 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1552 };
1553
1554 /*
1555 * RF value list for RF2523
1556 * Supports: 2.4 GHz
1557 */
1558 static const struct rf_channel rf_vals_bg_2523[] = {
1559 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1560 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1561 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1562 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1563 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1564 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1565 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1566 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1567 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1568 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1569 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1570 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1571 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1572 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1573 };
1574
1575 /*
1576 * RF value list for RF2524
1577 * Supports: 2.4 GHz
1578 */
1579 static const struct rf_channel rf_vals_bg_2524[] = {
1580 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1581 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1582 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1583 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1584 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1585 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1586 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1587 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1588 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1589 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1590 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1591 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1592 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1593 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1594 };
1595
1596 /*
1597 * RF value list for RF2525
1598 * Supports: 2.4 GHz
1599 */
1600 static const struct rf_channel rf_vals_bg_2525[] = {
1601 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1602 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1603 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1604 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1605 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1606 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1607 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1608 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1609 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1610 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1611 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1612 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1613 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1614 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1615 };
1616
1617 /*
1618 * RF value list for RF2525e
1619 * Supports: 2.4 GHz
1620 */
1621 static const struct rf_channel rf_vals_bg_2525e[] = {
1622 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1623 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1624 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1625 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1626 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1627 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1628 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1629 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1630 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1631 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1632 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1633 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1634 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1635 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1636 };
1637
1638 /*
1639 * RF value list for RF5222
1640 * Supports: 2.4 GHz & 5.2 GHz
1641 */
1642 static const struct rf_channel rf_vals_5222[] = {
1643 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1644 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1645 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1646 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1647 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1648 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1649 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1650 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1651 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1652 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1653 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1654 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1655 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1656 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1657
1658 /* 802.11 UNI / HyperLan 2 */
1659 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1660 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1661 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1662 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1663 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1664 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1665 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1666 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1667
1668 /* 802.11 HyperLan 2 */
1669 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1670 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1671 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1672 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1673 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1674 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1675 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1676 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1677 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1678 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1679
1680 /* 802.11 UNII */
1681 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1682 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1683 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1684 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1685 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1686 };
1687
1688 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1689 {
1690 struct hw_mode_spec *spec = &rt2x00dev->spec;
1691 struct channel_info *info;
1692 char *tx_power;
1693 unsigned int i;
1694
1695 /*
1696 * Initialize all hw fields.
1697 *
1698 * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
1699 * capable of sending the buffered frames out after the DTIM
1700 * transmission using rt2x00lib_beacondone. This will send out
1701 * multicast and broadcast traffic immediately instead of buffering it
1702 * infinitly and thus dropping it after some time.
1703 */
1704 ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK);
1705 ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS);
1706 ieee80211_hw_set(rt2x00dev->hw, RX_INCLUDES_FCS);
1707 ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM);
1708
1709 /*
1710 * Disable powersaving as default.
1711 */
1712 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
1713
1714 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1715 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1716 rt2x00_eeprom_addr(rt2x00dev,
1717 EEPROM_MAC_ADDR_0));
1718
1719 /*
1720 * Initialize hw_mode information.
1721 */
1722 spec->supported_bands = SUPPORT_BAND_2GHZ;
1723 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1724
1725 if (rt2x00_rf(rt2x00dev, RF2522)) {
1726 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1727 spec->channels = rf_vals_bg_2522;
1728 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
1729 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1730 spec->channels = rf_vals_bg_2523;
1731 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
1732 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1733 spec->channels = rf_vals_bg_2524;
1734 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
1735 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1736 spec->channels = rf_vals_bg_2525;
1737 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1738 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1739 spec->channels = rf_vals_bg_2525e;
1740 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
1741 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1742 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1743 spec->channels = rf_vals_5222;
1744 }
1745
1746 /*
1747 * Create channel information array
1748 */
1749 info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
1750 if (!info)
1751 return -ENOMEM;
1752
1753 spec->channels_info = info;
1754
1755 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1756 for (i = 0; i < 14; i++) {
1757 info[i].max_power = MAX_TXPOWER;
1758 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1759 }
1760
1761 if (spec->num_channels > 14) {
1762 for (i = 14; i < spec->num_channels; i++) {
1763 info[i].max_power = MAX_TXPOWER;
1764 info[i].default_power1 = DEFAULT_TXPOWER;
1765 }
1766 }
1767
1768 return 0;
1769 }
1770
1771 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1772 {
1773 int retval;
1774 u16 reg;
1775
1776 /*
1777 * Allocate eeprom data.
1778 */
1779 retval = rt2500usb_validate_eeprom(rt2x00dev);
1780 if (retval)
1781 return retval;
1782
1783 retval = rt2500usb_init_eeprom(rt2x00dev);
1784 if (retval)
1785 return retval;
1786
1787 /*
1788 * Enable rfkill polling by setting GPIO direction of the
1789 * rfkill switch GPIO pin correctly.
1790 */
1791 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
1792 rt2x00_set_field16(&reg, MAC_CSR19_DIR0, 0);
1793 rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
1794
1795 /*
1796 * Initialize hw specifications.
1797 */
1798 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1799 if (retval)
1800 return retval;
1801
1802 /*
1803 * This device requires the atim queue
1804 */
1805 __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
1806 __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags);
1807 if (!modparam_nohwcrypt) {
1808 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
1809 __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags);
1810 }
1811 __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags);
1812 __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
1813
1814 /*
1815 * Set the rssi offset.
1816 */
1817 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1818
1819 return 0;
1820 }
1821
1822 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1823 .tx = rt2x00mac_tx,
1824 .start = rt2x00mac_start,
1825 .stop = rt2x00mac_stop,
1826 .add_interface = rt2x00mac_add_interface,
1827 .remove_interface = rt2x00mac_remove_interface,
1828 .config = rt2x00mac_config,
1829 .configure_filter = rt2x00mac_configure_filter,
1830 .set_tim = rt2x00mac_set_tim,
1831 .set_key = rt2x00mac_set_key,
1832 .sw_scan_start = rt2x00mac_sw_scan_start,
1833 .sw_scan_complete = rt2x00mac_sw_scan_complete,
1834 .get_stats = rt2x00mac_get_stats,
1835 .bss_info_changed = rt2x00mac_bss_info_changed,
1836 .conf_tx = rt2x00mac_conf_tx,
1837 .rfkill_poll = rt2x00mac_rfkill_poll,
1838 .flush = rt2x00mac_flush,
1839 .set_antenna = rt2x00mac_set_antenna,
1840 .get_antenna = rt2x00mac_get_antenna,
1841 .get_ringparam = rt2x00mac_get_ringparam,
1842 .tx_frames_pending = rt2x00mac_tx_frames_pending,
1843 };
1844
1845 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1846 .probe_hw = rt2500usb_probe_hw,
1847 .initialize = rt2x00usb_initialize,
1848 .uninitialize = rt2x00usb_uninitialize,
1849 .clear_entry = rt2x00usb_clear_entry,
1850 .set_device_state = rt2500usb_set_device_state,
1851 .rfkill_poll = rt2500usb_rfkill_poll,
1852 .link_stats = rt2500usb_link_stats,
1853 .reset_tuner = rt2500usb_reset_tuner,
1854 .watchdog = rt2x00usb_watchdog,
1855 .start_queue = rt2500usb_start_queue,
1856 .kick_queue = rt2x00usb_kick_queue,
1857 .stop_queue = rt2500usb_stop_queue,
1858 .flush_queue = rt2x00usb_flush_queue,
1859 .write_tx_desc = rt2500usb_write_tx_desc,
1860 .write_beacon = rt2500usb_write_beacon,
1861 .get_tx_data_len = rt2500usb_get_tx_data_len,
1862 .fill_rxdone = rt2500usb_fill_rxdone,
1863 .config_shared_key = rt2500usb_config_key,
1864 .config_pairwise_key = rt2500usb_config_key,
1865 .config_filter = rt2500usb_config_filter,
1866 .config_intf = rt2500usb_config_intf,
1867 .config_erp = rt2500usb_config_erp,
1868 .config_ant = rt2500usb_config_ant,
1869 .config = rt2500usb_config,
1870 };
1871
1872 static void rt2500usb_queue_init(struct data_queue *queue)
1873 {
1874 switch (queue->qid) {
1875 case QID_RX:
1876 queue->limit = 32;
1877 queue->data_size = DATA_FRAME_SIZE;
1878 queue->desc_size = RXD_DESC_SIZE;
1879 queue->priv_size = sizeof(struct queue_entry_priv_usb);
1880 break;
1881
1882 case QID_AC_VO:
1883 case QID_AC_VI:
1884 case QID_AC_BE:
1885 case QID_AC_BK:
1886 queue->limit = 32;
1887 queue->data_size = DATA_FRAME_SIZE;
1888 queue->desc_size = TXD_DESC_SIZE;
1889 queue->priv_size = sizeof(struct queue_entry_priv_usb);
1890 break;
1891
1892 case QID_BEACON:
1893 queue->limit = 1;
1894 queue->data_size = MGMT_FRAME_SIZE;
1895 queue->desc_size = TXD_DESC_SIZE;
1896 queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn);
1897 break;
1898
1899 case QID_ATIM:
1900 queue->limit = 8;
1901 queue->data_size = DATA_FRAME_SIZE;
1902 queue->desc_size = TXD_DESC_SIZE;
1903 queue->priv_size = sizeof(struct queue_entry_priv_usb);
1904 break;
1905
1906 default:
1907 BUG();
1908 break;
1909 }
1910 }
1911
1912 static const struct rt2x00_ops rt2500usb_ops = {
1913 .name = KBUILD_MODNAME,
1914 .max_ap_intf = 1,
1915 .eeprom_size = EEPROM_SIZE,
1916 .rf_size = RF_SIZE,
1917 .tx_queues = NUM_TX_QUEUES,
1918 .queue_init = rt2500usb_queue_init,
1919 .lib = &rt2500usb_rt2x00_ops,
1920 .hw = &rt2500usb_mac80211_ops,
1921 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1922 .debugfs = &rt2500usb_rt2x00debug,
1923 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1924 };
1925
1926 /*
1927 * rt2500usb module information.
1928 */
1929 static struct usb_device_id rt2500usb_device_table[] = {
1930 /* ASUS */
1931 { USB_DEVICE(0x0b05, 0x1706) },
1932 { USB_DEVICE(0x0b05, 0x1707) },
1933 /* Belkin */
1934 { USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */
1935 { USB_DEVICE(0x050d, 0x7051) },
1936 /* Cisco Systems */
1937 { USB_DEVICE(0x13b1, 0x000d) },
1938 { USB_DEVICE(0x13b1, 0x0011) },
1939 { USB_DEVICE(0x13b1, 0x001a) },
1940 /* Conceptronic */
1941 { USB_DEVICE(0x14b2, 0x3c02) },
1942 /* D-LINK */
1943 { USB_DEVICE(0x2001, 0x3c00) },
1944 /* Gigabyte */
1945 { USB_DEVICE(0x1044, 0x8001) },
1946 { USB_DEVICE(0x1044, 0x8007) },
1947 /* Hercules */
1948 { USB_DEVICE(0x06f8, 0xe000) },
1949 /* Melco */
1950 { USB_DEVICE(0x0411, 0x005e) },
1951 { USB_DEVICE(0x0411, 0x0066) },
1952 { USB_DEVICE(0x0411, 0x0067) },
1953 { USB_DEVICE(0x0411, 0x008b) },
1954 { USB_DEVICE(0x0411, 0x0097) },
1955 /* MSI */
1956 { USB_DEVICE(0x0db0, 0x6861) },
1957 { USB_DEVICE(0x0db0, 0x6865) },
1958 { USB_DEVICE(0x0db0, 0x6869) },
1959 /* Ralink */
1960 { USB_DEVICE(0x148f, 0x1706) },
1961 { USB_DEVICE(0x148f, 0x2570) },
1962 { USB_DEVICE(0x148f, 0x9020) },
1963 /* Sagem */
1964 { USB_DEVICE(0x079b, 0x004b) },
1965 /* Siemens */
1966 { USB_DEVICE(0x0681, 0x3c06) },
1967 /* SMC */
1968 { USB_DEVICE(0x0707, 0xee13) },
1969 /* Spairon */
1970 { USB_DEVICE(0x114b, 0x0110) },
1971 /* SURECOM */
1972 { USB_DEVICE(0x0769, 0x11f3) },
1973 /* Trust */
1974 { USB_DEVICE(0x0eb0, 0x9020) },
1975 /* VTech */
1976 { USB_DEVICE(0x0f88, 0x3012) },
1977 /* Zinwell */
1978 { USB_DEVICE(0x5a57, 0x0260) },
1979 { 0, }
1980 };
1981
1982 MODULE_AUTHOR(DRV_PROJECT);
1983 MODULE_VERSION(DRV_VERSION);
1984 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1985 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1986 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1987 MODULE_LICENSE("GPL");
1988
1989 static int rt2500usb_probe(struct usb_interface *usb_intf,
1990 const struct usb_device_id *id)
1991 {
1992 return rt2x00usb_probe(usb_intf, &rt2500usb_ops);
1993 }
1994
1995 static struct usb_driver rt2500usb_driver = {
1996 .name = KBUILD_MODNAME,
1997 .id_table = rt2500usb_device_table,
1998 .probe = rt2500usb_probe,
1999 .disconnect = rt2x00usb_disconnect,
2000 .suspend = rt2x00usb_suspend,
2001 .resume = rt2x00usb_resume,
2002 .reset_resume = rt2x00usb_resume,
2003 .disable_hub_initiated_lpm = 1,
2004 };
2005
2006 module_usb_driver(rt2500usb_driver);
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