1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2012 Realtek Corporation.*/
4 #include <linux/export.h>
6 #include "phy_common.h"
11 #define BT_RSSI_STATE_NORMAL_POWER BIT_OFFSET_LEN_MASK_32(0, 1)
12 #define BT_RSSI_STATE_AMDPU_OFF BIT_OFFSET_LEN_MASK_32(1, 1)
13 #define BT_RSSI_STATE_SPECIAL_LOW BIT_OFFSET_LEN_MASK_32(2, 1)
14 #define BT_RSSI_STATE_BG_EDCA_LOW BIT_OFFSET_LEN_MASK_32(3, 1)
15 #define BT_RSSI_STATE_TXPOWER_LOW BIT_OFFSET_LEN_MASK_32(4, 1)
16 #define BT_MASK 0x00ffffff
18 #define RTLPRIV (struct rtl_priv *)
19 #define GET_UNDECORATED_AVERAGE_RSSI(_priv) \
20 ((RTLPRIV(_priv))->mac80211.opmode == \
21 NL80211_IFTYPE_ADHOC) ? \
22 ((RTLPRIV(_priv))->dm.entry_min_undec_sm_pwdb) : \
23 ((RTLPRIV(_priv))->dm.undec_sm_pwdb)
25 static const u32 ofdmswing_table
[OFDM_TABLE_SIZE
] = {
65 static const u8 cckswing_table_ch1ch13
[CCK_TABLE_SIZE
][8] = {
66 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
67 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
68 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
69 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
70 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
71 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
72 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
73 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
74 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
75 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
76 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
77 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
78 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
79 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
80 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
81 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
82 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
83 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
84 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
85 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
86 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
87 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
88 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
89 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
90 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
91 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
92 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
93 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
94 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
95 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
96 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
97 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
98 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
101 static const u8 cckswing_table_ch14
[CCK_TABLE_SIZE
][8] = {
102 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
103 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
104 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
105 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
106 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
107 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
108 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
109 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
110 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
111 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
112 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
113 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
114 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
115 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
116 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
117 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
118 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
119 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
120 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
121 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
122 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
123 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
124 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
125 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
126 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
127 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
128 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
129 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
130 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
131 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
132 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
133 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
134 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
137 static u32 power_index_reg
[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
139 void dm_restorepowerindex(struct ieee80211_hw
*hw
)
141 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
144 for (index
= 0; index
< 6; index
++)
145 rtl_write_byte(rtlpriv
, power_index_reg
[index
],
146 rtlpriv
->dm
.powerindex_backup
[index
]);
148 EXPORT_SYMBOL_GPL(dm_restorepowerindex
);
150 void dm_writepowerindex(struct ieee80211_hw
*hw
, u8 value
)
152 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
155 for (index
= 0; index
< 6; index
++)
156 rtl_write_byte(rtlpriv
, power_index_reg
[index
], value
);
158 EXPORT_SYMBOL_GPL(dm_writepowerindex
);
160 void dm_savepowerindex(struct ieee80211_hw
*hw
)
162 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
166 for (index
= 0; index
< 6; index
++) {
167 tmp
= rtl_read_byte(rtlpriv
, power_index_reg
[index
]);
168 rtlpriv
->dm
.powerindex_backup
[index
] = tmp
;
171 EXPORT_SYMBOL_GPL(dm_savepowerindex
);
173 static u8
rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw
*hw
)
175 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
176 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
177 long rssi_val_min
= 0;
179 if ((dm_digtable
->curmultista_cstate
== DIG_MULTISTA_CONNECT
) &&
180 (dm_digtable
->cursta_cstate
== DIG_STA_CONNECT
)) {
181 if (rtlpriv
->dm
.entry_min_undec_sm_pwdb
!= 0)
183 (rtlpriv
->dm
.entry_min_undec_sm_pwdb
>
184 rtlpriv
->dm
.undec_sm_pwdb
) ?
185 rtlpriv
->dm
.undec_sm_pwdb
:
186 rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
188 rssi_val_min
= rtlpriv
->dm
.undec_sm_pwdb
;
189 } else if (dm_digtable
->cursta_cstate
== DIG_STA_CONNECT
||
190 dm_digtable
->cursta_cstate
== DIG_STA_BEFORE_CONNECT
) {
191 rssi_val_min
= rtlpriv
->dm
.undec_sm_pwdb
;
192 } else if (dm_digtable
->curmultista_cstate
== DIG_MULTISTA_CONNECT
) {
193 rssi_val_min
= rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
196 if (rssi_val_min
> 100)
198 return (u8
)rssi_val_min
;
201 static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw
*hw
)
204 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
205 struct false_alarm_statistics
*falsealm_cnt
= &(rtlpriv
->falsealm_cnt
);
207 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER1
, MASKDWORD
);
208 falsealm_cnt
->cnt_parity_fail
= ((ret_value
& 0xffff0000) >> 16);
210 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER2
, MASKDWORD
);
211 falsealm_cnt
->cnt_rate_illegal
= (ret_value
& 0xffff);
212 falsealm_cnt
->cnt_crc8_fail
= ((ret_value
& 0xffff0000) >> 16);
214 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER3
, MASKDWORD
);
215 falsealm_cnt
->cnt_mcs_fail
= (ret_value
& 0xffff);
217 ret_value
= rtl_get_bbreg(hw
, ROFDM0_FRAMESYNC
, MASKDWORD
);
218 falsealm_cnt
->cnt_fast_fsync_fail
= (ret_value
& 0xffff);
219 falsealm_cnt
->cnt_sb_search_fail
= ((ret_value
& 0xffff0000) >> 16);
221 falsealm_cnt
->cnt_ofdm_fail
= falsealm_cnt
->cnt_parity_fail
+
222 falsealm_cnt
->cnt_rate_illegal
+
223 falsealm_cnt
->cnt_crc8_fail
+
224 falsealm_cnt
->cnt_mcs_fail
+
225 falsealm_cnt
->cnt_fast_fsync_fail
+
226 falsealm_cnt
->cnt_sb_search_fail
;
228 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, BIT(14), 1);
229 ret_value
= rtl_get_bbreg(hw
, RCCK0_FACOUNTERLOWER
, MASKBYTE0
);
230 falsealm_cnt
->cnt_cck_fail
= ret_value
;
232 ret_value
= rtl_get_bbreg(hw
, RCCK0_FACOUNTERUPPER
, MASKBYTE3
);
233 falsealm_cnt
->cnt_cck_fail
+= (ret_value
& 0xff) << 8;
234 falsealm_cnt
->cnt_all
= (falsealm_cnt
->cnt_parity_fail
+
235 falsealm_cnt
->cnt_rate_illegal
+
236 falsealm_cnt
->cnt_crc8_fail
+
237 falsealm_cnt
->cnt_mcs_fail
+
238 falsealm_cnt
->cnt_cck_fail
);
240 rtl_set_bbreg(hw
, ROFDM1_LSTF
, 0x08000000, 1);
241 rtl_set_bbreg(hw
, ROFDM1_LSTF
, 0x08000000, 0);
242 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, 0x0000c000, 0);
243 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, 0x0000c000, 2);
245 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
246 "cnt_parity_fail = %d, cnt_rate_illegal = %d, cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
247 falsealm_cnt
->cnt_parity_fail
,
248 falsealm_cnt
->cnt_rate_illegal
,
249 falsealm_cnt
->cnt_crc8_fail
, falsealm_cnt
->cnt_mcs_fail
);
251 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
252 "cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
253 falsealm_cnt
->cnt_ofdm_fail
,
254 falsealm_cnt
->cnt_cck_fail
, falsealm_cnt
->cnt_all
);
257 static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw
*hw
)
259 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
260 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
261 u8 value_igi
= dm_digtable
->cur_igvalue
;
263 if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH0
)
265 else if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH1
)
267 else if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH2
)
269 else if (rtlpriv
->falsealm_cnt
.cnt_all
>= DM_DIG_FA_TH2
)
272 if (value_igi
> DM_DIG_FA_UPPER
)
273 value_igi
= DM_DIG_FA_UPPER
;
274 else if (value_igi
< DM_DIG_FA_LOWER
)
275 value_igi
= DM_DIG_FA_LOWER
;
277 if (rtlpriv
->falsealm_cnt
.cnt_all
> 10000)
278 value_igi
= DM_DIG_FA_UPPER
;
280 dm_digtable
->cur_igvalue
= value_igi
;
281 rtl92c_dm_write_dig(hw
);
284 static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw
*hw
)
286 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
287 struct dig_t
*digtable
= &rtlpriv
->dm_digtable
;
290 /* modify DIG lower bound, deal with abnormally large false alarm */
291 if (rtlpriv
->falsealm_cnt
.cnt_all
> 10000) {
292 digtable
->large_fa_hit
++;
293 if (digtable
->forbidden_igi
< digtable
->cur_igvalue
) {
294 digtable
->forbidden_igi
= digtable
->cur_igvalue
;
295 digtable
->large_fa_hit
= 1;
298 if (digtable
->large_fa_hit
>= 3) {
299 if ((digtable
->forbidden_igi
+ 1) >
300 digtable
->rx_gain_max
)
301 digtable
->rx_gain_min
= digtable
->rx_gain_max
;
303 digtable
->rx_gain_min
= (digtable
->forbidden_igi
+ 1);
304 digtable
->recover_cnt
= 3600; /* 3600=2hr */
307 /* Recovery mechanism for IGI lower bound */
308 if (digtable
->recover_cnt
!= 0) {
309 digtable
->recover_cnt
--;
311 if (digtable
->large_fa_hit
== 0) {
312 if ((digtable
->forbidden_igi
-1) < DM_DIG_MIN
) {
313 digtable
->forbidden_igi
= DM_DIG_MIN
;
314 digtable
->rx_gain_min
= DM_DIG_MIN
;
316 digtable
->forbidden_igi
--;
317 digtable
->rx_gain_min
= digtable
->forbidden_igi
+ 1;
319 } else if (digtable
->large_fa_hit
== 3) {
320 digtable
->large_fa_hit
= 0;
324 if (rtlpriv
->falsealm_cnt
.cnt_all
< 250) {
325 isbt
= rtl_read_byte(rtlpriv
, 0x4fd) & 0x01;
328 if (rtlpriv
->falsealm_cnt
.cnt_all
>
329 digtable
->fa_lowthresh
) {
330 if ((digtable
->back_val
- 2) <
331 digtable
->back_range_min
)
332 digtable
->back_val
= digtable
->back_range_min
;
334 digtable
->back_val
-= 2;
335 } else if (rtlpriv
->falsealm_cnt
.cnt_all
<
336 digtable
->fa_lowthresh
) {
337 if ((digtable
->back_val
+ 2) >
338 digtable
->back_range_max
)
339 digtable
->back_val
= digtable
->back_range_max
;
341 digtable
->back_val
+= 2;
344 digtable
->back_val
= DM_DIG_BACKOFF_DEFAULT
;
347 /* Adjust initial gain by false alarm */
348 if (rtlpriv
->falsealm_cnt
.cnt_all
> 1000)
349 digtable
->cur_igvalue
= digtable
->pre_igvalue
+ 2;
350 else if (rtlpriv
->falsealm_cnt
.cnt_all
> 750)
351 digtable
->cur_igvalue
= digtable
->pre_igvalue
+ 1;
352 else if (rtlpriv
->falsealm_cnt
.cnt_all
< 500)
353 digtable
->cur_igvalue
= digtable
->pre_igvalue
- 1;
356 /* Check initial gain by upper/lower bound */
357 if (digtable
->cur_igvalue
> digtable
->rx_gain_max
)
358 digtable
->cur_igvalue
= digtable
->rx_gain_max
;
360 if (digtable
->cur_igvalue
< digtable
->rx_gain_min
)
361 digtable
->cur_igvalue
= digtable
->rx_gain_min
;
363 rtl92c_dm_write_dig(hw
);
366 static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw
*hw
)
368 static u8 initialized
; /* initialized to false */
369 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
370 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
371 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
372 long rssi_strength
= rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
373 bool multi_sta
= false;
375 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
)
379 dm_digtable
->cursta_cstate
== DIG_STA_DISCONNECT
) {
381 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
383 } else if (initialized
== false) {
385 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_0
;
386 dm_digtable
->cur_igvalue
= 0x20;
387 rtl92c_dm_write_dig(hw
);
390 if (dm_digtable
->curmultista_cstate
== DIG_MULTISTA_CONNECT
) {
391 if ((rssi_strength
< dm_digtable
->rssi_lowthresh
) &&
392 (dm_digtable
->dig_ext_port_stage
!= DIG_EXT_PORT_STAGE_1
)) {
394 if (dm_digtable
->dig_ext_port_stage
==
395 DIG_EXT_PORT_STAGE_2
) {
396 dm_digtable
->cur_igvalue
= 0x20;
397 rtl92c_dm_write_dig(hw
);
400 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_1
;
401 } else if (rssi_strength
> dm_digtable
->rssi_highthresh
) {
402 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_2
;
403 rtl92c_dm_ctrl_initgain_by_fa(hw
);
405 } else if (dm_digtable
->dig_ext_port_stage
!= DIG_EXT_PORT_STAGE_0
) {
406 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_0
;
407 dm_digtable
->cur_igvalue
= 0x20;
408 rtl92c_dm_write_dig(hw
);
411 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
412 "curmultista_cstate = %x dig_ext_port_stage %x\n",
413 dm_digtable
->curmultista_cstate
,
414 dm_digtable
->dig_ext_port_stage
);
417 static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw
*hw
)
419 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
420 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
422 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
423 "presta_cstate = %x, cursta_cstate = %x\n",
424 dm_digtable
->presta_cstate
, dm_digtable
->cursta_cstate
);
425 if (dm_digtable
->presta_cstate
== dm_digtable
->cursta_cstate
||
426 dm_digtable
->cursta_cstate
== DIG_STA_BEFORE_CONNECT
||
427 dm_digtable
->cursta_cstate
== DIG_STA_CONNECT
) {
428 if (dm_digtable
->cursta_cstate
!= DIG_STA_DISCONNECT
) {
429 dm_digtable
->rssi_val_min
=
430 rtl92c_dm_initial_gain_min_pwdb(hw
);
431 if (dm_digtable
->rssi_val_min
> 100)
432 dm_digtable
->rssi_val_min
= 100;
433 rtl92c_dm_ctrl_initgain_by_rssi(hw
);
436 dm_digtable
->rssi_val_min
= 0;
437 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
438 dm_digtable
->back_val
= DM_DIG_BACKOFF_DEFAULT
;
439 dm_digtable
->cur_igvalue
= 0x20;
440 dm_digtable
->pre_igvalue
= 0;
441 rtl92c_dm_write_dig(hw
);
445 static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw
*hw
)
447 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
448 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
450 if (dm_digtable
->cursta_cstate
== DIG_STA_CONNECT
) {
451 dm_digtable
->rssi_val_min
= rtl92c_dm_initial_gain_min_pwdb(hw
);
452 if (dm_digtable
->rssi_val_min
> 100)
453 dm_digtable
->rssi_val_min
= 100;
455 if (dm_digtable
->pre_cck_pd_state
== CCK_PD_STAGE_LOWRSSI
) {
456 if (dm_digtable
->rssi_val_min
<= 25)
457 dm_digtable
->cur_cck_pd_state
=
458 CCK_PD_STAGE_LOWRSSI
;
460 dm_digtable
->cur_cck_pd_state
=
461 CCK_PD_STAGE_HIGHRSSI
;
463 if (dm_digtable
->rssi_val_min
<= 20)
464 dm_digtable
->cur_cck_pd_state
=
465 CCK_PD_STAGE_LOWRSSI
;
467 dm_digtable
->cur_cck_pd_state
=
468 CCK_PD_STAGE_HIGHRSSI
;
471 dm_digtable
->cur_cck_pd_state
= CCK_PD_STAGE_MAX
;
474 if (dm_digtable
->pre_cck_pd_state
!= dm_digtable
->cur_cck_pd_state
) {
475 if ((dm_digtable
->cur_cck_pd_state
== CCK_PD_STAGE_LOWRSSI
) ||
476 (dm_digtable
->cur_cck_pd_state
== CCK_PD_STAGE_MAX
))
477 rtl_set_bbreg(hw
, RCCK0_CCA
, MASKBYTE2
, 0x83);
479 rtl_set_bbreg(hw
, RCCK0_CCA
, MASKBYTE2
, 0xcd);
481 dm_digtable
->pre_cck_pd_state
= dm_digtable
->cur_cck_pd_state
;
485 static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw
*hw
)
487 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
488 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
489 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
491 if (mac
->act_scanning
)
494 if (mac
->link_state
>= MAC80211_LINKED
)
495 dm_digtable
->cursta_cstate
= DIG_STA_CONNECT
;
497 dm_digtable
->cursta_cstate
= DIG_STA_DISCONNECT
;
499 dm_digtable
->curmultista_cstate
= DIG_MULTISTA_DISCONNECT
;
501 rtl92c_dm_initial_gain_sta(hw
);
502 rtl92c_dm_initial_gain_multi_sta(hw
);
503 rtl92c_dm_cck_packet_detection_thresh(hw
);
505 dm_digtable
->presta_cstate
= dm_digtable
->cursta_cstate
;
508 static void rtl92c_dm_dig(struct ieee80211_hw
*hw
)
510 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
512 if (rtlpriv
->dm
.dm_initialgain_enable
== false)
514 if (!(rtlpriv
->dm
.dm_flag
& DYNAMIC_FUNC_DIG
))
517 rtl92c_dm_ctrl_initgain_by_twoport(hw
);
520 static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw
*hw
)
522 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
524 if (rtlpriv
->rtlhal
.interface
== INTF_USB
&&
525 rtlpriv
->rtlhal
.board_type
& 0x1) {
526 dm_savepowerindex(hw
);
527 rtlpriv
->dm
.dynamic_txpower_enable
= true;
529 rtlpriv
->dm
.dynamic_txpower_enable
= false;
531 rtlpriv
->dm
.last_dtp_lvl
= TXHIGHPWRLEVEL_NORMAL
;
532 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
535 void rtl92c_dm_write_dig(struct ieee80211_hw
*hw
)
537 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
538 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
540 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_LOUD
,
541 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n",
542 dm_digtable
->cur_igvalue
, dm_digtable
->pre_igvalue
,
543 dm_digtable
->back_val
);
545 if (rtlpriv
->rtlhal
.interface
== INTF_USB
&&
546 !dm_digtable
->dig_enable_flag
) {
547 dm_digtable
->pre_igvalue
= 0x17;
550 dm_digtable
->cur_igvalue
-= 1;
551 if (dm_digtable
->cur_igvalue
< DM_DIG_MIN
)
552 dm_digtable
->cur_igvalue
= DM_DIG_MIN
;
554 if (dm_digtable
->pre_igvalue
!= dm_digtable
->cur_igvalue
) {
555 rtl_set_bbreg(hw
, ROFDM0_XAAGCCORE1
, 0x7f,
556 dm_digtable
->cur_igvalue
);
557 rtl_set_bbreg(hw
, ROFDM0_XBAGCCORE1
, 0x7f,
558 dm_digtable
->cur_igvalue
);
560 dm_digtable
->pre_igvalue
= dm_digtable
->cur_igvalue
;
562 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_WARNING
,
563 "dig values 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
564 dm_digtable
->cur_igvalue
, dm_digtable
->pre_igvalue
,
565 dm_digtable
->rssi_val_min
, dm_digtable
->back_val
,
566 dm_digtable
->rx_gain_max
, dm_digtable
->rx_gain_min
,
567 dm_digtable
->large_fa_hit
, dm_digtable
->forbidden_igi
);
569 EXPORT_SYMBOL(rtl92c_dm_write_dig
);
571 static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw
*hw
)
573 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
574 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
575 long tmpentry_max_pwdb
= 0, tmpentry_min_pwdb
= 0xff;
577 if (mac
->link_state
!= MAC80211_LINKED
)
580 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
||
581 mac
->opmode
== NL80211_IFTYPE_AP
) {
582 /* TODO: Handle ADHOC and AP Mode */
585 if (tmpentry_max_pwdb
!= 0)
586 rtlpriv
->dm
.entry_max_undec_sm_pwdb
= tmpentry_max_pwdb
;
588 rtlpriv
->dm
.entry_max_undec_sm_pwdb
= 0;
590 if (tmpentry_min_pwdb
!= 0xff)
591 rtlpriv
->dm
.entry_min_undec_sm_pwdb
= tmpentry_min_pwdb
;
593 rtlpriv
->dm
.entry_min_undec_sm_pwdb
= 0;
596 * if (mac->opmode == NL80211_IFTYPE_STATION) {
597 * if (rtlpriv->rtlhal.fw_ready) {
598 * u32 param = (u32)(rtlpriv->dm.undec_sm_pwdb << 16);
599 * rtl8192c_set_rssi_cmd(hw, param);
605 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw
*hw
)
607 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
609 rtlpriv
->dm
.current_turbo_edca
= false;
610 rtlpriv
->dm
.is_any_nonbepkts
= false;
611 rtlpriv
->dm
.is_cur_rdlstate
= false;
613 EXPORT_SYMBOL(rtl92c_dm_init_edca_turbo
);
615 static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw
*hw
)
617 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
618 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
620 static u64 last_txok_cnt
;
621 static u64 last_rxok_cnt
;
622 static u32 last_bt_edca_ul
;
623 static u32 last_bt_edca_dl
;
624 u64 cur_txok_cnt
= 0;
625 u64 cur_rxok_cnt
= 0;
626 u32 edca_be_ul
= 0x5ea42b;
627 u32 edca_be_dl
= 0x5ea42b;
628 bool bt_change_edca
= false;
630 if ((last_bt_edca_ul
!= rtlpriv
->btcoexist
.bt_edca_ul
) ||
631 (last_bt_edca_dl
!= rtlpriv
->btcoexist
.bt_edca_dl
)) {
632 rtlpriv
->dm
.current_turbo_edca
= false;
633 last_bt_edca_ul
= rtlpriv
->btcoexist
.bt_edca_ul
;
634 last_bt_edca_dl
= rtlpriv
->btcoexist
.bt_edca_dl
;
637 if (rtlpriv
->btcoexist
.bt_edca_ul
!= 0) {
638 edca_be_ul
= rtlpriv
->btcoexist
.bt_edca_ul
;
639 bt_change_edca
= true;
642 if (rtlpriv
->btcoexist
.bt_edca_dl
!= 0) {
643 edca_be_ul
= rtlpriv
->btcoexist
.bt_edca_dl
;
644 bt_change_edca
= true;
647 if (mac
->link_state
!= MAC80211_LINKED
) {
648 rtlpriv
->dm
.current_turbo_edca
= false;
652 if ((!mac
->ht_enable
) && (!rtlpriv
->btcoexist
.bt_coexistence
)) {
653 if (!(edca_be_ul
& 0xffff0000))
654 edca_be_ul
|= 0x005e0000;
656 if (!(edca_be_dl
& 0xffff0000))
657 edca_be_dl
|= 0x005e0000;
660 if ((bt_change_edca
) || ((!rtlpriv
->dm
.is_any_nonbepkts
) &&
661 (!rtlpriv
->dm
.disable_framebursting
))) {
662 cur_txok_cnt
= rtlpriv
->stats
.txbytesunicast
- last_txok_cnt
;
663 cur_rxok_cnt
= rtlpriv
->stats
.rxbytesunicast
- last_rxok_cnt
;
665 if (cur_rxok_cnt
> 4 * cur_txok_cnt
) {
666 if (!rtlpriv
->dm
.is_cur_rdlstate
||
667 !rtlpriv
->dm
.current_turbo_edca
) {
668 rtl_write_dword(rtlpriv
,
671 rtlpriv
->dm
.is_cur_rdlstate
= true;
674 if (rtlpriv
->dm
.is_cur_rdlstate
||
675 !rtlpriv
->dm
.current_turbo_edca
) {
676 rtl_write_dword(rtlpriv
,
679 rtlpriv
->dm
.is_cur_rdlstate
= false;
682 rtlpriv
->dm
.current_turbo_edca
= true;
684 if (rtlpriv
->dm
.current_turbo_edca
) {
687 rtlpriv
->cfg
->ops
->set_hw_reg(hw
, HW_VAR_AC_PARAM
,
689 rtlpriv
->dm
.current_turbo_edca
= false;
693 rtlpriv
->dm
.is_any_nonbepkts
= false;
694 last_txok_cnt
= rtlpriv
->stats
.txbytesunicast
;
695 last_rxok_cnt
= rtlpriv
->stats
.rxbytesunicast
;
698 static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
701 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
702 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
703 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
704 struct rtl_efuse
*rtlefuse
= rtl_efuse(rtl_priv(hw
));
705 u8 thermalvalue
, delta
, delta_lck
, delta_iqk
;
706 long ele_a
, ele_d
, temp_cck
, val_x
, value32
;
707 long val_y
, ele_c
= 0;
708 u8 ofdm_index
[2], ofdm_index_old
[2] = {0, 0}, cck_index_old
= 0;
711 bool is2t
= IS_92C_SERIAL(rtlhal
->version
);
712 s8 txpwr_level
[3] = {0, 0, 0};
713 u8 ofdm_min_index
= 6, rf
;
715 rtlpriv
->dm
.txpower_trackinginit
= true;
716 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
717 "rtl92c_dm_txpower_tracking_callback_thermalmeter\n");
719 thermalvalue
= (u8
) rtl_get_rfreg(hw
, RF90_PATH_A
, RF_T_METER
, 0x1f);
721 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
722 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
723 thermalvalue
, rtlpriv
->dm
.thermalvalue
,
724 rtlefuse
->eeprom_thermalmeter
);
726 rtl92c_phy_ap_calibrate(hw
, (thermalvalue
-
727 rtlefuse
->eeprom_thermalmeter
));
734 ele_d
= rtl_get_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
735 MASKDWORD
) & MASKOFDM_D
;
737 for (i
= 0; i
< OFDM_TABLE_LENGTH
; i
++) {
738 if (ele_d
== (ofdmswing_table
[i
] & MASKOFDM_D
)) {
739 ofdm_index_old
[0] = (u8
) i
;
741 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
742 "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
743 ROFDM0_XATXIQIMBALANCE
,
744 ele_d
, ofdm_index_old
[0]);
750 ele_d
= rtl_get_bbreg(hw
, ROFDM0_XBTXIQIMBALANCE
,
751 MASKDWORD
) & MASKOFDM_D
;
753 for (i
= 0; i
< OFDM_TABLE_LENGTH
; i
++) {
754 if (ele_d
== (ofdmswing_table
[i
] &
756 ofdm_index_old
[1] = (u8
) i
;
757 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
759 "Initial pathB ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
760 ROFDM0_XBTXIQIMBALANCE
, ele_d
,
768 rtl_get_bbreg(hw
, RCCK0_TXFILTER2
, MASKDWORD
) & MASKCCK
;
770 for (i
= 0; i
< CCK_TABLE_LENGTH
; i
++) {
771 if (rtlpriv
->dm
.cck_inch14
) {
772 if (memcmp((void *)&temp_cck
,
773 (void *)&cckswing_table_ch14
[i
][2],
775 cck_index_old
= (u8
) i
;
777 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
779 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
780 RCCK0_TXFILTER2
, temp_cck
,
782 rtlpriv
->dm
.cck_inch14
);
786 if (memcmp((void *)&temp_cck
,
788 &cckswing_table_ch1ch13
[i
][2],
790 cck_index_old
= (u8
) i
;
792 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
794 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch14 %d\n",
795 RCCK0_TXFILTER2
, temp_cck
,
797 rtlpriv
->dm
.cck_inch14
);
803 if (!rtlpriv
->dm
.thermalvalue
) {
804 rtlpriv
->dm
.thermalvalue
=
805 rtlefuse
->eeprom_thermalmeter
;
806 rtlpriv
->dm
.thermalvalue_lck
= thermalvalue
;
807 rtlpriv
->dm
.thermalvalue_iqk
= thermalvalue
;
808 for (i
= 0; i
< rf
; i
++)
809 rtlpriv
->dm
.ofdm_index
[i
] = ofdm_index_old
[i
];
810 rtlpriv
->dm
.cck_index
= cck_index_old
;
812 /* Handle USB High PA boards */
814 delta
= (thermalvalue
> rtlpriv
->dm
.thermalvalue
) ?
815 (thermalvalue
- rtlpriv
->dm
.thermalvalue
) :
816 (rtlpriv
->dm
.thermalvalue
- thermalvalue
);
818 delta_lck
= (thermalvalue
> rtlpriv
->dm
.thermalvalue_lck
) ?
819 (thermalvalue
- rtlpriv
->dm
.thermalvalue_lck
) :
820 (rtlpriv
->dm
.thermalvalue_lck
- thermalvalue
);
822 delta_iqk
= (thermalvalue
> rtlpriv
->dm
.thermalvalue_iqk
) ?
823 (thermalvalue
- rtlpriv
->dm
.thermalvalue_iqk
) :
824 (rtlpriv
->dm
.thermalvalue_iqk
- thermalvalue
);
826 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
827 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
828 thermalvalue
, rtlpriv
->dm
.thermalvalue
,
829 rtlefuse
->eeprom_thermalmeter
, delta
, delta_lck
,
833 rtlpriv
->dm
.thermalvalue_lck
= thermalvalue
;
834 rtl92c_phy_lc_calibrate(hw
);
837 if (delta
> 0 && rtlpriv
->dm
.txpower_track_control
) {
838 if (thermalvalue
> rtlpriv
->dm
.thermalvalue
) {
839 for (i
= 0; i
< rf
; i
++)
840 rtlpriv
->dm
.ofdm_index
[i
] -= delta
;
841 rtlpriv
->dm
.cck_index
-= delta
;
843 for (i
= 0; i
< rf
; i
++)
844 rtlpriv
->dm
.ofdm_index
[i
] += delta
;
845 rtlpriv
->dm
.cck_index
+= delta
;
849 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
850 "temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, cck_index=0x%x\n",
851 rtlpriv
->dm
.ofdm_index
[0],
852 rtlpriv
->dm
.ofdm_index
[1],
853 rtlpriv
->dm
.cck_index
);
855 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
856 "temp OFDM_A_index=0x%x, cck_index=0x%x\n",
857 rtlpriv
->dm
.ofdm_index
[0],
858 rtlpriv
->dm
.cck_index
);
861 if (thermalvalue
> rtlefuse
->eeprom_thermalmeter
) {
862 for (i
= 0; i
< rf
; i
++)
864 rtlpriv
->dm
.ofdm_index
[i
]
866 cck_index
= rtlpriv
->dm
.cck_index
+ 1;
868 for (i
= 0; i
< rf
; i
++)
870 rtlpriv
->dm
.ofdm_index
[i
];
871 cck_index
= rtlpriv
->dm
.cck_index
;
874 for (i
= 0; i
< rf
; i
++) {
875 if (txpwr_level
[i
] >= 0 &&
876 txpwr_level
[i
] <= 26) {
878 rtlefuse
->eeprom_thermalmeter
) {
884 } else if (delta
> 5 && thermalvalue
<
886 eeprom_thermalmeter
) {
889 } else if (txpwr_level
[i
] >= 27 &&
892 rtlefuse
->eeprom_thermalmeter
) {
898 } else if (txpwr_level
[i
] >= 32 &&
899 txpwr_level
[i
] <= 38 &&
901 rtlefuse
->eeprom_thermalmeter
907 if (txpwr_level
[i
] >= 0 && txpwr_level
[i
] <= 26) {
909 rtlefuse
->eeprom_thermalmeter
) {
915 } else if (delta
> 5 && thermalvalue
<
916 rtlefuse
->eeprom_thermalmeter
) {
919 } else if (txpwr_level
[i
] >= 27 &&
920 txpwr_level
[i
] <= 32 &&
922 rtlefuse
->eeprom_thermalmeter
) {
928 } else if (txpwr_level
[i
] >= 32 &&
929 txpwr_level
[i
] <= 38 &&
930 thermalvalue
> rtlefuse
->eeprom_thermalmeter
935 for (i
= 0; i
< rf
; i
++) {
936 if (ofdm_index
[i
] > OFDM_TABLE_SIZE
- 1)
937 ofdm_index
[i
] = OFDM_TABLE_SIZE
- 1;
939 else if (ofdm_index
[i
] < ofdm_min_index
)
940 ofdm_index
[i
] = ofdm_min_index
;
943 if (cck_index
> CCK_TABLE_SIZE
- 1)
944 cck_index
= CCK_TABLE_SIZE
- 1;
945 else if (cck_index
< 0)
949 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
950 "new OFDM_A_index=0x%x, OFDM_B_index=0x%x, cck_index=0x%x\n",
951 ofdm_index
[0], ofdm_index
[1],
954 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
955 "new OFDM_A_index=0x%x, cck_index=0x%x\n",
956 ofdm_index
[0], cck_index
);
960 if (rtlpriv
->dm
.txpower_track_control
&& delta
!= 0) {
962 (ofdmswing_table
[ofdm_index
[0]] & 0xFFC00000) >> 22;
963 val_x
= rtlphy
->reg_e94
;
964 val_y
= rtlphy
->reg_e9c
;
967 if ((val_x
& 0x00000200) != 0)
968 val_x
= val_x
| 0xFFFFFC00;
969 ele_a
= ((val_x
* ele_d
) >> 8) & 0x000003FF;
971 if ((val_y
& 0x00000200) != 0)
972 val_y
= val_y
| 0xFFFFFC00;
973 ele_c
= ((val_y
* ele_d
) >> 8) & 0x000003FF;
975 value32
= (ele_d
<< 22) |
976 ((ele_c
& 0x3F) << 16) | ele_a
;
978 rtl_set_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
981 value32
= (ele_c
& 0x000003C0) >> 6;
982 rtl_set_bbreg(hw
, ROFDM0_XCTXAFE
, MASKH4BITS
,
985 value32
= ((val_x
* ele_d
) >> 7) & 0x01;
986 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
989 value32
= ((val_y
* ele_d
) >> 7) & 0x01;
990 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
993 rtl_set_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
995 ofdmswing_table
[ofdm_index
[0]]);
997 rtl_set_bbreg(hw
, ROFDM0_XCTXAFE
, MASKH4BITS
,
999 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1000 BIT(31) | BIT(29), 0x00);
1003 if (!rtlpriv
->dm
.cck_inch14
) {
1004 rtl_write_byte(rtlpriv
, 0xa22,
1005 cckswing_table_ch1ch13
[cck_index
]
1007 rtl_write_byte(rtlpriv
, 0xa23,
1008 cckswing_table_ch1ch13
[cck_index
]
1010 rtl_write_byte(rtlpriv
, 0xa24,
1011 cckswing_table_ch1ch13
[cck_index
]
1013 rtl_write_byte(rtlpriv
, 0xa25,
1014 cckswing_table_ch1ch13
[cck_index
]
1016 rtl_write_byte(rtlpriv
, 0xa26,
1017 cckswing_table_ch1ch13
[cck_index
]
1019 rtl_write_byte(rtlpriv
, 0xa27,
1020 cckswing_table_ch1ch13
[cck_index
]
1022 rtl_write_byte(rtlpriv
, 0xa28,
1023 cckswing_table_ch1ch13
[cck_index
]
1025 rtl_write_byte(rtlpriv
, 0xa29,
1026 cckswing_table_ch1ch13
[cck_index
]
1029 rtl_write_byte(rtlpriv
, 0xa22,
1030 cckswing_table_ch14
[cck_index
]
1032 rtl_write_byte(rtlpriv
, 0xa23,
1033 cckswing_table_ch14
[cck_index
]
1035 rtl_write_byte(rtlpriv
, 0xa24,
1036 cckswing_table_ch14
[cck_index
]
1038 rtl_write_byte(rtlpriv
, 0xa25,
1039 cckswing_table_ch14
[cck_index
]
1041 rtl_write_byte(rtlpriv
, 0xa26,
1042 cckswing_table_ch14
[cck_index
]
1044 rtl_write_byte(rtlpriv
, 0xa27,
1045 cckswing_table_ch14
[cck_index
]
1047 rtl_write_byte(rtlpriv
, 0xa28,
1048 cckswing_table_ch14
[cck_index
]
1050 rtl_write_byte(rtlpriv
, 0xa29,
1051 cckswing_table_ch14
[cck_index
]
1056 ele_d
= (ofdmswing_table
[ofdm_index
[1]] &
1059 val_x
= rtlphy
->reg_eb4
;
1060 val_y
= rtlphy
->reg_ebc
;
1063 if ((val_x
& 0x00000200) != 0)
1064 val_x
= val_x
| 0xFFFFFC00;
1065 ele_a
= ((val_x
* ele_d
) >> 8) &
1068 if ((val_y
& 0x00000200) != 0)
1069 val_y
= val_y
| 0xFFFFFC00;
1070 ele_c
= ((val_y
* ele_d
) >> 8) &
1073 value32
= (ele_d
<< 22) |
1074 ((ele_c
& 0x3F) << 16) | ele_a
;
1076 ROFDM0_XBTXIQIMBALANCE
,
1077 MASKDWORD
, value32
);
1079 value32
= (ele_c
& 0x000003C0) >> 6;
1080 rtl_set_bbreg(hw
, ROFDM0_XDTXAFE
,
1081 MASKH4BITS
, value32
);
1083 value32
= ((val_x
* ele_d
) >> 7) & 0x01;
1084 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1087 value32
= ((val_y
* ele_d
) >> 7) & 0x01;
1088 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1092 ROFDM0_XBTXIQIMBALANCE
,
1094 ofdmswing_table
[ofdm_index
1096 rtl_set_bbreg(hw
, ROFDM0_XDTXAFE
,
1098 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1099 BIT(27) | BIT(25), 0x00);
1105 if (delta_iqk
> 3) {
1106 rtlpriv
->dm
.thermalvalue_iqk
= thermalvalue
;
1107 rtl92c_phy_iq_calibrate(hw
, false);
1110 if (rtlpriv
->dm
.txpower_track_control
)
1111 rtlpriv
->dm
.thermalvalue
= thermalvalue
;
1114 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
, "<===\n");
1118 static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
1119 struct ieee80211_hw
*hw
)
1121 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1123 rtlpriv
->dm
.txpower_tracking
= true;
1124 rtlpriv
->dm
.txpower_trackinginit
= false;
1126 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1127 "pMgntInfo->txpower_tracking = %d\n",
1128 rtlpriv
->dm
.txpower_tracking
);
1131 static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw
*hw
)
1133 rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw
);
1136 static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw
*hw
)
1138 rtl92c_dm_txpower_tracking_callback_thermalmeter(hw
);
1141 static void rtl92c_dm_check_txpower_tracking_thermal_meter(
1142 struct ieee80211_hw
*hw
)
1144 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1146 if (!rtlpriv
->dm
.txpower_tracking
)
1149 if (!rtlpriv
->dm
.tm_trigger
) {
1150 rtl_set_rfreg(hw
, RF90_PATH_A
, RF_T_METER
, RFREG_OFFSET_MASK
,
1152 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1153 "Trigger 92S Thermal Meter!!\n");
1154 rtlpriv
->dm
.tm_trigger
= 1;
1157 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1158 "Schedule TxPowerTracking direct call!!\n");
1159 rtl92c_dm_txpower_tracking_directcall(hw
);
1160 rtlpriv
->dm
.tm_trigger
= 0;
1164 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw
*hw
)
1166 rtl92c_dm_check_txpower_tracking_thermal_meter(hw
);
1168 EXPORT_SYMBOL(rtl92c_dm_check_txpower_tracking
);
1170 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw
*hw
)
1172 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1173 struct rate_adaptive
*p_ra
= &(rtlpriv
->ra
);
1175 p_ra
->ratr_state
= DM_RATR_STA_INIT
;
1176 p_ra
->pre_ratr_state
= DM_RATR_STA_INIT
;
1178 if (rtlpriv
->dm
.dm_type
== DM_TYPE_BYDRIVER
)
1179 rtlpriv
->dm
.useramask
= true;
1181 rtlpriv
->dm
.useramask
= false;
1184 EXPORT_SYMBOL(rtl92c_dm_init_rate_adaptive_mask
);
1186 static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw
*hw
)
1188 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1189 struct ps_t
*dm_pstable
= &rtlpriv
->dm_pstable
;
1191 dm_pstable
->pre_ccastate
= CCA_MAX
;
1192 dm_pstable
->cur_ccasate
= CCA_MAX
;
1193 dm_pstable
->pre_rfstate
= RF_MAX
;
1194 dm_pstable
->cur_rfstate
= RF_MAX
;
1195 dm_pstable
->rssi_val_min
= 0;
1198 void rtl92c_dm_rf_saving(struct ieee80211_hw
*hw
, u8 bforce_in_normal
)
1200 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1201 struct ps_t
*dm_pstable
= &rtlpriv
->dm_pstable
;
1203 if (!rtlpriv
->reg_init
) {
1204 rtlpriv
->reg_874
= (rtl_get_bbreg(hw
,
1205 RFPGA0_XCD_RFINTERFACESW
,
1206 MASKDWORD
) & 0x1CC000) >> 14;
1208 rtlpriv
->reg_c70
= (rtl_get_bbreg(hw
, ROFDM0_AGCPARAMETER1
,
1209 MASKDWORD
) & BIT(3)) >> 3;
1211 rtlpriv
->reg_85c
= (rtl_get_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
,
1212 MASKDWORD
) & 0xFF000000) >> 24;
1214 rtlpriv
->reg_a74
= (rtl_get_bbreg(hw
, 0xa74, MASKDWORD
) &
1217 rtlpriv
->reg_init
= true;
1220 if (!bforce_in_normal
) {
1221 if (dm_pstable
->rssi_val_min
!= 0) {
1222 if (dm_pstable
->pre_rfstate
== RF_NORMAL
) {
1223 if (dm_pstable
->rssi_val_min
>= 30)
1224 dm_pstable
->cur_rfstate
= RF_SAVE
;
1226 dm_pstable
->cur_rfstate
= RF_NORMAL
;
1228 if (dm_pstable
->rssi_val_min
<= 25)
1229 dm_pstable
->cur_rfstate
= RF_NORMAL
;
1231 dm_pstable
->cur_rfstate
= RF_SAVE
;
1234 dm_pstable
->cur_rfstate
= RF_MAX
;
1237 dm_pstable
->cur_rfstate
= RF_NORMAL
;
1240 if (dm_pstable
->pre_rfstate
!= dm_pstable
->cur_rfstate
) {
1241 if (dm_pstable
->cur_rfstate
== RF_SAVE
) {
1242 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1244 rtl_set_bbreg(hw
, ROFDM0_AGCPARAMETER1
, BIT(3), 0);
1245 rtl_set_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
,
1247 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1249 rtl_set_bbreg(hw
, 0xa74, 0xF000, 0x3);
1250 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x0);
1251 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x1);
1253 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1254 0x1CC000, rtlpriv
->reg_874
);
1255 rtl_set_bbreg(hw
, ROFDM0_AGCPARAMETER1
, BIT(3),
1257 rtl_set_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
, 0xFF000000,
1259 rtl_set_bbreg(hw
, 0xa74, 0xF000, rtlpriv
->reg_a74
);
1260 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x0);
1263 dm_pstable
->pre_rfstate
= dm_pstable
->cur_rfstate
;
1266 EXPORT_SYMBOL(rtl92c_dm_rf_saving
);
1268 static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw
*hw
)
1270 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1271 struct ps_t
*dm_pstable
= &rtlpriv
->dm_pstable
;
1272 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1273 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1275 /* Determine the minimum RSSI */
1276 if (((mac
->link_state
== MAC80211_NOLINK
)) &&
1277 (rtlpriv
->dm
.entry_min_undec_sm_pwdb
== 0)) {
1278 dm_pstable
->rssi_val_min
= 0;
1279 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
, "Not connected to any\n");
1282 if (mac
->link_state
== MAC80211_LINKED
) {
1283 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
1284 dm_pstable
->rssi_val_min
=
1285 rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
1286 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1287 "AP Client PWDB = 0x%lx\n",
1288 dm_pstable
->rssi_val_min
);
1290 dm_pstable
->rssi_val_min
= rtlpriv
->dm
.undec_sm_pwdb
;
1291 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1292 "STA Default Port PWDB = 0x%lx\n",
1293 dm_pstable
->rssi_val_min
);
1296 dm_pstable
->rssi_val_min
=
1297 rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
1299 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1300 "AP Ext Port PWDB = 0x%lx\n",
1301 dm_pstable
->rssi_val_min
);
1304 /* Power Saving for 92C */
1305 if (IS_92C_SERIAL(rtlhal
->version
))
1306 ;/* rtl92c_dm_1r_cca(hw); */
1308 rtl92c_dm_rf_saving(hw
, false);
1311 void rtl92c_dm_init(struct ieee80211_hw
*hw
)
1313 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1315 rtlpriv
->dm
.dm_type
= DM_TYPE_BYDRIVER
;
1316 rtlpriv
->dm
.dm_flag
= DYNAMIC_FUNC_DISABLE
| DYNAMIC_FUNC_DIG
;
1317 rtlpriv
->dm
.undec_sm_pwdb
= -1;
1318 rtlpriv
->dm
.undec_sm_cck
= -1;
1319 rtlpriv
->dm
.dm_initialgain_enable
= true;
1320 rtl_dm_diginit(hw
, 0x20);
1322 rtlpriv
->dm
.dm_flag
|= HAL_DM_HIPWR_DISABLE
;
1323 rtl92c_dm_init_dynamic_txpower(hw
);
1325 rtl92c_dm_init_edca_turbo(hw
);
1326 rtl92c_dm_init_rate_adaptive_mask(hw
);
1327 rtlpriv
->dm
.dm_flag
|= DYNAMIC_FUNC_SS
;
1328 rtl92c_dm_initialize_txpower_tracking(hw
);
1329 rtl92c_dm_init_dynamic_bb_powersaving(hw
);
1331 rtlpriv
->dm
.ofdm_pkt_cnt
= 0;
1332 rtlpriv
->dm
.dm_rssi_sel
= RSSI_DEFAULT
;
1334 EXPORT_SYMBOL(rtl92c_dm_init
);
1336 void rtl92c_dm_dynamic_txpower(struct ieee80211_hw
*hw
)
1338 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1339 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
1340 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1343 if (!rtlpriv
->dm
.dynamic_txpower_enable
)
1346 if (rtlpriv
->dm
.dm_flag
& HAL_DM_HIPWR_DISABLE
) {
1347 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1351 if ((mac
->link_state
< MAC80211_LINKED
) &&
1352 (rtlpriv
->dm
.entry_min_undec_sm_pwdb
== 0)) {
1353 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_TRACE
,
1354 "Not connected to any\n");
1356 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1358 rtlpriv
->dm
.last_dtp_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1362 if (mac
->link_state
>= MAC80211_LINKED
) {
1363 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
1364 undec_sm_pwdb
= rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
1365 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1366 "AP Client PWDB = 0x%lx\n",
1369 undec_sm_pwdb
= rtlpriv
->dm
.undec_sm_pwdb
;
1370 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1371 "STA Default Port PWDB = 0x%lx\n",
1375 undec_sm_pwdb
= rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
1377 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1378 "AP Ext Port PWDB = 0x%lx\n",
1382 if (undec_sm_pwdb
>= TX_POWER_NEAR_FIELD_THRESH_LVL2
) {
1383 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_LEVEL2
;
1384 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1385 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
1386 } else if ((undec_sm_pwdb
< (TX_POWER_NEAR_FIELD_THRESH_LVL2
- 3)) &&
1387 (undec_sm_pwdb
>= TX_POWER_NEAR_FIELD_THRESH_LVL1
)) {
1389 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_LEVEL1
;
1390 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1391 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
1392 } else if (undec_sm_pwdb
< (TX_POWER_NEAR_FIELD_THRESH_LVL1
- 5)) {
1393 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1394 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1395 "TXHIGHPWRLEVEL_NORMAL\n");
1398 if ((rtlpriv
->dm
.dynamic_txhighpower_lvl
!= rtlpriv
->dm
.last_dtp_lvl
)) {
1399 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1400 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
1401 rtlphy
->current_channel
);
1402 rtl92c_phy_set_txpower_level(hw
, rtlphy
->current_channel
);
1403 if (rtlpriv
->dm
.dynamic_txhighpower_lvl
==
1404 TXHIGHPWRLEVEL_NORMAL
)
1405 dm_restorepowerindex(hw
);
1406 else if (rtlpriv
->dm
.dynamic_txhighpower_lvl
==
1407 TXHIGHPWRLEVEL_LEVEL1
)
1408 dm_writepowerindex(hw
, 0x14);
1409 else if (rtlpriv
->dm
.dynamic_txhighpower_lvl
==
1410 TXHIGHPWRLEVEL_LEVEL2
)
1411 dm_writepowerindex(hw
, 0x10);
1413 rtlpriv
->dm
.last_dtp_lvl
= rtlpriv
->dm
.dynamic_txhighpower_lvl
;
1416 void rtl92c_dm_watchdog(struct ieee80211_hw
*hw
)
1418 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1419 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
1420 bool fw_current_inpsmode
= false;
1421 bool fw_ps_awake
= true;
1423 rtlpriv
->cfg
->ops
->get_hw_reg(hw
, HW_VAR_FW_PSMODE_STATUS
,
1424 (u8
*) (&fw_current_inpsmode
));
1425 rtlpriv
->cfg
->ops
->get_hw_reg(hw
, HW_VAR_FWLPS_RF_ON
,
1426 (u8
*) (&fw_ps_awake
));
1428 if (ppsc
->p2p_ps_info
.p2p_ps_mode
)
1429 fw_ps_awake
= false;
1431 if ((ppsc
->rfpwr_state
== ERFON
) && ((!fw_current_inpsmode
) &&
1433 && (!ppsc
->rfchange_inprogress
)) {
1434 rtl92c_dm_pwdb_monitor(hw
);
1436 rtl92c_dm_false_alarm_counter_statistics(hw
);
1437 rtl92c_dm_dynamic_bb_powersaving(hw
);
1438 rtl92c_dm_dynamic_txpower(hw
);
1439 rtl92c_dm_check_txpower_tracking(hw
);
1440 /* rtl92c_dm_refresh_rate_adaptive_mask(hw); */
1441 rtl92c_dm_bt_coexist(hw
);
1442 rtl92c_dm_check_edca_turbo(hw
);
1445 EXPORT_SYMBOL(rtl92c_dm_watchdog
);
1447 u8
rtl92c_bt_rssi_state_change(struct ieee80211_hw
*hw
)
1449 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1451 u8 curr_bt_rssi_state
= 0x00;
1453 if (rtlpriv
->mac80211
.link_state
== MAC80211_LINKED
) {
1454 undec_sm_pwdb
= GET_UNDECORATED_AVERAGE_RSSI(rtlpriv
);
1456 if (rtlpriv
->dm
.entry_min_undec_sm_pwdb
== 0)
1457 undec_sm_pwdb
= 100;
1459 undec_sm_pwdb
= rtlpriv
->dm
.entry_min_undec_sm_pwdb
;
1462 /* Check RSSI to determine HighPower/NormalPower state for
1463 * BT coexistence. */
1464 if (undec_sm_pwdb
>= 67)
1465 curr_bt_rssi_state
&= (~BT_RSSI_STATE_NORMAL_POWER
);
1466 else if (undec_sm_pwdb
< 62)
1467 curr_bt_rssi_state
|= BT_RSSI_STATE_NORMAL_POWER
;
1469 /* Check RSSI to determine AMPDU setting for BT coexistence. */
1470 if (undec_sm_pwdb
>= 40)
1471 curr_bt_rssi_state
&= (~BT_RSSI_STATE_AMDPU_OFF
);
1472 else if (undec_sm_pwdb
<= 32)
1473 curr_bt_rssi_state
|= BT_RSSI_STATE_AMDPU_OFF
;
1475 /* Marked RSSI state. It will be used to determine BT coexistence
1477 if (undec_sm_pwdb
< 35)
1478 curr_bt_rssi_state
|= BT_RSSI_STATE_SPECIAL_LOW
;
1480 curr_bt_rssi_state
&= (~BT_RSSI_STATE_SPECIAL_LOW
);
1482 /* Check BT state related to BT_Idle in B/G mode. */
1483 if (undec_sm_pwdb
< 15)
1484 curr_bt_rssi_state
|= BT_RSSI_STATE_BG_EDCA_LOW
;
1486 curr_bt_rssi_state
&= (~BT_RSSI_STATE_BG_EDCA_LOW
);
1488 if (curr_bt_rssi_state
!= rtlpriv
->btcoexist
.bt_rssi_state
) {
1489 rtlpriv
->btcoexist
.bt_rssi_state
= curr_bt_rssi_state
;
1495 EXPORT_SYMBOL(rtl92c_bt_rssi_state_change
);
1497 static bool rtl92c_bt_state_change(struct ieee80211_hw
*hw
)
1499 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1501 u32 polling
, ratio_tx
, ratio_pri
;
1504 u8 cur_service_type
;
1506 if (rtlpriv
->mac80211
.link_state
< MAC80211_LINKED
)
1509 bt_state
= rtl_read_byte(rtlpriv
, 0x4fd);
1510 bt_tx
= rtl_read_dword(rtlpriv
, 0x488) & BT_MASK
;
1511 bt_pri
= rtl_read_dword(rtlpriv
, 0x48c) & BT_MASK
;
1512 polling
= rtl_read_dword(rtlpriv
, 0x490);
1514 if (bt_tx
== BT_MASK
&& bt_pri
== BT_MASK
&&
1515 polling
== 0xffffffff && bt_state
== 0xff)
1518 bt_state
&= BIT_OFFSET_LEN_MASK_32(0, 1);
1519 if (bt_state
!= rtlpriv
->btcoexist
.bt_cur_state
) {
1520 rtlpriv
->btcoexist
.bt_cur_state
= bt_state
;
1522 if (rtlpriv
->btcoexist
.reg_bt_sco
== 3) {
1523 rtlpriv
->btcoexist
.bt_service
= BT_IDLE
;
1525 bt_state
= bt_state
|
1526 ((rtlpriv
->btcoexist
.bt_ant_isolation
== 1) ?
1527 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1528 BIT_OFFSET_LEN_MASK_32(2, 1);
1529 rtl_write_byte(rtlpriv
, 0x4fd, bt_state
);
1534 ratio_tx
= bt_tx
* 1000 / polling
;
1535 ratio_pri
= bt_pri
* 1000 / polling
;
1536 rtlpriv
->btcoexist
.ratio_tx
= ratio_tx
;
1537 rtlpriv
->btcoexist
.ratio_pri
= ratio_pri
;
1539 if (bt_state
&& rtlpriv
->btcoexist
.reg_bt_sco
== 3) {
1541 if ((ratio_tx
< 30) && (ratio_pri
< 30))
1542 cur_service_type
= BT_IDLE
;
1543 else if ((ratio_pri
> 110) && (ratio_pri
< 250))
1544 cur_service_type
= BT_SCO
;
1545 else if ((ratio_tx
>= 200) && (ratio_pri
>= 200))
1546 cur_service_type
= BT_BUSY
;
1547 else if ((ratio_tx
>= 350) && (ratio_tx
< 500))
1548 cur_service_type
= BT_OTHERBUSY
;
1549 else if (ratio_tx
>= 500)
1550 cur_service_type
= BT_PAN
;
1552 cur_service_type
= BT_OTHER_ACTION
;
1554 if (cur_service_type
!= rtlpriv
->btcoexist
.bt_service
) {
1555 rtlpriv
->btcoexist
.bt_service
= cur_service_type
;
1556 bt_state
= bt_state
|
1557 ((rtlpriv
->btcoexist
.bt_ant_isolation
== 1) ?
1558 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1559 ((rtlpriv
->btcoexist
.bt_service
!= BT_IDLE
) ?
1560 0 : BIT_OFFSET_LEN_MASK_32(2, 1));
1562 /* Add interrupt migration when bt is not ini
1563 * idle state (no traffic). */
1564 if (rtlpriv
->btcoexist
.bt_service
!= BT_IDLE
) {
1565 rtl_write_word(rtlpriv
, 0x504, 0x0ccc);
1566 rtl_write_byte(rtlpriv
, 0x506, 0x54);
1567 rtl_write_byte(rtlpriv
, 0x507, 0x54);
1569 rtl_write_byte(rtlpriv
, 0x506, 0x00);
1570 rtl_write_byte(rtlpriv
, 0x507, 0x00);
1573 rtl_write_byte(rtlpriv
, 0x4fd, bt_state
);
1582 static bool rtl92c_bt_wifi_connect_change(struct ieee80211_hw
*hw
)
1584 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1585 static bool media_connect
;
1587 if (rtlpriv
->mac80211
.link_state
< MAC80211_LINKED
) {
1588 media_connect
= false;
1590 if (!media_connect
) {
1591 media_connect
= true;
1594 media_connect
= true;
1600 static void rtl92c_bt_set_normal(struct ieee80211_hw
*hw
)
1602 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1604 if (rtlpriv
->btcoexist
.bt_service
== BT_OTHERBUSY
) {
1605 rtlpriv
->btcoexist
.bt_edca_ul
= 0x5ea72b;
1606 rtlpriv
->btcoexist
.bt_edca_dl
= 0x5ea72b;
1607 } else if (rtlpriv
->btcoexist
.bt_service
== BT_BUSY
) {
1608 rtlpriv
->btcoexist
.bt_edca_ul
= 0x5eb82f;
1609 rtlpriv
->btcoexist
.bt_edca_dl
= 0x5eb82f;
1610 } else if (rtlpriv
->btcoexist
.bt_service
== BT_SCO
) {
1611 if (rtlpriv
->btcoexist
.ratio_tx
> 160) {
1612 rtlpriv
->btcoexist
.bt_edca_ul
= 0x5ea72f;
1613 rtlpriv
->btcoexist
.bt_edca_dl
= 0x5ea72f;
1615 rtlpriv
->btcoexist
.bt_edca_ul
= 0x5ea32b;
1616 rtlpriv
->btcoexist
.bt_edca_dl
= 0x5ea42b;
1619 rtlpriv
->btcoexist
.bt_edca_ul
= 0;
1620 rtlpriv
->btcoexist
.bt_edca_dl
= 0;
1623 if ((rtlpriv
->btcoexist
.bt_service
!= BT_IDLE
) &&
1624 (rtlpriv
->mac80211
.mode
== WIRELESS_MODE_G
||
1625 (rtlpriv
->mac80211
.mode
== (WIRELESS_MODE_G
| WIRELESS_MODE_B
))) &&
1626 (rtlpriv
->btcoexist
.bt_rssi_state
&
1627 BT_RSSI_STATE_BG_EDCA_LOW
)) {
1628 rtlpriv
->btcoexist
.bt_edca_ul
= 0x5eb82b;
1629 rtlpriv
->btcoexist
.bt_edca_dl
= 0x5eb82b;
1633 static void rtl92c_bt_ant_isolation(struct ieee80211_hw
*hw
, u8 tmp1byte
)
1635 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1637 /* Only enable HW BT coexist when BT in "Busy" state. */
1638 if (rtlpriv
->mac80211
.vendor
== PEER_CISCO
&&
1639 rtlpriv
->btcoexist
.bt_service
== BT_OTHER_ACTION
) {
1640 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1642 if ((rtlpriv
->btcoexist
.bt_service
== BT_BUSY
) &&
1643 (rtlpriv
->btcoexist
.bt_rssi_state
&
1644 BT_RSSI_STATE_NORMAL_POWER
)) {
1645 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1646 } else if ((rtlpriv
->btcoexist
.bt_service
==
1647 BT_OTHER_ACTION
) && (rtlpriv
->mac80211
.mode
<
1648 WIRELESS_MODE_N_24G
) &&
1649 (rtlpriv
->btcoexist
.bt_rssi_state
&
1650 BT_RSSI_STATE_SPECIAL_LOW
)) {
1651 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1652 } else if (rtlpriv
->btcoexist
.bt_service
== BT_PAN
) {
1653 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, tmp1byte
);
1655 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, tmp1byte
);
1659 if (rtlpriv
->btcoexist
.bt_service
== BT_PAN
)
1660 rtl_write_dword(rtlpriv
, REG_GPIO_PIN_CTRL
, 0x10100);
1662 rtl_write_dword(rtlpriv
, REG_GPIO_PIN_CTRL
, 0x0);
1664 if (rtlpriv
->btcoexist
.bt_rssi_state
&
1665 BT_RSSI_STATE_NORMAL_POWER
) {
1666 rtl92c_bt_set_normal(hw
);
1668 rtlpriv
->btcoexist
.bt_edca_ul
= 0;
1669 rtlpriv
->btcoexist
.bt_edca_dl
= 0;
1672 if (rtlpriv
->btcoexist
.bt_service
!= BT_IDLE
) {
1673 rtlpriv
->cfg
->ops
->set_rfreg(hw
,
1678 rtlpriv
->cfg
->ops
->set_rfreg(hw
,
1679 RF90_PATH_A
, 0x1e, 0xf0,
1680 rtlpriv
->btcoexist
.bt_rfreg_origin_1e
);
1683 if (!rtlpriv
->dm
.dynamic_txpower_enable
) {
1684 if (rtlpriv
->btcoexist
.bt_service
!= BT_IDLE
) {
1685 if (rtlpriv
->btcoexist
.bt_rssi_state
&
1686 BT_RSSI_STATE_TXPOWER_LOW
) {
1687 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1690 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1694 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1695 TXHIGHPWRLEVEL_NORMAL
;
1697 rtl92c_phy_set_txpower_level(hw
,
1698 rtlpriv
->phy
.current_channel
);
1702 static void rtl92c_check_bt_change(struct ieee80211_hw
*hw
)
1704 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1705 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1708 if (IS_81XXC_VENDOR_UMC_B_CUT(rtlhal
->version
) &&
1709 rtlpriv
->btcoexist
.bt_coexistence
)
1711 if (rtlpriv
->btcoexist
.bt_cur_state
) {
1712 if (rtlpriv
->btcoexist
.bt_ant_isolation
)
1713 rtl92c_bt_ant_isolation(hw
, tmp1byte
);
1715 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, tmp1byte
);
1716 rtlpriv
->cfg
->ops
->set_rfreg(hw
, RF90_PATH_A
, 0x1e, 0xf0,
1717 rtlpriv
->btcoexist
.bt_rfreg_origin_1e
);
1719 rtlpriv
->btcoexist
.bt_edca_ul
= 0;
1720 rtlpriv
->btcoexist
.bt_edca_dl
= 0;
1724 void rtl92c_dm_bt_coexist(struct ieee80211_hw
*hw
)
1726 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1727 bool wifi_connect_change
;
1728 bool bt_state_change
;
1729 bool rssi_state_change
;
1731 if ((rtlpriv
->btcoexist
.bt_coexistence
) &&
1732 (rtlpriv
->btcoexist
.bt_coexist_type
== BT_CSR_BC4
)) {
1733 wifi_connect_change
= rtl92c_bt_wifi_connect_change(hw
);
1734 bt_state_change
= rtl92c_bt_state_change(hw
);
1735 rssi_state_change
= rtl92c_bt_rssi_state_change(hw
);
1737 if (wifi_connect_change
|| bt_state_change
|| rssi_state_change
)
1738 rtl92c_check_bt_change(hw
);
1741 EXPORT_SYMBOL(rtl92c_dm_bt_coexist
);