1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
14 static void rtw_fw_c2h_cmd_handle_ext(struct rtw_dev
*rtwdev
,
17 struct rtw_c2h_cmd
*c2h
;
20 c2h
= get_c2h_from_skb(skb
);
21 sub_cmd_id
= c2h
->payload
[0];
25 rtw_tx_report_handle(rtwdev
, skb
);
32 static u16
get_max_amsdu_len(u32 bit_rate
)
34 /* lower than ofdm, do not aggregate */
38 /* lower than 20M 2ss mcs8, make it small */
42 /* lower than 40M 2ss mcs9, make it medium */
46 /* not yet 80M 2ss mcs8/9, make it twice regular packet size */
54 struct rtw_fw_iter_ra_data
{
55 struct rtw_dev
*rtwdev
;
59 static void rtw_fw_ra_report_iter(void *data
, struct ieee80211_sta
*sta
)
61 struct rtw_fw_iter_ra_data
*ra_data
= data
;
62 struct rtw_sta_info
*si
= (struct rtw_sta_info
*)sta
->drv_priv
;
63 u8 mac_id
, rate
, sgi
, bw
;
67 mac_id
= GET_RA_REPORT_MACID(ra_data
->payload
);
68 if (si
->mac_id
!= mac_id
)
71 si
->ra_report
.txrate
.flags
= 0;
73 rate
= GET_RA_REPORT_RATE(ra_data
->payload
);
74 sgi
= GET_RA_REPORT_SGI(ra_data
->payload
);
75 bw
= GET_RA_REPORT_BW(ra_data
->payload
);
77 if (rate
< DESC_RATEMCS0
) {
78 si
->ra_report
.txrate
.legacy
= rtw_desc_to_bitrate(rate
);
82 rtw_desc_to_mcsrate(rate
, &mcs
, &nss
);
83 if (rate
>= DESC_RATEVHT1SS_MCS0
)
84 si
->ra_report
.txrate
.flags
|= RATE_INFO_FLAGS_VHT_MCS
;
85 else if (rate
>= DESC_RATEMCS0
)
86 si
->ra_report
.txrate
.flags
|= RATE_INFO_FLAGS_MCS
;
88 if (rate
>= DESC_RATEMCS0
) {
89 si
->ra_report
.txrate
.mcs
= mcs
;
90 si
->ra_report
.txrate
.nss
= nss
;
94 si
->ra_report
.txrate
.flags
|= RATE_INFO_FLAGS_SHORT_GI
;
96 if (bw
== RTW_CHANNEL_WIDTH_80
)
97 si
->ra_report
.txrate
.bw
= RATE_INFO_BW_80
;
98 else if (bw
== RTW_CHANNEL_WIDTH_40
)
99 si
->ra_report
.txrate
.bw
= RATE_INFO_BW_40
;
101 si
->ra_report
.txrate
.bw
= RATE_INFO_BW_20
;
104 bit_rate
= cfg80211_calculate_bitrate(&si
->ra_report
.txrate
);
106 si
->ra_report
.desc_rate
= rate
;
107 si
->ra_report
.bit_rate
= bit_rate
;
109 sta
->max_rc_amsdu_len
= get_max_amsdu_len(bit_rate
);
112 static void rtw_fw_ra_report_handle(struct rtw_dev
*rtwdev
, u8
*payload
,
115 struct rtw_fw_iter_ra_data ra_data
;
117 if (WARN(length
< 7, "invalid ra report c2h length\n"))
120 rtwdev
->dm_info
.tx_rate
= GET_RA_REPORT_RATE(payload
);
121 ra_data
.rtwdev
= rtwdev
;
122 ra_data
.payload
= payload
;
123 rtw_iterate_stas_atomic(rtwdev
, rtw_fw_ra_report_iter
, &ra_data
);
126 void rtw_fw_c2h_cmd_handle(struct rtw_dev
*rtwdev
, struct sk_buff
*skb
)
128 struct rtw_c2h_cmd
*c2h
;
132 pkt_offset
= *((u32
*)skb
->cb
);
133 c2h
= (struct rtw_c2h_cmd
*)(skb
->data
+ pkt_offset
);
134 len
= skb
->len
- pkt_offset
- 2;
136 mutex_lock(&rtwdev
->mutex
);
140 rtw_coex_bt_info_notify(rtwdev
, c2h
->payload
, len
);
143 rtw_coex_wl_fwdbginfo_notify(rtwdev
, c2h
->payload
, len
);
146 rtw_fw_c2h_cmd_handle_ext(rtwdev
, skb
);
149 rtw_fw_ra_report_handle(rtwdev
, c2h
->payload
, len
);
155 mutex_unlock(&rtwdev
->mutex
);
158 void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev
*rtwdev
, u32 pkt_offset
,
161 struct rtw_c2h_cmd
*c2h
;
164 c2h
= (struct rtw_c2h_cmd
*)(skb
->data
+ pkt_offset
);
165 len
= skb
->len
- pkt_offset
- 2;
166 *((u32
*)skb
->cb
) = pkt_offset
;
168 rtw_dbg(rtwdev
, RTW_DBG_FW
, "recv C2H, id=0x%02x, seq=0x%02x, len=%d\n",
169 c2h
->id
, c2h
->seq
, len
);
173 rtw_coex_info_response(rtwdev
, skb
);
176 /* pass offset for further operation */
177 *((u32
*)skb
->cb
) = pkt_offset
;
178 skb_queue_tail(&rtwdev
->c2h_queue
, skb
);
179 ieee80211_queue_work(rtwdev
->hw
, &rtwdev
->c2h_work
);
183 EXPORT_SYMBOL(rtw_fw_c2h_cmd_rx_irqsafe
);
185 static void rtw_fw_send_h2c_command(struct rtw_dev
*rtwdev
,
190 u32 box_reg
, box_ex_reg
;
194 rtw_dbg(rtwdev
, RTW_DBG_FW
,
195 "send H2C content %02x%02x%02x%02x %02x%02x%02x%02x\n",
196 h2c
[3], h2c
[2], h2c
[1], h2c
[0],
197 h2c
[7], h2c
[6], h2c
[5], h2c
[4]);
199 spin_lock(&rtwdev
->h2c
.lock
);
201 box
= rtwdev
->h2c
.last_box_num
;
204 box_reg
= REG_HMEBOX0
;
205 box_ex_reg
= REG_HMEBOX0_EX
;
208 box_reg
= REG_HMEBOX1
;
209 box_ex_reg
= REG_HMEBOX1_EX
;
212 box_reg
= REG_HMEBOX2
;
213 box_ex_reg
= REG_HMEBOX2_EX
;
216 box_reg
= REG_HMEBOX3
;
217 box_ex_reg
= REG_HMEBOX3_EX
;
220 WARN(1, "invalid h2c mail box number\n");
226 box_state
= rtw_read8(rtwdev
, REG_HMETFR
);
227 } while ((box_state
>> box
) & 0x1 && --h2c_wait
> 0);
230 rtw_err(rtwdev
, "failed to send h2c command\n");
234 for (idx
= 0; idx
< 4; idx
++)
235 rtw_write8(rtwdev
, box_reg
+ idx
, h2c
[idx
]);
236 for (idx
= 0; idx
< 4; idx
++)
237 rtw_write8(rtwdev
, box_ex_reg
+ idx
, h2c
[idx
+ 4]);
239 if (++rtwdev
->h2c
.last_box_num
>= 4)
240 rtwdev
->h2c
.last_box_num
= 0;
243 spin_unlock(&rtwdev
->h2c
.lock
);
246 static void rtw_fw_send_h2c_packet(struct rtw_dev
*rtwdev
, u8
*h2c_pkt
)
250 spin_lock(&rtwdev
->h2c
.lock
);
252 FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt
, rtwdev
->h2c
.seq
);
253 ret
= rtw_hci_write_data_h2c(rtwdev
, h2c_pkt
, H2C_PKT_SIZE
);
255 rtw_err(rtwdev
, "failed to send h2c packet\n");
258 spin_unlock(&rtwdev
->h2c
.lock
);
262 rtw_fw_send_general_info(struct rtw_dev
*rtwdev
)
264 struct rtw_fifo_conf
*fifo
= &rtwdev
->fifo
;
265 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
266 u16 total_size
= H2C_PKT_HDR_SIZE
+ 4;
268 rtw_h2c_pkt_set_header(h2c_pkt
, H2C_PKT_GENERAL_INFO
);
270 SET_PKT_H2C_TOTAL_LEN(h2c_pkt
, total_size
);
272 GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt
,
273 fifo
->rsvd_fw_txbuf_addr
-
274 fifo
->rsvd_boundary
);
276 rtw_fw_send_h2c_packet(rtwdev
, h2c_pkt
);
280 rtw_fw_send_phydm_info(struct rtw_dev
*rtwdev
)
282 struct rtw_hal
*hal
= &rtwdev
->hal
;
283 struct rtw_efuse
*efuse
= &rtwdev
->efuse
;
284 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
285 u16 total_size
= H2C_PKT_HDR_SIZE
+ 8;
288 if (hal
->rf_type
== RF_1T1R
)
289 fw_rf_type
= FW_RF_1T1R
;
290 else if (hal
->rf_type
== RF_2T2R
)
291 fw_rf_type
= FW_RF_2T2R
;
293 rtw_h2c_pkt_set_header(h2c_pkt
, H2C_PKT_PHYDM_INFO
);
295 SET_PKT_H2C_TOTAL_LEN(h2c_pkt
, total_size
);
296 PHYDM_INFO_SET_REF_TYPE(h2c_pkt
, efuse
->rfe_option
);
297 PHYDM_INFO_SET_RF_TYPE(h2c_pkt
, fw_rf_type
);
298 PHYDM_INFO_SET_CUT_VER(h2c_pkt
, hal
->cut_version
);
299 PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt
, hal
->antenna_tx
);
300 PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt
, hal
->antenna_rx
);
302 rtw_fw_send_h2c_packet(rtwdev
, h2c_pkt
);
305 void rtw_fw_do_iqk(struct rtw_dev
*rtwdev
, struct rtw_iqk_para
*para
)
307 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
308 u16 total_size
= H2C_PKT_HDR_SIZE
+ 1;
310 rtw_h2c_pkt_set_header(h2c_pkt
, H2C_PKT_IQK
);
311 SET_PKT_H2C_TOTAL_LEN(h2c_pkt
, total_size
);
312 IQK_SET_CLEAR(h2c_pkt
, para
->clear
);
313 IQK_SET_SEGMENT_IQK(h2c_pkt
, para
->segment_iqk
);
315 rtw_fw_send_h2c_packet(rtwdev
, h2c_pkt
);
318 void rtw_fw_query_bt_info(struct rtw_dev
*rtwdev
)
320 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
322 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_QUERY_BT_INFO
);
324 SET_QUERY_BT_INFO(h2c_pkt
, true);
326 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
329 void rtw_fw_wl_ch_info(struct rtw_dev
*rtwdev
, u8 link
, u8 ch
, u8 bw
)
331 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
333 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_WL_CH_INFO
);
335 SET_WL_CH_INFO_LINK(h2c_pkt
, link
);
336 SET_WL_CH_INFO_CHNL(h2c_pkt
, ch
);
337 SET_WL_CH_INFO_BW(h2c_pkt
, bw
);
339 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
342 void rtw_fw_query_bt_mp_info(struct rtw_dev
*rtwdev
,
343 struct rtw_coex_info_req
*req
)
345 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
347 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_QUERY_BT_MP_INFO
);
349 SET_BT_MP_INFO_SEQ(h2c_pkt
, req
->seq
);
350 SET_BT_MP_INFO_OP_CODE(h2c_pkt
, req
->op_code
);
351 SET_BT_MP_INFO_PARA1(h2c_pkt
, req
->para1
);
352 SET_BT_MP_INFO_PARA2(h2c_pkt
, req
->para2
);
353 SET_BT_MP_INFO_PARA3(h2c_pkt
, req
->para3
);
355 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
358 void rtw_fw_force_bt_tx_power(struct rtw_dev
*rtwdev
, u8 bt_pwr_dec_lvl
)
360 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
361 u8 index
= 0 - bt_pwr_dec_lvl
;
363 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_FORCE_BT_TX_POWER
);
365 SET_BT_TX_POWER_INDEX(h2c_pkt
, index
);
367 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
370 void rtw_fw_bt_ignore_wlan_action(struct rtw_dev
*rtwdev
, bool enable
)
372 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
374 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_IGNORE_WLAN_ACTION
);
376 SET_IGNORE_WLAN_ACTION_EN(h2c_pkt
, enable
);
378 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
381 void rtw_fw_coex_tdma_type(struct rtw_dev
*rtwdev
,
382 u8 para1
, u8 para2
, u8 para3
, u8 para4
, u8 para5
)
384 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
386 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_COEX_TDMA_TYPE
);
388 SET_COEX_TDMA_TYPE_PARA1(h2c_pkt
, para1
);
389 SET_COEX_TDMA_TYPE_PARA2(h2c_pkt
, para2
);
390 SET_COEX_TDMA_TYPE_PARA3(h2c_pkt
, para3
);
391 SET_COEX_TDMA_TYPE_PARA4(h2c_pkt
, para4
);
392 SET_COEX_TDMA_TYPE_PARA5(h2c_pkt
, para5
);
394 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
397 void rtw_fw_bt_wifi_control(struct rtw_dev
*rtwdev
, u8 op_code
, u8
*data
)
399 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
401 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_BT_WIFI_CONTROL
);
403 SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt
, op_code
);
405 SET_BT_WIFI_CONTROL_DATA1(h2c_pkt
, *data
);
406 SET_BT_WIFI_CONTROL_DATA2(h2c_pkt
, *(data
+ 1));
407 SET_BT_WIFI_CONTROL_DATA3(h2c_pkt
, *(data
+ 2));
408 SET_BT_WIFI_CONTROL_DATA4(h2c_pkt
, *(data
+ 3));
409 SET_BT_WIFI_CONTROL_DATA5(h2c_pkt
, *(data
+ 4));
411 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
414 void rtw_fw_send_rssi_info(struct rtw_dev
*rtwdev
, struct rtw_sta_info
*si
)
416 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
417 u8 rssi
= ewma_rssi_read(&si
->avg_rssi
);
418 bool stbc_en
= si
->stbc_en
? true : false;
420 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_RSSI_MONITOR
);
422 SET_RSSI_INFO_MACID(h2c_pkt
, si
->mac_id
);
423 SET_RSSI_INFO_RSSI(h2c_pkt
, rssi
);
424 SET_RSSI_INFO_STBC(h2c_pkt
, stbc_en
);
426 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
429 void rtw_fw_send_ra_info(struct rtw_dev
*rtwdev
, struct rtw_sta_info
*si
)
431 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
432 bool no_update
= si
->updated
;
433 bool disable_pt
= true;
435 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_RA_INFO
);
437 SET_RA_INFO_MACID(h2c_pkt
, si
->mac_id
);
438 SET_RA_INFO_RATE_ID(h2c_pkt
, si
->rate_id
);
439 SET_RA_INFO_INIT_RA_LVL(h2c_pkt
, si
->init_ra_lv
);
440 SET_RA_INFO_SGI_EN(h2c_pkt
, si
->sgi_enable
);
441 SET_RA_INFO_BW_MODE(h2c_pkt
, si
->bw_mode
);
442 SET_RA_INFO_LDPC(h2c_pkt
, si
->ldpc_en
);
443 SET_RA_INFO_NO_UPDATE(h2c_pkt
, no_update
);
444 SET_RA_INFO_VHT_EN(h2c_pkt
, si
->vht_enable
);
445 SET_RA_INFO_DIS_PT(h2c_pkt
, disable_pt
);
446 SET_RA_INFO_RA_MASK0(h2c_pkt
, (si
->ra_mask
& 0xff));
447 SET_RA_INFO_RA_MASK1(h2c_pkt
, (si
->ra_mask
& 0xff00) >> 8);
448 SET_RA_INFO_RA_MASK2(h2c_pkt
, (si
->ra_mask
& 0xff0000) >> 16);
449 SET_RA_INFO_RA_MASK3(h2c_pkt
, (si
->ra_mask
& 0xff000000) >> 24);
454 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
457 void rtw_fw_media_status_report(struct rtw_dev
*rtwdev
, u8 mac_id
, bool connect
)
459 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
461 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_MEDIA_STATUS_RPT
);
462 MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt
, connect
);
463 MEDIA_STATUS_RPT_SET_MACID(h2c_pkt
, mac_id
);
465 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
468 void rtw_fw_set_pwr_mode(struct rtw_dev
*rtwdev
)
470 struct rtw_lps_conf
*conf
= &rtwdev
->lps_conf
;
471 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
473 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_SET_PWR_MODE
);
475 SET_PWR_MODE_SET_MODE(h2c_pkt
, conf
->mode
);
476 SET_PWR_MODE_SET_RLBM(h2c_pkt
, conf
->rlbm
);
477 SET_PWR_MODE_SET_SMART_PS(h2c_pkt
, conf
->smart_ps
);
478 SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt
, conf
->awake_interval
);
479 SET_PWR_MODE_SET_PORT_ID(h2c_pkt
, conf
->port_id
);
480 SET_PWR_MODE_SET_PWR_STATE(h2c_pkt
, conf
->state
);
482 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
485 static u8
rtw_get_rsvd_page_location(struct rtw_dev
*rtwdev
,
486 enum rtw_rsvd_packet_type type
)
488 struct rtw_rsvd_page
*rsvd_pkt
;
491 list_for_each_entry(rsvd_pkt
, &rtwdev
->rsvd_page_list
, list
) {
492 if (type
== rsvd_pkt
->type
)
493 location
= rsvd_pkt
->page
;
499 void rtw_fw_set_pg_info(struct rtw_dev
*rtwdev
)
501 struct rtw_lps_conf
*conf
= &rtwdev
->lps_conf
;
502 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
505 loc_pg
= rtw_get_rsvd_page_location(rtwdev
, RSVD_LPS_PG_INFO
);
506 loc_dpk
= rtw_get_rsvd_page_location(rtwdev
, RSVD_LPS_PG_DPK
);
508 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_LPS_PG_INFO
);
510 LPS_PG_INFO_LOC(h2c_pkt
, loc_pg
);
511 LPS_PG_DPK_LOC(h2c_pkt
, loc_dpk
);
512 LPS_PG_SEC_CAM_EN(h2c_pkt
, conf
->sec_cam_backup
);
514 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
517 void rtw_send_rsvd_page_h2c(struct rtw_dev
*rtwdev
)
519 u8 h2c_pkt
[H2C_PKT_SIZE
] = {0};
522 SET_H2C_CMD_ID_CLASS(h2c_pkt
, H2C_CMD_RSVD_PAGE
);
524 location
= rtw_get_rsvd_page_location(rtwdev
, RSVD_PROBE_RESP
);
525 *(h2c_pkt
+ 1) = location
;
526 rtw_dbg(rtwdev
, RTW_DBG_FW
, "RSVD_PROBE_RESP loc: %d\n", location
);
528 location
= rtw_get_rsvd_page_location(rtwdev
, RSVD_PS_POLL
);
529 *(h2c_pkt
+ 2) = location
;
530 rtw_dbg(rtwdev
, RTW_DBG_FW
, "RSVD_PS_POLL loc: %d\n", location
);
532 location
= rtw_get_rsvd_page_location(rtwdev
, RSVD_NULL
);
533 *(h2c_pkt
+ 3) = location
;
534 rtw_dbg(rtwdev
, RTW_DBG_FW
, "RSVD_NULL loc: %d\n", location
);
536 location
= rtw_get_rsvd_page_location(rtwdev
, RSVD_QOS_NULL
);
537 *(h2c_pkt
+ 4) = location
;
538 rtw_dbg(rtwdev
, RTW_DBG_FW
, "RSVD_QOS_NULL loc: %d\n", location
);
540 rtw_fw_send_h2c_command(rtwdev
, h2c_pkt
);
543 static struct sk_buff
*
544 rtw_beacon_get(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
)
546 struct sk_buff
*skb_new
;
548 if (vif
->type
!= NL80211_IFTYPE_AP
&&
549 vif
->type
!= NL80211_IFTYPE_ADHOC
&&
550 !ieee80211_vif_is_mesh(vif
)) {
551 skb_new
= alloc_skb(1, GFP_KERNEL
);
556 skb_new
= ieee80211_beacon_get(hw
, vif
);
562 static struct sk_buff
*rtw_lps_pg_dpk_get(struct ieee80211_hw
*hw
)
564 struct rtw_dev
*rtwdev
= hw
->priv
;
565 struct rtw_chip_info
*chip
= rtwdev
->chip
;
566 struct rtw_dpk_info
*dpk_info
= &rtwdev
->dm_info
.dpk_info
;
567 struct rtw_lps_pg_dpk_hdr
*dpk_hdr
;
571 size
= chip
->tx_pkt_desc_sz
+ sizeof(*dpk_hdr
);
572 skb
= alloc_skb(size
, GFP_KERNEL
);
576 skb_reserve(skb
, chip
->tx_pkt_desc_sz
);
577 dpk_hdr
= skb_put_zero(skb
, sizeof(*dpk_hdr
));
578 dpk_hdr
->dpk_ch
= dpk_info
->dpk_ch
;
579 dpk_hdr
->dpk_path_ok
= dpk_info
->dpk_path_ok
[0];
580 memcpy(dpk_hdr
->dpk_txagc
, dpk_info
->dpk_txagc
, 2);
581 memcpy(dpk_hdr
->dpk_gs
, dpk_info
->dpk_gs
, 4);
582 memcpy(dpk_hdr
->coef
, dpk_info
->coef
, 160);
587 static struct sk_buff
*rtw_lps_pg_info_get(struct ieee80211_hw
*hw
,
588 struct ieee80211_vif
*vif
)
590 struct rtw_dev
*rtwdev
= hw
->priv
;
591 struct rtw_chip_info
*chip
= rtwdev
->chip
;
592 struct rtw_lps_conf
*conf
= &rtwdev
->lps_conf
;
593 struct rtw_lps_pg_info_hdr
*pg_info_hdr
;
597 size
= chip
->tx_pkt_desc_sz
+ sizeof(*pg_info_hdr
);
598 skb
= alloc_skb(size
, GFP_KERNEL
);
602 skb_reserve(skb
, chip
->tx_pkt_desc_sz
);
603 pg_info_hdr
= skb_put_zero(skb
, sizeof(*pg_info_hdr
));
604 pg_info_hdr
->tx_bu_page_count
= rtwdev
->fifo
.rsvd_drv_pg_num
;
605 pg_info_hdr
->macid
= find_first_bit(rtwdev
->mac_id_map
, RTW_MAX_MAC_ID_NUM
);
606 pg_info_hdr
->sec_cam_count
=
607 rtw_sec_cam_pg_backup(rtwdev
, pg_info_hdr
->sec_cam
);
609 conf
->sec_cam_backup
= pg_info_hdr
->sec_cam_count
!= 0;
614 static struct sk_buff
*rtw_get_rsvd_page_skb(struct ieee80211_hw
*hw
,
615 struct ieee80211_vif
*vif
,
616 enum rtw_rsvd_packet_type type
)
618 struct sk_buff
*skb_new
;
622 skb_new
= rtw_beacon_get(hw
, vif
);
625 skb_new
= ieee80211_pspoll_get(hw
, vif
);
627 case RSVD_PROBE_RESP
:
628 skb_new
= ieee80211_proberesp_get(hw
, vif
);
631 skb_new
= ieee80211_nullfunc_get(hw
, vif
, false);
634 skb_new
= ieee80211_nullfunc_get(hw
, vif
, true);
636 case RSVD_LPS_PG_DPK
:
637 skb_new
= rtw_lps_pg_dpk_get(hw
);
639 case RSVD_LPS_PG_INFO
:
640 skb_new
= rtw_lps_pg_info_get(hw
, vif
);
652 static void rtw_fill_rsvd_page_desc(struct rtw_dev
*rtwdev
, struct sk_buff
*skb
)
654 struct rtw_tx_pkt_info pkt_info
;
655 struct rtw_chip_info
*chip
= rtwdev
->chip
;
658 memset(&pkt_info
, 0, sizeof(pkt_info
));
659 rtw_rsvd_page_pkt_info_update(rtwdev
, &pkt_info
, skb
);
660 pkt_desc
= skb_push(skb
, chip
->tx_pkt_desc_sz
);
661 memset(pkt_desc
, 0, chip
->tx_pkt_desc_sz
);
662 rtw_tx_fill_tx_desc(&pkt_info
, skb
);
665 static inline u8
rtw_len_to_page(unsigned int len
, u8 page_size
)
667 return DIV_ROUND_UP(len
, page_size
);
670 static void rtw_rsvd_page_list_to_buf(struct rtw_dev
*rtwdev
, u8 page_size
,
671 u8 page_margin
, u32 page
, u8
*buf
,
672 struct rtw_rsvd_page
*rsvd_pkt
)
674 struct sk_buff
*skb
= rsvd_pkt
->skb
;
677 memcpy(buf
+ page_margin
+ page_size
* (page
- 1),
678 skb
->data
, skb
->len
);
680 memcpy(buf
, skb
->data
, skb
->len
);
683 void rtw_add_rsvd_page(struct rtw_dev
*rtwdev
, enum rtw_rsvd_packet_type type
,
686 struct rtw_rsvd_page
*rsvd_pkt
;
688 lockdep_assert_held(&rtwdev
->mutex
);
690 list_for_each_entry(rsvd_pkt
, &rtwdev
->rsvd_page_list
, list
) {
691 if (rsvd_pkt
->type
== type
)
695 rsvd_pkt
= kmalloc(sizeof(*rsvd_pkt
), GFP_KERNEL
);
699 rsvd_pkt
->type
= type
;
700 rsvd_pkt
->add_txdesc
= txdesc
;
701 list_add_tail(&rsvd_pkt
->list
, &rtwdev
->rsvd_page_list
);
704 void rtw_reset_rsvd_page(struct rtw_dev
*rtwdev
)
706 struct rtw_rsvd_page
*rsvd_pkt
, *tmp
;
708 lockdep_assert_held(&rtwdev
->mutex
);
710 list_for_each_entry_safe(rsvd_pkt
, tmp
, &rtwdev
->rsvd_page_list
, list
) {
711 if (rsvd_pkt
->type
== RSVD_BEACON
)
713 list_del(&rsvd_pkt
->list
);
718 int rtw_fw_write_data_rsvd_page(struct rtw_dev
*rtwdev
, u16 pg_addr
,
726 lockdep_assert_held(&rtwdev
->mutex
);
731 pg_addr
&= BIT_MASK_BCN_HEAD_1_V1
;
732 rtw_write16(rtwdev
, REG_FIFOPAGE_CTRL_2
, pg_addr
| BIT_BCN_VALID_V1
);
734 val
= rtw_read8(rtwdev
, REG_CR
+ 1);
736 val
|= BIT_ENSWBCN
>> 8;
737 rtw_write8(rtwdev
, REG_CR
+ 1, val
);
739 val
= rtw_read8(rtwdev
, REG_FWHW_TXQ_CTRL
+ 2);
741 val
&= ~(BIT_EN_BCNQ_DL
>> 16);
742 rtw_write8(rtwdev
, REG_FWHW_TXQ_CTRL
+ 2, val
);
744 ret
= rtw_hci_write_data_rsvd_page(rtwdev
, buf
, size
);
746 rtw_err(rtwdev
, "failed to write data to rsvd page\n");
750 if (!check_hw_ready(rtwdev
, REG_FIFOPAGE_CTRL_2
, BIT_BCN_VALID_V1
, 1)) {
751 rtw_err(rtwdev
, "error beacon valid\n");
756 rsvd_pg_head
= rtwdev
->fifo
.rsvd_boundary
;
757 rtw_write16(rtwdev
, REG_FIFOPAGE_CTRL_2
,
758 rsvd_pg_head
| BIT_BCN_VALID_V1
);
759 rtw_write8(rtwdev
, REG_FWHW_TXQ_CTRL
+ 2, bckp
[1]);
760 rtw_write8(rtwdev
, REG_CR
+ 1, bckp
[0]);
765 static int rtw_download_drv_rsvd_page(struct rtw_dev
*rtwdev
, u8
*buf
, u32 size
)
771 pg_size
= rtwdev
->chip
->page_size
;
772 pg_num
= size
/ pg_size
+ ((size
& (pg_size
- 1)) ? 1 : 0);
773 if (pg_num
> rtwdev
->fifo
.rsvd_drv_pg_num
)
776 pg_addr
= rtwdev
->fifo
.rsvd_drv_addr
;
778 return rtw_fw_write_data_rsvd_page(rtwdev
, pg_addr
, buf
, size
);
781 static u8
*rtw_build_rsvd_page(struct rtw_dev
*rtwdev
,
782 struct ieee80211_vif
*vif
, u32
*size
)
784 struct ieee80211_hw
*hw
= rtwdev
->hw
;
785 struct rtw_chip_info
*chip
= rtwdev
->chip
;
786 struct sk_buff
*iter
;
787 struct rtw_rsvd_page
*rsvd_pkt
;
790 u8 page_size
, page_margin
, tx_desc_sz
;
793 page_size
= chip
->page_size
;
794 tx_desc_sz
= chip
->tx_pkt_desc_sz
;
795 page_margin
= page_size
- tx_desc_sz
;
797 list_for_each_entry(rsvd_pkt
, &rtwdev
->rsvd_page_list
, list
) {
798 iter
= rtw_get_rsvd_page_skb(hw
, vif
, rsvd_pkt
->type
);
800 rtw_err(rtwdev
, "failed to build rsvd packet\n");
804 /* Fill the tx_desc for the rsvd pkt that requires one.
805 * And iter->len will be added with size of tx_desc_sz.
807 if (rsvd_pkt
->add_txdesc
)
808 rtw_fill_rsvd_page_desc(rtwdev
, iter
);
810 rsvd_pkt
->skb
= iter
;
811 rsvd_pkt
->page
= total_page
;
813 /* Reserved page is downloaded via TX path, and TX path will
814 * generate a tx_desc at the header to describe length of
815 * the buffer. If we are not counting page numbers with the
816 * size of tx_desc added at the first rsvd_pkt (usually a
817 * beacon, firmware default refer to the first page as the
818 * content of beacon), we could generate a buffer which size
819 * is smaller than the actual size of the whole rsvd_page
821 if (total_page
== 0) {
822 if (rsvd_pkt
->type
!= RSVD_BEACON
) {
823 rtw_err(rtwdev
, "first page should be a beacon\n");
826 total_page
+= rtw_len_to_page(iter
->len
+ tx_desc_sz
,
829 total_page
+= rtw_len_to_page(iter
->len
, page_size
);
833 if (total_page
> rtwdev
->fifo
.rsvd_drv_pg_num
) {
834 rtw_err(rtwdev
, "rsvd page over size: %d\n", total_page
);
838 *size
= (total_page
- 1) * page_size
+ page_margin
;
839 buf
= kzalloc(*size
, GFP_KERNEL
);
843 /* Copy the content of each rsvd_pkt to the buf, and they should
844 * be aligned to the pages.
846 * Note that the first rsvd_pkt is a beacon no matter what vif->type.
847 * And that rsvd_pkt does not require tx_desc because when it goes
848 * through TX path, the TX path will generate one for it.
850 list_for_each_entry(rsvd_pkt
, &rtwdev
->rsvd_page_list
, list
) {
851 rtw_rsvd_page_list_to_buf(rtwdev
, page_size
, page_margin
,
852 page
, buf
, rsvd_pkt
);
854 page
+= rtw_len_to_page(rsvd_pkt
->skb
->len
+
855 tx_desc_sz
, page_size
);
857 page
+= rtw_len_to_page(rsvd_pkt
->skb
->len
, page_size
);
859 kfree_skb(rsvd_pkt
->skb
);
865 list_for_each_entry(rsvd_pkt
, &rtwdev
->rsvd_page_list
, list
)
866 kfree_skb(rsvd_pkt
->skb
);
872 rtw_download_beacon(struct rtw_dev
*rtwdev
, struct ieee80211_vif
*vif
)
874 struct ieee80211_hw
*hw
= rtwdev
->hw
;
878 skb
= rtw_beacon_get(hw
, vif
);
880 rtw_err(rtwdev
, "failed to get beacon skb\n");
885 ret
= rtw_download_drv_rsvd_page(rtwdev
, skb
->data
, skb
->len
);
887 rtw_err(rtwdev
, "failed to download drv rsvd page\n");
895 int rtw_fw_download_rsvd_page(struct rtw_dev
*rtwdev
, struct ieee80211_vif
*vif
)
901 buf
= rtw_build_rsvd_page(rtwdev
, vif
, &size
);
903 rtw_err(rtwdev
, "failed to build rsvd page pkt\n");
907 ret
= rtw_download_drv_rsvd_page(rtwdev
, buf
, size
);
909 rtw_err(rtwdev
, "failed to download drv rsvd page\n");
913 /* The last thing is to download the *ONLY* beacon again, because
914 * the previous tx_desc is to describe the total rsvd page. Download
915 * the beacon again to replace the TX desc header, and we will get
916 * a correct tx_desc for the beacon in the rsvd page.
918 ret
= rtw_download_beacon(rtwdev
, vif
);
920 rtw_err(rtwdev
, "failed to download beacon\n");
930 int rtw_dump_drv_rsvd_page(struct rtw_dev
*rtwdev
,
931 u32 offset
, u32 size
, u32
*buf
)
933 struct rtw_fifo_conf
*fifo
= &rtwdev
->fifo
;
941 rtw_warn(rtwdev
, "should be 4-byte aligned\n");
945 offset
+= fifo
->rsvd_boundary
<< TX_PAGE_SIZE_SHIFT
;
946 residue
= offset
& (FIFO_PAGE_SIZE
- 1);
947 start_pg
= offset
>> FIFO_PAGE_SIZE_SHIFT
;
948 start_pg
+= RSVD_PAGE_START_ADDR
;
950 rcr
= rtw_read8(rtwdev
, REG_RCR
+ 2);
951 ctl
= rtw_read16(rtwdev
, REG_PKTBUF_DBG_CTRL
) & 0xf000;
953 /* disable rx clock gate */
954 rtw_write8(rtwdev
, REG_RCR
, rcr
| BIT(3));
957 rtw_write16(rtwdev
, REG_PKTBUF_DBG_CTRL
, start_pg
| ctl
);
959 for (i
= FIFO_DUMP_ADDR
+ residue
;
960 i
< FIFO_DUMP_ADDR
+ FIFO_PAGE_SIZE
; i
+= 4) {
961 buf
[idx
++] = rtw_read32(rtwdev
, i
);
972 rtw_write16(rtwdev
, REG_PKTBUF_DBG_CTRL
, ctl
);
973 rtw_write8(rtwdev
, REG_RCR
+ 2, rcr
);