2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 Abstract: rt73usb device specific routines.
24 Supported chipsets: rt2571W & rt2671.
27 #include <linux/crc-itu-t.h>
28 #include <linux/delay.h>
29 #include <linux/etherdevice.h>
30 #include <linux/init.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/usb.h>
36 #include "rt2x00usb.h"
41 * All access to the CSR registers will go through the methods
42 * rt73usb_register_read and rt73usb_register_write.
43 * BBP and RF register require indirect register access,
44 * and use the CSR registers BBPCSR and RFCSR to achieve this.
45 * These indirect registers work with busy bits,
46 * and we will try maximal REGISTER_BUSY_COUNT times to access
47 * the register while taking a REGISTER_BUSY_DELAY us delay
48 * between each attampt. When the busy bit is still set at that time,
49 * the access attempt is considered to have failed,
50 * and we will print an error.
51 * The _lock versions must be used if you already hold the usb_cache_mutex
53 static inline void rt73usb_register_read(struct rt2x00_dev
*rt2x00dev
,
54 const unsigned int offset
, u32
*value
)
57 rt2x00usb_vendor_request_buff(rt2x00dev
, USB_MULTI_READ
,
58 USB_VENDOR_REQUEST_IN
, offset
,
59 ®
, sizeof(u32
), REGISTER_TIMEOUT
);
60 *value
= le32_to_cpu(reg
);
63 static inline void rt73usb_register_read_lock(struct rt2x00_dev
*rt2x00dev
,
64 const unsigned int offset
, u32
*value
)
67 rt2x00usb_vendor_req_buff_lock(rt2x00dev
, USB_MULTI_READ
,
68 USB_VENDOR_REQUEST_IN
, offset
,
69 ®
, sizeof(u32
), REGISTER_TIMEOUT
);
70 *value
= le32_to_cpu(reg
);
73 static inline void rt73usb_register_multiread(struct rt2x00_dev
*rt2x00dev
,
74 const unsigned int offset
,
75 void *value
, const u32 length
)
77 int timeout
= REGISTER_TIMEOUT
* (length
/ sizeof(u32
));
78 rt2x00usb_vendor_request_buff(rt2x00dev
, USB_MULTI_READ
,
79 USB_VENDOR_REQUEST_IN
, offset
,
80 value
, length
, timeout
);
83 static inline void rt73usb_register_write(struct rt2x00_dev
*rt2x00dev
,
84 const unsigned int offset
, u32 value
)
86 __le32 reg
= cpu_to_le32(value
);
87 rt2x00usb_vendor_request_buff(rt2x00dev
, USB_MULTI_WRITE
,
88 USB_VENDOR_REQUEST_OUT
, offset
,
89 ®
, sizeof(u32
), REGISTER_TIMEOUT
);
92 static inline void rt73usb_register_write_lock(struct rt2x00_dev
*rt2x00dev
,
93 const unsigned int offset
, u32 value
)
95 __le32 reg
= cpu_to_le32(value
);
96 rt2x00usb_vendor_req_buff_lock(rt2x00dev
, USB_MULTI_WRITE
,
97 USB_VENDOR_REQUEST_OUT
, offset
,
98 ®
, sizeof(u32
), REGISTER_TIMEOUT
);
101 static inline void rt73usb_register_multiwrite(struct rt2x00_dev
*rt2x00dev
,
102 const unsigned int offset
,
103 void *value
, const u32 length
)
105 int timeout
= REGISTER_TIMEOUT
* (length
/ sizeof(u32
));
106 rt2x00usb_vendor_request_buff(rt2x00dev
, USB_MULTI_WRITE
,
107 USB_VENDOR_REQUEST_OUT
, offset
,
108 value
, length
, timeout
);
111 static u32
rt73usb_bbp_check(struct rt2x00_dev
*rt2x00dev
)
116 for (i
= 0; i
< REGISTER_BUSY_COUNT
; i
++) {
117 rt73usb_register_read_lock(rt2x00dev
, PHY_CSR3
, ®
);
118 if (!rt2x00_get_field32(reg
, PHY_CSR3_BUSY
))
120 udelay(REGISTER_BUSY_DELAY
);
126 static void rt73usb_bbp_write(struct rt2x00_dev
*rt2x00dev
,
127 const unsigned int word
, const u8 value
)
131 mutex_lock(&rt2x00dev
->usb_cache_mutex
);
134 * Wait until the BBP becomes ready.
136 reg
= rt73usb_bbp_check(rt2x00dev
);
137 if (rt2x00_get_field32(reg
, PHY_CSR3_BUSY
)) {
138 ERROR(rt2x00dev
, "PHY_CSR3 register busy. Write failed.\n");
139 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
144 * Write the data into the BBP.
147 rt2x00_set_field32(®
, PHY_CSR3_VALUE
, value
);
148 rt2x00_set_field32(®
, PHY_CSR3_REGNUM
, word
);
149 rt2x00_set_field32(®
, PHY_CSR3_BUSY
, 1);
150 rt2x00_set_field32(®
, PHY_CSR3_READ_CONTROL
, 0);
152 rt73usb_register_write_lock(rt2x00dev
, PHY_CSR3
, reg
);
153 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
156 static void rt73usb_bbp_read(struct rt2x00_dev
*rt2x00dev
,
157 const unsigned int word
, u8
*value
)
161 mutex_lock(&rt2x00dev
->usb_cache_mutex
);
164 * Wait until the BBP becomes ready.
166 reg
= rt73usb_bbp_check(rt2x00dev
);
167 if (rt2x00_get_field32(reg
, PHY_CSR3_BUSY
)) {
168 ERROR(rt2x00dev
, "PHY_CSR3 register busy. Read failed.\n");
169 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
174 * Write the request into the BBP.
177 rt2x00_set_field32(®
, PHY_CSR3_REGNUM
, word
);
178 rt2x00_set_field32(®
, PHY_CSR3_BUSY
, 1);
179 rt2x00_set_field32(®
, PHY_CSR3_READ_CONTROL
, 1);
181 rt73usb_register_write_lock(rt2x00dev
, PHY_CSR3
, reg
);
184 * Wait until the BBP becomes ready.
186 reg
= rt73usb_bbp_check(rt2x00dev
);
187 if (rt2x00_get_field32(reg
, PHY_CSR3_BUSY
)) {
188 ERROR(rt2x00dev
, "PHY_CSR3 register busy. Read failed.\n");
193 *value
= rt2x00_get_field32(reg
, PHY_CSR3_VALUE
);
194 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
197 static void rt73usb_rf_write(struct rt2x00_dev
*rt2x00dev
,
198 const unsigned int word
, const u32 value
)
206 mutex_lock(&rt2x00dev
->usb_cache_mutex
);
208 for (i
= 0; i
< REGISTER_BUSY_COUNT
; i
++) {
209 rt73usb_register_read_lock(rt2x00dev
, PHY_CSR4
, ®
);
210 if (!rt2x00_get_field32(reg
, PHY_CSR4_BUSY
))
212 udelay(REGISTER_BUSY_DELAY
);
215 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
216 ERROR(rt2x00dev
, "PHY_CSR4 register busy. Write failed.\n");
221 rt2x00_set_field32(®
, PHY_CSR4_VALUE
, value
);
224 * RF5225 and RF2527 contain 21 bits per RF register value,
225 * all others contain 20 bits.
227 rt2x00_set_field32(®
, PHY_CSR4_NUMBER_OF_BITS
,
228 20 + (rt2x00_rf(&rt2x00dev
->chip
, RF5225
) ||
229 rt2x00_rf(&rt2x00dev
->chip
, RF2527
)));
230 rt2x00_set_field32(®
, PHY_CSR4_IF_SELECT
, 0);
231 rt2x00_set_field32(®
, PHY_CSR4_BUSY
, 1);
233 rt73usb_register_write_lock(rt2x00dev
, PHY_CSR4
, reg
);
234 rt2x00_rf_write(rt2x00dev
, word
, value
);
235 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
238 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
239 #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
241 static void rt73usb_read_csr(struct rt2x00_dev
*rt2x00dev
,
242 const unsigned int word
, u32
*data
)
244 rt73usb_register_read(rt2x00dev
, CSR_OFFSET(word
), data
);
247 static void rt73usb_write_csr(struct rt2x00_dev
*rt2x00dev
,
248 const unsigned int word
, u32 data
)
250 rt73usb_register_write(rt2x00dev
, CSR_OFFSET(word
), data
);
253 static const struct rt2x00debug rt73usb_rt2x00debug
= {
254 .owner
= THIS_MODULE
,
256 .read
= rt73usb_read_csr
,
257 .write
= rt73usb_write_csr
,
258 .word_size
= sizeof(u32
),
259 .word_count
= CSR_REG_SIZE
/ sizeof(u32
),
262 .read
= rt2x00_eeprom_read
,
263 .write
= rt2x00_eeprom_write
,
264 .word_size
= sizeof(u16
),
265 .word_count
= EEPROM_SIZE
/ sizeof(u16
),
268 .read
= rt73usb_bbp_read
,
269 .write
= rt73usb_bbp_write
,
270 .word_size
= sizeof(u8
),
271 .word_count
= BBP_SIZE
/ sizeof(u8
),
274 .read
= rt2x00_rf_read
,
275 .write
= rt73usb_rf_write
,
276 .word_size
= sizeof(u32
),
277 .word_count
= RF_SIZE
/ sizeof(u32
),
280 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
282 #ifdef CONFIG_RT73USB_LEDS
283 static void rt73usb_led_brightness(struct led_classdev
*led_cdev
,
284 enum led_brightness brightness
)
286 struct rt2x00_led
*led
=
287 container_of(led_cdev
, struct rt2x00_led
, led_dev
);
288 unsigned int enabled
= brightness
!= LED_OFF
;
289 unsigned int a_mode
=
290 (enabled
&& led
->rt2x00dev
->curr_band
== IEEE80211_BAND_5GHZ
);
291 unsigned int bg_mode
=
292 (enabled
&& led
->rt2x00dev
->curr_band
== IEEE80211_BAND_2GHZ
);
295 NOTICE(led
->rt2x00dev
,
296 "Ignoring LED brightness command for led %d\n",
301 if (led
->type
== LED_TYPE_RADIO
) {
302 rt2x00_set_field16(&led
->rt2x00dev
->led_mcu_reg
,
303 MCU_LEDCS_RADIO_STATUS
, enabled
);
305 rt2x00usb_vendor_request_sw(led
->rt2x00dev
, USB_LED_CONTROL
,
306 0, led
->rt2x00dev
->led_mcu_reg
,
308 } else if (led
->type
== LED_TYPE_ASSOC
) {
309 rt2x00_set_field16(&led
->rt2x00dev
->led_mcu_reg
,
310 MCU_LEDCS_LINK_BG_STATUS
, bg_mode
);
311 rt2x00_set_field16(&led
->rt2x00dev
->led_mcu_reg
,
312 MCU_LEDCS_LINK_A_STATUS
, a_mode
);
314 rt2x00usb_vendor_request_sw(led
->rt2x00dev
, USB_LED_CONTROL
,
315 0, led
->rt2x00dev
->led_mcu_reg
,
317 } else if (led
->type
== LED_TYPE_QUALITY
) {
319 * The brightness is divided into 6 levels (0 - 5),
320 * this means we need to convert the brightness
321 * argument into the matching level within that range.
323 rt2x00usb_vendor_request_sw(led
->rt2x00dev
, USB_LED_CONTROL
,
324 brightness
/ (LED_FULL
/ 6),
325 led
->rt2x00dev
->led_mcu_reg
,
330 #define rt73usb_led_brightness NULL
331 #endif /* CONFIG_RT73USB_LEDS */
334 * Configuration handlers.
336 static void rt73usb_config_intf(struct rt2x00_dev
*rt2x00dev
,
337 struct rt2x00_intf
*intf
,
338 struct rt2x00intf_conf
*conf
,
339 const unsigned int flags
)
341 unsigned int beacon_base
;
344 if (flags
& CONFIG_UPDATE_TYPE
) {
346 * Clear current synchronisation setup.
347 * For the Beacon base registers we only need to clear
348 * the first byte since that byte contains the VALID and OWNER
349 * bits which (when set to 0) will invalidate the entire beacon.
351 beacon_base
= HW_BEACON_OFFSET(intf
->beacon
->entry_idx
);
352 rt73usb_register_write(rt2x00dev
, beacon_base
, 0);
355 * Enable synchronisation.
357 rt73usb_register_read(rt2x00dev
, TXRX_CSR9
, ®
);
358 rt2x00_set_field32(®
, TXRX_CSR9_TSF_TICKING
, 1);
359 rt2x00_set_field32(®
, TXRX_CSR9_TSF_SYNC
, conf
->sync
);
360 rt2x00_set_field32(®
, TXRX_CSR9_TBTT_ENABLE
, 1);
361 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, reg
);
364 if (flags
& CONFIG_UPDATE_MAC
) {
365 reg
= le32_to_cpu(conf
->mac
[1]);
366 rt2x00_set_field32(®
, MAC_CSR3_UNICAST_TO_ME_MASK
, 0xff);
367 conf
->mac
[1] = cpu_to_le32(reg
);
369 rt73usb_register_multiwrite(rt2x00dev
, MAC_CSR2
,
370 conf
->mac
, sizeof(conf
->mac
));
373 if (flags
& CONFIG_UPDATE_BSSID
) {
374 reg
= le32_to_cpu(conf
->bssid
[1]);
375 rt2x00_set_field32(®
, MAC_CSR5_BSS_ID_MASK
, 3);
376 conf
->bssid
[1] = cpu_to_le32(reg
);
378 rt73usb_register_multiwrite(rt2x00dev
, MAC_CSR4
,
379 conf
->bssid
, sizeof(conf
->bssid
));
383 static int rt73usb_config_erp(struct rt2x00_dev
*rt2x00dev
,
384 struct rt2x00lib_erp
*erp
)
389 * When in atomic context, we should let rt2x00lib
390 * try this configuration again later.
395 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
396 rt2x00_set_field32(®
, TXRX_CSR0_RX_ACK_TIMEOUT
, erp
->ack_timeout
);
397 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
399 rt73usb_register_read(rt2x00dev
, TXRX_CSR4
, ®
);
400 rt2x00_set_field32(®
, TXRX_CSR4_AUTORESPOND_PREAMBLE
,
401 !!erp
->short_preamble
);
402 rt73usb_register_write(rt2x00dev
, TXRX_CSR4
, reg
);
407 static void rt73usb_config_phymode(struct rt2x00_dev
*rt2x00dev
,
408 const int basic_rate_mask
)
410 rt73usb_register_write(rt2x00dev
, TXRX_CSR5
, basic_rate_mask
);
413 static void rt73usb_config_channel(struct rt2x00_dev
*rt2x00dev
,
414 struct rf_channel
*rf
, const int txpower
)
420 rt2x00_set_field32(&rf
->rf3
, RF3_TXPOWER
, TXPOWER_TO_DEV(txpower
));
421 rt2x00_set_field32(&rf
->rf4
, RF4_FREQ_OFFSET
, rt2x00dev
->freq_offset
);
423 smart
= !(rt2x00_rf(&rt2x00dev
->chip
, RF5225
) ||
424 rt2x00_rf(&rt2x00dev
->chip
, RF2527
));
426 rt73usb_bbp_read(rt2x00dev
, 3, &r3
);
427 rt2x00_set_field8(&r3
, BBP_R3_SMART_MODE
, smart
);
428 rt73usb_bbp_write(rt2x00dev
, 3, r3
);
431 if (txpower
> MAX_TXPOWER
&& txpower
<= (MAX_TXPOWER
+ r94
))
432 r94
+= txpower
- MAX_TXPOWER
;
433 else if (txpower
< MIN_TXPOWER
&& txpower
>= (MIN_TXPOWER
- r94
))
435 rt73usb_bbp_write(rt2x00dev
, 94, r94
);
437 rt73usb_rf_write(rt2x00dev
, 1, rf
->rf1
);
438 rt73usb_rf_write(rt2x00dev
, 2, rf
->rf2
);
439 rt73usb_rf_write(rt2x00dev
, 3, rf
->rf3
& ~0x00000004);
440 rt73usb_rf_write(rt2x00dev
, 4, rf
->rf4
);
442 rt73usb_rf_write(rt2x00dev
, 1, rf
->rf1
);
443 rt73usb_rf_write(rt2x00dev
, 2, rf
->rf2
);
444 rt73usb_rf_write(rt2x00dev
, 3, rf
->rf3
| 0x00000004);
445 rt73usb_rf_write(rt2x00dev
, 4, rf
->rf4
);
447 rt73usb_rf_write(rt2x00dev
, 1, rf
->rf1
);
448 rt73usb_rf_write(rt2x00dev
, 2, rf
->rf2
);
449 rt73usb_rf_write(rt2x00dev
, 3, rf
->rf3
& ~0x00000004);
450 rt73usb_rf_write(rt2x00dev
, 4, rf
->rf4
);
455 static void rt73usb_config_txpower(struct rt2x00_dev
*rt2x00dev
,
458 struct rf_channel rf
;
460 rt2x00_rf_read(rt2x00dev
, 1, &rf
.rf1
);
461 rt2x00_rf_read(rt2x00dev
, 2, &rf
.rf2
);
462 rt2x00_rf_read(rt2x00dev
, 3, &rf
.rf3
);
463 rt2x00_rf_read(rt2x00dev
, 4, &rf
.rf4
);
465 rt73usb_config_channel(rt2x00dev
, &rf
, txpower
);
468 static void rt73usb_config_antenna_5x(struct rt2x00_dev
*rt2x00dev
,
469 struct antenna_setup
*ant
)
476 rt73usb_bbp_read(rt2x00dev
, 3, &r3
);
477 rt73usb_bbp_read(rt2x00dev
, 4, &r4
);
478 rt73usb_bbp_read(rt2x00dev
, 77, &r77
);
480 rt2x00_set_field8(&r3
, BBP_R3_SMART_MODE
, 0);
483 * Configure the RX antenna.
486 case ANTENNA_HW_DIVERSITY
:
487 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 2);
488 temp
= !test_bit(CONFIG_FRAME_TYPE
, &rt2x00dev
->flags
)
489 && (rt2x00dev
->curr_band
!= IEEE80211_BAND_5GHZ
);
490 rt2x00_set_field8(&r4
, BBP_R4_RX_FRAME_END
, temp
);
493 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 1);
494 rt2x00_set_field8(&r4
, BBP_R4_RX_FRAME_END
, 0);
495 if (rt2x00dev
->curr_band
== IEEE80211_BAND_5GHZ
)
496 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 0);
498 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 3);
502 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 1);
503 rt2x00_set_field8(&r4
, BBP_R4_RX_FRAME_END
, 0);
504 if (rt2x00dev
->curr_band
== IEEE80211_BAND_5GHZ
)
505 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 3);
507 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 0);
511 rt73usb_bbp_write(rt2x00dev
, 77, r77
);
512 rt73usb_bbp_write(rt2x00dev
, 3, r3
);
513 rt73usb_bbp_write(rt2x00dev
, 4, r4
);
516 static void rt73usb_config_antenna_2x(struct rt2x00_dev
*rt2x00dev
,
517 struct antenna_setup
*ant
)
523 rt73usb_bbp_read(rt2x00dev
, 3, &r3
);
524 rt73usb_bbp_read(rt2x00dev
, 4, &r4
);
525 rt73usb_bbp_read(rt2x00dev
, 77, &r77
);
527 rt2x00_set_field8(&r3
, BBP_R3_SMART_MODE
, 0);
528 rt2x00_set_field8(&r4
, BBP_R4_RX_FRAME_END
,
529 !test_bit(CONFIG_FRAME_TYPE
, &rt2x00dev
->flags
));
532 * Configure the RX antenna.
535 case ANTENNA_HW_DIVERSITY
:
536 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 2);
539 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 3);
540 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 1);
544 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 0);
545 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 1);
549 rt73usb_bbp_write(rt2x00dev
, 77, r77
);
550 rt73usb_bbp_write(rt2x00dev
, 3, r3
);
551 rt73usb_bbp_write(rt2x00dev
, 4, r4
);
557 * value[0] -> non-LNA
563 static const struct antenna_sel antenna_sel_a
[] = {
564 { 96, { 0x58, 0x78 } },
565 { 104, { 0x38, 0x48 } },
566 { 75, { 0xfe, 0x80 } },
567 { 86, { 0xfe, 0x80 } },
568 { 88, { 0xfe, 0x80 } },
569 { 35, { 0x60, 0x60 } },
570 { 97, { 0x58, 0x58 } },
571 { 98, { 0x58, 0x58 } },
574 static const struct antenna_sel antenna_sel_bg
[] = {
575 { 96, { 0x48, 0x68 } },
576 { 104, { 0x2c, 0x3c } },
577 { 75, { 0xfe, 0x80 } },
578 { 86, { 0xfe, 0x80 } },
579 { 88, { 0xfe, 0x80 } },
580 { 35, { 0x50, 0x50 } },
581 { 97, { 0x48, 0x48 } },
582 { 98, { 0x48, 0x48 } },
585 static void rt73usb_config_antenna(struct rt2x00_dev
*rt2x00dev
,
586 struct antenna_setup
*ant
)
588 const struct antenna_sel
*sel
;
594 * We should never come here because rt2x00lib is supposed
595 * to catch this and send us the correct antenna explicitely.
597 BUG_ON(ant
->rx
== ANTENNA_SW_DIVERSITY
||
598 ant
->tx
== ANTENNA_SW_DIVERSITY
);
600 if (rt2x00dev
->curr_band
== IEEE80211_BAND_5GHZ
) {
602 lna
= test_bit(CONFIG_EXTERNAL_LNA_A
, &rt2x00dev
->flags
);
604 sel
= antenna_sel_bg
;
605 lna
= test_bit(CONFIG_EXTERNAL_LNA_BG
, &rt2x00dev
->flags
);
608 for (i
= 0; i
< ARRAY_SIZE(antenna_sel_a
); i
++)
609 rt73usb_bbp_write(rt2x00dev
, sel
[i
].word
, sel
[i
].value
[lna
]);
611 rt73usb_register_read(rt2x00dev
, PHY_CSR0
, ®
);
613 rt2x00_set_field32(®
, PHY_CSR0_PA_PE_BG
,
614 (rt2x00dev
->curr_band
== IEEE80211_BAND_2GHZ
));
615 rt2x00_set_field32(®
, PHY_CSR0_PA_PE_A
,
616 (rt2x00dev
->curr_band
== IEEE80211_BAND_5GHZ
));
618 rt73usb_register_write(rt2x00dev
, PHY_CSR0
, reg
);
620 if (rt2x00_rf(&rt2x00dev
->chip
, RF5226
) ||
621 rt2x00_rf(&rt2x00dev
->chip
, RF5225
))
622 rt73usb_config_antenna_5x(rt2x00dev
, ant
);
623 else if (rt2x00_rf(&rt2x00dev
->chip
, RF2528
) ||
624 rt2x00_rf(&rt2x00dev
->chip
, RF2527
))
625 rt73usb_config_antenna_2x(rt2x00dev
, ant
);
628 static void rt73usb_config_duration(struct rt2x00_dev
*rt2x00dev
,
629 struct rt2x00lib_conf
*libconf
)
633 rt73usb_register_read(rt2x00dev
, MAC_CSR9
, ®
);
634 rt2x00_set_field32(®
, MAC_CSR9_SLOT_TIME
, libconf
->slot_time
);
635 rt73usb_register_write(rt2x00dev
, MAC_CSR9
, reg
);
637 rt73usb_register_read(rt2x00dev
, MAC_CSR8
, ®
);
638 rt2x00_set_field32(®
, MAC_CSR8_SIFS
, libconf
->sifs
);
639 rt2x00_set_field32(®
, MAC_CSR8_SIFS_AFTER_RX_OFDM
, 3);
640 rt2x00_set_field32(®
, MAC_CSR8_EIFS
, libconf
->eifs
);
641 rt73usb_register_write(rt2x00dev
, MAC_CSR8
, reg
);
643 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
644 rt2x00_set_field32(®
, TXRX_CSR0_TSF_OFFSET
, IEEE80211_HEADER
);
645 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
647 rt73usb_register_read(rt2x00dev
, TXRX_CSR4
, ®
);
648 rt2x00_set_field32(®
, TXRX_CSR4_AUTORESPOND_ENABLE
, 1);
649 rt73usb_register_write(rt2x00dev
, TXRX_CSR4
, reg
);
651 rt73usb_register_read(rt2x00dev
, TXRX_CSR9
, ®
);
652 rt2x00_set_field32(®
, TXRX_CSR9_BEACON_INTERVAL
,
653 libconf
->conf
->beacon_int
* 16);
654 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, reg
);
657 static void rt73usb_config(struct rt2x00_dev
*rt2x00dev
,
658 struct rt2x00lib_conf
*libconf
,
659 const unsigned int flags
)
661 if (flags
& CONFIG_UPDATE_PHYMODE
)
662 rt73usb_config_phymode(rt2x00dev
, libconf
->basic_rates
);
663 if (flags
& CONFIG_UPDATE_CHANNEL
)
664 rt73usb_config_channel(rt2x00dev
, &libconf
->rf
,
665 libconf
->conf
->power_level
);
666 if ((flags
& CONFIG_UPDATE_TXPOWER
) && !(flags
& CONFIG_UPDATE_CHANNEL
))
667 rt73usb_config_txpower(rt2x00dev
, libconf
->conf
->power_level
);
668 if (flags
& CONFIG_UPDATE_ANTENNA
)
669 rt73usb_config_antenna(rt2x00dev
, &libconf
->ant
);
670 if (flags
& (CONFIG_UPDATE_SLOT_TIME
| CONFIG_UPDATE_BEACON_INT
))
671 rt73usb_config_duration(rt2x00dev
, libconf
);
677 static void rt73usb_link_stats(struct rt2x00_dev
*rt2x00dev
,
678 struct link_qual
*qual
)
683 * Update FCS error count from register.
685 rt73usb_register_read(rt2x00dev
, STA_CSR0
, ®
);
686 qual
->rx_failed
= rt2x00_get_field32(reg
, STA_CSR0_FCS_ERROR
);
689 * Update False CCA count from register.
691 rt73usb_register_read(rt2x00dev
, STA_CSR1
, ®
);
692 qual
->false_cca
= rt2x00_get_field32(reg
, STA_CSR1_FALSE_CCA_ERROR
);
695 static void rt73usb_reset_tuner(struct rt2x00_dev
*rt2x00dev
)
697 rt73usb_bbp_write(rt2x00dev
, 17, 0x20);
698 rt2x00dev
->link
.vgc_level
= 0x20;
701 static void rt73usb_link_tuner(struct rt2x00_dev
*rt2x00dev
)
703 int rssi
= rt2x00_get_link_rssi(&rt2x00dev
->link
);
708 rt73usb_bbp_read(rt2x00dev
, 17, &r17
);
711 * Determine r17 bounds.
713 if (rt2x00dev
->rx_status
.band
== IEEE80211_BAND_5GHZ
) {
717 if (test_bit(CONFIG_EXTERNAL_LNA_A
, &rt2x00dev
->flags
)) {
725 } else if (rssi
> -84) {
733 if (test_bit(CONFIG_EXTERNAL_LNA_BG
, &rt2x00dev
->flags
)) {
740 * If we are not associated, we should go straight to the
741 * dynamic CCA tuning.
743 if (!rt2x00dev
->intf_associated
)
744 goto dynamic_cca_tune
;
747 * Special big-R17 for very short distance
751 rt73usb_bbp_write(rt2x00dev
, 17, 0x60);
756 * Special big-R17 for short distance
760 rt73usb_bbp_write(rt2x00dev
, 17, up_bound
);
765 * Special big-R17 for middle-short distance
769 if (r17
!= low_bound
)
770 rt73usb_bbp_write(rt2x00dev
, 17, low_bound
);
775 * Special mid-R17 for middle distance
778 if (r17
!= (low_bound
+ 0x10))
779 rt73usb_bbp_write(rt2x00dev
, 17, low_bound
+ 0x08);
784 * Special case: Change up_bound based on the rssi.
785 * Lower up_bound when rssi is weaker then -74 dBm.
787 up_bound
-= 2 * (-74 - rssi
);
788 if (low_bound
> up_bound
)
789 up_bound
= low_bound
;
791 if (r17
> up_bound
) {
792 rt73usb_bbp_write(rt2x00dev
, 17, up_bound
);
799 * r17 does not yet exceed upper limit, continue and base
800 * the r17 tuning on the false CCA count.
802 if (rt2x00dev
->link
.qual
.false_cca
> 512 && r17
< up_bound
) {
806 rt73usb_bbp_write(rt2x00dev
, 17, r17
);
807 } else if (rt2x00dev
->link
.qual
.false_cca
< 100 && r17
> low_bound
) {
811 rt73usb_bbp_write(rt2x00dev
, 17, r17
);
818 static char *rt73usb_get_firmware_name(struct rt2x00_dev
*rt2x00dev
)
820 return FIRMWARE_RT2571
;
823 static u16
rt73usb_get_firmware_crc(void *data
, const size_t len
)
828 * Use the crc itu-t algorithm.
829 * The last 2 bytes in the firmware array are the crc checksum itself,
830 * this means that we should never pass those 2 bytes to the crc
833 crc
= crc_itu_t(0, data
, len
- 2);
834 crc
= crc_itu_t_byte(crc
, 0);
835 crc
= crc_itu_t_byte(crc
, 0);
840 static int rt73usb_load_firmware(struct rt2x00_dev
*rt2x00dev
, void *data
,
852 * Wait for stable hardware.
854 for (i
= 0; i
< 100; i
++) {
855 rt73usb_register_read(rt2x00dev
, MAC_CSR0
, ®
);
862 ERROR(rt2x00dev
, "Unstable hardware.\n");
867 * Write firmware to device.
868 * We setup a seperate cache for this action,
869 * since we are going to write larger chunks of data
870 * then normally used cache size.
872 cache
= kmalloc(CSR_CACHE_SIZE_FIRMWARE
, GFP_KERNEL
);
874 ERROR(rt2x00dev
, "Failed to allocate firmware cache.\n");
878 for (i
= 0; i
< len
; i
+= CSR_CACHE_SIZE_FIRMWARE
) {
879 buflen
= min_t(int, len
- i
, CSR_CACHE_SIZE_FIRMWARE
);
880 timeout
= REGISTER_TIMEOUT
* (buflen
/ sizeof(u32
));
882 memcpy(cache
, ptr
, buflen
);
884 rt2x00usb_vendor_request(rt2x00dev
, USB_MULTI_WRITE
,
885 USB_VENDOR_REQUEST_OUT
,
886 FIRMWARE_IMAGE_BASE
+ i
, 0,
887 cache
, buflen
, timeout
);
895 * Send firmware request to device to load firmware,
896 * we need to specify a long timeout time.
898 status
= rt2x00usb_vendor_request_sw(rt2x00dev
, USB_DEVICE_MODE
,
899 0, USB_MODE_FIRMWARE
,
900 REGISTER_TIMEOUT_FIRMWARE
);
902 ERROR(rt2x00dev
, "Failed to write Firmware to device.\n");
910 * Initialization functions.
912 static int rt73usb_init_registers(struct rt2x00_dev
*rt2x00dev
)
916 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
917 rt2x00_set_field32(®
, TXRX_CSR0_AUTO_TX_SEQ
, 1);
918 rt2x00_set_field32(®
, TXRX_CSR0_DISABLE_RX
, 0);
919 rt2x00_set_field32(®
, TXRX_CSR0_TX_WITHOUT_WAITING
, 0);
920 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
922 rt73usb_register_read(rt2x00dev
, TXRX_CSR1
, ®
);
923 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID0
, 47); /* CCK Signal */
924 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID0_VALID
, 1);
925 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID1
, 30); /* Rssi */
926 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID1_VALID
, 1);
927 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID2
, 42); /* OFDM Rate */
928 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID2_VALID
, 1);
929 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID3
, 30); /* Rssi */
930 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID3_VALID
, 1);
931 rt73usb_register_write(rt2x00dev
, TXRX_CSR1
, reg
);
934 * CCK TXD BBP registers
936 rt73usb_register_read(rt2x00dev
, TXRX_CSR2
, ®
);
937 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID0
, 13);
938 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID0_VALID
, 1);
939 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID1
, 12);
940 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID1_VALID
, 1);
941 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID2
, 11);
942 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID2_VALID
, 1);
943 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID3
, 10);
944 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID3_VALID
, 1);
945 rt73usb_register_write(rt2x00dev
, TXRX_CSR2
, reg
);
948 * OFDM TXD BBP registers
950 rt73usb_register_read(rt2x00dev
, TXRX_CSR3
, ®
);
951 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID0
, 7);
952 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID0_VALID
, 1);
953 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID1
, 6);
954 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID1_VALID
, 1);
955 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID2
, 5);
956 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID2_VALID
, 1);
957 rt73usb_register_write(rt2x00dev
, TXRX_CSR3
, reg
);
959 rt73usb_register_read(rt2x00dev
, TXRX_CSR7
, ®
);
960 rt2x00_set_field32(®
, TXRX_CSR7_ACK_CTS_6MBS
, 59);
961 rt2x00_set_field32(®
, TXRX_CSR7_ACK_CTS_9MBS
, 53);
962 rt2x00_set_field32(®
, TXRX_CSR7_ACK_CTS_12MBS
, 49);
963 rt2x00_set_field32(®
, TXRX_CSR7_ACK_CTS_18MBS
, 46);
964 rt73usb_register_write(rt2x00dev
, TXRX_CSR7
, reg
);
966 rt73usb_register_read(rt2x00dev
, TXRX_CSR8
, ®
);
967 rt2x00_set_field32(®
, TXRX_CSR8_ACK_CTS_24MBS
, 44);
968 rt2x00_set_field32(®
, TXRX_CSR8_ACK_CTS_36MBS
, 42);
969 rt2x00_set_field32(®
, TXRX_CSR8_ACK_CTS_48MBS
, 42);
970 rt2x00_set_field32(®
, TXRX_CSR8_ACK_CTS_54MBS
, 42);
971 rt73usb_register_write(rt2x00dev
, TXRX_CSR8
, reg
);
973 rt73usb_register_write(rt2x00dev
, TXRX_CSR15
, 0x0000000f);
975 rt73usb_register_read(rt2x00dev
, MAC_CSR6
, ®
);
976 rt2x00_set_field32(®
, MAC_CSR6_MAX_FRAME_UNIT
, 0xfff);
977 rt73usb_register_write(rt2x00dev
, MAC_CSR6
, reg
);
979 rt73usb_register_write(rt2x00dev
, MAC_CSR10
, 0x00000718);
981 if (rt2x00dev
->ops
->lib
->set_device_state(rt2x00dev
, STATE_AWAKE
))
984 rt73usb_register_write(rt2x00dev
, MAC_CSR13
, 0x00007f00);
986 rt73usb_register_read(rt2x00dev
, MAC_CSR14
, ®
);
987 rt2x00_set_field32(®
, MAC_CSR14_ON_PERIOD
, 70);
988 rt2x00_set_field32(®
, MAC_CSR14_OFF_PERIOD
, 30);
989 rt73usb_register_write(rt2x00dev
, MAC_CSR14
, reg
);
992 * Invalidate all Shared Keys (SEC_CSR0),
993 * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
995 rt73usb_register_write(rt2x00dev
, SEC_CSR0
, 0x00000000);
996 rt73usb_register_write(rt2x00dev
, SEC_CSR1
, 0x00000000);
997 rt73usb_register_write(rt2x00dev
, SEC_CSR5
, 0x00000000);
1000 if (rt2x00_rf(&rt2x00dev
->chip
, RF5225
) ||
1001 rt2x00_rf(&rt2x00dev
->chip
, RF2527
))
1002 rt2x00_set_field32(®
, PHY_CSR1_RF_RPI
, 1);
1003 rt73usb_register_write(rt2x00dev
, PHY_CSR1
, reg
);
1005 rt73usb_register_write(rt2x00dev
, PHY_CSR5
, 0x00040a06);
1006 rt73usb_register_write(rt2x00dev
, PHY_CSR6
, 0x00080606);
1007 rt73usb_register_write(rt2x00dev
, PHY_CSR7
, 0x00000408);
1009 rt73usb_register_read(rt2x00dev
, AC_TXOP_CSR0
, ®
);
1010 rt2x00_set_field32(®
, AC_TXOP_CSR0_AC0_TX_OP
, 0);
1011 rt2x00_set_field32(®
, AC_TXOP_CSR0_AC1_TX_OP
, 0);
1012 rt73usb_register_write(rt2x00dev
, AC_TXOP_CSR0
, reg
);
1014 rt73usb_register_read(rt2x00dev
, AC_TXOP_CSR1
, ®
);
1015 rt2x00_set_field32(®
, AC_TXOP_CSR1_AC2_TX_OP
, 192);
1016 rt2x00_set_field32(®
, AC_TXOP_CSR1_AC3_TX_OP
, 48);
1017 rt73usb_register_write(rt2x00dev
, AC_TXOP_CSR1
, reg
);
1019 rt73usb_register_read(rt2x00dev
, MAC_CSR9
, ®
);
1020 rt2x00_set_field32(®
, MAC_CSR9_CW_SELECT
, 0);
1021 rt73usb_register_write(rt2x00dev
, MAC_CSR9
, reg
);
1025 * For the Beacon base registers we only need to clear
1026 * the first byte since that byte contains the VALID and OWNER
1027 * bits which (when set to 0) will invalidate the entire beacon.
1029 rt73usb_register_write(rt2x00dev
, HW_BEACON_BASE0
, 0);
1030 rt73usb_register_write(rt2x00dev
, HW_BEACON_BASE1
, 0);
1031 rt73usb_register_write(rt2x00dev
, HW_BEACON_BASE2
, 0);
1032 rt73usb_register_write(rt2x00dev
, HW_BEACON_BASE3
, 0);
1035 * We must clear the error counters.
1036 * These registers are cleared on read,
1037 * so we may pass a useless variable to store the value.
1039 rt73usb_register_read(rt2x00dev
, STA_CSR0
, ®
);
1040 rt73usb_register_read(rt2x00dev
, STA_CSR1
, ®
);
1041 rt73usb_register_read(rt2x00dev
, STA_CSR2
, ®
);
1044 * Reset MAC and BBP registers.
1046 rt73usb_register_read(rt2x00dev
, MAC_CSR1
, ®
);
1047 rt2x00_set_field32(®
, MAC_CSR1_SOFT_RESET
, 1);
1048 rt2x00_set_field32(®
, MAC_CSR1_BBP_RESET
, 1);
1049 rt73usb_register_write(rt2x00dev
, MAC_CSR1
, reg
);
1051 rt73usb_register_read(rt2x00dev
, MAC_CSR1
, ®
);
1052 rt2x00_set_field32(®
, MAC_CSR1_SOFT_RESET
, 0);
1053 rt2x00_set_field32(®
, MAC_CSR1_BBP_RESET
, 0);
1054 rt73usb_register_write(rt2x00dev
, MAC_CSR1
, reg
);
1056 rt73usb_register_read(rt2x00dev
, MAC_CSR1
, ®
);
1057 rt2x00_set_field32(®
, MAC_CSR1_HOST_READY
, 1);
1058 rt73usb_register_write(rt2x00dev
, MAC_CSR1
, reg
);
1063 static int rt73usb_init_bbp(struct rt2x00_dev
*rt2x00dev
)
1070 for (i
= 0; i
< REGISTER_BUSY_COUNT
; i
++) {
1071 rt73usb_bbp_read(rt2x00dev
, 0, &value
);
1072 if ((value
!= 0xff) && (value
!= 0x00))
1073 goto continue_csr_init
;
1074 NOTICE(rt2x00dev
, "Waiting for BBP register.\n");
1075 udelay(REGISTER_BUSY_DELAY
);
1078 ERROR(rt2x00dev
, "BBP register access failed, aborting.\n");
1082 rt73usb_bbp_write(rt2x00dev
, 3, 0x80);
1083 rt73usb_bbp_write(rt2x00dev
, 15, 0x30);
1084 rt73usb_bbp_write(rt2x00dev
, 21, 0xc8);
1085 rt73usb_bbp_write(rt2x00dev
, 22, 0x38);
1086 rt73usb_bbp_write(rt2x00dev
, 23, 0x06);
1087 rt73usb_bbp_write(rt2x00dev
, 24, 0xfe);
1088 rt73usb_bbp_write(rt2x00dev
, 25, 0x0a);
1089 rt73usb_bbp_write(rt2x00dev
, 26, 0x0d);
1090 rt73usb_bbp_write(rt2x00dev
, 32, 0x0b);
1091 rt73usb_bbp_write(rt2x00dev
, 34, 0x12);
1092 rt73usb_bbp_write(rt2x00dev
, 37, 0x07);
1093 rt73usb_bbp_write(rt2x00dev
, 39, 0xf8);
1094 rt73usb_bbp_write(rt2x00dev
, 41, 0x60);
1095 rt73usb_bbp_write(rt2x00dev
, 53, 0x10);
1096 rt73usb_bbp_write(rt2x00dev
, 54, 0x18);
1097 rt73usb_bbp_write(rt2x00dev
, 60, 0x10);
1098 rt73usb_bbp_write(rt2x00dev
, 61, 0x04);
1099 rt73usb_bbp_write(rt2x00dev
, 62, 0x04);
1100 rt73usb_bbp_write(rt2x00dev
, 75, 0xfe);
1101 rt73usb_bbp_write(rt2x00dev
, 86, 0xfe);
1102 rt73usb_bbp_write(rt2x00dev
, 88, 0xfe);
1103 rt73usb_bbp_write(rt2x00dev
, 90, 0x0f);
1104 rt73usb_bbp_write(rt2x00dev
, 99, 0x00);
1105 rt73usb_bbp_write(rt2x00dev
, 102, 0x16);
1106 rt73usb_bbp_write(rt2x00dev
, 107, 0x04);
1108 for (i
= 0; i
< EEPROM_BBP_SIZE
; i
++) {
1109 rt2x00_eeprom_read(rt2x00dev
, EEPROM_BBP_START
+ i
, &eeprom
);
1111 if (eeprom
!= 0xffff && eeprom
!= 0x0000) {
1112 reg_id
= rt2x00_get_field16(eeprom
, EEPROM_BBP_REG_ID
);
1113 value
= rt2x00_get_field16(eeprom
, EEPROM_BBP_VALUE
);
1114 rt73usb_bbp_write(rt2x00dev
, reg_id
, value
);
1122 * Device state switch handlers.
1124 static void rt73usb_toggle_rx(struct rt2x00_dev
*rt2x00dev
,
1125 enum dev_state state
)
1129 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
1130 rt2x00_set_field32(®
, TXRX_CSR0_DISABLE_RX
,
1131 state
== STATE_RADIO_RX_OFF
);
1132 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
1135 static int rt73usb_enable_radio(struct rt2x00_dev
*rt2x00dev
)
1138 * Initialize all registers.
1140 if (rt73usb_init_registers(rt2x00dev
) ||
1141 rt73usb_init_bbp(rt2x00dev
)) {
1142 ERROR(rt2x00dev
, "Register initialization failed.\n");
1149 static void rt73usb_disable_radio(struct rt2x00_dev
*rt2x00dev
)
1151 rt73usb_register_write(rt2x00dev
, MAC_CSR10
, 0x00001818);
1154 * Disable synchronisation.
1156 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, 0);
1158 rt2x00usb_disable_radio(rt2x00dev
);
1161 static int rt73usb_set_state(struct rt2x00_dev
*rt2x00dev
, enum dev_state state
)
1168 put_to_sleep
= (state
!= STATE_AWAKE
);
1170 rt73usb_register_read(rt2x00dev
, MAC_CSR12
, ®
);
1171 rt2x00_set_field32(®
, MAC_CSR12_FORCE_WAKEUP
, !put_to_sleep
);
1172 rt2x00_set_field32(®
, MAC_CSR12_PUT_TO_SLEEP
, put_to_sleep
);
1173 rt73usb_register_write(rt2x00dev
, MAC_CSR12
, reg
);
1176 * Device is not guaranteed to be in the requested state yet.
1177 * We must wait until the register indicates that the
1178 * device has entered the correct state.
1180 for (i
= 0; i
< REGISTER_BUSY_COUNT
; i
++) {
1181 rt73usb_register_read(rt2x00dev
, MAC_CSR12
, ®
);
1183 rt2x00_get_field32(reg
, MAC_CSR12_BBP_CURRENT_STATE
);
1184 if (current_state
== !put_to_sleep
)
1189 NOTICE(rt2x00dev
, "Device failed to enter state %d, "
1190 "current device state %d.\n", !put_to_sleep
, current_state
);
1195 static int rt73usb_set_device_state(struct rt2x00_dev
*rt2x00dev
,
1196 enum dev_state state
)
1201 case STATE_RADIO_ON
:
1202 retval
= rt73usb_enable_radio(rt2x00dev
);
1204 case STATE_RADIO_OFF
:
1205 rt73usb_disable_radio(rt2x00dev
);
1207 case STATE_RADIO_RX_ON
:
1208 case STATE_RADIO_RX_ON_LINK
:
1209 rt73usb_toggle_rx(rt2x00dev
, STATE_RADIO_RX_ON
);
1211 case STATE_RADIO_RX_OFF
:
1212 case STATE_RADIO_RX_OFF_LINK
:
1213 rt73usb_toggle_rx(rt2x00dev
, STATE_RADIO_RX_OFF
);
1215 case STATE_DEEP_SLEEP
:
1219 retval
= rt73usb_set_state(rt2x00dev
, state
);
1230 * TX descriptor initialization
1232 static void rt73usb_write_tx_desc(struct rt2x00_dev
*rt2x00dev
,
1233 struct sk_buff
*skb
,
1234 struct txentry_desc
*txdesc
,
1235 struct ieee80211_tx_control
*control
)
1237 struct skb_frame_desc
*skbdesc
= get_skb_frame_desc(skb
);
1238 __le32
*txd
= skbdesc
->desc
;
1242 * Start writing the descriptor words.
1244 rt2x00_desc_read(txd
, 1, &word
);
1245 rt2x00_set_field32(&word
, TXD_W1_HOST_Q_ID
, txdesc
->queue
);
1246 rt2x00_set_field32(&word
, TXD_W1_AIFSN
, txdesc
->aifs
);
1247 rt2x00_set_field32(&word
, TXD_W1_CWMIN
, txdesc
->cw_min
);
1248 rt2x00_set_field32(&word
, TXD_W1_CWMAX
, txdesc
->cw_max
);
1249 rt2x00_set_field32(&word
, TXD_W1_IV_OFFSET
, IEEE80211_HEADER
);
1250 rt2x00_set_field32(&word
, TXD_W1_HW_SEQUENCE
, 1);
1251 rt2x00_desc_write(txd
, 1, word
);
1253 rt2x00_desc_read(txd
, 2, &word
);
1254 rt2x00_set_field32(&word
, TXD_W2_PLCP_SIGNAL
, txdesc
->signal
);
1255 rt2x00_set_field32(&word
, TXD_W2_PLCP_SERVICE
, txdesc
->service
);
1256 rt2x00_set_field32(&word
, TXD_W2_PLCP_LENGTH_LOW
, txdesc
->length_low
);
1257 rt2x00_set_field32(&word
, TXD_W2_PLCP_LENGTH_HIGH
, txdesc
->length_high
);
1258 rt2x00_desc_write(txd
, 2, word
);
1260 rt2x00_desc_read(txd
, 5, &word
);
1261 rt2x00_set_field32(&word
, TXD_W5_TX_POWER
,
1262 TXPOWER_TO_DEV(rt2x00dev
->tx_power
));
1263 rt2x00_set_field32(&word
, TXD_W5_WAITING_DMA_DONE_INT
, 1);
1264 rt2x00_desc_write(txd
, 5, word
);
1266 rt2x00_desc_read(txd
, 0, &word
);
1267 rt2x00_set_field32(&word
, TXD_W0_BURST
,
1268 test_bit(ENTRY_TXD_BURST
, &txdesc
->flags
));
1269 rt2x00_set_field32(&word
, TXD_W0_VALID
, 1);
1270 rt2x00_set_field32(&word
, TXD_W0_MORE_FRAG
,
1271 test_bit(ENTRY_TXD_MORE_FRAG
, &txdesc
->flags
));
1272 rt2x00_set_field32(&word
, TXD_W0_ACK
,
1273 test_bit(ENTRY_TXD_ACK
, &txdesc
->flags
));
1274 rt2x00_set_field32(&word
, TXD_W0_TIMESTAMP
,
1275 test_bit(ENTRY_TXD_REQ_TIMESTAMP
, &txdesc
->flags
));
1276 rt2x00_set_field32(&word
, TXD_W0_OFDM
,
1277 test_bit(ENTRY_TXD_OFDM_RATE
, &txdesc
->flags
));
1278 rt2x00_set_field32(&word
, TXD_W0_IFS
, txdesc
->ifs
);
1279 rt2x00_set_field32(&word
, TXD_W0_RETRY_MODE
,
1281 IEEE80211_TXCTL_LONG_RETRY_LIMIT
));
1282 rt2x00_set_field32(&word
, TXD_W0_TKIP_MIC
, 0);
1283 rt2x00_set_field32(&word
, TXD_W0_DATABYTE_COUNT
, skbdesc
->data_len
);
1284 rt2x00_set_field32(&word
, TXD_W0_BURST2
,
1285 test_bit(ENTRY_TXD_BURST
, &txdesc
->flags
));
1286 rt2x00_set_field32(&word
, TXD_W0_CIPHER_ALG
, CIPHER_NONE
);
1287 rt2x00_desc_write(txd
, 0, word
);
1290 static int rt73usb_get_tx_data_len(struct rt2x00_dev
*rt2x00dev
,
1291 struct sk_buff
*skb
)
1296 * The length _must_ be a multiple of 4,
1297 * but it must _not_ be a multiple of the USB packet size.
1299 length
= roundup(skb
->len
, 4);
1300 length
+= (4 * !(length
% rt2x00dev
->usb_maxpacket
));
1306 * TX data initialization
1308 static void rt73usb_kick_tx_queue(struct rt2x00_dev
*rt2x00dev
,
1309 const unsigned int queue
)
1313 if (queue
!= RT2X00_BCN_QUEUE_BEACON
)
1317 * For Wi-Fi faily generated beacons between participating stations.
1318 * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1320 rt73usb_register_write(rt2x00dev
, TXRX_CSR10
, 0x00001008);
1322 rt73usb_register_read(rt2x00dev
, TXRX_CSR9
, ®
);
1323 if (!rt2x00_get_field32(reg
, TXRX_CSR9_BEACON_GEN
)) {
1324 rt2x00_set_field32(®
, TXRX_CSR9_TSF_TICKING
, 1);
1325 rt2x00_set_field32(®
, TXRX_CSR9_TBTT_ENABLE
, 1);
1326 rt2x00_set_field32(®
, TXRX_CSR9_BEACON_GEN
, 1);
1327 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, reg
);
1332 * RX control handlers
1334 static int rt73usb_agc_to_rssi(struct rt2x00_dev
*rt2x00dev
, int rxd_w1
)
1340 lna
= rt2x00_get_field32(rxd_w1
, RXD_W1_RSSI_LNA
);
1355 if (rt2x00dev
->rx_status
.band
== IEEE80211_BAND_5GHZ
) {
1356 if (test_bit(CONFIG_EXTERNAL_LNA_A
, &rt2x00dev
->flags
)) {
1357 if (lna
== 3 || lna
== 2)
1366 rt2x00_eeprom_read(rt2x00dev
, EEPROM_RSSI_OFFSET_A
, &eeprom
);
1367 offset
-= rt2x00_get_field16(eeprom
, EEPROM_RSSI_OFFSET_A_1
);
1369 if (test_bit(CONFIG_EXTERNAL_LNA_BG
, &rt2x00dev
->flags
))
1372 rt2x00_eeprom_read(rt2x00dev
, EEPROM_RSSI_OFFSET_BG
, &eeprom
);
1373 offset
-= rt2x00_get_field16(eeprom
, EEPROM_RSSI_OFFSET_BG_1
);
1376 return rt2x00_get_field32(rxd_w1
, RXD_W1_RSSI_AGC
) * 2 - offset
;
1379 static void rt73usb_fill_rxdone(struct queue_entry
*entry
,
1380 struct rxdone_entry_desc
*rxdesc
)
1382 struct skb_frame_desc
*skbdesc
= get_skb_frame_desc(entry
->skb
);
1383 __le32
*rxd
= (__le32
*)entry
->skb
->data
;
1384 unsigned int offset
= entry
->queue
->desc_size
+ 2;
1389 * Copy descriptor to the available headroom inside the skbuffer.
1391 skb_push(entry
->skb
, offset
);
1392 memcpy(entry
->skb
->data
, rxd
, entry
->queue
->desc_size
);
1393 rxd
= (__le32
*)entry
->skb
->data
;
1396 * The descriptor is now aligned to 4 bytes and thus it is
1397 * now safe to read it on all architectures.
1399 rt2x00_desc_read(rxd
, 0, &word0
);
1400 rt2x00_desc_read(rxd
, 1, &word1
);
1403 if (rt2x00_get_field32(word0
, RXD_W0_CRC_ERROR
))
1404 rxdesc
->flags
|= RX_FLAG_FAILED_FCS_CRC
;
1407 * Obtain the status about this packet.
1408 * When frame was received with an OFDM bitrate,
1409 * the signal is the PLCP value. If it was received with
1410 * a CCK bitrate the signal is the rate in 100kbit/s.
1412 rxdesc
->ofdm
= rt2x00_get_field32(word0
, RXD_W0_OFDM
);
1413 rxdesc
->signal
= rt2x00_get_field32(word1
, RXD_W1_SIGNAL
);
1414 rxdesc
->signal_plcp
= rxdesc
->ofdm
;
1415 rxdesc
->rssi
= rt73usb_agc_to_rssi(entry
->queue
->rt2x00dev
, word1
);
1416 rxdesc
->size
= rt2x00_get_field32(word0
, RXD_W0_DATABYTE_COUNT
);
1417 rxdesc
->my_bss
= !!rt2x00_get_field32(word0
, RXD_W0_MY_BSS
);
1420 * Adjust the skb memory window to the frame boundaries.
1422 skb_pull(entry
->skb
, offset
+ entry
->queue
->desc_size
);
1423 skb_trim(entry
->skb
, rxdesc
->size
);
1426 * Set descriptor and data pointer.
1428 skbdesc
->data
= entry
->skb
->data
;
1429 skbdesc
->data_len
= rxdesc
->size
;
1430 skbdesc
->desc
= rxd
;
1431 skbdesc
->desc_len
= entry
->queue
->desc_size
;
1435 * Device probe functions.
1437 static int rt73usb_validate_eeprom(struct rt2x00_dev
*rt2x00dev
)
1443 rt2x00usb_eeprom_read(rt2x00dev
, rt2x00dev
->eeprom
, EEPROM_SIZE
);
1446 * Start validation of the data that has been read.
1448 mac
= rt2x00_eeprom_addr(rt2x00dev
, EEPROM_MAC_ADDR_0
);
1449 if (!is_valid_ether_addr(mac
)) {
1450 DECLARE_MAC_BUF(macbuf
);
1452 random_ether_addr(mac
);
1453 EEPROM(rt2x00dev
, "MAC: %s\n", print_mac(macbuf
, mac
));
1456 rt2x00_eeprom_read(rt2x00dev
, EEPROM_ANTENNA
, &word
);
1457 if (word
== 0xffff) {
1458 rt2x00_set_field16(&word
, EEPROM_ANTENNA_NUM
, 2);
1459 rt2x00_set_field16(&word
, EEPROM_ANTENNA_TX_DEFAULT
,
1461 rt2x00_set_field16(&word
, EEPROM_ANTENNA_RX_DEFAULT
,
1463 rt2x00_set_field16(&word
, EEPROM_ANTENNA_FRAME_TYPE
, 0);
1464 rt2x00_set_field16(&word
, EEPROM_ANTENNA_DYN_TXAGC
, 0);
1465 rt2x00_set_field16(&word
, EEPROM_ANTENNA_HARDWARE_RADIO
, 0);
1466 rt2x00_set_field16(&word
, EEPROM_ANTENNA_RF_TYPE
, RF5226
);
1467 rt2x00_eeprom_write(rt2x00dev
, EEPROM_ANTENNA
, word
);
1468 EEPROM(rt2x00dev
, "Antenna: 0x%04x\n", word
);
1471 rt2x00_eeprom_read(rt2x00dev
, EEPROM_NIC
, &word
);
1472 if (word
== 0xffff) {
1473 rt2x00_set_field16(&word
, EEPROM_NIC_EXTERNAL_LNA
, 0);
1474 rt2x00_eeprom_write(rt2x00dev
, EEPROM_NIC
, word
);
1475 EEPROM(rt2x00dev
, "NIC: 0x%04x\n", word
);
1478 rt2x00_eeprom_read(rt2x00dev
, EEPROM_LED
, &word
);
1479 if (word
== 0xffff) {
1480 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_RDY_G
, 0);
1481 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_RDY_A
, 0);
1482 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_ACT
, 0);
1483 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_0
, 0);
1484 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_1
, 0);
1485 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_2
, 0);
1486 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_3
, 0);
1487 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_4
, 0);
1488 rt2x00_set_field16(&word
, EEPROM_LED_LED_MODE
,
1490 rt2x00_eeprom_write(rt2x00dev
, EEPROM_LED
, word
);
1491 EEPROM(rt2x00dev
, "Led: 0x%04x\n", word
);
1494 rt2x00_eeprom_read(rt2x00dev
, EEPROM_FREQ
, &word
);
1495 if (word
== 0xffff) {
1496 rt2x00_set_field16(&word
, EEPROM_FREQ_OFFSET
, 0);
1497 rt2x00_set_field16(&word
, EEPROM_FREQ_SEQ
, 0);
1498 rt2x00_eeprom_write(rt2x00dev
, EEPROM_FREQ
, word
);
1499 EEPROM(rt2x00dev
, "Freq: 0x%04x\n", word
);
1502 rt2x00_eeprom_read(rt2x00dev
, EEPROM_RSSI_OFFSET_BG
, &word
);
1503 if (word
== 0xffff) {
1504 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_BG_1
, 0);
1505 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_BG_2
, 0);
1506 rt2x00_eeprom_write(rt2x00dev
, EEPROM_RSSI_OFFSET_BG
, word
);
1507 EEPROM(rt2x00dev
, "RSSI OFFSET BG: 0x%04x\n", word
);
1509 value
= rt2x00_get_field16(word
, EEPROM_RSSI_OFFSET_BG_1
);
1510 if (value
< -10 || value
> 10)
1511 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_BG_1
, 0);
1512 value
= rt2x00_get_field16(word
, EEPROM_RSSI_OFFSET_BG_2
);
1513 if (value
< -10 || value
> 10)
1514 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_BG_2
, 0);
1515 rt2x00_eeprom_write(rt2x00dev
, EEPROM_RSSI_OFFSET_BG
, word
);
1518 rt2x00_eeprom_read(rt2x00dev
, EEPROM_RSSI_OFFSET_A
, &word
);
1519 if (word
== 0xffff) {
1520 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_A_1
, 0);
1521 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_A_2
, 0);
1522 rt2x00_eeprom_write(rt2x00dev
, EEPROM_RSSI_OFFSET_A
, word
);
1523 EEPROM(rt2x00dev
, "RSSI OFFSET A: 0x%04x\n", word
);
1525 value
= rt2x00_get_field16(word
, EEPROM_RSSI_OFFSET_A_1
);
1526 if (value
< -10 || value
> 10)
1527 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_A_1
, 0);
1528 value
= rt2x00_get_field16(word
, EEPROM_RSSI_OFFSET_A_2
);
1529 if (value
< -10 || value
> 10)
1530 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_A_2
, 0);
1531 rt2x00_eeprom_write(rt2x00dev
, EEPROM_RSSI_OFFSET_A
, word
);
1537 static int rt73usb_init_eeprom(struct rt2x00_dev
*rt2x00dev
)
1544 * Read EEPROM word for configuration.
1546 rt2x00_eeprom_read(rt2x00dev
, EEPROM_ANTENNA
, &eeprom
);
1549 * Identify RF chipset.
1551 value
= rt2x00_get_field16(eeprom
, EEPROM_ANTENNA_RF_TYPE
);
1552 rt73usb_register_read(rt2x00dev
, MAC_CSR0
, ®
);
1553 rt2x00_set_chip(rt2x00dev
, RT2571
, value
, reg
);
1555 if (!rt2x00_check_rev(&rt2x00dev
->chip
, 0x25730)) {
1556 ERROR(rt2x00dev
, "Invalid RT chipset detected.\n");
1560 if (!rt2x00_rf(&rt2x00dev
->chip
, RF5226
) &&
1561 !rt2x00_rf(&rt2x00dev
->chip
, RF2528
) &&
1562 !rt2x00_rf(&rt2x00dev
->chip
, RF5225
) &&
1563 !rt2x00_rf(&rt2x00dev
->chip
, RF2527
)) {
1564 ERROR(rt2x00dev
, "Invalid RF chipset detected.\n");
1569 * Identify default antenna configuration.
1571 rt2x00dev
->default_ant
.tx
=
1572 rt2x00_get_field16(eeprom
, EEPROM_ANTENNA_TX_DEFAULT
);
1573 rt2x00dev
->default_ant
.rx
=
1574 rt2x00_get_field16(eeprom
, EEPROM_ANTENNA_RX_DEFAULT
);
1577 * Read the Frame type.
1579 if (rt2x00_get_field16(eeprom
, EEPROM_ANTENNA_FRAME_TYPE
))
1580 __set_bit(CONFIG_FRAME_TYPE
, &rt2x00dev
->flags
);
1583 * Read frequency offset.
1585 rt2x00_eeprom_read(rt2x00dev
, EEPROM_FREQ
, &eeprom
);
1586 rt2x00dev
->freq_offset
= rt2x00_get_field16(eeprom
, EEPROM_FREQ_OFFSET
);
1589 * Read external LNA informations.
1591 rt2x00_eeprom_read(rt2x00dev
, EEPROM_NIC
, &eeprom
);
1593 if (rt2x00_get_field16(eeprom
, EEPROM_NIC_EXTERNAL_LNA
)) {
1594 __set_bit(CONFIG_EXTERNAL_LNA_A
, &rt2x00dev
->flags
);
1595 __set_bit(CONFIG_EXTERNAL_LNA_BG
, &rt2x00dev
->flags
);
1599 * Store led settings, for correct led behaviour.
1601 #ifdef CONFIG_RT73USB_LEDS
1602 rt2x00_eeprom_read(rt2x00dev
, EEPROM_LED
, &eeprom
);
1605 case LED_MODE_TXRX_ACTIVITY
:
1607 case LED_MODE_ALPHA
:
1608 case LED_MODE_DEFAULT
:
1609 rt2x00dev
->led_flags
=
1610 LED_SUPPORT_RADIO
| LED_SUPPORT_ASSOC
;
1612 case LED_MODE_SIGNAL_STRENGTH
:
1613 rt2x00dev
->led_flags
=
1614 LED_SUPPORT_RADIO
| LED_SUPPORT_ASSOC
|
1615 LED_SUPPORT_QUALITY
;
1619 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_LED_MODE
, value
);
1620 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_POLARITY_GPIO_0
,
1621 rt2x00_get_field16(eeprom
,
1622 EEPROM_LED_POLARITY_GPIO_0
));
1623 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_POLARITY_GPIO_1
,
1624 rt2x00_get_field16(eeprom
,
1625 EEPROM_LED_POLARITY_GPIO_1
));
1626 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_POLARITY_GPIO_2
,
1627 rt2x00_get_field16(eeprom
,
1628 EEPROM_LED_POLARITY_GPIO_2
));
1629 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_POLARITY_GPIO_3
,
1630 rt2x00_get_field16(eeprom
,
1631 EEPROM_LED_POLARITY_GPIO_3
));
1632 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_POLARITY_GPIO_4
,
1633 rt2x00_get_field16(eeprom
,
1634 EEPROM_LED_POLARITY_GPIO_4
));
1635 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_POLARITY_ACT
,
1636 rt2x00_get_field16(eeprom
, EEPROM_LED_POLARITY_ACT
));
1637 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_POLARITY_READY_BG
,
1638 rt2x00_get_field16(eeprom
,
1639 EEPROM_LED_POLARITY_RDY_G
));
1640 rt2x00_set_field16(&rt2x00dev
->led_mcu_reg
, MCU_LEDCS_POLARITY_READY_A
,
1641 rt2x00_get_field16(eeprom
,
1642 EEPROM_LED_POLARITY_RDY_A
));
1643 #endif /* CONFIG_RT73USB_LEDS */
1649 * RF value list for RF2528
1652 static const struct rf_channel rf_vals_bg_2528
[] = {
1653 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1654 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1655 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1656 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1657 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1658 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1659 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1660 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1661 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1662 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1663 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1664 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1665 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1666 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1670 * RF value list for RF5226
1671 * Supports: 2.4 GHz & 5.2 GHz
1673 static const struct rf_channel rf_vals_5226
[] = {
1674 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1675 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1676 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1677 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1678 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1679 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1680 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1681 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1682 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1683 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1684 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1685 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1686 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1687 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1689 /* 802.11 UNI / HyperLan 2 */
1690 { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1691 { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1692 { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1693 { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1694 { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1695 { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1696 { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1697 { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1699 /* 802.11 HyperLan 2 */
1700 { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1701 { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1702 { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1703 { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1704 { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1705 { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1706 { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1707 { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1708 { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1709 { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1712 { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1713 { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1714 { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1715 { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1716 { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1717 { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1719 /* MMAC(Japan)J52 ch 34,38,42,46 */
1720 { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1721 { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1722 { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1723 { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1727 * RF value list for RF5225 & RF2527
1728 * Supports: 2.4 GHz & 5.2 GHz
1730 static const struct rf_channel rf_vals_5225_2527
[] = {
1731 { 1, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1732 { 2, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1733 { 3, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1734 { 4, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1735 { 5, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1736 { 6, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1737 { 7, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1738 { 8, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1739 { 9, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1740 { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1741 { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1742 { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1743 { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1744 { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1746 /* 802.11 UNI / HyperLan 2 */
1747 { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1748 { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1749 { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1750 { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1751 { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1752 { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1753 { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1754 { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1756 /* 802.11 HyperLan 2 */
1757 { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1758 { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1759 { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1760 { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1761 { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1762 { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1763 { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1764 { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1765 { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1766 { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1769 { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1770 { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1771 { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1772 { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1773 { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1774 { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1776 /* MMAC(Japan)J52 ch 34,38,42,46 */
1777 { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1778 { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1779 { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1780 { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1784 static void rt73usb_probe_hw_mode(struct rt2x00_dev
*rt2x00dev
)
1786 struct hw_mode_spec
*spec
= &rt2x00dev
->spec
;
1791 * Initialize all hw fields.
1793 rt2x00dev
->hw
->flags
=
1794 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE
|
1795 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING
;
1796 rt2x00dev
->hw
->extra_tx_headroom
= TXD_DESC_SIZE
;
1797 rt2x00dev
->hw
->max_signal
= MAX_SIGNAL
;
1798 rt2x00dev
->hw
->max_rssi
= MAX_RX_SSI
;
1799 rt2x00dev
->hw
->queues
= 4;
1801 SET_IEEE80211_DEV(rt2x00dev
->hw
, &rt2x00dev_usb(rt2x00dev
)->dev
);
1802 SET_IEEE80211_PERM_ADDR(rt2x00dev
->hw
,
1803 rt2x00_eeprom_addr(rt2x00dev
,
1804 EEPROM_MAC_ADDR_0
));
1807 * Convert tx_power array in eeprom.
1809 txpower
= rt2x00_eeprom_addr(rt2x00dev
, EEPROM_TXPOWER_G_START
);
1810 for (i
= 0; i
< 14; i
++)
1811 txpower
[i
] = TXPOWER_FROM_DEV(txpower
[i
]);
1814 * Initialize hw_mode information.
1816 spec
->supported_bands
= SUPPORT_BAND_2GHZ
;
1817 spec
->supported_rates
= SUPPORT_RATE_CCK
| SUPPORT_RATE_OFDM
;
1818 spec
->tx_power_a
= NULL
;
1819 spec
->tx_power_bg
= txpower
;
1820 spec
->tx_power_default
= DEFAULT_TXPOWER
;
1822 if (rt2x00_rf(&rt2x00dev
->chip
, RF2528
)) {
1823 spec
->num_channels
= ARRAY_SIZE(rf_vals_bg_2528
);
1824 spec
->channels
= rf_vals_bg_2528
;
1825 } else if (rt2x00_rf(&rt2x00dev
->chip
, RF5226
)) {
1826 spec
->supported_bands
|= SUPPORT_BAND_5GHZ
;
1827 spec
->num_channels
= ARRAY_SIZE(rf_vals_5226
);
1828 spec
->channels
= rf_vals_5226
;
1829 } else if (rt2x00_rf(&rt2x00dev
->chip
, RF2527
)) {
1830 spec
->num_channels
= 14;
1831 spec
->channels
= rf_vals_5225_2527
;
1832 } else if (rt2x00_rf(&rt2x00dev
->chip
, RF5225
)) {
1833 spec
->supported_bands
|= SUPPORT_BAND_5GHZ
;
1834 spec
->num_channels
= ARRAY_SIZE(rf_vals_5225_2527
);
1835 spec
->channels
= rf_vals_5225_2527
;
1838 if (rt2x00_rf(&rt2x00dev
->chip
, RF5225
) ||
1839 rt2x00_rf(&rt2x00dev
->chip
, RF5226
)) {
1840 txpower
= rt2x00_eeprom_addr(rt2x00dev
, EEPROM_TXPOWER_A_START
);
1841 for (i
= 0; i
< 14; i
++)
1842 txpower
[i
] = TXPOWER_FROM_DEV(txpower
[i
]);
1844 spec
->tx_power_a
= txpower
;
1848 static int rt73usb_probe_hw(struct rt2x00_dev
*rt2x00dev
)
1853 * Allocate eeprom data.
1855 retval
= rt73usb_validate_eeprom(rt2x00dev
);
1859 retval
= rt73usb_init_eeprom(rt2x00dev
);
1864 * Initialize hw specifications.
1866 rt73usb_probe_hw_mode(rt2x00dev
);
1869 * This device requires firmware.
1871 __set_bit(DRIVER_REQUIRE_FIRMWARE
, &rt2x00dev
->flags
);
1874 * Set the rssi offset.
1876 rt2x00dev
->rssi_offset
= DEFAULT_RSSI_OFFSET
;
1882 * IEEE80211 stack callback functions.
1884 static void rt73usb_configure_filter(struct ieee80211_hw
*hw
,
1885 unsigned int changed_flags
,
1886 unsigned int *total_flags
,
1888 struct dev_addr_list
*mc_list
)
1890 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
1894 * Mask off any flags we are going to ignore from
1895 * the total_flags field.
1906 * Apply some rules to the filters:
1907 * - Some filters imply different filters to be set.
1908 * - Some things we can't filter out at all.
1909 * - Multicast filter seems to kill broadcast traffic so never use it.
1911 *total_flags
|= FIF_ALLMULTI
;
1912 if (*total_flags
& FIF_OTHER_BSS
||
1913 *total_flags
& FIF_PROMISC_IN_BSS
)
1914 *total_flags
|= FIF_PROMISC_IN_BSS
| FIF_OTHER_BSS
;
1917 * Check if there is any work left for us.
1919 if (rt2x00dev
->packet_filter
== *total_flags
)
1921 rt2x00dev
->packet_filter
= *total_flags
;
1924 * When in atomic context, reschedule and let rt2x00lib
1925 * call this function again.
1928 queue_work(rt2x00dev
->hw
->workqueue
, &rt2x00dev
->filter_work
);
1933 * Start configuration steps.
1934 * Note that the version error will always be dropped
1935 * and broadcast frames will always be accepted since
1936 * there is no filter for it at this time.
1938 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
1939 rt2x00_set_field32(®
, TXRX_CSR0_DROP_CRC
,
1940 !(*total_flags
& FIF_FCSFAIL
));
1941 rt2x00_set_field32(®
, TXRX_CSR0_DROP_PHYSICAL
,
1942 !(*total_flags
& FIF_PLCPFAIL
));
1943 rt2x00_set_field32(®
, TXRX_CSR0_DROP_CONTROL
,
1944 !(*total_flags
& FIF_CONTROL
));
1945 rt2x00_set_field32(®
, TXRX_CSR0_DROP_NOT_TO_ME
,
1946 !(*total_flags
& FIF_PROMISC_IN_BSS
));
1947 rt2x00_set_field32(®
, TXRX_CSR0_DROP_TO_DS
,
1948 !(*total_flags
& FIF_PROMISC_IN_BSS
));
1949 rt2x00_set_field32(®
, TXRX_CSR0_DROP_VERSION_ERROR
, 1);
1950 rt2x00_set_field32(®
, TXRX_CSR0_DROP_MULTICAST
,
1951 !(*total_flags
& FIF_ALLMULTI
));
1952 rt2x00_set_field32(®
, TXRX_CSR0_DROP_BROADCAST
, 0);
1953 rt2x00_set_field32(®
, TXRX_CSR0_DROP_ACK_CTS
,
1954 !(*total_flags
& FIF_CONTROL
));
1955 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
1958 static int rt73usb_set_retry_limit(struct ieee80211_hw
*hw
,
1959 u32 short_retry
, u32 long_retry
)
1961 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
1964 rt73usb_register_read(rt2x00dev
, TXRX_CSR4
, ®
);
1965 rt2x00_set_field32(®
, TXRX_CSR4_LONG_RETRY_LIMIT
, long_retry
);
1966 rt2x00_set_field32(®
, TXRX_CSR4_SHORT_RETRY_LIMIT
, short_retry
);
1967 rt73usb_register_write(rt2x00dev
, TXRX_CSR4
, reg
);
1974 * Mac80211 demands get_tsf must be atomic.
1975 * This is not possible for rt73usb since all register access
1976 * functions require sleeping. Untill mac80211 no longer needs
1977 * get_tsf to be atomic, this function should be disabled.
1979 static u64
rt73usb_get_tsf(struct ieee80211_hw
*hw
)
1981 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
1985 rt73usb_register_read(rt2x00dev
, TXRX_CSR13
, ®
);
1986 tsf
= (u64
) rt2x00_get_field32(reg
, TXRX_CSR13_HIGH_TSFTIMER
) << 32;
1987 rt73usb_register_read(rt2x00dev
, TXRX_CSR12
, ®
);
1988 tsf
|= rt2x00_get_field32(reg
, TXRX_CSR12_LOW_TSFTIMER
);
1993 #define rt73usb_get_tsf NULL
1996 static int rt73usb_beacon_update(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
1997 struct ieee80211_tx_control
*control
)
1999 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
2000 struct rt2x00_intf
*intf
= vif_to_intf(control
->vif
);
2001 struct skb_frame_desc
*skbdesc
;
2002 unsigned int beacon_base
;
2003 unsigned int timeout
;
2006 if (unlikely(!intf
->beacon
))
2010 * Add the descriptor in front of the skb.
2012 skb_push(skb
, intf
->beacon
->queue
->desc_size
);
2013 memset(skb
->data
, 0, intf
->beacon
->queue
->desc_size
);
2016 * Fill in skb descriptor
2018 skbdesc
= get_skb_frame_desc(skb
);
2019 memset(skbdesc
, 0, sizeof(*skbdesc
));
2020 skbdesc
->flags
|= FRAME_DESC_DRIVER_GENERATED
;
2021 skbdesc
->data
= skb
->data
+ intf
->beacon
->queue
->desc_size
;
2022 skbdesc
->data_len
= skb
->len
- intf
->beacon
->queue
->desc_size
;
2023 skbdesc
->desc
= skb
->data
;
2024 skbdesc
->desc_len
= intf
->beacon
->queue
->desc_size
;
2025 skbdesc
->entry
= intf
->beacon
;
2028 * Disable beaconing while we are reloading the beacon data,
2029 * otherwise we might be sending out invalid data.
2031 rt73usb_register_read(rt2x00dev
, TXRX_CSR9
, ®
);
2032 rt2x00_set_field32(®
, TXRX_CSR9_TSF_TICKING
, 0);
2033 rt2x00_set_field32(®
, TXRX_CSR9_TBTT_ENABLE
, 0);
2034 rt2x00_set_field32(®
, TXRX_CSR9_BEACON_GEN
, 0);
2035 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, reg
);
2038 * mac80211 doesn't provide the control->queue variable
2039 * for beacons. Set our own queue identification so
2040 * it can be used during descriptor initialization.
2042 control
->queue
= RT2X00_BCN_QUEUE_BEACON
;
2043 rt2x00lib_write_tx_desc(rt2x00dev
, skb
, control
);
2046 * Write entire beacon with descriptor to register,
2047 * and kick the beacon generator.
2049 beacon_base
= HW_BEACON_OFFSET(intf
->beacon
->entry_idx
);
2050 timeout
= REGISTER_TIMEOUT
* (skb
->len
/ sizeof(u32
));
2051 rt2x00usb_vendor_request(rt2x00dev
, USB_MULTI_WRITE
,
2052 USB_VENDOR_REQUEST_OUT
, beacon_base
, 0,
2053 skb
->data
, skb
->len
, timeout
);
2054 rt73usb_kick_tx_queue(rt2x00dev
, control
->queue
);
2059 static const struct ieee80211_ops rt73usb_mac80211_ops
= {
2061 .start
= rt2x00mac_start
,
2062 .stop
= rt2x00mac_stop
,
2063 .add_interface
= rt2x00mac_add_interface
,
2064 .remove_interface
= rt2x00mac_remove_interface
,
2065 .config
= rt2x00mac_config
,
2066 .config_interface
= rt2x00mac_config_interface
,
2067 .configure_filter
= rt73usb_configure_filter
,
2068 .get_stats
= rt2x00mac_get_stats
,
2069 .set_retry_limit
= rt73usb_set_retry_limit
,
2070 .bss_info_changed
= rt2x00mac_bss_info_changed
,
2071 .conf_tx
= rt2x00mac_conf_tx
,
2072 .get_tx_stats
= rt2x00mac_get_tx_stats
,
2073 .get_tsf
= rt73usb_get_tsf
,
2074 .beacon_update
= rt73usb_beacon_update
,
2077 static const struct rt2x00lib_ops rt73usb_rt2x00_ops
= {
2078 .probe_hw
= rt73usb_probe_hw
,
2079 .get_firmware_name
= rt73usb_get_firmware_name
,
2080 .get_firmware_crc
= rt73usb_get_firmware_crc
,
2081 .load_firmware
= rt73usb_load_firmware
,
2082 .initialize
= rt2x00usb_initialize
,
2083 .uninitialize
= rt2x00usb_uninitialize
,
2084 .init_rxentry
= rt2x00usb_init_rxentry
,
2085 .init_txentry
= rt2x00usb_init_txentry
,
2086 .set_device_state
= rt73usb_set_device_state
,
2087 .link_stats
= rt73usb_link_stats
,
2088 .reset_tuner
= rt73usb_reset_tuner
,
2089 .link_tuner
= rt73usb_link_tuner
,
2090 .led_brightness
= rt73usb_led_brightness
,
2091 .write_tx_desc
= rt73usb_write_tx_desc
,
2092 .write_tx_data
= rt2x00usb_write_tx_data
,
2093 .get_tx_data_len
= rt73usb_get_tx_data_len
,
2094 .kick_tx_queue
= rt73usb_kick_tx_queue
,
2095 .fill_rxdone
= rt73usb_fill_rxdone
,
2096 .config_intf
= rt73usb_config_intf
,
2097 .config_erp
= rt73usb_config_erp
,
2098 .config
= rt73usb_config
,
2101 static const struct data_queue_desc rt73usb_queue_rx
= {
2102 .entry_num
= RX_ENTRIES
,
2103 .data_size
= DATA_FRAME_SIZE
,
2104 .desc_size
= RXD_DESC_SIZE
,
2105 .priv_size
= sizeof(struct queue_entry_priv_usb_rx
),
2108 static const struct data_queue_desc rt73usb_queue_tx
= {
2109 .entry_num
= TX_ENTRIES
,
2110 .data_size
= DATA_FRAME_SIZE
,
2111 .desc_size
= TXD_DESC_SIZE
,
2112 .priv_size
= sizeof(struct queue_entry_priv_usb_tx
),
2115 static const struct data_queue_desc rt73usb_queue_bcn
= {
2116 .entry_num
= 4 * BEACON_ENTRIES
,
2117 .data_size
= MGMT_FRAME_SIZE
,
2118 .desc_size
= TXINFO_SIZE
,
2119 .priv_size
= sizeof(struct queue_entry_priv_usb_tx
),
2122 static const struct rt2x00_ops rt73usb_ops
= {
2123 .name
= KBUILD_MODNAME
,
2126 .eeprom_size
= EEPROM_SIZE
,
2128 .rx
= &rt73usb_queue_rx
,
2129 .tx
= &rt73usb_queue_tx
,
2130 .bcn
= &rt73usb_queue_bcn
,
2131 .lib
= &rt73usb_rt2x00_ops
,
2132 .hw
= &rt73usb_mac80211_ops
,
2133 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2134 .debugfs
= &rt73usb_rt2x00debug
,
2135 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2139 * rt73usb module information.
2141 static struct usb_device_id rt73usb_device_table
[] = {
2143 { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops
) },
2145 { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops
) },
2147 { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops
) },
2148 { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops
) },
2150 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops
) },
2151 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops
) },
2152 { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops
) },
2153 { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops
) },
2155 { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops
) },
2157 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops
) },
2159 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops
) },
2160 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops
) },
2162 { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops
) },
2164 { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops
) },
2165 { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops
) },
2166 { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops
) },
2168 { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops
) },
2170 { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops
) },
2171 { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops
) },
2173 { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops
) },
2175 { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops
) },
2176 { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops
) },
2178 { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops
) },
2179 { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops
) },
2181 { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops
) },
2182 { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops
) },
2183 { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops
) },
2184 { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops
) },
2186 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops
) },
2187 { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops
) },
2189 { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops
) },
2190 { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops
) },
2191 { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops
) },
2193 { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops
) },
2195 { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops
) },
2196 { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops
) },
2198 { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops
) },
2200 { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops
) },
2201 { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops
) },
2205 MODULE_AUTHOR(DRV_PROJECT
);
2206 MODULE_VERSION(DRV_VERSION
);
2207 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2208 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2209 MODULE_DEVICE_TABLE(usb
, rt73usb_device_table
);
2210 MODULE_FIRMWARE(FIRMWARE_RT2571
);
2211 MODULE_LICENSE("GPL");
2213 static struct usb_driver rt73usb_driver
= {
2214 .name
= KBUILD_MODNAME
,
2215 .id_table
= rt73usb_device_table
,
2216 .probe
= rt2x00usb_probe
,
2217 .disconnect
= rt2x00usb_disconnect
,
2218 .suspend
= rt2x00usb_suspend
,
2219 .resume
= rt2x00usb_resume
,
2222 static int __init
rt73usb_init(void)
2224 return usb_register(&rt73usb_driver
);
2227 static void __exit
rt73usb_exit(void)
2229 usb_deregister(&rt73usb_driver
);
2232 module_init(rt73usb_init
);
2233 module_exit(rt73usb_exit
);