2 * Linux device driver for RTL8187
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
26 #include "rtl8187_rtl8225.h"
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
31 MODULE_LICENSE("GPL");
33 static struct usb_device_id rtl8187_table
[] __devinitdata
= {
35 {USB_DEVICE(0x0b05, 0x171d), .driver_info
= DEVICE_RTL8187
},
37 {USB_DEVICE(0x050d, 0x705e), .driver_info
= DEVICE_RTL8187B
},
39 {USB_DEVICE(0x0bda, 0x8187), .driver_info
= DEVICE_RTL8187
},
40 {USB_DEVICE(0x0bda, 0x8189), .driver_info
= DEVICE_RTL8187B
},
41 {USB_DEVICE(0x0bda, 0x8197), .driver_info
= DEVICE_RTL8187B
},
42 {USB_DEVICE(0x0bda, 0x8198), .driver_info
= DEVICE_RTL8187B
},
44 {USB_DEVICE(0x0846, 0x6100), .driver_info
= DEVICE_RTL8187
},
45 {USB_DEVICE(0x0846, 0x6a00), .driver_info
= DEVICE_RTL8187
},
46 {USB_DEVICE(0x0846, 0x4260), .driver_info
= DEVICE_RTL8187B
},
48 {USB_DEVICE(0x03f0, 0xca02), .driver_info
= DEVICE_RTL8187
},
50 {USB_DEVICE(0x0df6, 0x000d), .driver_info
= DEVICE_RTL8187
},
51 {USB_DEVICE(0x0df6, 0x0028), .driver_info
= DEVICE_RTL8187B
},
53 {USB_DEVICE(0x13d1, 0xabe6), .driver_info
= DEVICE_RTL8187
},
57 MODULE_DEVICE_TABLE(usb
, rtl8187_table
);
59 static const struct ieee80211_rate rtl818x_rates
[] = {
60 { .bitrate
= 10, .hw_value
= 0, },
61 { .bitrate
= 20, .hw_value
= 1, },
62 { .bitrate
= 55, .hw_value
= 2, },
63 { .bitrate
= 110, .hw_value
= 3, },
64 { .bitrate
= 60, .hw_value
= 4, },
65 { .bitrate
= 90, .hw_value
= 5, },
66 { .bitrate
= 120, .hw_value
= 6, },
67 { .bitrate
= 180, .hw_value
= 7, },
68 { .bitrate
= 240, .hw_value
= 8, },
69 { .bitrate
= 360, .hw_value
= 9, },
70 { .bitrate
= 480, .hw_value
= 10, },
71 { .bitrate
= 540, .hw_value
= 11, },
74 static const struct ieee80211_channel rtl818x_channels
[] = {
75 { .center_freq
= 2412 },
76 { .center_freq
= 2417 },
77 { .center_freq
= 2422 },
78 { .center_freq
= 2427 },
79 { .center_freq
= 2432 },
80 { .center_freq
= 2437 },
81 { .center_freq
= 2442 },
82 { .center_freq
= 2447 },
83 { .center_freq
= 2452 },
84 { .center_freq
= 2457 },
85 { .center_freq
= 2462 },
86 { .center_freq
= 2467 },
87 { .center_freq
= 2472 },
88 { .center_freq
= 2484 },
91 static void rtl8187_iowrite_async_cb(struct urb
*urb
)
97 static void rtl8187_iowrite_async(struct rtl8187_priv
*priv
, __le16 addr
,
100 struct usb_ctrlrequest
*dr
;
102 struct rtl8187_async_write_data
{
104 struct usb_ctrlrequest dr
;
108 buf
= kmalloc(sizeof(*buf
), GFP_ATOMIC
);
112 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
120 dr
->bRequestType
= RTL8187_REQT_WRITE
;
121 dr
->bRequest
= RTL8187_REQ_SET_REG
;
124 dr
->wLength
= cpu_to_le16(len
);
126 memcpy(buf
, data
, len
);
128 usb_fill_control_urb(urb
, priv
->udev
, usb_sndctrlpipe(priv
->udev
, 0),
129 (unsigned char *)dr
, buf
, len
,
130 rtl8187_iowrite_async_cb
, buf
);
131 rc
= usb_submit_urb(urb
, GFP_ATOMIC
);
138 static inline void rtl818x_iowrite32_async(struct rtl8187_priv
*priv
,
139 __le32
*addr
, u32 val
)
141 __le32 buf
= cpu_to_le32(val
);
143 rtl8187_iowrite_async(priv
, cpu_to_le16((unsigned long)addr
),
147 void rtl8187_write_phy(struct ieee80211_hw
*dev
, u8 addr
, u32 data
)
149 struct rtl8187_priv
*priv
= dev
->priv
;
154 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[3], (data
>> 24) & 0xFF);
155 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[2], (data
>> 16) & 0xFF);
156 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[1], (data
>> 8) & 0xFF);
157 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[0], data
& 0xFF);
162 static void rtl8187_tx_cb(struct urb
*urb
)
164 struct sk_buff
*skb
= (struct sk_buff
*)urb
->context
;
165 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
166 struct ieee80211_hw
*hw
= info
->driver_data
[0];
167 struct rtl8187_priv
*priv
= hw
->priv
;
169 usb_free_urb(info
->driver_data
[1]);
170 skb_pull(skb
, priv
->is_rtl8187b
? sizeof(struct rtl8187b_tx_hdr
) :
171 sizeof(struct rtl8187_tx_hdr
));
172 memset(&info
->status
, 0, sizeof(info
->status
));
173 info
->flags
|= IEEE80211_TX_STAT_ACK
;
174 ieee80211_tx_status_irqsafe(hw
, skb
);
177 static int rtl8187_tx(struct ieee80211_hw
*dev
, struct sk_buff
*skb
)
179 struct rtl8187_priv
*priv
= dev
->priv
;
180 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
181 struct ieee80211_hdr
*ieee80211hdr
= (struct ieee80211_hdr
*)skb
->data
;
189 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
196 flags
|= RTL818X_TX_DESC_FLAG_NO_ENC
;
198 flags
|= ieee80211_get_tx_rate(dev
, info
)->hw_value
<< 24;
199 if (ieee80211_has_morefrags(((struct ieee80211_hdr
*)skb
->data
)->frame_control
))
200 flags
|= RTL818X_TX_DESC_FLAG_MOREFRAG
;
201 if (info
->flags
& IEEE80211_TX_CTL_USE_RTS_CTS
) {
202 flags
|= RTL818X_TX_DESC_FLAG_RTS
;
203 flags
|= ieee80211_get_rts_cts_rate(dev
, info
)->hw_value
<< 19;
204 rts_dur
= ieee80211_rts_duration(dev
, priv
->vif
,
206 } else if (info
->flags
& IEEE80211_TX_CTL_USE_CTS_PROTECT
) {
207 flags
|= RTL818X_TX_DESC_FLAG_CTS
;
208 flags
|= ieee80211_get_rts_cts_rate(dev
, info
)->hw_value
<< 19;
211 if (!priv
->is_rtl8187b
) {
212 struct rtl8187_tx_hdr
*hdr
=
213 (struct rtl8187_tx_hdr
*)skb_push(skb
, sizeof(*hdr
));
214 hdr
->flags
= cpu_to_le32(flags
);
216 hdr
->rts_duration
= rts_dur
;
217 hdr
->retry
= cpu_to_le32(info
->control
.retry_limit
<< 8);
222 /* fc needs to be calculated before skb_push() */
223 unsigned int epmap
[4] = { 6, 7, 5, 4 };
224 struct ieee80211_hdr
*tx_hdr
=
225 (struct ieee80211_hdr
*)(skb
->data
);
226 u16 fc
= le16_to_cpu(tx_hdr
->frame_control
);
228 struct rtl8187b_tx_hdr
*hdr
=
229 (struct rtl8187b_tx_hdr
*)skb_push(skb
, sizeof(*hdr
));
230 struct ieee80211_rate
*txrate
=
231 ieee80211_get_tx_rate(dev
, info
);
232 memset(hdr
, 0, sizeof(*hdr
));
233 hdr
->flags
= cpu_to_le32(flags
);
234 hdr
->rts_duration
= rts_dur
;
235 hdr
->retry
= cpu_to_le32(info
->control
.retry_limit
<< 8);
237 ieee80211_generic_frame_duration(dev
, priv
->vif
,
241 if ((fc
& IEEE80211_FCTL_FTYPE
) == IEEE80211_FTYPE_MGMT
)
244 ep
= epmap
[skb_get_queue_mapping(skb
)];
247 /* FIXME: The sequence that follows is needed for this driver to
248 * work with mac80211 since "mac80211: fix TX sequence numbers".
249 * As with the temporary code in rt2x00, changes will be needed
250 * to get proper sequence numbers on beacons. In addition, this
251 * patch places the sequence number in the hardware state, which
252 * limits us to a single virtual state.
254 if (info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
255 if (info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
)
257 ieee80211hdr
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
258 ieee80211hdr
->seq_ctrl
|= cpu_to_le16(priv
->seqno
);
261 info
->driver_data
[0] = dev
;
262 info
->driver_data
[1] = urb
;
264 usb_fill_bulk_urb(urb
, priv
->udev
, usb_sndbulkpipe(priv
->udev
, ep
),
265 buf
, skb
->len
, rtl8187_tx_cb
, skb
);
266 rc
= usb_submit_urb(urb
, GFP_ATOMIC
);
275 static void rtl8187_rx_cb(struct urb
*urb
)
277 struct sk_buff
*skb
= (struct sk_buff
*)urb
->context
;
278 struct rtl8187_rx_info
*info
= (struct rtl8187_rx_info
*)skb
->cb
;
279 struct ieee80211_hw
*dev
= info
->dev
;
280 struct rtl8187_priv
*priv
= dev
->priv
;
281 struct ieee80211_rx_status rx_status
= { 0 };
286 spin_lock(&priv
->rx_queue
.lock
);
288 __skb_unlink(skb
, &priv
->rx_queue
);
290 spin_unlock(&priv
->rx_queue
.lock
);
293 spin_unlock(&priv
->rx_queue
.lock
);
295 if (unlikely(urb
->status
)) {
297 dev_kfree_skb_irq(skb
);
301 skb_put(skb
, urb
->actual_length
);
302 if (!priv
->is_rtl8187b
) {
303 struct rtl8187_rx_hdr
*hdr
=
304 (typeof(hdr
))(skb_tail_pointer(skb
) - sizeof(*hdr
));
305 flags
= le32_to_cpu(hdr
->flags
);
306 signal
= hdr
->signal
& 0x7f;
307 rx_status
.antenna
= (hdr
->signal
>> 7) & 1;
308 rx_status
.noise
= hdr
->noise
;
309 rx_status
.mactime
= le64_to_cpu(hdr
->mac_time
);
310 priv
->quality
= signal
;
311 rx_status
.qual
= priv
->quality
;
312 priv
->noise
= hdr
->noise
;
313 rate
= (flags
>> 20) & 0xF;
314 if (rate
> 3) { /* OFDM rate */
317 else if (signal
< 25)
319 signal
= 90 - signal
;
320 } else { /* CCK rate */
323 else if (signal
< 30)
325 signal
= 95 - signal
;
327 rx_status
.signal
= signal
;
328 priv
->signal
= signal
;
330 struct rtl8187b_rx_hdr
*hdr
=
331 (typeof(hdr
))(skb_tail_pointer(skb
) - sizeof(*hdr
));
332 /* The Realtek datasheet for the RTL8187B shows that the RX
333 * header contains the following quantities: signal quality,
334 * RSSI, AGC, the received power in dB, and the measured SNR.
335 * In testing, none of these quantities show qualitative
336 * agreement with AP signal strength, except for the AGC,
337 * which is inversely proportional to the strength of the
338 * signal. In the following, the quality and signal strength
339 * are derived from the AGC. The arbitrary scaling constants
340 * are chosen to make the results close to the values obtained
341 * for a BCM4312 using b43 as the driver. The noise is ignored
344 flags
= le32_to_cpu(hdr
->flags
);
345 quality
= 170 - hdr
->agc
;
348 signal
= 14 - hdr
->agc
/ 2;
349 rx_status
.qual
= quality
;
350 priv
->quality
= quality
;
351 rx_status
.signal
= signal
;
352 priv
->signal
= signal
;
353 rx_status
.antenna
= (hdr
->rssi
>> 7) & 1;
354 rx_status
.mactime
= le64_to_cpu(hdr
->mac_time
);
355 rate
= (flags
>> 20) & 0xF;
358 skb_trim(skb
, flags
& 0x0FFF);
359 rx_status
.rate_idx
= rate
;
360 rx_status
.freq
= dev
->conf
.channel
->center_freq
;
361 rx_status
.band
= dev
->conf
.channel
->band
;
362 rx_status
.flag
|= RX_FLAG_TSFT
;
363 if (flags
& RTL818X_RX_DESC_FLAG_CRC32_ERR
)
364 rx_status
.flag
|= RX_FLAG_FAILED_FCS_CRC
;
365 ieee80211_rx_irqsafe(dev
, skb
, &rx_status
);
367 skb
= dev_alloc_skb(RTL8187_MAX_RX
);
368 if (unlikely(!skb
)) {
370 /* TODO check rx queue length and refill *somewhere* */
374 info
= (struct rtl8187_rx_info
*)skb
->cb
;
377 urb
->transfer_buffer
= skb_tail_pointer(skb
);
379 skb_queue_tail(&priv
->rx_queue
, skb
);
381 usb_submit_urb(urb
, GFP_ATOMIC
);
384 static int rtl8187_init_urbs(struct ieee80211_hw
*dev
)
386 struct rtl8187_priv
*priv
= dev
->priv
;
389 struct rtl8187_rx_info
*info
;
391 while (skb_queue_len(&priv
->rx_queue
) < 8) {
392 skb
= __dev_alloc_skb(RTL8187_MAX_RX
, GFP_KERNEL
);
395 entry
= usb_alloc_urb(0, GFP_KERNEL
);
400 usb_fill_bulk_urb(entry
, priv
->udev
,
401 usb_rcvbulkpipe(priv
->udev
,
402 priv
->is_rtl8187b
? 3 : 1),
403 skb_tail_pointer(skb
),
404 RTL8187_MAX_RX
, rtl8187_rx_cb
, skb
);
405 info
= (struct rtl8187_rx_info
*)skb
->cb
;
408 skb_queue_tail(&priv
->rx_queue
, skb
);
409 usb_submit_urb(entry
, GFP_KERNEL
);
415 static int rtl8187_cmd_reset(struct ieee80211_hw
*dev
)
417 struct rtl8187_priv
*priv
= dev
->priv
;
421 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
423 reg
|= RTL818X_CMD_RESET
;
424 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
429 if (!(rtl818x_ioread8(priv
, &priv
->map
->CMD
) &
435 printk(KERN_ERR
"%s: Reset timeout!\n", wiphy_name(dev
->wiphy
));
439 /* reload registers from eeprom */
440 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_LOAD
);
445 if (!(rtl818x_ioread8(priv
, &priv
->map
->EEPROM_CMD
) &
446 RTL818X_EEPROM_CMD_CONFIG
))
451 printk(KERN_ERR
"%s: eeprom reset timeout!\n",
452 wiphy_name(dev
->wiphy
));
459 static int rtl8187_init_hw(struct ieee80211_hw
*dev
)
461 struct rtl8187_priv
*priv
= dev
->priv
;
466 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
467 RTL818X_EEPROM_CMD_CONFIG
);
468 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
469 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
|
470 RTL818X_CONFIG3_ANAPARAM_WRITE
);
471 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
472 RTL8187_RTL8225_ANAPARAM_ON
);
473 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
474 RTL8187_RTL8225_ANAPARAM2_ON
);
475 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
&
476 ~RTL818X_CONFIG3_ANAPARAM_WRITE
);
477 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
478 RTL818X_EEPROM_CMD_NORMAL
);
480 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0);
483 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x10);
484 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x11);
485 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x00);
488 res
= rtl8187_cmd_reset(dev
);
492 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
493 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
494 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
,
495 reg
| RTL818X_CONFIG3_ANAPARAM_WRITE
);
496 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
497 RTL8187_RTL8225_ANAPARAM_ON
);
498 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
499 RTL8187_RTL8225_ANAPARAM2_ON
);
500 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
,
501 reg
& ~RTL818X_CONFIG3_ANAPARAM_WRITE
);
502 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
505 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0);
506 rtl818x_iowrite8(priv
, &priv
->map
->GPIO
, 0);
508 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, (4 << 8));
509 rtl818x_iowrite8(priv
, &priv
->map
->GPIO
, 1);
510 rtl818x_iowrite8(priv
, &priv
->map
->GP_ENABLE
, 0);
512 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
514 rtl818x_iowrite16(priv
, (__le16
*)0xFFF4, 0xFFFF);
515 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG1
);
518 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG1
, reg
);
520 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
522 rtl818x_iowrite32(priv
, &priv
->map
->INT_TIMEOUT
, 0);
523 rtl818x_iowrite8(priv
, &priv
->map
->WPA_CONF
, 0);
524 rtl818x_iowrite8(priv
, &priv
->map
->RATE_FALLBACK
, 0x81);
526 // TODO: set RESP_RATE and BRSR properly
527 rtl818x_iowrite8(priv
, &priv
->map
->RESP_RATE
, (8 << 4) | 0);
528 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0x01F3);
531 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0);
532 rtl818x_iowrite8(priv
, &priv
->map
->GPIO
, 0);
533 reg
= rtl818x_ioread8(priv
, (u8
*)0xFE53);
534 rtl818x_iowrite8(priv
, (u8
*)0xFE53, reg
| (1 << 7));
535 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, (4 << 8));
536 rtl818x_iowrite8(priv
, &priv
->map
->GPIO
, 0x20);
537 rtl818x_iowrite8(priv
, &priv
->map
->GP_ENABLE
, 0);
538 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsOutput
, 0x80);
539 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0x80);
540 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x80);
543 rtl818x_iowrite32(priv
, &priv
->map
->RF_TIMING
, 0x000a8008);
544 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0xFFFF);
545 rtl818x_iowrite32(priv
, &priv
->map
->RF_PARA
, 0x00100044);
546 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
547 RTL818X_EEPROM_CMD_CONFIG
);
548 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, 0x44);
549 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
550 RTL818X_EEPROM_CMD_NORMAL
);
551 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x1FF7);
556 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0x01F3);
557 reg
= rtl818x_ioread8(priv
, &priv
->map
->PGSELECT
) & ~1;
558 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
| 1);
559 rtl818x_iowrite16(priv
, (__le16
*)0xFFFE, 0x10);
560 rtl818x_iowrite8(priv
, &priv
->map
->TALLY_SEL
, 0x80);
561 rtl818x_iowrite8(priv
, (u8
*)0xFFFF, 0x60);
562 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
);
567 static const u8 rtl8187b_reg_table
[][3] = {
568 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
569 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
570 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
571 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
573 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
574 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
575 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
576 {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
577 {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
578 {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
580 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
581 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
582 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
583 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
584 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
585 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
586 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
589 {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
590 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
591 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
592 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
593 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
595 {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
596 {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
599 static int rtl8187b_init_hw(struct ieee80211_hw
*dev
)
601 struct rtl8187_priv
*priv
= dev
->priv
;
605 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
606 RTL818X_EEPROM_CMD_CONFIG
);
608 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
609 reg
|= RTL818X_CONFIG3_ANAPARAM_WRITE
| RTL818X_CONFIG3_GNT_SELECT
;
610 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
611 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
612 RTL8187B_RTL8225_ANAPARAM2_ON
);
613 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
614 RTL8187B_RTL8225_ANAPARAM_ON
);
615 rtl818x_iowrite8(priv
, &priv
->map
->ANAPARAM3
,
616 RTL8187B_RTL8225_ANAPARAM3_ON
);
618 rtl818x_iowrite8(priv
, (u8
*)0xFF61, 0x10);
619 reg
= rtl818x_ioread8(priv
, (u8
*)0xFF62);
620 rtl818x_iowrite8(priv
, (u8
*)0xFF62, reg
& ~(1 << 5));
621 rtl818x_iowrite8(priv
, (u8
*)0xFF62, reg
| (1 << 5));
623 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
624 reg
&= ~RTL818X_CONFIG3_ANAPARAM_WRITE
;
625 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
627 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
628 RTL818X_EEPROM_CMD_NORMAL
);
630 res
= rtl8187_cmd_reset(dev
);
634 rtl818x_iowrite16(priv
, (__le16
*)0xFF2D, 0x0FFF);
635 reg
= rtl818x_ioread8(priv
, &priv
->map
->CW_CONF
);
636 reg
|= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT
;
637 rtl818x_iowrite8(priv
, &priv
->map
->CW_CONF
, reg
);
638 reg
= rtl818x_ioread8(priv
, &priv
->map
->TX_AGC_CTL
);
639 reg
|= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT
|
640 RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT
;
641 rtl818x_iowrite8(priv
, &priv
->map
->TX_AGC_CTL
, reg
);
643 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFE0, 0x0FFF, 1);
644 reg
= rtl818x_ioread8(priv
, &priv
->map
->RATE_FALLBACK
);
645 reg
|= RTL818X_RATE_FALLBACK_ENABLE
;
646 rtl818x_iowrite8(priv
, &priv
->map
->RATE_FALLBACK
, reg
);
648 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL
, 100);
649 rtl818x_iowrite16(priv
, &priv
->map
->ATIM_WND
, 2);
650 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFD4, 0xFFFF, 1);
652 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
653 RTL818X_EEPROM_CMD_CONFIG
);
654 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG1
);
655 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG1
, (reg
& 0x3F) | 0x80);
656 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
657 RTL818X_EEPROM_CMD_NORMAL
);
659 rtl818x_iowrite8(priv
, &priv
->map
->WPA_CONF
, 0);
660 for (i
= 0; i
< ARRAY_SIZE(rtl8187b_reg_table
); i
++) {
661 rtl818x_iowrite8_idx(priv
,
663 (rtl8187b_reg_table
[i
][0] | 0xFF00),
664 rtl8187b_reg_table
[i
][1],
665 rtl8187b_reg_table
[i
][2]);
668 rtl818x_iowrite16(priv
, &priv
->map
->TID_AC_MAP
, 0xFA50);
669 rtl818x_iowrite16(priv
, &priv
->map
->INT_MIG
, 0);
671 rtl818x_iowrite32_idx(priv
, (__le32
*)0xFFF0, 0, 1);
672 rtl818x_iowrite32_idx(priv
, (__le32
*)0xFFF4, 0, 1);
673 rtl818x_iowrite8_idx(priv
, (u8
*)0xFFF8, 0, 1);
675 rtl818x_iowrite32(priv
, &priv
->map
->RF_TIMING
, 0x00004001);
677 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF72, 0x569A, 2);
679 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
680 RTL818X_EEPROM_CMD_CONFIG
);
681 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
682 reg
|= RTL818X_CONFIG3_ANAPARAM_WRITE
;
683 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
684 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
685 RTL818X_EEPROM_CMD_NORMAL
);
687 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsOutput
, 0x0480);
688 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0x2488);
689 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x1FFF);
694 reg
= RTL818X_CMD_TX_ENABLE
| RTL818X_CMD_RX_ENABLE
;
695 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
696 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0xFFFF);
698 rtl818x_iowrite8(priv
, (u8
*)0xFE41, 0xF4);
699 rtl818x_iowrite8(priv
, (u8
*)0xFE40, 0x00);
700 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x00);
701 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x01);
702 rtl818x_iowrite8(priv
, (u8
*)0xFE40, 0x0F);
703 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x00);
704 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x01);
706 reg
= rtl818x_ioread8(priv
, (u8
*)0xFFDB);
707 rtl818x_iowrite8(priv
, (u8
*)0xFFDB, reg
| (1 << 2));
708 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF72, 0x59FA, 3);
709 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF74, 0x59D2, 3);
710 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF76, 0x59D2, 3);
711 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF78, 0x19FA, 3);
712 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF7A, 0x19FA, 3);
713 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF7C, 0x00D0, 3);
714 rtl818x_iowrite8(priv
, (u8
*)0xFF61, 0);
715 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF80, 0x0F, 1);
716 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF83, 0x03, 1);
717 rtl818x_iowrite8(priv
, (u8
*)0xFFDA, 0x10);
718 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF4D, 0x08, 2);
720 rtl818x_iowrite32(priv
, &priv
->map
->HSSI_PARA
, 0x0600321B);
722 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFEC, 0x0800, 1);
727 static int rtl8187_start(struct ieee80211_hw
*dev
)
729 struct rtl8187_priv
*priv
= dev
->priv
;
733 ret
= (!priv
->is_rtl8187b
) ? rtl8187_init_hw(dev
) :
734 rtl8187b_init_hw(dev
);
738 mutex_lock(&priv
->conf_mutex
);
739 if (priv
->is_rtl8187b
) {
740 reg
= RTL818X_RX_CONF_MGMT
|
741 RTL818X_RX_CONF_DATA
|
742 RTL818X_RX_CONF_BROADCAST
|
743 RTL818X_RX_CONF_NICMAC
|
744 RTL818X_RX_CONF_BSSID
|
745 (7 << 13 /* RX FIFO threshold NONE */) |
746 (7 << 10 /* MAX RX DMA */) |
747 RTL818X_RX_CONF_RX_AUTORESETPHY
|
748 RTL818X_RX_CONF_ONLYERLPKT
|
749 RTL818X_RX_CONF_MULTICAST
;
751 rtl818x_iowrite32(priv
, &priv
->map
->RX_CONF
, reg
);
753 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
,
754 RTL818X_TX_CONF_HW_SEQNUM
|
755 RTL818X_TX_CONF_DISREQQSIZE
|
756 (7 << 8 /* short retry limit */) |
757 (7 << 0 /* long retry limit */) |
758 (7 << 21 /* MAX TX DMA */));
759 rtl8187_init_urbs(dev
);
760 mutex_unlock(&priv
->conf_mutex
);
764 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0xFFFF);
766 rtl818x_iowrite32(priv
, &priv
->map
->MAR
[0], ~0);
767 rtl818x_iowrite32(priv
, &priv
->map
->MAR
[1], ~0);
769 rtl8187_init_urbs(dev
);
771 reg
= RTL818X_RX_CONF_ONLYERLPKT
|
772 RTL818X_RX_CONF_RX_AUTORESETPHY
|
773 RTL818X_RX_CONF_BSSID
|
774 RTL818X_RX_CONF_MGMT
|
775 RTL818X_RX_CONF_DATA
|
776 (7 << 13 /* RX FIFO threshold NONE */) |
777 (7 << 10 /* MAX RX DMA */) |
778 RTL818X_RX_CONF_BROADCAST
|
779 RTL818X_RX_CONF_NICMAC
;
782 rtl818x_iowrite32(priv
, &priv
->map
->RX_CONF
, reg
);
784 reg
= rtl818x_ioread8(priv
, &priv
->map
->CW_CONF
);
785 reg
&= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT
;
786 reg
|= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT
;
787 rtl818x_iowrite8(priv
, &priv
->map
->CW_CONF
, reg
);
789 reg
= rtl818x_ioread8(priv
, &priv
->map
->TX_AGC_CTL
);
790 reg
&= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT
;
791 reg
&= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT
;
792 reg
&= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT
;
793 rtl818x_iowrite8(priv
, &priv
->map
->TX_AGC_CTL
, reg
);
795 reg
= RTL818X_TX_CONF_CW_MIN
|
796 (7 << 21 /* MAX TX DMA */) |
797 RTL818X_TX_CONF_NO_ICV
;
798 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
, reg
);
800 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
801 reg
|= RTL818X_CMD_TX_ENABLE
;
802 reg
|= RTL818X_CMD_RX_ENABLE
;
803 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
804 mutex_unlock(&priv
->conf_mutex
);
809 static void rtl8187_stop(struct ieee80211_hw
*dev
)
811 struct rtl8187_priv
*priv
= dev
->priv
;
812 struct rtl8187_rx_info
*info
;
816 mutex_lock(&priv
->conf_mutex
);
817 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0);
819 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
820 reg
&= ~RTL818X_CMD_TX_ENABLE
;
821 reg
&= ~RTL818X_CMD_RX_ENABLE
;
822 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
826 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
827 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG4
);
828 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG4
, reg
| RTL818X_CONFIG4_VCOOFF
);
829 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
831 while ((skb
= skb_dequeue(&priv
->rx_queue
))) {
832 info
= (struct rtl8187_rx_info
*)skb
->cb
;
833 usb_kill_urb(info
->urb
);
836 mutex_unlock(&priv
->conf_mutex
);
839 static int rtl8187_add_interface(struct ieee80211_hw
*dev
,
840 struct ieee80211_if_init_conf
*conf
)
842 struct rtl8187_priv
*priv
= dev
->priv
;
845 if (priv
->mode
!= NL80211_IFTYPE_MONITOR
)
848 switch (conf
->type
) {
849 case NL80211_IFTYPE_STATION
:
850 priv
->mode
= conf
->type
;
856 mutex_lock(&priv
->conf_mutex
);
857 priv
->vif
= conf
->vif
;
859 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
860 for (i
= 0; i
< ETH_ALEN
; i
++)
861 rtl818x_iowrite8(priv
, &priv
->map
->MAC
[i
],
862 ((u8
*)conf
->mac_addr
)[i
]);
863 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
865 mutex_unlock(&priv
->conf_mutex
);
869 static void rtl8187_remove_interface(struct ieee80211_hw
*dev
,
870 struct ieee80211_if_init_conf
*conf
)
872 struct rtl8187_priv
*priv
= dev
->priv
;
873 mutex_lock(&priv
->conf_mutex
);
874 priv
->mode
= NL80211_IFTYPE_MONITOR
;
876 mutex_unlock(&priv
->conf_mutex
);
879 static int rtl8187_config(struct ieee80211_hw
*dev
, struct ieee80211_conf
*conf
)
881 struct rtl8187_priv
*priv
= dev
->priv
;
884 mutex_lock(&priv
->conf_mutex
);
885 reg
= rtl818x_ioread32(priv
, &priv
->map
->TX_CONF
);
886 /* Enable TX loopback on MAC level to avoid TX during channel
887 * changes, as this has be seen to causes problems and the
888 * card will stop work until next reset
890 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
,
891 reg
| RTL818X_TX_CONF_LOOPBACK_MAC
);
893 priv
->rf
->set_chan(dev
, conf
);
895 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
, reg
);
897 if (!priv
->is_rtl8187b
) {
898 rtl818x_iowrite8(priv
, &priv
->map
->SIFS
, 0x22);
900 if (conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
) {
901 rtl818x_iowrite8(priv
, &priv
->map
->SLOT
, 0x9);
902 rtl818x_iowrite8(priv
, &priv
->map
->DIFS
, 0x14);
903 rtl818x_iowrite8(priv
, &priv
->map
->EIFS
, 91 - 0x14);
904 rtl818x_iowrite8(priv
, &priv
->map
->CW_VAL
, 0x73);
906 rtl818x_iowrite8(priv
, &priv
->map
->SLOT
, 0x14);
907 rtl818x_iowrite8(priv
, &priv
->map
->DIFS
, 0x24);
908 rtl818x_iowrite8(priv
, &priv
->map
->EIFS
, 91 - 0x24);
909 rtl818x_iowrite8(priv
, &priv
->map
->CW_VAL
, 0xa5);
913 rtl818x_iowrite16(priv
, &priv
->map
->ATIM_WND
, 2);
914 rtl818x_iowrite16(priv
, &priv
->map
->ATIMTR_INTERVAL
, 100);
915 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL
, 100);
916 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL_TIME
, 100);
917 mutex_unlock(&priv
->conf_mutex
);
921 static int rtl8187_config_interface(struct ieee80211_hw
*dev
,
922 struct ieee80211_vif
*vif
,
923 struct ieee80211_if_conf
*conf
)
925 struct rtl8187_priv
*priv
= dev
->priv
;
929 mutex_lock(&priv
->conf_mutex
);
930 for (i
= 0; i
< ETH_ALEN
; i
++)
931 rtl818x_iowrite8(priv
, &priv
->map
->BSSID
[i
], conf
->bssid
[i
]);
933 if (is_valid_ether_addr(conf
->bssid
)) {
934 reg
= RTL818X_MSR_INFRA
;
935 if (priv
->is_rtl8187b
)
936 reg
|= RTL818X_MSR_ENEDCA
;
937 rtl818x_iowrite8(priv
, &priv
->map
->MSR
, reg
);
939 reg
= RTL818X_MSR_NO_LINK
;
940 rtl818x_iowrite8(priv
, &priv
->map
->MSR
, reg
);
943 mutex_unlock(&priv
->conf_mutex
);
947 static void rtl8187_configure_filter(struct ieee80211_hw
*dev
,
948 unsigned int changed_flags
,
949 unsigned int *total_flags
,
950 int mc_count
, struct dev_addr_list
*mclist
)
952 struct rtl8187_priv
*priv
= dev
->priv
;
954 if (changed_flags
& FIF_FCSFAIL
)
955 priv
->rx_conf
^= RTL818X_RX_CONF_FCS
;
956 if (changed_flags
& FIF_CONTROL
)
957 priv
->rx_conf
^= RTL818X_RX_CONF_CTRL
;
958 if (changed_flags
& FIF_OTHER_BSS
)
959 priv
->rx_conf
^= RTL818X_RX_CONF_MONITOR
;
960 if (*total_flags
& FIF_ALLMULTI
|| mc_count
> 0)
961 priv
->rx_conf
|= RTL818X_RX_CONF_MULTICAST
;
963 priv
->rx_conf
&= ~RTL818X_RX_CONF_MULTICAST
;
967 if (priv
->rx_conf
& RTL818X_RX_CONF_FCS
)
968 *total_flags
|= FIF_FCSFAIL
;
969 if (priv
->rx_conf
& RTL818X_RX_CONF_CTRL
)
970 *total_flags
|= FIF_CONTROL
;
971 if (priv
->rx_conf
& RTL818X_RX_CONF_MONITOR
)
972 *total_flags
|= FIF_OTHER_BSS
;
973 if (priv
->rx_conf
& RTL818X_RX_CONF_MULTICAST
)
974 *total_flags
|= FIF_ALLMULTI
;
976 rtl818x_iowrite32_async(priv
, &priv
->map
->RX_CONF
, priv
->rx_conf
);
979 static const struct ieee80211_ops rtl8187_ops
= {
981 .start
= rtl8187_start
,
982 .stop
= rtl8187_stop
,
983 .add_interface
= rtl8187_add_interface
,
984 .remove_interface
= rtl8187_remove_interface
,
985 .config
= rtl8187_config
,
986 .config_interface
= rtl8187_config_interface
,
987 .configure_filter
= rtl8187_configure_filter
,
990 static void rtl8187_eeprom_register_read(struct eeprom_93cx6
*eeprom
)
992 struct ieee80211_hw
*dev
= eeprom
->data
;
993 struct rtl8187_priv
*priv
= dev
->priv
;
994 u8 reg
= rtl818x_ioread8(priv
, &priv
->map
->EEPROM_CMD
);
996 eeprom
->reg_data_in
= reg
& RTL818X_EEPROM_CMD_WRITE
;
997 eeprom
->reg_data_out
= reg
& RTL818X_EEPROM_CMD_READ
;
998 eeprom
->reg_data_clock
= reg
& RTL818X_EEPROM_CMD_CK
;
999 eeprom
->reg_chip_select
= reg
& RTL818X_EEPROM_CMD_CS
;
1002 static void rtl8187_eeprom_register_write(struct eeprom_93cx6
*eeprom
)
1004 struct ieee80211_hw
*dev
= eeprom
->data
;
1005 struct rtl8187_priv
*priv
= dev
->priv
;
1006 u8 reg
= RTL818X_EEPROM_CMD_PROGRAM
;
1008 if (eeprom
->reg_data_in
)
1009 reg
|= RTL818X_EEPROM_CMD_WRITE
;
1010 if (eeprom
->reg_data_out
)
1011 reg
|= RTL818X_EEPROM_CMD_READ
;
1012 if (eeprom
->reg_data_clock
)
1013 reg
|= RTL818X_EEPROM_CMD_CK
;
1014 if (eeprom
->reg_chip_select
)
1015 reg
|= RTL818X_EEPROM_CMD_CS
;
1017 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, reg
);
1021 static int __devinit
rtl8187_probe(struct usb_interface
*intf
,
1022 const struct usb_device_id
*id
)
1024 struct usb_device
*udev
= interface_to_usbdev(intf
);
1025 struct ieee80211_hw
*dev
;
1026 struct rtl8187_priv
*priv
;
1027 struct eeprom_93cx6 eeprom
;
1028 struct ieee80211_channel
*channel
;
1029 const char *chip_name
;
1032 DECLARE_MAC_BUF(mac
);
1034 dev
= ieee80211_alloc_hw(sizeof(*priv
), &rtl8187_ops
);
1036 printk(KERN_ERR
"rtl8187: ieee80211 alloc failed\n");
1041 priv
->is_rtl8187b
= (id
->driver_info
== DEVICE_RTL8187B
);
1043 SET_IEEE80211_DEV(dev
, &intf
->dev
);
1044 usb_set_intfdata(intf
, dev
);
1049 skb_queue_head_init(&priv
->rx_queue
);
1051 BUILD_BUG_ON(sizeof(priv
->channels
) != sizeof(rtl818x_channels
));
1052 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(rtl818x_rates
));
1054 memcpy(priv
->channels
, rtl818x_channels
, sizeof(rtl818x_channels
));
1055 memcpy(priv
->rates
, rtl818x_rates
, sizeof(rtl818x_rates
));
1056 priv
->map
= (struct rtl818x_csr
*)0xFF00;
1058 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
1059 priv
->band
.channels
= priv
->channels
;
1060 priv
->band
.n_channels
= ARRAY_SIZE(rtl818x_channels
);
1061 priv
->band
.bitrates
= priv
->rates
;
1062 priv
->band
.n_bitrates
= ARRAY_SIZE(rtl818x_rates
);
1063 dev
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
1066 priv
->mode
= NL80211_IFTYPE_MONITOR
;
1067 dev
->flags
= IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING
|
1068 IEEE80211_HW_RX_INCLUDES_FCS
;
1071 eeprom
.register_read
= rtl8187_eeprom_register_read
;
1072 eeprom
.register_write
= rtl8187_eeprom_register_write
;
1073 if (rtl818x_ioread32(priv
, &priv
->map
->RX_CONF
) & (1 << 6))
1074 eeprom
.width
= PCI_EEPROM_WIDTH_93C66
;
1076 eeprom
.width
= PCI_EEPROM_WIDTH_93C46
;
1078 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
1081 eeprom_93cx6_multiread(&eeprom
, RTL8187_EEPROM_MAC_ADDR
,
1082 (__le16 __force
*)dev
->wiphy
->perm_addr
, 3);
1083 if (!is_valid_ether_addr(dev
->wiphy
->perm_addr
)) {
1084 printk(KERN_WARNING
"rtl8187: Invalid hwaddr! Using randomly "
1085 "generated MAC address\n");
1086 random_ether_addr(dev
->wiphy
->perm_addr
);
1089 channel
= priv
->channels
;
1090 for (i
= 0; i
< 3; i
++) {
1091 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_1
+ i
,
1093 (*channel
++).hw_value
= txpwr
& 0xFF;
1094 (*channel
++).hw_value
= txpwr
>> 8;
1096 for (i
= 0; i
< 2; i
++) {
1097 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_4
+ i
,
1099 (*channel
++).hw_value
= txpwr
& 0xFF;
1100 (*channel
++).hw_value
= txpwr
>> 8;
1103 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_BASE
,
1106 reg
= rtl818x_ioread8(priv
, &priv
->map
->PGSELECT
) & ~1;
1107 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
| 1);
1108 /* 0 means asic B-cut, we should use SW 3 wire
1109 * bit-by-bit banging for radio. 1 means we can use
1110 * USB specific request to write radio registers */
1111 priv
->asic_rev
= rtl818x_ioread8(priv
, (u8
*)0xFFFE) & 0x3;
1112 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
);
1113 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
1115 if (!priv
->is_rtl8187b
) {
1117 reg32
= rtl818x_ioread32(priv
, &priv
->map
->TX_CONF
);
1118 reg32
&= RTL818X_TX_CONF_HWVER_MASK
;
1120 case RTL818X_TX_CONF_R8187vD_B
:
1121 /* Some RTL8187B devices have a USB ID of 0x8187
1122 * detect them here */
1123 chip_name
= "RTL8187BvB(early)";
1124 priv
->is_rtl8187b
= 1;
1125 priv
->hw_rev
= RTL8187BvB
;
1127 case RTL818X_TX_CONF_R8187vD
:
1128 chip_name
= "RTL8187vD";
1131 chip_name
= "RTL8187vB (default)";
1135 * Force USB request to write radio registers for 8187B, Realtek
1136 * only uses it in their sources
1138 /*if (priv->asic_rev == 0) {
1139 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1140 "requests to write to radio registers\n");
1143 switch (rtl818x_ioread8(priv
, (u8
*)0xFFE1)) {
1144 case RTL818X_R8187B_B
:
1145 chip_name
= "RTL8187BvB";
1146 priv
->hw_rev
= RTL8187BvB
;
1148 case RTL818X_R8187B_D
:
1149 chip_name
= "RTL8187BvD";
1150 priv
->hw_rev
= RTL8187BvD
;
1152 case RTL818X_R8187B_E
:
1153 chip_name
= "RTL8187BvE";
1154 priv
->hw_rev
= RTL8187BvE
;
1157 chip_name
= "RTL8187BvB (default)";
1158 priv
->hw_rev
= RTL8187BvB
;
1162 if (!priv
->is_rtl8187b
) {
1163 for (i
= 0; i
< 2; i
++) {
1164 eeprom_93cx6_read(&eeprom
,
1165 RTL8187_EEPROM_TXPWR_CHAN_6
+ i
,
1167 (*channel
++).hw_value
= txpwr
& 0xFF;
1168 (*channel
++).hw_value
= txpwr
>> 8;
1171 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_6
,
1173 (*channel
++).hw_value
= txpwr
& 0xFF;
1175 eeprom_93cx6_read(&eeprom
, 0x0A, &txpwr
);
1176 (*channel
++).hw_value
= txpwr
& 0xFF;
1178 eeprom_93cx6_read(&eeprom
, 0x1C, &txpwr
);
1179 (*channel
++).hw_value
= txpwr
& 0xFF;
1180 (*channel
++).hw_value
= txpwr
>> 8;
1183 if (priv
->is_rtl8187b
) {
1184 printk(KERN_WARNING
"rtl8187: 8187B chip detected. Support "
1185 "is EXPERIMENTAL, and could damage your\n"
1186 " hardware, use at your own risk\n");
1187 dev
->flags
|= IEEE80211_HW_SIGNAL_DBM
;
1189 dev
->flags
|= IEEE80211_HW_SIGNAL_UNSPEC
;
1190 dev
->max_signal
= 65;
1193 dev
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
1195 if ((id
->driver_info
== DEVICE_RTL8187
) && priv
->is_rtl8187b
)
1196 printk(KERN_INFO
"rtl8187: inconsistency between id with OEM"
1199 priv
->rf
= rtl8187_detect_rf(dev
);
1200 dev
->extra_tx_headroom
= (!priv
->is_rtl8187b
) ?
1201 sizeof(struct rtl8187_tx_hdr
) :
1202 sizeof(struct rtl8187b_tx_hdr
);
1203 if (!priv
->is_rtl8187b
)
1208 err
= ieee80211_register_hw(dev
);
1210 printk(KERN_ERR
"rtl8187: Cannot register device\n");
1213 mutex_init(&priv
->conf_mutex
);
1215 printk(KERN_INFO
"%s: hwaddr %s, %s V%d + %s\n",
1216 wiphy_name(dev
->wiphy
), print_mac(mac
, dev
->wiphy
->perm_addr
),
1217 chip_name
, priv
->asic_rev
, priv
->rf
->name
);
1222 ieee80211_free_hw(dev
);
1223 usb_set_intfdata(intf
, NULL
);
1228 static void __devexit
rtl8187_disconnect(struct usb_interface
*intf
)
1230 struct ieee80211_hw
*dev
= usb_get_intfdata(intf
);
1231 struct rtl8187_priv
*priv
;
1236 ieee80211_unregister_hw(dev
);
1239 usb_put_dev(interface_to_usbdev(intf
));
1240 ieee80211_free_hw(dev
);
1243 static struct usb_driver rtl8187_driver
= {
1244 .name
= KBUILD_MODNAME
,
1245 .id_table
= rtl8187_table
,
1246 .probe
= rtl8187_probe
,
1247 .disconnect
= __devexit_p(rtl8187_disconnect
),
1250 static int __init
rtl8187_init(void)
1252 return usb_register(&rtl8187_driver
);
1255 static void __exit
rtl8187_exit(void)
1257 usb_deregister(&rtl8187_driver
);
1260 module_init(rtl8187_init
);
1261 module_exit(rtl8187_exit
);