drivers/net/wireless/ti/wlcore/wlcore.h

   1 /*
   2  * This file is part of wlcore
   3  *
   4  * Copyright (C) 2011 Texas Instruments Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18  * 02110-1301 USA
  19  *
  20  */
  21
  22 #ifndef __WLCORE_H__
  23 #define __WLCORE_H__
  24
  25 #include <linux/platform_device.h>
  26
  27 #include "wlcore_i.h"
  28 #include "event.h"
  29 #include "boot.h"
  30
  31 /* The maximum number of Tx descriptors in all chip families */
  32 #define WLCORE_MAX_TX_DESCRIPTORS 32
  33
  34 /* forward declaration */
  35 struct wl1271_tx_hw_descr;
  36 enum wl_rx_buf_align;
  37 struct wl1271_rx_descriptor;
  38
  39 struct wlcore_ops {
  40         int (*identify_chip)(struct wl1271 *wl);
  41         int (*identify_fw)(struct wl1271 *wl);
  42         int (*boot)(struct wl1271 *wl);
  43         int (*plt_init)(struct wl1271 *wl);
  44         int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr,
  45                            void *buf, size_t len);
  46         int (*ack_event)(struct wl1271 *wl);
  47         u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);
  48         void (*set_tx_desc_blocks)(struct wl1271 *wl,
  49                                    struct wl1271_tx_hw_descr *desc,
  50                                    u32 blks, u32 spare_blks);
  51         void (*set_tx_desc_data_len)(struct wl1271 *wl,
  52                                      struct wl1271_tx_hw_descr *desc,
  53                                      struct sk_buff *skb);
  54         enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,
  55                                                  u32 rx_desc);
  56         int (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len);
  57         u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data,
  58                                  u32 data_len);
  59         int (*tx_delayed_compl)(struct wl1271 *wl);
  60         void (*tx_immediate_compl)(struct wl1271 *wl);
  61         int (*hw_init)(struct wl1271 *wl);
  62         int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
  63         u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl,
  64                                     struct wl12xx_vif *wlvif);
  65         int (*get_pg_ver)(struct wl1271 *wl, s8 *ver);
  66         int (*get_mac)(struct wl1271 *wl);
  67         void (*set_tx_desc_csum)(struct wl1271 *wl,
  68                                  struct wl1271_tx_hw_descr *desc,
  69                                  struct sk_buff *skb);
  70         void (*set_rx_csum)(struct wl1271 *wl,
  71                             struct wl1271_rx_descriptor *desc,
  72                             struct sk_buff *skb);
  73         u32 (*ap_get_mimo_wide_rate_mask)(struct wl1271 *wl,
  74                                           struct wl12xx_vif *wlvif);
  75         int (*debugfs_init)(struct wl1271 *wl, struct dentry *rootdir);
  76         int (*handle_static_data)(struct wl1271 *wl,
  77                                   struct wl1271_static_data *static_data);
  78         int (*get_spare_blocks)(struct wl1271 *wl, bool is_gem);
  79         int (*set_key)(struct wl1271 *wl, enum set_key_cmd cmd,
  80                        struct ieee80211_vif *vif,
  81                        struct ieee80211_sta *sta,
  82                        struct ieee80211_key_conf *key_conf);
  83         u32 (*pre_pkt_send)(struct wl1271 *wl, u32 buf_offset, u32 last_len);
  84 };
  85
  86 enum wlcore_partitions {
  87         PART_DOWN,
  88         PART_WORK,
  89         PART_BOOT,
  90         PART_DRPW,
  91         PART_TOP_PRCM_ELP_SOC,
  92         PART_PHY_INIT,
  93
  94         PART_TABLE_LEN,
  95 };
  96
  97 struct wlcore_partition {
  98         u32 size;
  99         u32 start;
 100 };
 101
 102 struct wlcore_partition_set {
 103         struct wlcore_partition mem;
 104         struct wlcore_partition reg;
 105         struct wlcore_partition mem2;
 106         struct wlcore_partition mem3;
 107 };
 108
 109 enum wlcore_registers {
 110         /* register addresses, used with partition translation */
 111         REG_ECPU_CONTROL,
 112         REG_INTERRUPT_NO_CLEAR,
 113         REG_INTERRUPT_ACK,
 114         REG_COMMAND_MAILBOX_PTR,
 115         REG_EVENT_MAILBOX_PTR,
 116         REG_INTERRUPT_TRIG,
 117         REG_INTERRUPT_MASK,
 118         REG_PC_ON_RECOVERY,
 119         REG_CHIP_ID_B,
 120         REG_CMD_MBOX_ADDRESS,
 121
 122         /* data access memory addresses, used with partition translation */
 123         REG_SLV_MEM_DATA,
 124         REG_SLV_REG_DATA,
 125
 126         /* raw data access memory addresses */
 127         REG_RAW_FW_STATUS_ADDR,
 128
 129         REG_TABLE_LEN,
 130 };
 131
 132 struct wl1271_stats {
 133         void *fw_stats;
 134         unsigned long fw_stats_update;
 135         size_t fw_stats_len;
 136
 137         unsigned int retry_count;
 138         unsigned int excessive_retries;
 139 };
 140
 141 struct wl1271 {
 142         struct ieee80211_hw *hw;
 143         bool mac80211_registered;
 144
 145         struct device *dev;
 146
 147         void *if_priv;
 148
 149         struct wl1271_if_operations *if_ops;
 150
 151         void (*set_power)(bool enable);
 152         int irq;
 153
 154         spinlock_t wl_lock;
 155
 156         enum wl1271_state state;
 157         enum wl12xx_fw_type fw_type;
 158         bool plt;
 159         u8 last_vif_count;
 160         struct mutex mutex;
 161
 162         unsigned long flags;
 163
 164         struct wlcore_partition_set curr_part;
 165
 166         struct wl1271_chip chip;
 167
 168         int cmd_box_addr;
 169
 170         u8 *fw;
 171         size_t fw_len;
 172         void *nvs;
 173         size_t nvs_len;
 174
 175         s8 hw_pg_ver;
 176
 177         /* address read from the fuse ROM */
 178         u32 fuse_oui_addr;
 179         u32 fuse_nic_addr;
 180
 181         /* we have up to 2 MAC addresses */
 182         struct mac_address addresses[2];
 183         int channel;
 184         u8 system_hlid;
 185
 186         unsigned long links_map[BITS_TO_LONGS(WL12XX_MAX_LINKS)];
 187         unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
 188         unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
 189         unsigned long rate_policies_map[
 190                         BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];
 191
 192         struct list_head wlvif_list;
 193
 194         u8 sta_count;
 195         u8 ap_count;
 196
 197         struct wl1271_acx_mem_map *target_mem_map;
 198
 199         /* Accounting for allocated / available TX blocks on HW */
 200         u32 tx_blocks_freed;
 201         u32 tx_blocks_available;
 202         u32 tx_allocated_blocks;
 203         u32 tx_results_count;
 204
 205         /* Accounting for allocated / available Tx packets in HW */
 206         u32 tx_pkts_freed[NUM_TX_QUEUES];
 207         u32 tx_allocated_pkts[NUM_TX_QUEUES];
 208
 209         /* Transmitted TX packets counter for chipset interface */
 210         u32 tx_packets_count;
 211
 212         /* Time-offset between host and chipset clocks */
 213         s64 time_offset;
 214
 215         /* Frames scheduled for transmission, not handled yet */
 216         int tx_queue_count[NUM_TX_QUEUES];
 217         unsigned long queue_stop_reasons[NUM_TX_QUEUES];
 218
 219         /* Frames received, not handled yet by mac80211 */
 220         struct sk_buff_head deferred_rx_queue;
 221
 222         /* Frames sent, not returned yet to mac80211 */
 223         struct sk_buff_head deferred_tx_queue;
 224
 225         struct work_struct tx_work;
 226         struct workqueue_struct *freezable_wq;
 227
 228         /* Pending TX frames */
 229         unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)];
 230         struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS];
 231         int tx_frames_cnt;
 232
 233         /* FW Rx counter */
 234         u32 rx_counter;
 235
 236         /* Intermediate buffer, used for packet aggregation */
 237         u8 *aggr_buf;
 238
 239         /* Reusable dummy packet template */
 240         struct sk_buff *dummy_packet;
 241
 242         /* Network stack work  */
 243         struct work_struct netstack_work;
 244
 245         /* FW log buffer */
 246         u8 *fwlog;
 247
 248         /* Number of valid bytes in the FW log buffer */
 249         ssize_t fwlog_size;
 250
 251         /* Sysfs FW log entry readers wait queue */
 252         wait_queue_head_t fwlog_waitq;
 253
 254         /* Hardware recovery work */
 255         struct work_struct recovery_work;
 256         bool watchdog_recovery;
 257
 258         /* Pointer that holds DMA-friendly block for the mailbox */
 259         struct event_mailbox *mbox;
 260
 261         /* The mbox event mask */
 262         u32 event_mask;
 263
 264         /* Mailbox pointers */
 265         u32 mbox_ptr[2];
 266
 267         /* Are we currently scanning */
 268         struct ieee80211_vif *scan_vif;
 269         struct wl1271_scan scan;
 270         struct delayed_work scan_complete_work;
 271
 272         /* Connection loss work */
 273         struct delayed_work connection_loss_work;
 274
 275         bool sched_scanning;
 276
 277         /* The current band */
 278         enum ieee80211_band band;
 279
 280         struct completion *elp_compl;
 281         struct delayed_work elp_work;
 282
 283         /* in dBm */
 284         int power_level;
 285
 286         struct wl1271_stats stats;
 287
 288         __le32 buffer_32;
 289         u32 buffer_cmd;
 290         u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
 291
 292         struct wl_fw_status_1 *fw_status_1;
 293         struct wl_fw_status_2 *fw_status_2;
 294         struct wl1271_tx_hw_res_if *tx_res_if;
 295
 296         /* Current chipset configuration */
 297         struct wlcore_conf conf;
 298
 299         bool sg_enabled;
 300
 301         bool enable_11a;
 302
 303         /* Most recently reported noise in dBm */
 304         s8 noise;
 305
 306         /* bands supported by this instance of wl12xx */
 307         struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
 308
 309         /*
 310          * wowlan trigger was configured during suspend.
 311          * (currently, only "ANY" trigger is supported)
 312          */
 313         bool wow_enabled;
 314         bool irq_wake_enabled;
 315
 316         /*
 317          * AP-mode - links indexed by HLID. The global and broadcast links
 318          * are always active.
 319          */
 320         struct wl1271_link links[WL12XX_MAX_LINKS];
 321
 322         /* AP-mode - a bitmap of links currently in PS mode according to FW */
 323         u32 ap_fw_ps_map;
 324
 325         /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
 326         unsigned long ap_ps_map;
 327
 328         /* Quirks of specific hardware revisions */
 329         unsigned int quirks;
 330
 331         /* Platform limitations */
 332         unsigned int platform_quirks;
 333
 334         /* number of currently active RX BA sessions */
 335         int ba_rx_session_count;
 336
 337         /* AP-mode - number of currently connected stations */
 338         int active_sta_count;
 339
 340         /* last wlvif we transmitted from */
 341         struct wl12xx_vif *last_wlvif;
 342
 343         /* work to fire when Tx is stuck */
 344         struct delayed_work tx_watchdog_work;
 345
 346         struct wlcore_ops *ops;
 347         /* pointer to the lower driver partition table */
 348         const struct wlcore_partition_set *ptable;
 349         /* pointer to the lower driver register table */
 350         const int *rtable;
 351         /* name of the firmwares to load - for PLT, single role, multi-role */
 352         const char *plt_fw_name;
 353         const char *sr_fw_name;
 354         const char *mr_fw_name;
 355
 356         /* per-chip-family private structure */
 357         void *priv;
 358
 359         /* number of TX descriptors the HW supports. */
 360         u32 num_tx_desc;
 361         /* number of RX descriptors the HW supports. */
 362         u32 num_rx_desc;
 363
 364         /* translate HW Tx rates to standard rate-indices */
 365         const u8 **band_rate_to_idx;
 366
 367         /* size of table for HW rates that can be received from chip */
 368         u8 hw_tx_rate_tbl_size;
 369
 370         /* this HW rate and below are considered HT rates for this chip */
 371         u8 hw_min_ht_rate;
 372
 373         /* HW HT (11n) capabilities */
 374         struct ieee80211_sta_ht_cap ht_cap[IEEE80211_NUM_BANDS];
 375
 376         /* size of the private FW status data */
 377         size_t fw_status_priv_len;
 378
 379         /* RX Data filter rule state - enabled/disabled */
 380         bool rx_filter_enabled[WL1271_MAX_RX_FILTERS];
 381
 382         /* size of the private static data */
 383         size_t static_data_priv_len;
 384
 385         /* the current channel type */
 386         enum nl80211_channel_type channel_type;
 387
 388         /* mutex for protecting the tx_flush function */
 389         struct mutex flush_mutex;
 390
 391         /* sleep auth value currently configured to FW */
 392         int sleep_auth;
 393
 394         /* the minimum FW version required for the driver to work */
 395         unsigned int min_fw_ver[NUM_FW_VER];
 396 };
 397
 398 int __devinit wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);
 399 int __devexit wlcore_remove(struct platform_device *pdev);
 400 struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size);
 401 int wlcore_free_hw(struct wl1271 *wl);
 402 int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
 403                    struct ieee80211_vif *vif,
 404                    struct ieee80211_sta *sta,
 405                    struct ieee80211_key_conf *key_conf);
 406
 407 static inline void
 408 wlcore_set_ht_cap(struct wl1271 *wl, enum ieee80211_band band,
 409                   struct ieee80211_sta_ht_cap *ht_cap)
 410 {
 411         memcpy(&wl->ht_cap[band], ht_cap, sizeof(*ht_cap));
 412 }
 413
 414 static inline void
 415 wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip,
 416                       unsigned int iftype, unsigned int major,
 417                       unsigned int subtype, unsigned int minor)
 418 {
 419         wl->min_fw_ver[FW_VER_CHIP] = chip;
 420         wl->min_fw_ver[FW_VER_IF_TYPE] = iftype;
 421         wl->min_fw_ver[FW_VER_MAJOR] = major;
 422         wl->min_fw_ver[FW_VER_SUBTYPE] = subtype;
 423         wl->min_fw_ver[FW_VER_MINOR] = minor;
 424 }
 425
 426 /* Firmware image load chunk size */
 427 #define CHUNK_SIZE      16384
 428
 429 /* Quirks */
 430
 431 /* Each RX/TX transaction requires an end-of-transaction transfer */
 432 #define WLCORE_QUIRK_END_OF_TRANSACTION         BIT(0)
 433
 434 /* wl127x and SPI don't support SDIO block size alignment */
 435 #define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN         BIT(2)
 436
 437 /* means aggregated Rx packets are aligned to a SDIO block */
 438 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN         BIT(3)
 439
 440 /* Older firmwares did not implement the FW logger over bus feature */
 441 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED      BIT(4)
 442
 443 /* Older firmwares use an old NVS format */
 444 #define WLCORE_QUIRK_LEGACY_NVS                 BIT(5)
 445
 446 /* Some firmwares may not support ELP */
 447 #define WLCORE_QUIRK_NO_ELP                     BIT(6)
 448
 449 /* pad only the last frame in the aggregate buffer */
 450 #define WLCORE_QUIRK_TX_PAD_LAST_FRAME          BIT(7)
 451
 452 /* extra header space is required for TKIP */
 453 #define WLCORE_QUIRK_TKIP_HEADER_SPACE          BIT(8)
 454
 455 /* Some firmwares not support sched scans while connected */
 456 #define WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN   BIT(9)
 457
 458 /* separate probe response templates for one-shot and sched scans */
 459 #define WLCORE_QUIRK_DUAL_PROBE_TMPL            BIT(10)
 460
 461 /* TODO: move to the lower drivers when all usages are abstracted */
 462 #define CHIP_ID_1271_PG10              (0x4030101)
 463 #define CHIP_ID_1271_PG20              (0x4030111)
 464 #define CHIP_ID_1283_PG10              (0x05030101)
 465 #define CHIP_ID_1283_PG20              (0x05030111)
 466
 467 /* TODO: move all these common registers and values elsewhere */
 468 #define HW_ACCESS_ELP_CTRL_REG          0x1FFFC
 469
 470 /* ELP register commands */
 471 #define ELPCTRL_WAKE_UP             0x1
 472 #define ELPCTRL_WAKE_UP_WLAN_READY  0x5
 473 #define ELPCTRL_SLEEP               0x0
 474 /* ELP WLAN_READY bit */
 475 #define ELPCTRL_WLAN_READY          0x2
 476
 477 /*************************************************************************
 478
 479     Interrupt Trigger Register (Host -> WiLink)
 480
 481 **************************************************************************/
 482
 483 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */
 484
 485 /*
 486  * The host sets this bit to inform the Wlan
 487  * FW that a TX packet is in the XFER
 488  * Buffer #0.
 489  */
 490 #define INTR_TRIG_TX_PROC0 BIT(2)
 491
 492 /*
 493  * The host sets this bit to inform the FW
 494  * that it read a packet from RX XFER
 495  * Buffer #0.
 496  */
 497 #define INTR_TRIG_RX_PROC0 BIT(3)
 498
 499 #define INTR_TRIG_DEBUG_ACK BIT(4)
 500
 501 #define INTR_TRIG_STATE_CHANGED BIT(5)
 502
 503 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */
 504
 505 /*
 506  * The host sets this bit to inform the FW
 507  * that it read a packet from RX XFER
 508  * Buffer #1.
 509  */
 510 #define INTR_TRIG_RX_PROC1 BIT(17)
 511
 512 /*
 513  * The host sets this bit to inform the Wlan
 514  * hardware that a TX packet is in the XFER
 515  * Buffer #1.
 516  */
 517 #define INTR_TRIG_TX_PROC1 BIT(18)
 518
 519 #define ACX_SLV_SOFT_RESET_BIT  BIT(1)
 520 #define SOFT_RESET_MAX_TIME     1000000
 521 #define SOFT_RESET_STALL_TIME   1000
 522
 523 #define ECPU_CONTROL_HALT       0x00000101
 524
 525 #define WELP_ARM_COMMAND_VAL    0x4
 526
 527 #endif /* __WLCORE_H__ */