drivers/net/wireless/ti/wlcore/wlcore.h

   1 /*
   2  * This file is part of wlcore
   3  *
   4  * Copyright (C) 2011 Texas Instruments Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18  * 02110-1301 USA
  19  *
  20  */
  21
  22 #ifndef __WLCORE_H__
  23 #define __WLCORE_H__
  24
  25 #include <linux/platform_device.h>
  26
  27 #include "wl12xx.h"
  28 #include "event.h"
  29
  30 /* The maximum number of Tx descriptors in all chip families */
  31 #define WLCORE_MAX_TX_DESCRIPTORS 32
  32
  33 /* forward declaration */
  34 struct wl1271_tx_hw_descr;
  35 enum wl_rx_buf_align;
  36 struct wlcore_ops {
  37         int (*identify_chip)(struct wl1271 *wl);
  38         int (*boot)(struct wl1271 *wl);
  39         void (*trigger_cmd)(struct wl1271 *wl);
  40         void (*ack_event)(struct wl1271 *wl);
  41         u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);
  42         void (*set_tx_desc_blocks)(struct wl1271 *wl,
  43                                    struct wl1271_tx_hw_descr *desc,
  44                                    u32 blks, u32 spare_blks);
  45         void (*set_tx_desc_data_len)(struct wl1271 *wl,
  46                                      struct wl1271_tx_hw_descr *desc,
  47                                      struct sk_buff *skb);
  48         enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,
  49                                                  u32 rx_desc);
  50         s8 (*get_pg_ver)(struct wl1271 *wl);
  51         void (*get_mac)(struct wl1271 *wl);
  52 };
  53
  54 enum wlcore_partitions {
  55         PART_DOWN,
  56         PART_WORK,
  57         PART_BOOT,
  58         PART_DRPW,
  59         PART_TOP_PRCM_ELP_SOC,
  60         PART_PHY_INIT,
  61
  62         PART_TABLE_LEN,
  63 };
  64
  65 struct wlcore_partition {
  66         u32 size;
  67         u32 start;
  68 };
  69
  70 struct wlcore_partition_set {
  71         struct wlcore_partition mem;
  72         struct wlcore_partition reg;
  73         struct wlcore_partition mem2;
  74         struct wlcore_partition mem3;
  75 };
  76
  77 enum wlcore_registers {
  78         /* register addresses, used with partition translation */
  79         REG_ECPU_CONTROL,
  80         REG_INTERRUPT_NO_CLEAR,
  81         REG_INTERRUPT_ACK,
  82         REG_COMMAND_MAILBOX_PTR,
  83         REG_EVENT_MAILBOX_PTR,
  84         REG_INTERRUPT_TRIG,
  85         REG_INTERRUPT_MASK,
  86         REG_PC_ON_RECOVERY,
  87         REG_CHIP_ID_B,
  88         REG_CMD_MBOX_ADDRESS,
  89
  90         /* data access memory addresses, used with partition translation */
  91         REG_SLV_MEM_DATA,
  92         REG_SLV_REG_DATA,
  93
  94         /* raw data access memory addresses */
  95         REG_RAW_FW_STATUS_ADDR,
  96
  97         REG_TABLE_LEN,
  98 };
  99
 100 struct wl1271 {
 101         struct ieee80211_hw *hw;
 102         bool mac80211_registered;
 103
 104         struct device *dev;
 105
 106         void *if_priv;
 107
 108         struct wl1271_if_operations *if_ops;
 109
 110         void (*set_power)(bool enable);
 111         int irq;
 112         int ref_clock;
 113
 114         spinlock_t wl_lock;
 115
 116         enum wl1271_state state;
 117         enum wl12xx_fw_type fw_type;
 118         bool plt;
 119         u8 last_vif_count;
 120         struct mutex mutex;
 121
 122         unsigned long flags;
 123
 124         struct wlcore_partition_set curr_part;
 125
 126         struct wl1271_chip chip;
 127
 128         int cmd_box_addr;
 129
 130         u8 *fw;
 131         size_t fw_len;
 132         void *nvs;
 133         size_t nvs_len;
 134
 135         s8 hw_pg_ver;
 136
 137         /* address read from the fuse ROM */
 138         u32 fuse_oui_addr;
 139         u32 fuse_nic_addr;
 140
 141         /* we have up to 2 MAC addresses */
 142         struct mac_address addresses[2];
 143         int channel;
 144         u8 system_hlid;
 145
 146         unsigned long links_map[BITS_TO_LONGS(WL12XX_MAX_LINKS)];
 147         unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
 148         unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
 149         unsigned long rate_policies_map[
 150                         BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];
 151
 152         struct list_head wlvif_list;
 153
 154         u8 sta_count;
 155         u8 ap_count;
 156
 157         struct wl1271_acx_mem_map *target_mem_map;
 158
 159         /* Accounting for allocated / available TX blocks on HW */
 160         u32 tx_blocks_freed;
 161         u32 tx_blocks_available;
 162         u32 tx_allocated_blocks;
 163         u32 tx_results_count;
 164
 165         /* Accounting for allocated / available Tx packets in HW */
 166         u32 tx_pkts_freed[NUM_TX_QUEUES];
 167         u32 tx_allocated_pkts[NUM_TX_QUEUES];
 168
 169         /* Transmitted TX packets counter for chipset interface */
 170         u32 tx_packets_count;
 171
 172         /* Time-offset between host and chipset clocks */
 173         s64 time_offset;
 174
 175         /* Frames scheduled for transmission, not handled yet */
 176         int tx_queue_count[NUM_TX_QUEUES];
 177         long stopped_queues_map;
 178
 179         /* Frames received, not handled yet by mac80211 */
 180         struct sk_buff_head deferred_rx_queue;
 181
 182         /* Frames sent, not returned yet to mac80211 */
 183         struct sk_buff_head deferred_tx_queue;
 184
 185         struct work_struct tx_work;
 186         struct workqueue_struct *freezable_wq;
 187
 188         /* Pending TX frames */
 189         unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)];
 190         struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS];
 191         int tx_frames_cnt;
 192
 193         /* FW Rx counter */
 194         u32 rx_counter;
 195
 196         /* Rx memory pool address */
 197         struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
 198
 199         /* Intermediate buffer, used for packet aggregation */
 200         u8 *aggr_buf;
 201
 202         /* Reusable dummy packet template */
 203         struct sk_buff *dummy_packet;
 204
 205         /* Network stack work  */
 206         struct work_struct netstack_work;
 207
 208         /* FW log buffer */
 209         u8 *fwlog;
 210
 211         /* Number of valid bytes in the FW log buffer */
 212         ssize_t fwlog_size;
 213
 214         /* Sysfs FW log entry readers wait queue */
 215         wait_queue_head_t fwlog_waitq;
 216
 217         /* Hardware recovery work */
 218         struct work_struct recovery_work;
 219
 220         /* Pointer that holds DMA-friendly block for the mailbox */
 221         struct event_mailbox *mbox;
 222
 223         /* The mbox event mask */
 224         u32 event_mask;
 225
 226         /* Mailbox pointers */
 227         u32 mbox_ptr[2];
 228
 229         /* Are we currently scanning */
 230         struct ieee80211_vif *scan_vif;
 231         struct wl1271_scan scan;
 232         struct delayed_work scan_complete_work;
 233
 234         bool sched_scanning;
 235
 236         /* The current band */
 237         enum ieee80211_band band;
 238
 239         struct completion *elp_compl;
 240         struct delayed_work elp_work;
 241
 242         /* in dBm */
 243         int power_level;
 244
 245         struct wl1271_stats stats;
 246
 247         __le32 buffer_32;
 248         u32 buffer_cmd;
 249         u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
 250
 251         struct wl12xx_fw_status *fw_status;
 252         struct wl1271_tx_hw_res_if *tx_res_if;
 253
 254         /* Current chipset configuration */
 255         struct conf_drv_settings conf;
 256
 257         bool sg_enabled;
 258
 259         bool enable_11a;
 260
 261         /* Most recently reported noise in dBm */
 262         s8 noise;
 263
 264         /* bands supported by this instance of wl12xx */
 265         struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
 266
 267         int tcxo_clock;
 268
 269         /*
 270          * wowlan trigger was configured during suspend.
 271          * (currently, only "ANY" trigger is supported)
 272          */
 273         bool wow_enabled;
 274         bool irq_wake_enabled;
 275
 276         /*
 277          * AP-mode - links indexed by HLID. The global and broadcast links
 278          * are always active.
 279          */
 280         struct wl1271_link links[WL12XX_MAX_LINKS];
 281
 282         /* AP-mode - a bitmap of links currently in PS mode according to FW */
 283         u32 ap_fw_ps_map;
 284
 285         /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
 286         unsigned long ap_ps_map;
 287
 288         /* Quirks of specific hardware revisions */
 289         unsigned int quirks;
 290
 291         /* Platform limitations */
 292         unsigned int platform_quirks;
 293
 294         /* number of currently active RX BA sessions */
 295         int ba_rx_session_count;
 296
 297         /* AP-mode - number of currently connected stations */
 298         int active_sta_count;
 299
 300         /* last wlvif we transmitted from */
 301         struct wl12xx_vif *last_wlvif;
 302
 303         /* work to fire when Tx is stuck */
 304         struct delayed_work tx_watchdog_work;
 305
 306         struct wlcore_ops *ops;
 307         /* pointer to the lower driver partition table */
 308         const struct wlcore_partition_set *ptable;
 309         /* pointer to the lower driver register table */
 310         const int *rtable;
 311         /* name of the firmwares to load - for PLT, single role, multi-role */
 312         const char *plt_fw_name;
 313         const char *sr_fw_name;
 314         const char *mr_fw_name;
 315
 316         /* per-chip-family private structure */
 317         void *priv;
 318
 319         /* number of TX descriptors the HW supports. */
 320         u32 num_tx_desc;
 321
 322         /* spare Tx blocks for normal/GEM operating modes */
 323         u32 normal_tx_spare;
 324         u32 gem_tx_spare;
 325
 326         /* translate HW Tx rates to standard rate-indices */
 327         const u8 **band_rate_to_idx;
 328
 329         /* size of table for HW rates that can be received from chip */
 330         u8 hw_tx_rate_tbl_size;
 331
 332         /* this HW rate and below are considered HT rates for this chip */
 333         u8 hw_min_ht_rate;
 334 };
 335
 336 int __devinit wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);
 337 int __devexit wlcore_remove(struct platform_device *pdev);
 338 struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size);
 339 int wlcore_free_hw(struct wl1271 *wl);
 340
 341 /* Firmware image load chunk size */
 342 #define CHUNK_SIZE      16384
 343
 344 /* Quirks */
 345
 346 /* Each RX/TX transaction requires an end-of-transaction transfer */
 347 #define WLCORE_QUIRK_END_OF_TRANSACTION         BIT(0)
 348
 349 /* wl127x and SPI don't support SDIO block size alignment */
 350 #define WLCORE_QUIRK_NO_BLOCKSIZE_ALIGNMENT     BIT(2)
 351
 352 /* means aggregated Rx packets are aligned to a SDIO block */
 353 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN         BIT(3)
 354
 355 /* Older firmwares did not implement the FW logger over bus feature */
 356 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED      BIT(4)
 357
 358 /* Older firmwares use an old NVS format */
 359 #define WLCORE_QUIRK_LEGACY_NVS                 BIT(5)
 360
 361 /* Some firmwares may not support ELP */
 362 #define WLCORE_QUIRK_NO_ELP                     BIT(6)
 363
 364 /* TODO: move to the lower drivers when all usages are abstracted */
 365 #define CHIP_ID_1271_PG10              (0x4030101)
 366 #define CHIP_ID_1271_PG20              (0x4030111)
 367 #define CHIP_ID_1283_PG10              (0x05030101)
 368 #define CHIP_ID_1283_PG20              (0x05030111)
 369
 370 /* TODO: move all these common registers and values elsewhere */
 371 #define HW_ACCESS_ELP_CTRL_REG          0x1FFFC
 372
 373 /* ELP register commands */
 374 #define ELPCTRL_WAKE_UP             0x1
 375 #define ELPCTRL_WAKE_UP_WLAN_READY  0x5
 376 #define ELPCTRL_SLEEP               0x0
 377 /* ELP WLAN_READY bit */
 378 #define ELPCTRL_WLAN_READY          0x2
 379
 380 /*************************************************************************
 381
 382     Interrupt Trigger Register (Host -> WiLink)
 383
 384 **************************************************************************/
 385
 386 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */
 387
 388 /*
 389  * The host sets this bit to inform the Wlan
 390  * FW that a TX packet is in the XFER
 391  * Buffer #0.
 392  */
 393 #define INTR_TRIG_TX_PROC0 BIT(2)
 394
 395 /*
 396  * The host sets this bit to inform the FW
 397  * that it read a packet from RX XFER
 398  * Buffer #0.
 399  */
 400 #define INTR_TRIG_RX_PROC0 BIT(3)
 401
 402 #define INTR_TRIG_DEBUG_ACK BIT(4)
 403
 404 #define INTR_TRIG_STATE_CHANGED BIT(5)
 405
 406 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */
 407
 408 /*
 409  * The host sets this bit to inform the FW
 410  * that it read a packet from RX XFER
 411  * Buffer #1.
 412  */
 413 #define INTR_TRIG_RX_PROC1 BIT(17)
 414
 415 /*
 416  * The host sets this bit to inform the Wlan
 417  * hardware that a TX packet is in the XFER
 418  * Buffer #1.
 419  */
 420 #define INTR_TRIG_TX_PROC1 BIT(18)
 421
 422 #define ACX_SLV_SOFT_RESET_BIT  BIT(1)
 423 #define SOFT_RESET_MAX_TIME     1000000
 424 #define SOFT_RESET_STALL_TIME   1000
 425
 426 #define ECPU_CONTROL_HALT       0x00000101
 427
 428 #define WELP_ARM_COMMAND_VAL    0x4
 429
 430 #endif /* __WLCORE_H__ */