2 * This file is part of wlcore
4 * Copyright (C) 2011 Texas Instruments Inc.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 #include <linux/platform_device.h>
30 /* The maximum number of Tx descriptors in all chip families */
31 #define WLCORE_MAX_TX_DESCRIPTORS 32
33 /* forward declaration */
34 struct wl1271_tx_hw_descr
;
38 int (*identify_chip
)(struct wl1271
*wl
);
39 int (*identify_fw
)(struct wl1271
*wl
);
40 int (*boot
)(struct wl1271
*wl
);
41 void (*trigger_cmd
)(struct wl1271
*wl
, int cmd_box_addr
,
42 void *buf
, size_t len
);
43 void (*ack_event
)(struct wl1271
*wl
);
44 u32 (*calc_tx_blocks
)(struct wl1271
*wl
, u32 len
, u32 spare_blks
);
45 void (*set_tx_desc_blocks
)(struct wl1271
*wl
,
46 struct wl1271_tx_hw_descr
*desc
,
47 u32 blks
, u32 spare_blks
);
48 void (*set_tx_desc_data_len
)(struct wl1271
*wl
,
49 struct wl1271_tx_hw_descr
*desc
,
51 enum wl_rx_buf_align (*get_rx_buf_align
)(struct wl1271
*wl
,
53 void (*prepare_read
)(struct wl1271
*wl
, u32 rx_desc
, u32 len
);
54 u32 (*get_rx_packet_len
)(struct wl1271
*wl
, void *rx_data
,
56 void (*tx_delayed_compl
)(struct wl1271
*wl
);
57 void (*tx_immediate_compl
)(struct wl1271
*wl
);
58 int (*hw_init
)(struct wl1271
*wl
);
59 int (*init_vif
)(struct wl1271
*wl
, struct wl12xx_vif
*wlvif
);
60 u32 (*sta_get_ap_rate_mask
)(struct wl1271
*wl
,
61 struct wl12xx_vif
*wlvif
);
62 s8 (*get_pg_ver
)(struct wl1271
*wl
);
63 void (*get_mac
)(struct wl1271
*wl
);
66 enum wlcore_partitions
{
71 PART_TOP_PRCM_ELP_SOC
,
77 struct wlcore_partition
{
82 struct wlcore_partition_set
{
83 struct wlcore_partition mem
;
84 struct wlcore_partition reg
;
85 struct wlcore_partition mem2
;
86 struct wlcore_partition mem3
;
89 enum wlcore_registers
{
90 /* register addresses, used with partition translation */
92 REG_INTERRUPT_NO_CLEAR
,
94 REG_COMMAND_MAILBOX_PTR
,
95 REG_EVENT_MAILBOX_PTR
,
100 REG_CMD_MBOX_ADDRESS
,
102 /* data access memory addresses, used with partition translation */
106 /* raw data access memory addresses */
107 REG_RAW_FW_STATUS_ADDR
,
113 struct ieee80211_hw
*hw
;
114 bool mac80211_registered
;
120 struct wl1271_if_operations
*if_ops
;
122 void (*set_power
)(bool enable
);
128 enum wl1271_state state
;
129 enum wl12xx_fw_type fw_type
;
136 struct wlcore_partition_set curr_part
;
138 struct wl1271_chip chip
;
149 /* address read from the fuse ROM */
153 /* we have up to 2 MAC addresses */
154 struct mac_address addresses
[2];
158 unsigned long links_map
[BITS_TO_LONGS(WL12XX_MAX_LINKS
)];
159 unsigned long roles_map
[BITS_TO_LONGS(WL12XX_MAX_ROLES
)];
160 unsigned long roc_map
[BITS_TO_LONGS(WL12XX_MAX_ROLES
)];
161 unsigned long rate_policies_map
[
162 BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES
)];
164 struct list_head wlvif_list
;
169 struct wl1271_acx_mem_map
*target_mem_map
;
171 /* Accounting for allocated / available TX blocks on HW */
173 u32 tx_blocks_available
;
174 u32 tx_allocated_blocks
;
175 u32 tx_results_count
;
177 /* Accounting for allocated / available Tx packets in HW */
178 u32 tx_pkts_freed
[NUM_TX_QUEUES
];
179 u32 tx_allocated_pkts
[NUM_TX_QUEUES
];
181 /* Transmitted TX packets counter for chipset interface */
182 u32 tx_packets_count
;
184 /* Time-offset between host and chipset clocks */
187 /* Frames scheduled for transmission, not handled yet */
188 int tx_queue_count
[NUM_TX_QUEUES
];
189 long stopped_queues_map
;
191 /* Frames received, not handled yet by mac80211 */
192 struct sk_buff_head deferred_rx_queue
;
194 /* Frames sent, not returned yet to mac80211 */
195 struct sk_buff_head deferred_tx_queue
;
197 struct work_struct tx_work
;
198 struct workqueue_struct
*freezable_wq
;
200 /* Pending TX frames */
201 unsigned long tx_frames_map
[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS
)];
202 struct sk_buff
*tx_frames
[WLCORE_MAX_TX_DESCRIPTORS
];
208 /* Rx memory pool address */
209 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr
;
211 /* Intermediate buffer, used for packet aggregation */
214 /* Reusable dummy packet template */
215 struct sk_buff
*dummy_packet
;
217 /* Network stack work */
218 struct work_struct netstack_work
;
223 /* Number of valid bytes in the FW log buffer */
226 /* Sysfs FW log entry readers wait queue */
227 wait_queue_head_t fwlog_waitq
;
229 /* Hardware recovery work */
230 struct work_struct recovery_work
;
232 /* Pointer that holds DMA-friendly block for the mailbox */
233 struct event_mailbox
*mbox
;
235 /* The mbox event mask */
238 /* Mailbox pointers */
241 /* Are we currently scanning */
242 struct ieee80211_vif
*scan_vif
;
243 struct wl1271_scan scan
;
244 struct delayed_work scan_complete_work
;
246 /* Connection loss work */
247 struct delayed_work connection_loss_work
;
251 /* The current band */
252 enum ieee80211_band band
;
254 struct completion
*elp_compl
;
255 struct delayed_work elp_work
;
260 struct wl1271_stats stats
;
264 u32 buffer_busyword
[WL1271_BUSY_WORD_CNT
];
266 struct wl_fw_status
*fw_status
;
267 struct wl1271_tx_hw_res_if
*tx_res_if
;
269 /* Current chipset configuration */
270 struct wlcore_conf conf
;
276 /* Most recently reported noise in dBm */
279 /* bands supported by this instance of wl12xx */
280 struct ieee80211_supported_band bands
[IEEE80211_NUM_BANDS
];
285 * wowlan trigger was configured during suspend.
286 * (currently, only "ANY" trigger is supported)
289 bool irq_wake_enabled
;
292 * AP-mode - links indexed by HLID. The global and broadcast links
295 struct wl1271_link links
[WL12XX_MAX_LINKS
];
297 /* AP-mode - a bitmap of links currently in PS mode according to FW */
300 /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
301 unsigned long ap_ps_map
;
303 /* Quirks of specific hardware revisions */
306 /* Platform limitations */
307 unsigned int platform_quirks
;
309 /* number of currently active RX BA sessions */
310 int ba_rx_session_count
;
312 /* AP-mode - number of currently connected stations */
313 int active_sta_count
;
315 /* last wlvif we transmitted from */
316 struct wl12xx_vif
*last_wlvif
;
318 /* work to fire when Tx is stuck */
319 struct delayed_work tx_watchdog_work
;
321 struct wlcore_ops
*ops
;
322 /* pointer to the lower driver partition table */
323 const struct wlcore_partition_set
*ptable
;
324 /* pointer to the lower driver register table */
326 /* name of the firmwares to load - for PLT, single role, multi-role */
327 const char *plt_fw_name
;
328 const char *sr_fw_name
;
329 const char *mr_fw_name
;
331 /* per-chip-family private structure */
334 /* number of TX descriptors the HW supports. */
337 /* spare Tx blocks for normal/GEM operating modes */
341 /* translate HW Tx rates to standard rate-indices */
342 const u8
**band_rate_to_idx
;
344 /* size of table for HW rates that can be received from chip */
345 u8 hw_tx_rate_tbl_size
;
347 /* this HW rate and below are considered HT rates for this chip */
350 /* HW HT (11n) capabilities */
351 struct ieee80211_sta_ht_cap ht_cap
;
353 /* size of the private FW status data */
354 size_t fw_status_priv_len
;
356 /* RX Data filter rule state - enabled/disabled */
357 bool rx_filter_enabled
[WL1271_MAX_RX_FILTERS
];
360 int __devinit
wlcore_probe(struct wl1271
*wl
, struct platform_device
*pdev
);
361 int __devexit
wlcore_remove(struct platform_device
*pdev
);
362 struct ieee80211_hw
*wlcore_alloc_hw(size_t priv_size
);
363 int wlcore_free_hw(struct wl1271
*wl
);
365 /* Firmware image load chunk size */
366 #define CHUNK_SIZE 16384
370 /* Each RX/TX transaction requires an end-of-transaction transfer */
371 #define WLCORE_QUIRK_END_OF_TRANSACTION BIT(0)
373 /* wl127x and SPI don't support SDIO block size alignment */
374 #define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN BIT(2)
376 /* means aggregated Rx packets are aligned to a SDIO block */
377 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN BIT(3)
379 /* Older firmwares did not implement the FW logger over bus feature */
380 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED BIT(4)
382 /* Older firmwares use an old NVS format */
383 #define WLCORE_QUIRK_LEGACY_NVS BIT(5)
385 /* Some firmwares may not support ELP */
386 #define WLCORE_QUIRK_NO_ELP BIT(6)
388 /* TODO: move to the lower drivers when all usages are abstracted */
389 #define CHIP_ID_1271_PG10 (0x4030101)
390 #define CHIP_ID_1271_PG20 (0x4030111)
391 #define CHIP_ID_1283_PG10 (0x05030101)
392 #define CHIP_ID_1283_PG20 (0x05030111)
394 /* TODO: move all these common registers and values elsewhere */
395 #define HW_ACCESS_ELP_CTRL_REG 0x1FFFC
397 /* ELP register commands */
398 #define ELPCTRL_WAKE_UP 0x1
399 #define ELPCTRL_WAKE_UP_WLAN_READY 0x5
400 #define ELPCTRL_SLEEP 0x0
401 /* ELP WLAN_READY bit */
402 #define ELPCTRL_WLAN_READY 0x2
404 /*************************************************************************
406 Interrupt Trigger Register (Host -> WiLink)
408 **************************************************************************/
410 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */
413 * The host sets this bit to inform the Wlan
414 * FW that a TX packet is in the XFER
417 #define INTR_TRIG_TX_PROC0 BIT(2)
420 * The host sets this bit to inform the FW
421 * that it read a packet from RX XFER
424 #define INTR_TRIG_RX_PROC0 BIT(3)
426 #define INTR_TRIG_DEBUG_ACK BIT(4)
428 #define INTR_TRIG_STATE_CHANGED BIT(5)
430 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */
433 * The host sets this bit to inform the FW
434 * that it read a packet from RX XFER
437 #define INTR_TRIG_RX_PROC1 BIT(17)
440 * The host sets this bit to inform the Wlan
441 * hardware that a TX packet is in the XFER
444 #define INTR_TRIG_TX_PROC1 BIT(18)
446 #define ACX_SLV_SOFT_RESET_BIT BIT(1)
447 #define SOFT_RESET_MAX_TIME 1000000
448 #define SOFT_RESET_STALL_TIME 1000
450 #define ECPU_CONTROL_HALT 0x00000101
452 #define WELP_ARM_COMMAND_VAL 0x4
454 #endif /* __WLCORE_H__ */