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Merge tag 'for-linus-20170825' of git://git.infradead.org/linux-mtd
[mirror_ubuntu-artful-kernel.git] / drivers / nvme / host / core.c
1 /*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 #include <linux/blkdev.h>
16 #include <linux/blk-mq.h>
17 #include <linux/delay.h>
18 #include <linux/errno.h>
19 #include <linux/hdreg.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/list_sort.h>
23 #include <linux/slab.h>
24 #include <linux/types.h>
25 #include <linux/pr.h>
26 #include <linux/ptrace.h>
27 #include <linux/nvme_ioctl.h>
28 #include <linux/t10-pi.h>
29 #include <linux/pm_qos.h>
30 #include <asm/unaligned.h>
31
32 #include "nvme.h"
33 #include "fabrics.h"
34
35 #define NVME_MINORS (1U << MINORBITS)
36
37 unsigned char admin_timeout = 60;
38 module_param(admin_timeout, byte, 0644);
39 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
40 EXPORT_SYMBOL_GPL(admin_timeout);
41
42 unsigned char nvme_io_timeout = 30;
43 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
44 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
45 EXPORT_SYMBOL_GPL(nvme_io_timeout);
46
47 static unsigned char shutdown_timeout = 5;
48 module_param(shutdown_timeout, byte, 0644);
49 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
50
51 static u8 nvme_max_retries = 5;
52 module_param_named(max_retries, nvme_max_retries, byte, 0644);
53 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
54
55 static int nvme_char_major;
56 module_param(nvme_char_major, int, 0);
57
58 static unsigned long default_ps_max_latency_us = 100000;
59 module_param(default_ps_max_latency_us, ulong, 0644);
60 MODULE_PARM_DESC(default_ps_max_latency_us,
61 "max power saving latency for new devices; use PM QOS to change per device");
62
63 static bool force_apst;
64 module_param(force_apst, bool, 0644);
65 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
66
67 static bool streams;
68 module_param(streams, bool, 0644);
69 MODULE_PARM_DESC(streams, "turn on support for Streams write directives");
70
71 struct workqueue_struct *nvme_wq;
72 EXPORT_SYMBOL_GPL(nvme_wq);
73
74 static LIST_HEAD(nvme_ctrl_list);
75 static DEFINE_SPINLOCK(dev_list_lock);
76
77 static struct class *nvme_class;
78
79 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
80 {
81 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
82 return -EBUSY;
83 if (!queue_work(nvme_wq, &ctrl->reset_work))
84 return -EBUSY;
85 return 0;
86 }
87 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
88
89 static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
90 {
91 int ret;
92
93 ret = nvme_reset_ctrl(ctrl);
94 if (!ret)
95 flush_work(&ctrl->reset_work);
96 return ret;
97 }
98
99 static blk_status_t nvme_error_status(struct request *req)
100 {
101 switch (nvme_req(req)->status & 0x7ff) {
102 case NVME_SC_SUCCESS:
103 return BLK_STS_OK;
104 case NVME_SC_CAP_EXCEEDED:
105 return BLK_STS_NOSPC;
106 case NVME_SC_ONCS_NOT_SUPPORTED:
107 return BLK_STS_NOTSUPP;
108 case NVME_SC_WRITE_FAULT:
109 case NVME_SC_READ_ERROR:
110 case NVME_SC_UNWRITTEN_BLOCK:
111 return BLK_STS_MEDIUM;
112 default:
113 return BLK_STS_IOERR;
114 }
115 }
116
117 static inline bool nvme_req_needs_retry(struct request *req)
118 {
119 if (blk_noretry_request(req))
120 return false;
121 if (nvme_req(req)->status & NVME_SC_DNR)
122 return false;
123 if (jiffies - req->start_time >= req->timeout)
124 return false;
125 if (nvme_req(req)->retries >= nvme_max_retries)
126 return false;
127 return true;
128 }
129
130 void nvme_complete_rq(struct request *req)
131 {
132 if (unlikely(nvme_req(req)->status && nvme_req_needs_retry(req))) {
133 nvme_req(req)->retries++;
134 blk_mq_requeue_request(req, true);
135 return;
136 }
137
138 blk_mq_end_request(req, nvme_error_status(req));
139 }
140 EXPORT_SYMBOL_GPL(nvme_complete_rq);
141
142 void nvme_cancel_request(struct request *req, void *data, bool reserved)
143 {
144 int status;
145
146 if (!blk_mq_request_started(req))
147 return;
148
149 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
150 "Cancelling I/O %d", req->tag);
151
152 status = NVME_SC_ABORT_REQ;
153 if (blk_queue_dying(req->q))
154 status |= NVME_SC_DNR;
155 nvme_req(req)->status = status;
156 blk_mq_complete_request(req);
157
158 }
159 EXPORT_SYMBOL_GPL(nvme_cancel_request);
160
161 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
162 enum nvme_ctrl_state new_state)
163 {
164 enum nvme_ctrl_state old_state;
165 bool changed = false;
166
167 spin_lock_irq(&ctrl->lock);
168
169 old_state = ctrl->state;
170 switch (new_state) {
171 case NVME_CTRL_LIVE:
172 switch (old_state) {
173 case NVME_CTRL_NEW:
174 case NVME_CTRL_RESETTING:
175 case NVME_CTRL_RECONNECTING:
176 changed = true;
177 /* FALLTHRU */
178 default:
179 break;
180 }
181 break;
182 case NVME_CTRL_RESETTING:
183 switch (old_state) {
184 case NVME_CTRL_NEW:
185 case NVME_CTRL_LIVE:
186 changed = true;
187 /* FALLTHRU */
188 default:
189 break;
190 }
191 break;
192 case NVME_CTRL_RECONNECTING:
193 switch (old_state) {
194 case NVME_CTRL_LIVE:
195 changed = true;
196 /* FALLTHRU */
197 default:
198 break;
199 }
200 break;
201 case NVME_CTRL_DELETING:
202 switch (old_state) {
203 case NVME_CTRL_LIVE:
204 case NVME_CTRL_RESETTING:
205 case NVME_CTRL_RECONNECTING:
206 changed = true;
207 /* FALLTHRU */
208 default:
209 break;
210 }
211 break;
212 case NVME_CTRL_DEAD:
213 switch (old_state) {
214 case NVME_CTRL_DELETING:
215 changed = true;
216 /* FALLTHRU */
217 default:
218 break;
219 }
220 break;
221 default:
222 break;
223 }
224
225 if (changed)
226 ctrl->state = new_state;
227
228 spin_unlock_irq(&ctrl->lock);
229
230 return changed;
231 }
232 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
233
234 static void nvme_free_ns(struct kref *kref)
235 {
236 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
237
238 if (ns->ndev)
239 nvme_nvm_unregister(ns);
240
241 if (ns->disk) {
242 spin_lock(&dev_list_lock);
243 ns->disk->private_data = NULL;
244 spin_unlock(&dev_list_lock);
245 }
246
247 put_disk(ns->disk);
248 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
249 nvme_put_ctrl(ns->ctrl);
250 kfree(ns);
251 }
252
253 static void nvme_put_ns(struct nvme_ns *ns)
254 {
255 kref_put(&ns->kref, nvme_free_ns);
256 }
257
258 static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
259 {
260 struct nvme_ns *ns;
261
262 spin_lock(&dev_list_lock);
263 ns = disk->private_data;
264 if (ns) {
265 if (!kref_get_unless_zero(&ns->kref))
266 goto fail;
267 if (!try_module_get(ns->ctrl->ops->module))
268 goto fail_put_ns;
269 }
270 spin_unlock(&dev_list_lock);
271
272 return ns;
273
274 fail_put_ns:
275 kref_put(&ns->kref, nvme_free_ns);
276 fail:
277 spin_unlock(&dev_list_lock);
278 return NULL;
279 }
280
281 struct request *nvme_alloc_request(struct request_queue *q,
282 struct nvme_command *cmd, unsigned int flags, int qid)
283 {
284 unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
285 struct request *req;
286
287 if (qid == NVME_QID_ANY) {
288 req = blk_mq_alloc_request(q, op, flags);
289 } else {
290 req = blk_mq_alloc_request_hctx(q, op, flags,
291 qid ? qid - 1 : 0);
292 }
293 if (IS_ERR(req))
294 return req;
295
296 req->cmd_flags |= REQ_FAILFAST_DRIVER;
297 nvme_req(req)->cmd = cmd;
298
299 return req;
300 }
301 EXPORT_SYMBOL_GPL(nvme_alloc_request);
302
303 static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable)
304 {
305 struct nvme_command c;
306
307 memset(&c, 0, sizeof(c));
308
309 c.directive.opcode = nvme_admin_directive_send;
310 c.directive.nsid = cpu_to_le32(0xffffffff);
311 c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE;
312 c.directive.dtype = NVME_DIR_IDENTIFY;
313 c.directive.tdtype = NVME_DIR_STREAMS;
314 c.directive.endir = enable ? NVME_DIR_ENDIR : 0;
315
316 return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0);
317 }
318
319 static int nvme_disable_streams(struct nvme_ctrl *ctrl)
320 {
321 return nvme_toggle_streams(ctrl, false);
322 }
323
324 static int nvme_enable_streams(struct nvme_ctrl *ctrl)
325 {
326 return nvme_toggle_streams(ctrl, true);
327 }
328
329 static int nvme_get_stream_params(struct nvme_ctrl *ctrl,
330 struct streams_directive_params *s, u32 nsid)
331 {
332 struct nvme_command c;
333
334 memset(&c, 0, sizeof(c));
335 memset(s, 0, sizeof(*s));
336
337 c.directive.opcode = nvme_admin_directive_recv;
338 c.directive.nsid = cpu_to_le32(nsid);
339 c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1);
340 c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM;
341 c.directive.dtype = NVME_DIR_STREAMS;
342
343 return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s));
344 }
345
346 static int nvme_configure_directives(struct nvme_ctrl *ctrl)
347 {
348 struct streams_directive_params s;
349 int ret;
350
351 if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES))
352 return 0;
353 if (!streams)
354 return 0;
355
356 ret = nvme_enable_streams(ctrl);
357 if (ret)
358 return ret;
359
360 ret = nvme_get_stream_params(ctrl, &s, 0xffffffff);
361 if (ret)
362 return ret;
363
364 ctrl->nssa = le16_to_cpu(s.nssa);
365 if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) {
366 dev_info(ctrl->device, "too few streams (%u) available\n",
367 ctrl->nssa);
368 nvme_disable_streams(ctrl);
369 return 0;
370 }
371
372 ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1);
373 dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams);
374 return 0;
375 }
376
377 /*
378 * Check if 'req' has a write hint associated with it. If it does, assign
379 * a valid namespace stream to the write.
380 */
381 static void nvme_assign_write_stream(struct nvme_ctrl *ctrl,
382 struct request *req, u16 *control,
383 u32 *dsmgmt)
384 {
385 enum rw_hint streamid = req->write_hint;
386
387 if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE)
388 streamid = 0;
389 else {
390 streamid--;
391 if (WARN_ON_ONCE(streamid > ctrl->nr_streams))
392 return;
393
394 *control |= NVME_RW_DTYPE_STREAMS;
395 *dsmgmt |= streamid << 16;
396 }
397
398 if (streamid < ARRAY_SIZE(req->q->write_hints))
399 req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9;
400 }
401
402 static inline void nvme_setup_flush(struct nvme_ns *ns,
403 struct nvme_command *cmnd)
404 {
405 memset(cmnd, 0, sizeof(*cmnd));
406 cmnd->common.opcode = nvme_cmd_flush;
407 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
408 }
409
410 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
411 struct nvme_command *cmnd)
412 {
413 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
414 struct nvme_dsm_range *range;
415 struct bio *bio;
416
417 range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
418 if (!range)
419 return BLK_STS_RESOURCE;
420
421 __rq_for_each_bio(bio, req) {
422 u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
423 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
424
425 range[n].cattr = cpu_to_le32(0);
426 range[n].nlb = cpu_to_le32(nlb);
427 range[n].slba = cpu_to_le64(slba);
428 n++;
429 }
430
431 if (WARN_ON_ONCE(n != segments)) {
432 kfree(range);
433 return BLK_STS_IOERR;
434 }
435
436 memset(cmnd, 0, sizeof(*cmnd));
437 cmnd->dsm.opcode = nvme_cmd_dsm;
438 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
439 cmnd->dsm.nr = cpu_to_le32(segments - 1);
440 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
441
442 req->special_vec.bv_page = virt_to_page(range);
443 req->special_vec.bv_offset = offset_in_page(range);
444 req->special_vec.bv_len = sizeof(*range) * segments;
445 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
446
447 return BLK_STS_OK;
448 }
449
450 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
451 struct request *req, struct nvme_command *cmnd)
452 {
453 struct nvme_ctrl *ctrl = ns->ctrl;
454 u16 control = 0;
455 u32 dsmgmt = 0;
456
457 /*
458 * If formated with metadata, require the block layer provide a buffer
459 * unless this namespace is formated such that the metadata can be
460 * stripped/generated by the controller with PRACT=1.
461 */
462 if (ns && ns->ms &&
463 (!ns->pi_type || ns->ms != sizeof(struct t10_pi_tuple)) &&
464 !blk_integrity_rq(req) && !blk_rq_is_passthrough(req))
465 return BLK_STS_NOTSUPP;
466
467 if (req->cmd_flags & REQ_FUA)
468 control |= NVME_RW_FUA;
469 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
470 control |= NVME_RW_LR;
471
472 if (req->cmd_flags & REQ_RAHEAD)
473 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
474
475 memset(cmnd, 0, sizeof(*cmnd));
476 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
477 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
478 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
479 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
480
481 if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams)
482 nvme_assign_write_stream(ctrl, req, &control, &dsmgmt);
483
484 if (ns->ms) {
485 switch (ns->pi_type) {
486 case NVME_NS_DPS_PI_TYPE3:
487 control |= NVME_RW_PRINFO_PRCHK_GUARD;
488 break;
489 case NVME_NS_DPS_PI_TYPE1:
490 case NVME_NS_DPS_PI_TYPE2:
491 control |= NVME_RW_PRINFO_PRCHK_GUARD |
492 NVME_RW_PRINFO_PRCHK_REF;
493 cmnd->rw.reftag = cpu_to_le32(
494 nvme_block_nr(ns, blk_rq_pos(req)));
495 break;
496 }
497 if (!blk_integrity_rq(req))
498 control |= NVME_RW_PRINFO_PRACT;
499 }
500
501 cmnd->rw.control = cpu_to_le16(control);
502 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
503 return 0;
504 }
505
506 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
507 struct nvme_command *cmd)
508 {
509 blk_status_t ret = BLK_STS_OK;
510
511 if (!(req->rq_flags & RQF_DONTPREP)) {
512 nvme_req(req)->retries = 0;
513 nvme_req(req)->flags = 0;
514 req->rq_flags |= RQF_DONTPREP;
515 }
516
517 switch (req_op(req)) {
518 case REQ_OP_DRV_IN:
519 case REQ_OP_DRV_OUT:
520 memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
521 break;
522 case REQ_OP_FLUSH:
523 nvme_setup_flush(ns, cmd);
524 break;
525 case REQ_OP_WRITE_ZEROES:
526 /* currently only aliased to deallocate for a few ctrls: */
527 case REQ_OP_DISCARD:
528 ret = nvme_setup_discard(ns, req, cmd);
529 break;
530 case REQ_OP_READ:
531 case REQ_OP_WRITE:
532 ret = nvme_setup_rw(ns, req, cmd);
533 break;
534 default:
535 WARN_ON_ONCE(1);
536 return BLK_STS_IOERR;
537 }
538
539 cmd->common.command_id = req->tag;
540 return ret;
541 }
542 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
543
544 /*
545 * Returns 0 on success. If the result is negative, it's a Linux error code;
546 * if the result is positive, it's an NVM Express status code
547 */
548 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
549 union nvme_result *result, void *buffer, unsigned bufflen,
550 unsigned timeout, int qid, int at_head, int flags)
551 {
552 struct request *req;
553 int ret;
554
555 req = nvme_alloc_request(q, cmd, flags, qid);
556 if (IS_ERR(req))
557 return PTR_ERR(req);
558
559 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
560
561 if (buffer && bufflen) {
562 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
563 if (ret)
564 goto out;
565 }
566
567 blk_execute_rq(req->q, NULL, req, at_head);
568 if (result)
569 *result = nvme_req(req)->result;
570 if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
571 ret = -EINTR;
572 else
573 ret = nvme_req(req)->status;
574 out:
575 blk_mq_free_request(req);
576 return ret;
577 }
578 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
579
580 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
581 void *buffer, unsigned bufflen)
582 {
583 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
584 NVME_QID_ANY, 0, 0);
585 }
586 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
587
588 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
589 void __user *ubuffer, unsigned bufflen,
590 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
591 u32 *result, unsigned timeout)
592 {
593 bool write = nvme_is_write(cmd);
594 struct nvme_ns *ns = q->queuedata;
595 struct gendisk *disk = ns ? ns->disk : NULL;
596 struct request *req;
597 struct bio *bio = NULL;
598 void *meta = NULL;
599 int ret;
600
601 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
602 if (IS_ERR(req))
603 return PTR_ERR(req);
604
605 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
606
607 if (ubuffer && bufflen) {
608 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
609 GFP_KERNEL);
610 if (ret)
611 goto out;
612 bio = req->bio;
613
614 if (!disk)
615 goto submit;
616 bio->bi_bdev = bdget_disk(disk, 0);
617 if (!bio->bi_bdev) {
618 ret = -ENODEV;
619 goto out_unmap;
620 }
621
622 if (meta_buffer && meta_len) {
623 struct bio_integrity_payload *bip;
624
625 meta = kmalloc(meta_len, GFP_KERNEL);
626 if (!meta) {
627 ret = -ENOMEM;
628 goto out_unmap;
629 }
630
631 if (write) {
632 if (copy_from_user(meta, meta_buffer,
633 meta_len)) {
634 ret = -EFAULT;
635 goto out_free_meta;
636 }
637 }
638
639 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
640 if (IS_ERR(bip)) {
641 ret = PTR_ERR(bip);
642 goto out_free_meta;
643 }
644
645 bip->bip_iter.bi_size = meta_len;
646 bip->bip_iter.bi_sector = meta_seed;
647
648 ret = bio_integrity_add_page(bio, virt_to_page(meta),
649 meta_len, offset_in_page(meta));
650 if (ret != meta_len) {
651 ret = -ENOMEM;
652 goto out_free_meta;
653 }
654 }
655 }
656 submit:
657 blk_execute_rq(req->q, disk, req, 0);
658 if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
659 ret = -EINTR;
660 else
661 ret = nvme_req(req)->status;
662 if (result)
663 *result = le32_to_cpu(nvme_req(req)->result.u32);
664 if (meta && !ret && !write) {
665 if (copy_to_user(meta_buffer, meta, meta_len))
666 ret = -EFAULT;
667 }
668 out_free_meta:
669 kfree(meta);
670 out_unmap:
671 if (bio) {
672 if (disk && bio->bi_bdev)
673 bdput(bio->bi_bdev);
674 blk_rq_unmap_user(bio);
675 }
676 out:
677 blk_mq_free_request(req);
678 return ret;
679 }
680
681 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
682 void __user *ubuffer, unsigned bufflen, u32 *result,
683 unsigned timeout)
684 {
685 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
686 result, timeout);
687 }
688
689 static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status)
690 {
691 struct nvme_ctrl *ctrl = rq->end_io_data;
692
693 blk_mq_free_request(rq);
694
695 if (status) {
696 dev_err(ctrl->device,
697 "failed nvme_keep_alive_end_io error=%d\n",
698 status);
699 return;
700 }
701
702 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
703 }
704
705 static int nvme_keep_alive(struct nvme_ctrl *ctrl)
706 {
707 struct nvme_command c;
708 struct request *rq;
709
710 memset(&c, 0, sizeof(c));
711 c.common.opcode = nvme_admin_keep_alive;
712
713 rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
714 NVME_QID_ANY);
715 if (IS_ERR(rq))
716 return PTR_ERR(rq);
717
718 rq->timeout = ctrl->kato * HZ;
719 rq->end_io_data = ctrl;
720
721 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
722
723 return 0;
724 }
725
726 static void nvme_keep_alive_work(struct work_struct *work)
727 {
728 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
729 struct nvme_ctrl, ka_work);
730
731 if (nvme_keep_alive(ctrl)) {
732 /* allocation failure, reset the controller */
733 dev_err(ctrl->device, "keep-alive failed\n");
734 nvme_reset_ctrl(ctrl);
735 return;
736 }
737 }
738
739 void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
740 {
741 if (unlikely(ctrl->kato == 0))
742 return;
743
744 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
745 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
746 }
747 EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
748
749 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
750 {
751 if (unlikely(ctrl->kato == 0))
752 return;
753
754 cancel_delayed_work_sync(&ctrl->ka_work);
755 }
756 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
757
758 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
759 {
760 struct nvme_command c = { };
761 int error;
762
763 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
764 c.identify.opcode = nvme_admin_identify;
765 c.identify.cns = NVME_ID_CNS_CTRL;
766
767 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
768 if (!*id)
769 return -ENOMEM;
770
771 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
772 sizeof(struct nvme_id_ctrl));
773 if (error)
774 kfree(*id);
775 return error;
776 }
777
778 static int nvme_identify_ns_descs(struct nvme_ns *ns, unsigned nsid)
779 {
780 struct nvme_command c = { };
781 int status;
782 void *data;
783 int pos;
784 int len;
785
786 c.identify.opcode = nvme_admin_identify;
787 c.identify.nsid = cpu_to_le32(nsid);
788 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
789
790 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
791 if (!data)
792 return -ENOMEM;
793
794 status = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, data,
795 NVME_IDENTIFY_DATA_SIZE);
796 if (status)
797 goto free_data;
798
799 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
800 struct nvme_ns_id_desc *cur = data + pos;
801
802 if (cur->nidl == 0)
803 break;
804
805 switch (cur->nidt) {
806 case NVME_NIDT_EUI64:
807 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
808 dev_warn(ns->ctrl->device,
809 "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n",
810 cur->nidl);
811 goto free_data;
812 }
813 len = NVME_NIDT_EUI64_LEN;
814 memcpy(ns->eui, data + pos + sizeof(*cur), len);
815 break;
816 case NVME_NIDT_NGUID:
817 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
818 dev_warn(ns->ctrl->device,
819 "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n",
820 cur->nidl);
821 goto free_data;
822 }
823 len = NVME_NIDT_NGUID_LEN;
824 memcpy(ns->nguid, data + pos + sizeof(*cur), len);
825 break;
826 case NVME_NIDT_UUID:
827 if (cur->nidl != NVME_NIDT_UUID_LEN) {
828 dev_warn(ns->ctrl->device,
829 "ctrl returned bogus length: %d for NVME_NIDT_UUID\n",
830 cur->nidl);
831 goto free_data;
832 }
833 len = NVME_NIDT_UUID_LEN;
834 uuid_copy(&ns->uuid, data + pos + sizeof(*cur));
835 break;
836 default:
837 /* Skip unnkown types */
838 len = cur->nidl;
839 break;
840 }
841
842 len += sizeof(*cur);
843 }
844 free_data:
845 kfree(data);
846 return status;
847 }
848
849 static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
850 {
851 struct nvme_command c = { };
852
853 c.identify.opcode = nvme_admin_identify;
854 c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
855 c.identify.nsid = cpu_to_le32(nsid);
856 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
857 }
858
859 static int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
860 struct nvme_id_ns **id)
861 {
862 struct nvme_command c = { };
863 int error;
864
865 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
866 c.identify.opcode = nvme_admin_identify;
867 c.identify.nsid = cpu_to_le32(nsid);
868 c.identify.cns = NVME_ID_CNS_NS;
869
870 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
871 if (!*id)
872 return -ENOMEM;
873
874 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
875 sizeof(struct nvme_id_ns));
876 if (error)
877 kfree(*id);
878 return error;
879 }
880
881 static int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
882 void *buffer, size_t buflen, u32 *result)
883 {
884 struct nvme_command c;
885 union nvme_result res;
886 int ret;
887
888 memset(&c, 0, sizeof(c));
889 c.features.opcode = nvme_admin_set_features;
890 c.features.fid = cpu_to_le32(fid);
891 c.features.dword11 = cpu_to_le32(dword11);
892
893 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
894 buffer, buflen, 0, NVME_QID_ANY, 0, 0);
895 if (ret >= 0 && result)
896 *result = le32_to_cpu(res.u32);
897 return ret;
898 }
899
900 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
901 {
902 u32 q_count = (*count - 1) | ((*count - 1) << 16);
903 u32 result;
904 int status, nr_io_queues;
905
906 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
907 &result);
908 if (status < 0)
909 return status;
910
911 /*
912 * Degraded controllers might return an error when setting the queue
913 * count. We still want to be able to bring them online and offer
914 * access to the admin queue, as that might be only way to fix them up.
915 */
916 if (status > 0) {
917 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
918 *count = 0;
919 } else {
920 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
921 *count = min(*count, nr_io_queues);
922 }
923
924 return 0;
925 }
926 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
927
928 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
929 {
930 struct nvme_user_io io;
931 struct nvme_command c;
932 unsigned length, meta_len;
933 void __user *metadata;
934
935 if (copy_from_user(&io, uio, sizeof(io)))
936 return -EFAULT;
937 if (io.flags)
938 return -EINVAL;
939
940 switch (io.opcode) {
941 case nvme_cmd_write:
942 case nvme_cmd_read:
943 case nvme_cmd_compare:
944 break;
945 default:
946 return -EINVAL;
947 }
948
949 length = (io.nblocks + 1) << ns->lba_shift;
950 meta_len = (io.nblocks + 1) * ns->ms;
951 metadata = (void __user *)(uintptr_t)io.metadata;
952
953 if (ns->ext) {
954 length += meta_len;
955 meta_len = 0;
956 } else if (meta_len) {
957 if ((io.metadata & 3) || !io.metadata)
958 return -EINVAL;
959 }
960
961 memset(&c, 0, sizeof(c));
962 c.rw.opcode = io.opcode;
963 c.rw.flags = io.flags;
964 c.rw.nsid = cpu_to_le32(ns->ns_id);
965 c.rw.slba = cpu_to_le64(io.slba);
966 c.rw.length = cpu_to_le16(io.nblocks);
967 c.rw.control = cpu_to_le16(io.control);
968 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
969 c.rw.reftag = cpu_to_le32(io.reftag);
970 c.rw.apptag = cpu_to_le16(io.apptag);
971 c.rw.appmask = cpu_to_le16(io.appmask);
972
973 return __nvme_submit_user_cmd(ns->queue, &c,
974 (void __user *)(uintptr_t)io.addr, length,
975 metadata, meta_len, io.slba, NULL, 0);
976 }
977
978 static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
979 struct nvme_passthru_cmd __user *ucmd)
980 {
981 struct nvme_passthru_cmd cmd;
982 struct nvme_command c;
983 unsigned timeout = 0;
984 int status;
985
986 if (!capable(CAP_SYS_ADMIN))
987 return -EACCES;
988 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
989 return -EFAULT;
990 if (cmd.flags)
991 return -EINVAL;
992
993 memset(&c, 0, sizeof(c));
994 c.common.opcode = cmd.opcode;
995 c.common.flags = cmd.flags;
996 c.common.nsid = cpu_to_le32(cmd.nsid);
997 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
998 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
999 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1000 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1001 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1002 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1003 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1004 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1005
1006 if (cmd.timeout_ms)
1007 timeout = msecs_to_jiffies(cmd.timeout_ms);
1008
1009 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
1010 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1011 &cmd.result, timeout);
1012 if (status >= 0) {
1013 if (put_user(cmd.result, &ucmd->result))
1014 return -EFAULT;
1015 }
1016
1017 return status;
1018 }
1019
1020 static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
1021 unsigned int cmd, unsigned long arg)
1022 {
1023 struct nvme_ns *ns = bdev->bd_disk->private_data;
1024
1025 switch (cmd) {
1026 case NVME_IOCTL_ID:
1027 force_successful_syscall_return();
1028 return ns->ns_id;
1029 case NVME_IOCTL_ADMIN_CMD:
1030 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
1031 case NVME_IOCTL_IO_CMD:
1032 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
1033 case NVME_IOCTL_SUBMIT_IO:
1034 return nvme_submit_io(ns, (void __user *)arg);
1035 default:
1036 #ifdef CONFIG_NVM
1037 if (ns->ndev)
1038 return nvme_nvm_ioctl(ns, cmd, arg);
1039 #endif
1040 if (is_sed_ioctl(cmd))
1041 return sed_ioctl(ns->ctrl->opal_dev, cmd,
1042 (void __user *) arg);
1043 return -ENOTTY;
1044 }
1045 }
1046
1047 #ifdef CONFIG_COMPAT
1048 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1049 unsigned int cmd, unsigned long arg)
1050 {
1051 return nvme_ioctl(bdev, mode, cmd, arg);
1052 }
1053 #else
1054 #define nvme_compat_ioctl NULL
1055 #endif
1056
1057 static int nvme_open(struct block_device *bdev, fmode_t mode)
1058 {
1059 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
1060 }
1061
1062 static void nvme_release(struct gendisk *disk, fmode_t mode)
1063 {
1064 struct nvme_ns *ns = disk->private_data;
1065
1066 module_put(ns->ctrl->ops->module);
1067 nvme_put_ns(ns);
1068 }
1069
1070 static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1071 {
1072 /* some standard values */
1073 geo->heads = 1 << 6;
1074 geo->sectors = 1 << 5;
1075 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1076 return 0;
1077 }
1078
1079 #ifdef CONFIG_BLK_DEV_INTEGRITY
1080 static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
1081 u16 bs)
1082 {
1083 struct nvme_ns *ns = disk->private_data;
1084 u16 old_ms = ns->ms;
1085 u8 pi_type = 0;
1086
1087 ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms);
1088 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
1089
1090 /* PI implementation requires metadata equal t10 pi tuple size */
1091 if (ns->ms == sizeof(struct t10_pi_tuple))
1092 pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1093
1094 if (blk_get_integrity(disk) &&
1095 (ns->pi_type != pi_type || ns->ms != old_ms ||
1096 bs != queue_logical_block_size(disk->queue) ||
1097 (ns->ms && ns->ext)))
1098 blk_integrity_unregister(disk);
1099
1100 ns->pi_type = pi_type;
1101 }
1102
1103 static void nvme_init_integrity(struct nvme_ns *ns)
1104 {
1105 struct blk_integrity integrity;
1106
1107 memset(&integrity, 0, sizeof(integrity));
1108 switch (ns->pi_type) {
1109 case NVME_NS_DPS_PI_TYPE3:
1110 integrity.profile = &t10_pi_type3_crc;
1111 integrity.tag_size = sizeof(u16) + sizeof(u32);
1112 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1113 break;
1114 case NVME_NS_DPS_PI_TYPE1:
1115 case NVME_NS_DPS_PI_TYPE2:
1116 integrity.profile = &t10_pi_type1_crc;
1117 integrity.tag_size = sizeof(u16);
1118 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1119 break;
1120 default:
1121 integrity.profile = NULL;
1122 break;
1123 }
1124 integrity.tuple_size = ns->ms;
1125 blk_integrity_register(ns->disk, &integrity);
1126 blk_queue_max_integrity_segments(ns->queue, 1);
1127 }
1128 #else
1129 static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
1130 u16 bs)
1131 {
1132 }
1133 static void nvme_init_integrity(struct nvme_ns *ns)
1134 {
1135 }
1136 #endif /* CONFIG_BLK_DEV_INTEGRITY */
1137
1138 static void nvme_set_chunk_size(struct nvme_ns *ns)
1139 {
1140 u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9));
1141 blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size));
1142 }
1143
1144 static void nvme_config_discard(struct nvme_ns *ns)
1145 {
1146 struct nvme_ctrl *ctrl = ns->ctrl;
1147 u32 logical_block_size = queue_logical_block_size(ns->queue);
1148
1149 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1150 NVME_DSM_MAX_RANGES);
1151
1152 if (ctrl->nr_streams && ns->sws && ns->sgs) {
1153 unsigned int sz = logical_block_size * ns->sws * ns->sgs;
1154
1155 ns->queue->limits.discard_alignment = sz;
1156 ns->queue->limits.discard_granularity = sz;
1157 } else {
1158 ns->queue->limits.discard_alignment = logical_block_size;
1159 ns->queue->limits.discard_granularity = logical_block_size;
1160 }
1161 blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
1162 blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES);
1163 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1164
1165 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1166 blk_queue_max_write_zeroes_sectors(ns->queue, UINT_MAX);
1167 }
1168
1169 static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id)
1170 {
1171 if (nvme_identify_ns(ns->ctrl, ns->ns_id, id)) {
1172 dev_warn(ns->ctrl->dev, "%s: Identify failure\n", __func__);
1173 return -ENODEV;
1174 }
1175
1176 if ((*id)->ncap == 0) {
1177 kfree(*id);
1178 return -ENODEV;
1179 }
1180
1181 if (ns->ctrl->vs >= NVME_VS(1, 1, 0))
1182 memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui));
1183 if (ns->ctrl->vs >= NVME_VS(1, 2, 0))
1184 memcpy(ns->nguid, (*id)->nguid, sizeof(ns->nguid));
1185 if (ns->ctrl->vs >= NVME_VS(1, 3, 0)) {
1186 /* Don't treat error as fatal we potentially
1187 * already have a NGUID or EUI-64
1188 */
1189 if (nvme_identify_ns_descs(ns, ns->ns_id))
1190 dev_warn(ns->ctrl->device,
1191 "%s: Identify Descriptors failed\n", __func__);
1192 }
1193
1194 return 0;
1195 }
1196
1197 static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
1198 {
1199 struct nvme_ns *ns = disk->private_data;
1200 struct nvme_ctrl *ctrl = ns->ctrl;
1201 u16 bs;
1202
1203 /*
1204 * If identify namespace failed, use default 512 byte block size so
1205 * block layer can use before failing read/write for 0 capacity.
1206 */
1207 ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds;
1208 if (ns->lba_shift == 0)
1209 ns->lba_shift = 9;
1210 bs = 1 << ns->lba_shift;
1211 ns->noiob = le16_to_cpu(id->noiob);
1212
1213 blk_mq_freeze_queue(disk->queue);
1214
1215 if (ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)
1216 nvme_prep_integrity(disk, id, bs);
1217 blk_queue_logical_block_size(ns->queue, bs);
1218 if (ns->noiob)
1219 nvme_set_chunk_size(ns);
1220 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1221 nvme_init_integrity(ns);
1222 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
1223 set_capacity(disk, 0);
1224 else
1225 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1226
1227 if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
1228 nvme_config_discard(ns);
1229 blk_mq_unfreeze_queue(disk->queue);
1230 }
1231
1232 static int nvme_revalidate_disk(struct gendisk *disk)
1233 {
1234 struct nvme_ns *ns = disk->private_data;
1235 struct nvme_id_ns *id = NULL;
1236 int ret;
1237
1238 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
1239 set_capacity(disk, 0);
1240 return -ENODEV;
1241 }
1242
1243 ret = nvme_revalidate_ns(ns, &id);
1244 if (ret)
1245 return ret;
1246
1247 __nvme_revalidate_disk(disk, id);
1248 kfree(id);
1249
1250 return 0;
1251 }
1252
1253 static char nvme_pr_type(enum pr_type type)
1254 {
1255 switch (type) {
1256 case PR_WRITE_EXCLUSIVE:
1257 return 1;
1258 case PR_EXCLUSIVE_ACCESS:
1259 return 2;
1260 case PR_WRITE_EXCLUSIVE_REG_ONLY:
1261 return 3;
1262 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
1263 return 4;
1264 case PR_WRITE_EXCLUSIVE_ALL_REGS:
1265 return 5;
1266 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
1267 return 6;
1268 default:
1269 return 0;
1270 }
1271 };
1272
1273 static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
1274 u64 key, u64 sa_key, u8 op)
1275 {
1276 struct nvme_ns *ns = bdev->bd_disk->private_data;
1277 struct nvme_command c;
1278 u8 data[16] = { 0, };
1279
1280 put_unaligned_le64(key, &data[0]);
1281 put_unaligned_le64(sa_key, &data[8]);
1282
1283 memset(&c, 0, sizeof(c));
1284 c.common.opcode = op;
1285 c.common.nsid = cpu_to_le32(ns->ns_id);
1286 c.common.cdw10[0] = cpu_to_le32(cdw10);
1287
1288 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
1289 }
1290
1291 static int nvme_pr_register(struct block_device *bdev, u64 old,
1292 u64 new, unsigned flags)
1293 {
1294 u32 cdw10;
1295
1296 if (flags & ~PR_FL_IGNORE_KEY)
1297 return -EOPNOTSUPP;
1298
1299 cdw10 = old ? 2 : 0;
1300 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
1301 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
1302 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
1303 }
1304
1305 static int nvme_pr_reserve(struct block_device *bdev, u64 key,
1306 enum pr_type type, unsigned flags)
1307 {
1308 u32 cdw10;
1309
1310 if (flags & ~PR_FL_IGNORE_KEY)
1311 return -EOPNOTSUPP;
1312
1313 cdw10 = nvme_pr_type(type) << 8;
1314 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
1315 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
1316 }
1317
1318 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
1319 enum pr_type type, bool abort)
1320 {
1321 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
1322 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
1323 }
1324
1325 static int nvme_pr_clear(struct block_device *bdev, u64 key)
1326 {
1327 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1328 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
1329 }
1330
1331 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
1332 {
1333 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
1334 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
1335 }
1336
1337 static const struct pr_ops nvme_pr_ops = {
1338 .pr_register = nvme_pr_register,
1339 .pr_reserve = nvme_pr_reserve,
1340 .pr_release = nvme_pr_release,
1341 .pr_preempt = nvme_pr_preempt,
1342 .pr_clear = nvme_pr_clear,
1343 };
1344
1345 #ifdef CONFIG_BLK_SED_OPAL
1346 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
1347 bool send)
1348 {
1349 struct nvme_ctrl *ctrl = data;
1350 struct nvme_command cmd;
1351
1352 memset(&cmd, 0, sizeof(cmd));
1353 if (send)
1354 cmd.common.opcode = nvme_admin_security_send;
1355 else
1356 cmd.common.opcode = nvme_admin_security_recv;
1357 cmd.common.nsid = 0;
1358 cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
1359 cmd.common.cdw10[1] = cpu_to_le32(len);
1360
1361 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
1362 ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
1363 }
1364 EXPORT_SYMBOL_GPL(nvme_sec_submit);
1365 #endif /* CONFIG_BLK_SED_OPAL */
1366
1367 static const struct block_device_operations nvme_fops = {
1368 .owner = THIS_MODULE,
1369 .ioctl = nvme_ioctl,
1370 .compat_ioctl = nvme_compat_ioctl,
1371 .open = nvme_open,
1372 .release = nvme_release,
1373 .getgeo = nvme_getgeo,
1374 .revalidate_disk= nvme_revalidate_disk,
1375 .pr_ops = &nvme_pr_ops,
1376 };
1377
1378 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
1379 {
1380 unsigned long timeout =
1381 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1382 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
1383 int ret;
1384
1385 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1386 if (csts == ~0)
1387 return -ENODEV;
1388 if ((csts & NVME_CSTS_RDY) == bit)
1389 break;
1390
1391 msleep(100);
1392 if (fatal_signal_pending(current))
1393 return -EINTR;
1394 if (time_after(jiffies, timeout)) {
1395 dev_err(ctrl->device,
1396 "Device not ready; aborting %s\n", enabled ?
1397 "initialisation" : "reset");
1398 return -ENODEV;
1399 }
1400 }
1401
1402 return ret;
1403 }
1404
1405 /*
1406 * If the device has been passed off to us in an enabled state, just clear
1407 * the enabled bit. The spec says we should set the 'shutdown notification
1408 * bits', but doing so may cause the device to complete commands to the
1409 * admin queue ... and we don't know what memory that might be pointing at!
1410 */
1411 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1412 {
1413 int ret;
1414
1415 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1416 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
1417
1418 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1419 if (ret)
1420 return ret;
1421
1422 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
1423 msleep(NVME_QUIRK_DELAY_AMOUNT);
1424
1425 return nvme_wait_ready(ctrl, cap, false);
1426 }
1427 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
1428
1429 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1430 {
1431 /*
1432 * Default to a 4K page size, with the intention to update this
1433 * path in the future to accomodate architectures with differing
1434 * kernel and IO page sizes.
1435 */
1436 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
1437 int ret;
1438
1439 if (page_shift < dev_page_min) {
1440 dev_err(ctrl->device,
1441 "Minimum device page size %u too large for host (%u)\n",
1442 1 << dev_page_min, 1 << page_shift);
1443 return -ENODEV;
1444 }
1445
1446 ctrl->page_size = 1 << page_shift;
1447
1448 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1449 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1450 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1451 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1452 ctrl->ctrl_config |= NVME_CC_ENABLE;
1453
1454 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1455 if (ret)
1456 return ret;
1457 return nvme_wait_ready(ctrl, cap, true);
1458 }
1459 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
1460
1461 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1462 {
1463 unsigned long timeout = jiffies + (shutdown_timeout * HZ);
1464 u32 csts;
1465 int ret;
1466
1467 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1468 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1469
1470 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1471 if (ret)
1472 return ret;
1473
1474 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1475 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1476 break;
1477
1478 msleep(100);
1479 if (fatal_signal_pending(current))
1480 return -EINTR;
1481 if (time_after(jiffies, timeout)) {
1482 dev_err(ctrl->device,
1483 "Device shutdown incomplete; abort shutdown\n");
1484 return -ENODEV;
1485 }
1486 }
1487
1488 return ret;
1489 }
1490 EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
1491
1492 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1493 struct request_queue *q)
1494 {
1495 bool vwc = false;
1496
1497 if (ctrl->max_hw_sectors) {
1498 u32 max_segments =
1499 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1500
1501 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1502 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
1503 }
1504 if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE)
1505 blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
1506 blk_queue_virt_boundary(q, ctrl->page_size - 1);
1507 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1508 vwc = true;
1509 blk_queue_write_cache(q, vwc, vwc);
1510 }
1511
1512 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
1513 {
1514 /*
1515 * APST (Autonomous Power State Transition) lets us program a
1516 * table of power state transitions that the controller will
1517 * perform automatically. We configure it with a simple
1518 * heuristic: we are willing to spend at most 2% of the time
1519 * transitioning between power states. Therefore, when running
1520 * in any given state, we will enter the next lower-power
1521 * non-operational state after waiting 50 * (enlat + exlat)
1522 * microseconds, as long as that state's exit latency is under
1523 * the requested maximum latency.
1524 *
1525 * We will not autonomously enter any non-operational state for
1526 * which the total latency exceeds ps_max_latency_us. Users
1527 * can set ps_max_latency_us to zero to turn off APST.
1528 */
1529
1530 unsigned apste;
1531 struct nvme_feat_auto_pst *table;
1532 u64 max_lat_us = 0;
1533 int max_ps = -1;
1534 int ret;
1535
1536 /*
1537 * If APST isn't supported or if we haven't been initialized yet,
1538 * then don't do anything.
1539 */
1540 if (!ctrl->apsta)
1541 return 0;
1542
1543 if (ctrl->npss > 31) {
1544 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
1545 return 0;
1546 }
1547
1548 table = kzalloc(sizeof(*table), GFP_KERNEL);
1549 if (!table)
1550 return 0;
1551
1552 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
1553 /* Turn off APST. */
1554 apste = 0;
1555 dev_dbg(ctrl->device, "APST disabled\n");
1556 } else {
1557 __le64 target = cpu_to_le64(0);
1558 int state;
1559
1560 /*
1561 * Walk through all states from lowest- to highest-power.
1562 * According to the spec, lower-numbered states use more
1563 * power. NPSS, despite the name, is the index of the
1564 * lowest-power state, not the number of states.
1565 */
1566 for (state = (int)ctrl->npss; state >= 0; state--) {
1567 u64 total_latency_us, exit_latency_us, transition_ms;
1568
1569 if (target)
1570 table->entries[state] = target;
1571
1572 /*
1573 * Don't allow transitions to the deepest state
1574 * if it's quirked off.
1575 */
1576 if (state == ctrl->npss &&
1577 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
1578 continue;
1579
1580 /*
1581 * Is this state a useful non-operational state for
1582 * higher-power states to autonomously transition to?
1583 */
1584 if (!(ctrl->psd[state].flags &
1585 NVME_PS_FLAGS_NON_OP_STATE))
1586 continue;
1587
1588 exit_latency_us =
1589 (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
1590 if (exit_latency_us > ctrl->ps_max_latency_us)
1591 continue;
1592
1593 total_latency_us =
1594 exit_latency_us +
1595 le32_to_cpu(ctrl->psd[state].entry_lat);
1596
1597 /*
1598 * This state is good. Use it as the APST idle
1599 * target for higher power states.
1600 */
1601 transition_ms = total_latency_us + 19;
1602 do_div(transition_ms, 20);
1603 if (transition_ms > (1 << 24) - 1)
1604 transition_ms = (1 << 24) - 1;
1605
1606 target = cpu_to_le64((state << 3) |
1607 (transition_ms << 8));
1608
1609 if (max_ps == -1)
1610 max_ps = state;
1611
1612 if (total_latency_us > max_lat_us)
1613 max_lat_us = total_latency_us;
1614 }
1615
1616 apste = 1;
1617
1618 if (max_ps == -1) {
1619 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
1620 } else {
1621 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
1622 max_ps, max_lat_us, (int)sizeof(*table), table);
1623 }
1624 }
1625
1626 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
1627 table, sizeof(*table), NULL);
1628 if (ret)
1629 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
1630
1631 kfree(table);
1632 return ret;
1633 }
1634
1635 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
1636 {
1637 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1638 u64 latency;
1639
1640 switch (val) {
1641 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
1642 case PM_QOS_LATENCY_ANY:
1643 latency = U64_MAX;
1644 break;
1645
1646 default:
1647 latency = val;
1648 }
1649
1650 if (ctrl->ps_max_latency_us != latency) {
1651 ctrl->ps_max_latency_us = latency;
1652 nvme_configure_apst(ctrl);
1653 }
1654 }
1655
1656 struct nvme_core_quirk_entry {
1657 /*
1658 * NVMe model and firmware strings are padded with spaces. For
1659 * simplicity, strings in the quirk table are padded with NULLs
1660 * instead.
1661 */
1662 u16 vid;
1663 const char *mn;
1664 const char *fr;
1665 unsigned long quirks;
1666 };
1667
1668 static const struct nvme_core_quirk_entry core_quirks[] = {
1669 {
1670 /*
1671 * This Toshiba device seems to die using any APST states. See:
1672 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
1673 */
1674 .vid = 0x1179,
1675 .mn = "THNSF5256GPUK TOSHIBA",
1676 .quirks = NVME_QUIRK_NO_APST,
1677 }
1678 };
1679
1680 /* match is null-terminated but idstr is space-padded. */
1681 static bool string_matches(const char *idstr, const char *match, size_t len)
1682 {
1683 size_t matchlen;
1684
1685 if (!match)
1686 return true;
1687
1688 matchlen = strlen(match);
1689 WARN_ON_ONCE(matchlen > len);
1690
1691 if (memcmp(idstr, match, matchlen))
1692 return false;
1693
1694 for (; matchlen < len; matchlen++)
1695 if (idstr[matchlen] != ' ')
1696 return false;
1697
1698 return true;
1699 }
1700
1701 static bool quirk_matches(const struct nvme_id_ctrl *id,
1702 const struct nvme_core_quirk_entry *q)
1703 {
1704 return q->vid == le16_to_cpu(id->vid) &&
1705 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
1706 string_matches(id->fr, q->fr, sizeof(id->fr));
1707 }
1708
1709 static void nvme_init_subnqn(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
1710 {
1711 size_t nqnlen;
1712 int off;
1713
1714 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
1715 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
1716 strcpy(ctrl->subnqn, id->subnqn);
1717 return;
1718 }
1719
1720 if (ctrl->vs >= NVME_VS(1, 2, 1))
1721 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
1722
1723 /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */
1724 off = snprintf(ctrl->subnqn, NVMF_NQN_SIZE,
1725 "nqn.2014.08.org.nvmexpress:%4x%4x",
1726 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
1727 memcpy(ctrl->subnqn + off, id->sn, sizeof(id->sn));
1728 off += sizeof(id->sn);
1729 memcpy(ctrl->subnqn + off, id->mn, sizeof(id->mn));
1730 off += sizeof(id->mn);
1731 memset(ctrl->subnqn + off, 0, sizeof(ctrl->subnqn) - off);
1732 }
1733
1734 /*
1735 * Initialize the cached copies of the Identify data and various controller
1736 * register in our nvme_ctrl structure. This should be called as soon as
1737 * the admin queue is fully up and running.
1738 */
1739 int nvme_init_identify(struct nvme_ctrl *ctrl)
1740 {
1741 struct nvme_id_ctrl *id;
1742 u64 cap;
1743 int ret, page_shift;
1744 u32 max_hw_sectors;
1745 bool prev_apst_enabled;
1746
1747 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1748 if (ret) {
1749 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
1750 return ret;
1751 }
1752
1753 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1754 if (ret) {
1755 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
1756 return ret;
1757 }
1758 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1759
1760 if (ctrl->vs >= NVME_VS(1, 1, 0))
1761 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1762
1763 ret = nvme_identify_ctrl(ctrl, &id);
1764 if (ret) {
1765 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
1766 return -EIO;
1767 }
1768
1769 nvme_init_subnqn(ctrl, id);
1770
1771 if (!ctrl->identified) {
1772 /*
1773 * Check for quirks. Quirk can depend on firmware version,
1774 * so, in principle, the set of quirks present can change
1775 * across a reset. As a possible future enhancement, we
1776 * could re-scan for quirks every time we reinitialize
1777 * the device, but we'd have to make sure that the driver
1778 * behaves intelligently if the quirks change.
1779 */
1780
1781 int i;
1782
1783 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
1784 if (quirk_matches(id, &core_quirks[i]))
1785 ctrl->quirks |= core_quirks[i].quirks;
1786 }
1787 }
1788
1789 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
1790 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
1791 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
1792 }
1793
1794 ctrl->oacs = le16_to_cpu(id->oacs);
1795 ctrl->vid = le16_to_cpu(id->vid);
1796 ctrl->oncs = le16_to_cpup(&id->oncs);
1797 atomic_set(&ctrl->abort_limit, id->acl + 1);
1798 ctrl->vwc = id->vwc;
1799 ctrl->cntlid = le16_to_cpup(&id->cntlid);
1800 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1801 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1802 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1803 if (id->mdts)
1804 max_hw_sectors = 1 << (id->mdts + page_shift - 9);
1805 else
1806 max_hw_sectors = UINT_MAX;
1807 ctrl->max_hw_sectors =
1808 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
1809
1810 nvme_set_queue_limits(ctrl, ctrl->admin_q);
1811 ctrl->sgls = le32_to_cpu(id->sgls);
1812 ctrl->kas = le16_to_cpu(id->kas);
1813
1814 ctrl->npss = id->npss;
1815 ctrl->apsta = id->apsta;
1816 prev_apst_enabled = ctrl->apst_enabled;
1817 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
1818 if (force_apst && id->apsta) {
1819 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
1820 ctrl->apst_enabled = true;
1821 } else {
1822 ctrl->apst_enabled = false;
1823 }
1824 } else {
1825 ctrl->apst_enabled = id->apsta;
1826 }
1827 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
1828
1829 if (ctrl->ops->flags & NVME_F_FABRICS) {
1830 ctrl->icdoff = le16_to_cpu(id->icdoff);
1831 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
1832 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
1833 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
1834
1835 /*
1836 * In fabrics we need to verify the cntlid matches the
1837 * admin connect
1838 */
1839 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
1840 ret = -EINVAL;
1841 goto out_free;
1842 }
1843
1844 if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
1845 dev_err(ctrl->device,
1846 "keep-alive support is mandatory for fabrics\n");
1847 ret = -EINVAL;
1848 goto out_free;
1849 }
1850 } else {
1851 ctrl->cntlid = le16_to_cpu(id->cntlid);
1852 ctrl->hmpre = le32_to_cpu(id->hmpre);
1853 ctrl->hmmin = le32_to_cpu(id->hmmin);
1854 }
1855
1856 kfree(id);
1857
1858 if (ctrl->apst_enabled && !prev_apst_enabled)
1859 dev_pm_qos_expose_latency_tolerance(ctrl->device);
1860 else if (!ctrl->apst_enabled && prev_apst_enabled)
1861 dev_pm_qos_hide_latency_tolerance(ctrl->device);
1862
1863 ret = nvme_configure_apst(ctrl);
1864 if (ret < 0)
1865 return ret;
1866
1867 ret = nvme_configure_directives(ctrl);
1868 if (ret < 0)
1869 return ret;
1870
1871 ctrl->identified = true;
1872
1873 return 0;
1874
1875 out_free:
1876 kfree(id);
1877 return ret;
1878 }
1879 EXPORT_SYMBOL_GPL(nvme_init_identify);
1880
1881 static int nvme_dev_open(struct inode *inode, struct file *file)
1882 {
1883 struct nvme_ctrl *ctrl;
1884 int instance = iminor(inode);
1885 int ret = -ENODEV;
1886
1887 spin_lock(&dev_list_lock);
1888 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1889 if (ctrl->instance != instance)
1890 continue;
1891
1892 if (!ctrl->admin_q) {
1893 ret = -EWOULDBLOCK;
1894 break;
1895 }
1896 if (!kref_get_unless_zero(&ctrl->kref))
1897 break;
1898 file->private_data = ctrl;
1899 ret = 0;
1900 break;
1901 }
1902 spin_unlock(&dev_list_lock);
1903
1904 return ret;
1905 }
1906
1907 static int nvme_dev_release(struct inode *inode, struct file *file)
1908 {
1909 nvme_put_ctrl(file->private_data);
1910 return 0;
1911 }
1912
1913 static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1914 {
1915 struct nvme_ns *ns;
1916 int ret;
1917
1918 mutex_lock(&ctrl->namespaces_mutex);
1919 if (list_empty(&ctrl->namespaces)) {
1920 ret = -ENOTTY;
1921 goto out_unlock;
1922 }
1923
1924 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1925 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1926 dev_warn(ctrl->device,
1927 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1928 ret = -EINVAL;
1929 goto out_unlock;
1930 }
1931
1932 dev_warn(ctrl->device,
1933 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1934 kref_get(&ns->kref);
1935 mutex_unlock(&ctrl->namespaces_mutex);
1936
1937 ret = nvme_user_cmd(ctrl, ns, argp);
1938 nvme_put_ns(ns);
1939 return ret;
1940
1941 out_unlock:
1942 mutex_unlock(&ctrl->namespaces_mutex);
1943 return ret;
1944 }
1945
1946 static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1947 unsigned long arg)
1948 {
1949 struct nvme_ctrl *ctrl = file->private_data;
1950 void __user *argp = (void __user *)arg;
1951
1952 switch (cmd) {
1953 case NVME_IOCTL_ADMIN_CMD:
1954 return nvme_user_cmd(ctrl, NULL, argp);
1955 case NVME_IOCTL_IO_CMD:
1956 return nvme_dev_user_cmd(ctrl, argp);
1957 case NVME_IOCTL_RESET:
1958 dev_warn(ctrl->device, "resetting controller\n");
1959 return nvme_reset_ctrl_sync(ctrl);
1960 case NVME_IOCTL_SUBSYS_RESET:
1961 return nvme_reset_subsystem(ctrl);
1962 case NVME_IOCTL_RESCAN:
1963 nvme_queue_scan(ctrl);
1964 return 0;
1965 default:
1966 return -ENOTTY;
1967 }
1968 }
1969
1970 static const struct file_operations nvme_dev_fops = {
1971 .owner = THIS_MODULE,
1972 .open = nvme_dev_open,
1973 .release = nvme_dev_release,
1974 .unlocked_ioctl = nvme_dev_ioctl,
1975 .compat_ioctl = nvme_dev_ioctl,
1976 };
1977
1978 static ssize_t nvme_sysfs_reset(struct device *dev,
1979 struct device_attribute *attr, const char *buf,
1980 size_t count)
1981 {
1982 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1983 int ret;
1984
1985 ret = nvme_reset_ctrl_sync(ctrl);
1986 if (ret < 0)
1987 return ret;
1988 return count;
1989 }
1990 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1991
1992 static ssize_t nvme_sysfs_rescan(struct device *dev,
1993 struct device_attribute *attr, const char *buf,
1994 size_t count)
1995 {
1996 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1997
1998 nvme_queue_scan(ctrl);
1999 return count;
2000 }
2001 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
2002
2003 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
2004 char *buf)
2005 {
2006 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2007 struct nvme_ctrl *ctrl = ns->ctrl;
2008 int serial_len = sizeof(ctrl->serial);
2009 int model_len = sizeof(ctrl->model);
2010
2011 if (!uuid_is_null(&ns->uuid))
2012 return sprintf(buf, "uuid.%pU\n", &ns->uuid);
2013
2014 if (memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
2015 return sprintf(buf, "eui.%16phN\n", ns->nguid);
2016
2017 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
2018 return sprintf(buf, "eui.%8phN\n", ns->eui);
2019
2020 while (serial_len > 0 && (ctrl->serial[serial_len - 1] == ' ' ||
2021 ctrl->serial[serial_len - 1] == '\0'))
2022 serial_len--;
2023 while (model_len > 0 && (ctrl->model[model_len - 1] == ' ' ||
2024 ctrl->model[model_len - 1] == '\0'))
2025 model_len--;
2026
2027 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
2028 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
2029 }
2030 static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
2031
2032 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
2033 char *buf)
2034 {
2035 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2036 return sprintf(buf, "%pU\n", ns->nguid);
2037 }
2038 static DEVICE_ATTR(nguid, S_IRUGO, nguid_show, NULL);
2039
2040 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
2041 char *buf)
2042 {
2043 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2044
2045 /* For backward compatibility expose the NGUID to userspace if
2046 * we have no UUID set
2047 */
2048 if (uuid_is_null(&ns->uuid)) {
2049 printk_ratelimited(KERN_WARNING
2050 "No UUID available providing old NGUID\n");
2051 return sprintf(buf, "%pU\n", ns->nguid);
2052 }
2053 return sprintf(buf, "%pU\n", &ns->uuid);
2054 }
2055 static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
2056
2057 static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
2058 char *buf)
2059 {
2060 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2061 return sprintf(buf, "%8phd\n", ns->eui);
2062 }
2063 static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
2064
2065 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
2066 char *buf)
2067 {
2068 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2069 return sprintf(buf, "%d\n", ns->ns_id);
2070 }
2071 static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
2072
2073 static struct attribute *nvme_ns_attrs[] = {
2074 &dev_attr_wwid.attr,
2075 &dev_attr_uuid.attr,
2076 &dev_attr_nguid.attr,
2077 &dev_attr_eui.attr,
2078 &dev_attr_nsid.attr,
2079 NULL,
2080 };
2081
2082 static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
2083 struct attribute *a, int n)
2084 {
2085 struct device *dev = container_of(kobj, struct device, kobj);
2086 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2087
2088 if (a == &dev_attr_uuid.attr) {
2089 if (uuid_is_null(&ns->uuid) ||
2090 !memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
2091 return 0;
2092 }
2093 if (a == &dev_attr_nguid.attr) {
2094 if (!memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
2095 return 0;
2096 }
2097 if (a == &dev_attr_eui.attr) {
2098 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
2099 return 0;
2100 }
2101 return a->mode;
2102 }
2103
2104 static const struct attribute_group nvme_ns_attr_group = {
2105 .attrs = nvme_ns_attrs,
2106 .is_visible = nvme_ns_attrs_are_visible,
2107 };
2108
2109 #define nvme_show_str_function(field) \
2110 static ssize_t field##_show(struct device *dev, \
2111 struct device_attribute *attr, char *buf) \
2112 { \
2113 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
2114 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
2115 } \
2116 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
2117
2118 #define nvme_show_int_function(field) \
2119 static ssize_t field##_show(struct device *dev, \
2120 struct device_attribute *attr, char *buf) \
2121 { \
2122 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
2123 return sprintf(buf, "%d\n", ctrl->field); \
2124 } \
2125 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
2126
2127 nvme_show_str_function(model);
2128 nvme_show_str_function(serial);
2129 nvme_show_str_function(firmware_rev);
2130 nvme_show_int_function(cntlid);
2131
2132 static ssize_t nvme_sysfs_delete(struct device *dev,
2133 struct device_attribute *attr, const char *buf,
2134 size_t count)
2135 {
2136 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2137
2138 if (device_remove_file_self(dev, attr))
2139 ctrl->ops->delete_ctrl(ctrl);
2140 return count;
2141 }
2142 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
2143
2144 static ssize_t nvme_sysfs_show_transport(struct device *dev,
2145 struct device_attribute *attr,
2146 char *buf)
2147 {
2148 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2149
2150 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
2151 }
2152 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
2153
2154 static ssize_t nvme_sysfs_show_state(struct device *dev,
2155 struct device_attribute *attr,
2156 char *buf)
2157 {
2158 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2159 static const char *const state_name[] = {
2160 [NVME_CTRL_NEW] = "new",
2161 [NVME_CTRL_LIVE] = "live",
2162 [NVME_CTRL_RESETTING] = "resetting",
2163 [NVME_CTRL_RECONNECTING]= "reconnecting",
2164 [NVME_CTRL_DELETING] = "deleting",
2165 [NVME_CTRL_DEAD] = "dead",
2166 };
2167
2168 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
2169 state_name[ctrl->state])
2170 return sprintf(buf, "%s\n", state_name[ctrl->state]);
2171
2172 return sprintf(buf, "unknown state\n");
2173 }
2174
2175 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
2176
2177 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
2178 struct device_attribute *attr,
2179 char *buf)
2180 {
2181 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2182
2183 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subnqn);
2184 }
2185 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
2186
2187 static ssize_t nvme_sysfs_show_address(struct device *dev,
2188 struct device_attribute *attr,
2189 char *buf)
2190 {
2191 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2192
2193 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
2194 }
2195 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
2196
2197 static struct attribute *nvme_dev_attrs[] = {
2198 &dev_attr_reset_controller.attr,
2199 &dev_attr_rescan_controller.attr,
2200 &dev_attr_model.attr,
2201 &dev_attr_serial.attr,
2202 &dev_attr_firmware_rev.attr,
2203 &dev_attr_cntlid.attr,
2204 &dev_attr_delete_controller.attr,
2205 &dev_attr_transport.attr,
2206 &dev_attr_subsysnqn.attr,
2207 &dev_attr_address.attr,
2208 &dev_attr_state.attr,
2209 NULL
2210 };
2211
2212 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
2213 struct attribute *a, int n)
2214 {
2215 struct device *dev = container_of(kobj, struct device, kobj);
2216 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2217
2218 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
2219 return 0;
2220 if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
2221 return 0;
2222
2223 return a->mode;
2224 }
2225
2226 static struct attribute_group nvme_dev_attrs_group = {
2227 .attrs = nvme_dev_attrs,
2228 .is_visible = nvme_dev_attrs_are_visible,
2229 };
2230
2231 static const struct attribute_group *nvme_dev_attr_groups[] = {
2232 &nvme_dev_attrs_group,
2233 NULL,
2234 };
2235
2236 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2237 {
2238 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2239 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2240
2241 return nsa->ns_id - nsb->ns_id;
2242 }
2243
2244 static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
2245 {
2246 struct nvme_ns *ns, *ret = NULL;
2247
2248 mutex_lock(&ctrl->namespaces_mutex);
2249 list_for_each_entry(ns, &ctrl->namespaces, list) {
2250 if (ns->ns_id == nsid) {
2251 kref_get(&ns->kref);
2252 ret = ns;
2253 break;
2254 }
2255 if (ns->ns_id > nsid)
2256 break;
2257 }
2258 mutex_unlock(&ctrl->namespaces_mutex);
2259 return ret;
2260 }
2261
2262 static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns)
2263 {
2264 struct streams_directive_params s;
2265 int ret;
2266
2267 if (!ctrl->nr_streams)
2268 return 0;
2269
2270 ret = nvme_get_stream_params(ctrl, &s, ns->ns_id);
2271 if (ret)
2272 return ret;
2273
2274 ns->sws = le32_to_cpu(s.sws);
2275 ns->sgs = le16_to_cpu(s.sgs);
2276
2277 if (ns->sws) {
2278 unsigned int bs = 1 << ns->lba_shift;
2279
2280 blk_queue_io_min(ns->queue, bs * ns->sws);
2281 if (ns->sgs)
2282 blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs);
2283 }
2284
2285 return 0;
2286 }
2287
2288 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
2289 {
2290 struct nvme_ns *ns;
2291 struct gendisk *disk;
2292 struct nvme_id_ns *id;
2293 char disk_name[DISK_NAME_LEN];
2294 int node = dev_to_node(ctrl->dev);
2295
2296 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2297 if (!ns)
2298 return;
2299
2300 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
2301 if (ns->instance < 0)
2302 goto out_free_ns;
2303
2304 ns->queue = blk_mq_init_queue(ctrl->tagset);
2305 if (IS_ERR(ns->queue))
2306 goto out_release_instance;
2307 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2308 ns->queue->queuedata = ns;
2309 ns->ctrl = ctrl;
2310
2311 kref_init(&ns->kref);
2312 ns->ns_id = nsid;
2313 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2314
2315 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2316 nvme_set_queue_limits(ctrl, ns->queue);
2317 nvme_setup_streams_ns(ctrl, ns);
2318
2319 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
2320
2321 if (nvme_revalidate_ns(ns, &id))
2322 goto out_free_queue;
2323
2324 if (nvme_nvm_ns_supported(ns, id) &&
2325 nvme_nvm_register(ns, disk_name, node)) {
2326 dev_warn(ctrl->device, "%s: LightNVM init failure\n", __func__);
2327 goto out_free_id;
2328 }
2329
2330 disk = alloc_disk_node(0, node);
2331 if (!disk)
2332 goto out_free_id;
2333
2334 disk->fops = &nvme_fops;
2335 disk->private_data = ns;
2336 disk->queue = ns->queue;
2337 disk->flags = GENHD_FL_EXT_DEVT;
2338 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
2339 ns->disk = disk;
2340
2341 __nvme_revalidate_disk(disk, id);
2342
2343 mutex_lock(&ctrl->namespaces_mutex);
2344 list_add_tail(&ns->list, &ctrl->namespaces);
2345 mutex_unlock(&ctrl->namespaces_mutex);
2346
2347 kref_get(&ctrl->kref);
2348
2349 kfree(id);
2350
2351 device_add_disk(ctrl->device, ns->disk);
2352 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
2353 &nvme_ns_attr_group))
2354 pr_warn("%s: failed to create sysfs group for identification\n",
2355 ns->disk->disk_name);
2356 if (ns->ndev && nvme_nvm_register_sysfs(ns))
2357 pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
2358 ns->disk->disk_name);
2359 return;
2360 out_free_id:
2361 kfree(id);
2362 out_free_queue:
2363 blk_cleanup_queue(ns->queue);
2364 out_release_instance:
2365 ida_simple_remove(&ctrl->ns_ida, ns->instance);
2366 out_free_ns:
2367 kfree(ns);
2368 }
2369
2370 static void nvme_ns_remove(struct nvme_ns *ns)
2371 {
2372 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
2373 return;
2374
2375 if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
2376 if (blk_get_integrity(ns->disk))
2377 blk_integrity_unregister(ns->disk);
2378 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
2379 &nvme_ns_attr_group);
2380 if (ns->ndev)
2381 nvme_nvm_unregister_sysfs(ns);
2382 del_gendisk(ns->disk);
2383 blk_cleanup_queue(ns->queue);
2384 }
2385
2386 mutex_lock(&ns->ctrl->namespaces_mutex);
2387 list_del_init(&ns->list);
2388 mutex_unlock(&ns->ctrl->namespaces_mutex);
2389
2390 nvme_put_ns(ns);
2391 }
2392
2393 static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
2394 {
2395 struct nvme_ns *ns;
2396
2397 ns = nvme_find_get_ns(ctrl, nsid);
2398 if (ns) {
2399 if (ns->disk && revalidate_disk(ns->disk))
2400 nvme_ns_remove(ns);
2401 nvme_put_ns(ns);
2402 } else
2403 nvme_alloc_ns(ctrl, nsid);
2404 }
2405
2406 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
2407 unsigned nsid)
2408 {
2409 struct nvme_ns *ns, *next;
2410
2411 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
2412 if (ns->ns_id > nsid)
2413 nvme_ns_remove(ns);
2414 }
2415 }
2416
2417 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
2418 {
2419 struct nvme_ns *ns;
2420 __le32 *ns_list;
2421 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
2422 int ret = 0;
2423
2424 ns_list = kzalloc(0x1000, GFP_KERNEL);
2425 if (!ns_list)
2426 return -ENOMEM;
2427
2428 for (i = 0; i < num_lists; i++) {
2429 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
2430 if (ret)
2431 goto free;
2432
2433 for (j = 0; j < min(nn, 1024U); j++) {
2434 nsid = le32_to_cpu(ns_list[j]);
2435 if (!nsid)
2436 goto out;
2437
2438 nvme_validate_ns(ctrl, nsid);
2439
2440 while (++prev < nsid) {
2441 ns = nvme_find_get_ns(ctrl, prev);
2442 if (ns) {
2443 nvme_ns_remove(ns);
2444 nvme_put_ns(ns);
2445 }
2446 }
2447 }
2448 nn -= j;
2449 }
2450 out:
2451 nvme_remove_invalid_namespaces(ctrl, prev);
2452 free:
2453 kfree(ns_list);
2454 return ret;
2455 }
2456
2457 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
2458 {
2459 unsigned i;
2460
2461 for (i = 1; i <= nn; i++)
2462 nvme_validate_ns(ctrl, i);
2463
2464 nvme_remove_invalid_namespaces(ctrl, nn);
2465 }
2466
2467 static void nvme_scan_work(struct work_struct *work)
2468 {
2469 struct nvme_ctrl *ctrl =
2470 container_of(work, struct nvme_ctrl, scan_work);
2471 struct nvme_id_ctrl *id;
2472 unsigned nn;
2473
2474 if (ctrl->state != NVME_CTRL_LIVE)
2475 return;
2476
2477 if (nvme_identify_ctrl(ctrl, &id))
2478 return;
2479
2480 nn = le32_to_cpu(id->nn);
2481 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
2482 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
2483 if (!nvme_scan_ns_list(ctrl, nn))
2484 goto done;
2485 }
2486 nvme_scan_ns_sequential(ctrl, nn);
2487 done:
2488 mutex_lock(&ctrl->namespaces_mutex);
2489 list_sort(NULL, &ctrl->namespaces, ns_cmp);
2490 mutex_unlock(&ctrl->namespaces_mutex);
2491 kfree(id);
2492 }
2493
2494 void nvme_queue_scan(struct nvme_ctrl *ctrl)
2495 {
2496 /*
2497 * Do not queue new scan work when a controller is reset during
2498 * removal.
2499 */
2500 if (ctrl->state == NVME_CTRL_LIVE)
2501 queue_work(nvme_wq, &ctrl->scan_work);
2502 }
2503 EXPORT_SYMBOL_GPL(nvme_queue_scan);
2504
2505 /*
2506 * This function iterates the namespace list unlocked to allow recovery from
2507 * controller failure. It is up to the caller to ensure the namespace list is
2508 * not modified by scan work while this function is executing.
2509 */
2510 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
2511 {
2512 struct nvme_ns *ns, *next;
2513
2514 /*
2515 * The dead states indicates the controller was not gracefully
2516 * disconnected. In that case, we won't be able to flush any data while
2517 * removing the namespaces' disks; fail all the queues now to avoid
2518 * potentially having to clean up the failed sync later.
2519 */
2520 if (ctrl->state == NVME_CTRL_DEAD)
2521 nvme_kill_queues(ctrl);
2522
2523 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
2524 nvme_ns_remove(ns);
2525 }
2526 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
2527
2528 static void nvme_async_event_work(struct work_struct *work)
2529 {
2530 struct nvme_ctrl *ctrl =
2531 container_of(work, struct nvme_ctrl, async_event_work);
2532
2533 spin_lock_irq(&ctrl->lock);
2534 while (ctrl->event_limit > 0) {
2535 int aer_idx = --ctrl->event_limit;
2536
2537 spin_unlock_irq(&ctrl->lock);
2538 ctrl->ops->submit_async_event(ctrl, aer_idx);
2539 spin_lock_irq(&ctrl->lock);
2540 }
2541 spin_unlock_irq(&ctrl->lock);
2542 }
2543
2544 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
2545 union nvme_result *res)
2546 {
2547 u32 result = le32_to_cpu(res->u32);
2548 bool done = true;
2549
2550 switch (le16_to_cpu(status) >> 1) {
2551 case NVME_SC_SUCCESS:
2552 done = false;
2553 /*FALLTHRU*/
2554 case NVME_SC_ABORT_REQ:
2555 ++ctrl->event_limit;
2556 queue_work(nvme_wq, &ctrl->async_event_work);
2557 break;
2558 default:
2559 break;
2560 }
2561
2562 if (done)
2563 return;
2564
2565 switch (result & 0xff07) {
2566 case NVME_AER_NOTICE_NS_CHANGED:
2567 dev_info(ctrl->device, "rescanning\n");
2568 nvme_queue_scan(ctrl);
2569 break;
2570 default:
2571 dev_warn(ctrl->device, "async event result %08x\n", result);
2572 }
2573 }
2574 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
2575
2576 void nvme_queue_async_events(struct nvme_ctrl *ctrl)
2577 {
2578 ctrl->event_limit = NVME_NR_AERS;
2579 queue_work(nvme_wq, &ctrl->async_event_work);
2580 }
2581 EXPORT_SYMBOL_GPL(nvme_queue_async_events);
2582
2583 static DEFINE_IDA(nvme_instance_ida);
2584
2585 static int nvme_set_instance(struct nvme_ctrl *ctrl)
2586 {
2587 int instance, error;
2588
2589 do {
2590 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2591 return -ENODEV;
2592
2593 spin_lock(&dev_list_lock);
2594 error = ida_get_new(&nvme_instance_ida, &instance);
2595 spin_unlock(&dev_list_lock);
2596 } while (error == -EAGAIN);
2597
2598 if (error)
2599 return -ENODEV;
2600
2601 ctrl->instance = instance;
2602 return 0;
2603 }
2604
2605 static void nvme_release_instance(struct nvme_ctrl *ctrl)
2606 {
2607 spin_lock(&dev_list_lock);
2608 ida_remove(&nvme_instance_ida, ctrl->instance);
2609 spin_unlock(&dev_list_lock);
2610 }
2611
2612 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
2613 {
2614 nvme_stop_keep_alive(ctrl);
2615 flush_work(&ctrl->async_event_work);
2616 flush_work(&ctrl->scan_work);
2617 }
2618 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
2619
2620 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
2621 {
2622 if (ctrl->kato)
2623 nvme_start_keep_alive(ctrl);
2624
2625 if (ctrl->queue_count > 1) {
2626 nvme_queue_scan(ctrl);
2627 nvme_queue_async_events(ctrl);
2628 nvme_start_queues(ctrl);
2629 }
2630 }
2631 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
2632
2633 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
2634 {
2635 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
2636
2637 spin_lock(&dev_list_lock);
2638 list_del(&ctrl->node);
2639 spin_unlock(&dev_list_lock);
2640 }
2641 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
2642
2643 static void nvme_free_ctrl(struct kref *kref)
2644 {
2645 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
2646
2647 put_device(ctrl->device);
2648 nvme_release_instance(ctrl);
2649 ida_destroy(&ctrl->ns_ida);
2650
2651 ctrl->ops->free_ctrl(ctrl);
2652 }
2653
2654 void nvme_put_ctrl(struct nvme_ctrl *ctrl)
2655 {
2656 kref_put(&ctrl->kref, nvme_free_ctrl);
2657 }
2658 EXPORT_SYMBOL_GPL(nvme_put_ctrl);
2659
2660 /*
2661 * Initialize a NVMe controller structures. This needs to be called during
2662 * earliest initialization so that we have the initialized structured around
2663 * during probing.
2664 */
2665 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
2666 const struct nvme_ctrl_ops *ops, unsigned long quirks)
2667 {
2668 int ret;
2669
2670 ctrl->state = NVME_CTRL_NEW;
2671 spin_lock_init(&ctrl->lock);
2672 INIT_LIST_HEAD(&ctrl->namespaces);
2673 mutex_init(&ctrl->namespaces_mutex);
2674 kref_init(&ctrl->kref);
2675 ctrl->dev = dev;
2676 ctrl->ops = ops;
2677 ctrl->quirks = quirks;
2678 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
2679 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
2680
2681 ret = nvme_set_instance(ctrl);
2682 if (ret)
2683 goto out;
2684
2685 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
2686 MKDEV(nvme_char_major, ctrl->instance),
2687 ctrl, nvme_dev_attr_groups,
2688 "nvme%d", ctrl->instance);
2689 if (IS_ERR(ctrl->device)) {
2690 ret = PTR_ERR(ctrl->device);
2691 goto out_release_instance;
2692 }
2693 get_device(ctrl->device);
2694 ida_init(&ctrl->ns_ida);
2695
2696 spin_lock(&dev_list_lock);
2697 list_add_tail(&ctrl->node, &nvme_ctrl_list);
2698 spin_unlock(&dev_list_lock);
2699
2700 /*
2701 * Initialize latency tolerance controls. The sysfs files won't
2702 * be visible to userspace unless the device actually supports APST.
2703 */
2704 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
2705 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
2706 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
2707
2708 return 0;
2709 out_release_instance:
2710 nvme_release_instance(ctrl);
2711 out:
2712 return ret;
2713 }
2714 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
2715
2716 /**
2717 * nvme_kill_queues(): Ends all namespace queues
2718 * @ctrl: the dead controller that needs to end
2719 *
2720 * Call this function when the driver determines it is unable to get the
2721 * controller in a state capable of servicing IO.
2722 */
2723 void nvme_kill_queues(struct nvme_ctrl *ctrl)
2724 {
2725 struct nvme_ns *ns;
2726
2727 mutex_lock(&ctrl->namespaces_mutex);
2728
2729 /* Forcibly unquiesce queues to avoid blocking dispatch */
2730 if (ctrl->admin_q)
2731 blk_mq_unquiesce_queue(ctrl->admin_q);
2732
2733 list_for_each_entry(ns, &ctrl->namespaces, list) {
2734 /*
2735 * Revalidating a dead namespace sets capacity to 0. This will
2736 * end buffered writers dirtying pages that can't be synced.
2737 */
2738 if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
2739 continue;
2740 revalidate_disk(ns->disk);
2741 blk_set_queue_dying(ns->queue);
2742
2743 /* Forcibly unquiesce queues to avoid blocking dispatch */
2744 blk_mq_unquiesce_queue(ns->queue);
2745 }
2746 mutex_unlock(&ctrl->namespaces_mutex);
2747 }
2748 EXPORT_SYMBOL_GPL(nvme_kill_queues);
2749
2750 void nvme_unfreeze(struct nvme_ctrl *ctrl)
2751 {
2752 struct nvme_ns *ns;
2753
2754 mutex_lock(&ctrl->namespaces_mutex);
2755 list_for_each_entry(ns, &ctrl->namespaces, list)
2756 blk_mq_unfreeze_queue(ns->queue);
2757 mutex_unlock(&ctrl->namespaces_mutex);
2758 }
2759 EXPORT_SYMBOL_GPL(nvme_unfreeze);
2760
2761 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
2762 {
2763 struct nvme_ns *ns;
2764
2765 mutex_lock(&ctrl->namespaces_mutex);
2766 list_for_each_entry(ns, &ctrl->namespaces, list) {
2767 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
2768 if (timeout <= 0)
2769 break;
2770 }
2771 mutex_unlock(&ctrl->namespaces_mutex);
2772 }
2773 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
2774
2775 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
2776 {
2777 struct nvme_ns *ns;
2778
2779 mutex_lock(&ctrl->namespaces_mutex);
2780 list_for_each_entry(ns, &ctrl->namespaces, list)
2781 blk_mq_freeze_queue_wait(ns->queue);
2782 mutex_unlock(&ctrl->namespaces_mutex);
2783 }
2784 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
2785
2786 void nvme_start_freeze(struct nvme_ctrl *ctrl)
2787 {
2788 struct nvme_ns *ns;
2789
2790 mutex_lock(&ctrl->namespaces_mutex);
2791 list_for_each_entry(ns, &ctrl->namespaces, list)
2792 blk_freeze_queue_start(ns->queue);
2793 mutex_unlock(&ctrl->namespaces_mutex);
2794 }
2795 EXPORT_SYMBOL_GPL(nvme_start_freeze);
2796
2797 void nvme_stop_queues(struct nvme_ctrl *ctrl)
2798 {
2799 struct nvme_ns *ns;
2800
2801 mutex_lock(&ctrl->namespaces_mutex);
2802 list_for_each_entry(ns, &ctrl->namespaces, list)
2803 blk_mq_quiesce_queue(ns->queue);
2804 mutex_unlock(&ctrl->namespaces_mutex);
2805 }
2806 EXPORT_SYMBOL_GPL(nvme_stop_queues);
2807
2808 void nvme_start_queues(struct nvme_ctrl *ctrl)
2809 {
2810 struct nvme_ns *ns;
2811
2812 mutex_lock(&ctrl->namespaces_mutex);
2813 list_for_each_entry(ns, &ctrl->namespaces, list)
2814 blk_mq_unquiesce_queue(ns->queue);
2815 mutex_unlock(&ctrl->namespaces_mutex);
2816 }
2817 EXPORT_SYMBOL_GPL(nvme_start_queues);
2818
2819 int __init nvme_core_init(void)
2820 {
2821 int result;
2822
2823 nvme_wq = alloc_workqueue("nvme-wq",
2824 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
2825 if (!nvme_wq)
2826 return -ENOMEM;
2827
2828 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
2829 &nvme_dev_fops);
2830 if (result < 0)
2831 goto destroy_wq;
2832 else if (result > 0)
2833 nvme_char_major = result;
2834
2835 nvme_class = class_create(THIS_MODULE, "nvme");
2836 if (IS_ERR(nvme_class)) {
2837 result = PTR_ERR(nvme_class);
2838 goto unregister_chrdev;
2839 }
2840
2841 return 0;
2842
2843 unregister_chrdev:
2844 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
2845 destroy_wq:
2846 destroy_workqueue(nvme_wq);
2847 return result;
2848 }
2849
2850 void nvme_core_exit(void)
2851 {
2852 class_destroy(nvme_class);
2853 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
2854 destroy_workqueue(nvme_wq);
2855 }
2856
2857 MODULE_LICENSE("GPL");
2858 MODULE_VERSION("1.0");
2859 module_init(nvme_core_init);
2860 module_exit(nvme_core_exit);
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