2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
31 #include <linux/list_sort.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #include <uapi/linux/nvme_ioctl.h>
48 #define NVME_MINORS (1U << MINORBITS)
49 #define NVME_Q_DEPTH 1024
50 #define NVME_AQ_DEPTH 256
51 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
52 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
53 #define ADMIN_TIMEOUT (admin_timeout * HZ)
54 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
56 static unsigned char admin_timeout
= 60;
57 module_param(admin_timeout
, byte
, 0644);
58 MODULE_PARM_DESC(admin_timeout
, "timeout in seconds for admin commands");
60 unsigned char nvme_io_timeout
= 30;
61 module_param_named(io_timeout
, nvme_io_timeout
, byte
, 0644);
62 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
64 static unsigned char shutdown_timeout
= 5;
65 module_param(shutdown_timeout
, byte
, 0644);
66 MODULE_PARM_DESC(shutdown_timeout
, "timeout in seconds for controller shutdown");
68 static int nvme_major
;
69 module_param(nvme_major
, int, 0);
71 static int nvme_char_major
;
72 module_param(nvme_char_major
, int, 0);
74 static int use_threaded_interrupts
;
75 module_param(use_threaded_interrupts
, int, 0);
77 static bool use_cmb_sqes
= true;
78 module_param(use_cmb_sqes
, bool, 0644);
79 MODULE_PARM_DESC(use_cmb_sqes
, "use controller's memory buffer for I/O SQes");
81 static DEFINE_SPINLOCK(dev_list_lock
);
82 static LIST_HEAD(dev_list
);
83 static struct task_struct
*nvme_thread
;
84 static struct workqueue_struct
*nvme_workq
;
85 static wait_queue_head_t nvme_kthread_wait
;
87 static struct class *nvme_class
;
89 static int __nvme_reset(struct nvme_dev
*dev
);
90 static int nvme_reset(struct nvme_dev
*dev
);
91 static int nvme_process_cq(struct nvme_queue
*nvmeq
);
92 static void nvme_dead_ctrl(struct nvme_dev
*dev
);
94 struct async_cmd_info
{
95 struct kthread_work work
;
96 struct kthread_worker
*worker
;
104 * An NVM Express queue. Each device has at least two (one for admin
105 * commands and one for I/O commands).
108 struct device
*q_dmadev
;
109 struct nvme_dev
*dev
;
110 char irqname
[24]; /* nvme4294967295-65535\0 */
112 struct nvme_command
*sq_cmds
;
113 struct nvme_command __iomem
*sq_cmds_io
;
114 volatile struct nvme_completion
*cqes
;
115 struct blk_mq_tags
**tags
;
116 dma_addr_t sq_dma_addr
;
117 dma_addr_t cq_dma_addr
;
127 struct async_cmd_info cmdinfo
;
131 * Check we didin't inadvertently grow the command struct
133 static inline void _nvme_check_size(void)
135 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
140 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
141 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
142 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
143 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
144 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
145 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
146 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
149 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
150 struct nvme_completion
*);
152 struct nvme_cmd_info
{
153 nvme_completion_fn fn
;
156 struct nvme_queue
*nvmeq
;
157 struct nvme_iod iod
[0];
161 * Max size of iod being embedded in the request payload
163 #define NVME_INT_PAGES 2
164 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
165 #define NVME_INT_MASK 0x01
168 * Will slightly overestimate the number of pages needed. This is OK
169 * as it only leads to a small amount of wasted memory for the lifetime of
172 static int nvme_npages(unsigned size
, struct nvme_dev
*dev
)
174 unsigned nprps
= DIV_ROUND_UP(size
+ dev
->page_size
, dev
->page_size
);
175 return DIV_ROUND_UP(8 * nprps
, PAGE_SIZE
- 8);
178 static unsigned int nvme_cmd_size(struct nvme_dev
*dev
)
180 unsigned int ret
= sizeof(struct nvme_cmd_info
);
182 ret
+= sizeof(struct nvme_iod
);
183 ret
+= sizeof(__le64
*) * nvme_npages(NVME_INT_BYTES(dev
), dev
);
184 ret
+= sizeof(struct scatterlist
) * NVME_INT_PAGES
;
189 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
190 unsigned int hctx_idx
)
192 struct nvme_dev
*dev
= data
;
193 struct nvme_queue
*nvmeq
= dev
->queues
[0];
195 WARN_ON(hctx_idx
!= 0);
196 WARN_ON(dev
->admin_tagset
.tags
[0] != hctx
->tags
);
197 WARN_ON(nvmeq
->tags
);
199 hctx
->driver_data
= nvmeq
;
200 nvmeq
->tags
= &dev
->admin_tagset
.tags
[0];
204 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx
*hctx
, unsigned int hctx_idx
)
206 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
211 static int nvme_admin_init_request(void *data
, struct request
*req
,
212 unsigned int hctx_idx
, unsigned int rq_idx
,
213 unsigned int numa_node
)
215 struct nvme_dev
*dev
= data
;
216 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
217 struct nvme_queue
*nvmeq
= dev
->queues
[0];
224 static int nvme_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
225 unsigned int hctx_idx
)
227 struct nvme_dev
*dev
= data
;
228 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
231 nvmeq
->tags
= &dev
->tagset
.tags
[hctx_idx
];
233 WARN_ON(dev
->tagset
.tags
[hctx_idx
] != hctx
->tags
);
234 hctx
->driver_data
= nvmeq
;
238 static int nvme_init_request(void *data
, struct request
*req
,
239 unsigned int hctx_idx
, unsigned int rq_idx
,
240 unsigned int numa_node
)
242 struct nvme_dev
*dev
= data
;
243 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
244 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
251 static void nvme_set_info(struct nvme_cmd_info
*cmd
, void *ctx
,
252 nvme_completion_fn handler
)
257 blk_mq_start_request(blk_mq_rq_from_pdu(cmd
));
260 static void *iod_get_private(struct nvme_iod
*iod
)
262 return (void *) (iod
->private & ~0x1UL
);
266 * If bit 0 is set, the iod is embedded in the request payload.
268 static bool iod_should_kfree(struct nvme_iod
*iod
)
270 return (iod
->private & NVME_INT_MASK
) == 0;
273 /* Special values must be less than 0x1000 */
274 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
275 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
276 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
277 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
279 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
280 struct nvme_completion
*cqe
)
282 if (ctx
== CMD_CTX_CANCELLED
)
284 if (ctx
== CMD_CTX_COMPLETED
) {
285 dev_warn(nvmeq
->q_dmadev
,
286 "completed id %d twice on queue %d\n",
287 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
290 if (ctx
== CMD_CTX_INVALID
) {
291 dev_warn(nvmeq
->q_dmadev
,
292 "invalid id %d completed on queue %d\n",
293 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
296 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
299 static void *cancel_cmd_info(struct nvme_cmd_info
*cmd
, nvme_completion_fn
*fn
)
306 cmd
->fn
= special_completion
;
307 cmd
->ctx
= CMD_CTX_CANCELLED
;
311 static void async_req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
312 struct nvme_completion
*cqe
)
314 u32 result
= le32_to_cpup(&cqe
->result
);
315 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
317 if (status
== NVME_SC_SUCCESS
|| status
== NVME_SC_ABORT_REQ
)
318 ++nvmeq
->dev
->event_limit
;
319 if (status
!= NVME_SC_SUCCESS
)
322 switch (result
& 0xff07) {
323 case NVME_AER_NOTICE_NS_CHANGED
:
324 dev_info(nvmeq
->q_dmadev
, "rescanning\n");
325 schedule_work(&nvmeq
->dev
->scan_work
);
327 dev_warn(nvmeq
->q_dmadev
, "async event result %08x\n", result
);
331 static void abort_completion(struct nvme_queue
*nvmeq
, void *ctx
,
332 struct nvme_completion
*cqe
)
334 struct request
*req
= ctx
;
336 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
337 u32 result
= le32_to_cpup(&cqe
->result
);
339 blk_mq_free_request(req
);
341 dev_warn(nvmeq
->q_dmadev
, "Abort status:%x result:%x", status
, result
);
342 ++nvmeq
->dev
->abort_limit
;
345 static void async_completion(struct nvme_queue
*nvmeq
, void *ctx
,
346 struct nvme_completion
*cqe
)
348 struct async_cmd_info
*cmdinfo
= ctx
;
349 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
350 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
351 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
352 blk_mq_free_request(cmdinfo
->req
);
355 static inline struct nvme_cmd_info
*get_cmd_from_tag(struct nvme_queue
*nvmeq
,
358 struct request
*req
= blk_mq_tag_to_rq(*nvmeq
->tags
, tag
);
360 return blk_mq_rq_to_pdu(req
);
364 * Called with local interrupts disabled and the q_lock held. May not sleep.
366 static void *nvme_finish_cmd(struct nvme_queue
*nvmeq
, int tag
,
367 nvme_completion_fn
*fn
)
369 struct nvme_cmd_info
*cmd
= get_cmd_from_tag(nvmeq
, tag
);
371 if (tag
>= nvmeq
->q_depth
) {
372 *fn
= special_completion
;
373 return CMD_CTX_INVALID
;
378 cmd
->fn
= special_completion
;
379 cmd
->ctx
= CMD_CTX_COMPLETED
;
384 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
385 * @nvmeq: The queue to use
386 * @cmd: The command to send
388 * Safe to use from interrupt context
390 static void __nvme_submit_cmd(struct nvme_queue
*nvmeq
,
391 struct nvme_command
*cmd
)
393 u16 tail
= nvmeq
->sq_tail
;
395 if (nvmeq
->sq_cmds_io
)
396 memcpy_toio(&nvmeq
->sq_cmds_io
[tail
], cmd
, sizeof(*cmd
));
398 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
400 if (++tail
== nvmeq
->q_depth
)
402 writel(tail
, nvmeq
->q_db
);
403 nvmeq
->sq_tail
= tail
;
406 static void nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
409 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
410 __nvme_submit_cmd(nvmeq
, cmd
);
411 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
414 static __le64
**iod_list(struct nvme_iod
*iod
)
416 return ((void *)iod
) + iod
->offset
;
419 static inline void iod_init(struct nvme_iod
*iod
, unsigned nbytes
,
420 unsigned nseg
, unsigned long private)
422 iod
->private = private;
423 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
425 iod
->length
= nbytes
;
429 static struct nvme_iod
*
430 __nvme_alloc_iod(unsigned nseg
, unsigned bytes
, struct nvme_dev
*dev
,
431 unsigned long priv
, gfp_t gfp
)
433 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
434 sizeof(__le64
*) * nvme_npages(bytes
, dev
) +
435 sizeof(struct scatterlist
) * nseg
, gfp
);
438 iod_init(iod
, bytes
, nseg
, priv
);
443 static struct nvme_iod
*nvme_alloc_iod(struct request
*rq
, struct nvme_dev
*dev
,
446 unsigned size
= !(rq
->cmd_flags
& REQ_DISCARD
) ? blk_rq_bytes(rq
) :
447 sizeof(struct nvme_dsm_range
);
448 struct nvme_iod
*iod
;
450 if (rq
->nr_phys_segments
<= NVME_INT_PAGES
&&
451 size
<= NVME_INT_BYTES(dev
)) {
452 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(rq
);
455 iod_init(iod
, size
, rq
->nr_phys_segments
,
456 (unsigned long) rq
| NVME_INT_MASK
);
460 return __nvme_alloc_iod(rq
->nr_phys_segments
, size
, dev
,
461 (unsigned long) rq
, gfp
);
464 static void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
466 const int last_prp
= dev
->page_size
/ 8 - 1;
468 __le64
**list
= iod_list(iod
);
469 dma_addr_t prp_dma
= iod
->first_dma
;
471 if (iod
->npages
== 0)
472 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
473 for (i
= 0; i
< iod
->npages
; i
++) {
474 __le64
*prp_list
= list
[i
];
475 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
476 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
477 prp_dma
= next_prp_dma
;
480 if (iod_should_kfree(iod
))
484 static int nvme_error_status(u16 status
)
486 switch (status
& 0x7ff) {
487 case NVME_SC_SUCCESS
:
489 case NVME_SC_CAP_EXCEEDED
:
496 #ifdef CONFIG_BLK_DEV_INTEGRITY
497 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
499 if (be32_to_cpu(pi
->ref_tag
) == v
)
500 pi
->ref_tag
= cpu_to_be32(p
);
503 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
505 if (be32_to_cpu(pi
->ref_tag
) == p
)
506 pi
->ref_tag
= cpu_to_be32(v
);
510 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
512 * The virtual start sector is the one that was originally submitted by the
513 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
514 * start sector may be different. Remap protection information to match the
515 * physical LBA on writes, and back to the original seed on reads.
517 * Type 0 and 3 do not have a ref tag, so no remapping required.
519 static void nvme_dif_remap(struct request
*req
,
520 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
522 struct nvme_ns
*ns
= req
->rq_disk
->private_data
;
523 struct bio_integrity_payload
*bip
;
524 struct t10_pi_tuple
*pi
;
526 u32 i
, nlb
, ts
, phys
, virt
;
528 if (!ns
->pi_type
|| ns
->pi_type
== NVME_NS_DPS_PI_TYPE3
)
531 bip
= bio_integrity(req
->bio
);
535 pmap
= kmap_atomic(bip
->bip_vec
->bv_page
) + bip
->bip_vec
->bv_offset
;
538 virt
= bip_get_seed(bip
);
539 phys
= nvme_block_nr(ns
, blk_rq_pos(req
));
540 nlb
= (blk_rq_bytes(req
) >> ns
->lba_shift
);
541 ts
= ns
->disk
->integrity
->tuple_size
;
543 for (i
= 0; i
< nlb
; i
++, virt
++, phys
++) {
544 pi
= (struct t10_pi_tuple
*)p
;
545 dif_swap(phys
, virt
, pi
);
551 static int nvme_noop_verify(struct blk_integrity_iter
*iter
)
556 static int nvme_noop_generate(struct blk_integrity_iter
*iter
)
561 struct blk_integrity nvme_meta_noop
= {
562 .name
= "NVME_META_NOOP",
563 .generate_fn
= nvme_noop_generate
,
564 .verify_fn
= nvme_noop_verify
,
567 static void nvme_init_integrity(struct nvme_ns
*ns
)
569 struct blk_integrity integrity
;
571 switch (ns
->pi_type
) {
572 case NVME_NS_DPS_PI_TYPE3
:
573 integrity
= t10_pi_type3_crc
;
575 case NVME_NS_DPS_PI_TYPE1
:
576 case NVME_NS_DPS_PI_TYPE2
:
577 integrity
= t10_pi_type1_crc
;
580 integrity
= nvme_meta_noop
;
583 integrity
.tuple_size
= ns
->ms
;
584 blk_integrity_register(ns
->disk
, &integrity
);
585 blk_queue_max_integrity_segments(ns
->queue
, 1);
587 #else /* CONFIG_BLK_DEV_INTEGRITY */
588 static void nvme_dif_remap(struct request
*req
,
589 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
592 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
595 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
598 static void nvme_init_integrity(struct nvme_ns
*ns
)
603 static void req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
604 struct nvme_completion
*cqe
)
606 struct nvme_iod
*iod
= ctx
;
607 struct request
*req
= iod_get_private(iod
);
608 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
609 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
610 bool requeue
= false;
613 if (unlikely(status
)) {
614 if (!(status
& NVME_SC_DNR
|| blk_noretry_request(req
))
615 && (jiffies
- req
->start_time
) < req
->timeout
) {
619 blk_mq_requeue_request(req
);
620 spin_lock_irqsave(req
->q
->queue_lock
, flags
);
621 if (!blk_queue_stopped(req
->q
))
622 blk_mq_kick_requeue_list(req
->q
);
623 spin_unlock_irqrestore(req
->q
->queue_lock
, flags
);
627 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
) {
628 if (cmd_rq
->ctx
== CMD_CTX_CANCELLED
)
633 error
= nvme_error_status(status
);
637 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
) {
638 u32 result
= le32_to_cpup(&cqe
->result
);
639 req
->special
= (void *)(uintptr_t)result
;
643 dev_warn(nvmeq
->dev
->dev
,
644 "completing aborted command with status:%04x\n",
649 dma_unmap_sg(nvmeq
->dev
->dev
, iod
->sg
, iod
->nents
,
650 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
651 if (blk_integrity_rq(req
)) {
652 if (!rq_data_dir(req
))
653 nvme_dif_remap(req
, nvme_dif_complete
);
654 dma_unmap_sg(nvmeq
->dev
->dev
, iod
->meta_sg
, 1,
655 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
658 nvme_free_iod(nvmeq
->dev
, iod
);
660 if (likely(!requeue
))
661 blk_mq_complete_request(req
, error
);
664 /* length is in bytes. gfp flags indicates whether we may sleep. */
665 static int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
,
666 int total_len
, gfp_t gfp
)
668 struct dma_pool
*pool
;
669 int length
= total_len
;
670 struct scatterlist
*sg
= iod
->sg
;
671 int dma_len
= sg_dma_len(sg
);
672 u64 dma_addr
= sg_dma_address(sg
);
673 u32 page_size
= dev
->page_size
;
674 int offset
= dma_addr
& (page_size
- 1);
676 __le64
**list
= iod_list(iod
);
680 length
-= (page_size
- offset
);
684 dma_len
-= (page_size
- offset
);
686 dma_addr
+= (page_size
- offset
);
689 dma_addr
= sg_dma_address(sg
);
690 dma_len
= sg_dma_len(sg
);
693 if (length
<= page_size
) {
694 iod
->first_dma
= dma_addr
;
698 nprps
= DIV_ROUND_UP(length
, page_size
);
699 if (nprps
<= (256 / 8)) {
700 pool
= dev
->prp_small_pool
;
703 pool
= dev
->prp_page_pool
;
707 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
709 iod
->first_dma
= dma_addr
;
711 return (total_len
- length
) + page_size
;
714 iod
->first_dma
= prp_dma
;
717 if (i
== page_size
>> 3) {
718 __le64
*old_prp_list
= prp_list
;
719 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
721 return total_len
- length
;
722 list
[iod
->npages
++] = prp_list
;
723 prp_list
[0] = old_prp_list
[i
- 1];
724 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
727 prp_list
[i
++] = cpu_to_le64(dma_addr
);
728 dma_len
-= page_size
;
729 dma_addr
+= page_size
;
737 dma_addr
= sg_dma_address(sg
);
738 dma_len
= sg_dma_len(sg
);
744 static void nvme_submit_priv(struct nvme_queue
*nvmeq
, struct request
*req
,
745 struct nvme_iod
*iod
)
747 struct nvme_command cmnd
;
749 memcpy(&cmnd
, req
->cmd
, sizeof(cmnd
));
750 cmnd
.rw
.command_id
= req
->tag
;
751 if (req
->nr_phys_segments
) {
752 cmnd
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
753 cmnd
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
756 __nvme_submit_cmd(nvmeq
, &cmnd
);
760 * We reuse the small pool to allocate the 16-byte range here as it is not
761 * worth having a special pool for these or additional cases to handle freeing
764 static void nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
765 struct request
*req
, struct nvme_iod
*iod
)
767 struct nvme_dsm_range
*range
=
768 (struct nvme_dsm_range
*)iod_list(iod
)[0];
769 struct nvme_command cmnd
;
771 range
->cattr
= cpu_to_le32(0);
772 range
->nlb
= cpu_to_le32(blk_rq_bytes(req
) >> ns
->lba_shift
);
773 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
775 memset(&cmnd
, 0, sizeof(cmnd
));
776 cmnd
.dsm
.opcode
= nvme_cmd_dsm
;
777 cmnd
.dsm
.command_id
= req
->tag
;
778 cmnd
.dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
779 cmnd
.dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
781 cmnd
.dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
783 __nvme_submit_cmd(nvmeq
, &cmnd
);
786 static void nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
789 struct nvme_command cmnd
;
791 memset(&cmnd
, 0, sizeof(cmnd
));
792 cmnd
.common
.opcode
= nvme_cmd_flush
;
793 cmnd
.common
.command_id
= cmdid
;
794 cmnd
.common
.nsid
= cpu_to_le32(ns
->ns_id
);
796 __nvme_submit_cmd(nvmeq
, &cmnd
);
799 static int nvme_submit_iod(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
802 struct request
*req
= iod_get_private(iod
);
803 struct nvme_command cmnd
;
807 if (req
->cmd_flags
& REQ_FUA
)
808 control
|= NVME_RW_FUA
;
809 if (req
->cmd_flags
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
810 control
|= NVME_RW_LR
;
812 if (req
->cmd_flags
& REQ_RAHEAD
)
813 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
815 memset(&cmnd
, 0, sizeof(cmnd
));
816 cmnd
.rw
.opcode
= (rq_data_dir(req
) ? nvme_cmd_write
: nvme_cmd_read
);
817 cmnd
.rw
.command_id
= req
->tag
;
818 cmnd
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
819 cmnd
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
820 cmnd
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
821 cmnd
.rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
822 cmnd
.rw
.length
= cpu_to_le16((blk_rq_bytes(req
) >> ns
->lba_shift
) - 1);
825 switch (ns
->pi_type
) {
826 case NVME_NS_DPS_PI_TYPE3
:
827 control
|= NVME_RW_PRINFO_PRCHK_GUARD
;
829 case NVME_NS_DPS_PI_TYPE1
:
830 case NVME_NS_DPS_PI_TYPE2
:
831 control
|= NVME_RW_PRINFO_PRCHK_GUARD
|
832 NVME_RW_PRINFO_PRCHK_REF
;
833 cmnd
.rw
.reftag
= cpu_to_le32(
834 nvme_block_nr(ns
, blk_rq_pos(req
)));
837 if (blk_integrity_rq(req
))
839 cpu_to_le64(sg_dma_address(iod
->meta_sg
));
841 control
|= NVME_RW_PRINFO_PRACT
;
844 cmnd
.rw
.control
= cpu_to_le16(control
);
845 cmnd
.rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
847 __nvme_submit_cmd(nvmeq
, &cmnd
);
853 * NOTE: ns is NULL when called on the admin queue.
855 static int nvme_queue_rq(struct blk_mq_hw_ctx
*hctx
,
856 const struct blk_mq_queue_data
*bd
)
858 struct nvme_ns
*ns
= hctx
->queue
->queuedata
;
859 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
860 struct nvme_dev
*dev
= nvmeq
->dev
;
861 struct request
*req
= bd
->rq
;
862 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
863 struct nvme_iod
*iod
;
864 enum dma_data_direction dma_dir
;
867 * If formated with metadata, require the block layer provide a buffer
868 * unless this namespace is formated such that the metadata can be
869 * stripped/generated by the controller with PRACT=1.
871 if (ns
&& ns
->ms
&& !blk_integrity_rq(req
)) {
872 if (!(ns
->pi_type
&& ns
->ms
== 8) &&
873 req
->cmd_type
!= REQ_TYPE_DRV_PRIV
) {
874 blk_mq_complete_request(req
, -EFAULT
);
875 return BLK_MQ_RQ_QUEUE_OK
;
879 iod
= nvme_alloc_iod(req
, dev
, GFP_ATOMIC
);
881 return BLK_MQ_RQ_QUEUE_BUSY
;
883 if (req
->cmd_flags
& REQ_DISCARD
) {
886 * We reuse the small pool to allocate the 16-byte range here
887 * as it is not worth having a special pool for these or
888 * additional cases to handle freeing the iod.
890 range
= dma_pool_alloc(dev
->prp_small_pool
, GFP_ATOMIC
,
894 iod_list(iod
)[0] = (__le64
*)range
;
896 } else if (req
->nr_phys_segments
) {
897 dma_dir
= rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
899 sg_init_table(iod
->sg
, req
->nr_phys_segments
);
900 iod
->nents
= blk_rq_map_sg(req
->q
, req
, iod
->sg
);
904 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
))
907 if (blk_rq_bytes(req
) !=
908 nvme_setup_prps(dev
, iod
, blk_rq_bytes(req
), GFP_ATOMIC
)) {
909 dma_unmap_sg(dev
->dev
, iod
->sg
, iod
->nents
, dma_dir
);
912 if (blk_integrity_rq(req
)) {
913 if (blk_rq_count_integrity_sg(req
->q
, req
->bio
) != 1)
916 sg_init_table(iod
->meta_sg
, 1);
917 if (blk_rq_map_integrity_sg(
918 req
->q
, req
->bio
, iod
->meta_sg
) != 1)
921 if (rq_data_dir(req
))
922 nvme_dif_remap(req
, nvme_dif_prep
);
924 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->meta_sg
, 1, dma_dir
))
929 nvme_set_info(cmd
, iod
, req_completion
);
930 spin_lock_irq(&nvmeq
->q_lock
);
931 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
)
932 nvme_submit_priv(nvmeq
, req
, iod
);
933 else if (req
->cmd_flags
& REQ_DISCARD
)
934 nvme_submit_discard(nvmeq
, ns
, req
, iod
);
935 else if (req
->cmd_flags
& REQ_FLUSH
)
936 nvme_submit_flush(nvmeq
, ns
, req
->tag
);
938 nvme_submit_iod(nvmeq
, iod
, ns
);
940 nvme_process_cq(nvmeq
);
941 spin_unlock_irq(&nvmeq
->q_lock
);
942 return BLK_MQ_RQ_QUEUE_OK
;
945 nvme_free_iod(dev
, iod
);
946 return BLK_MQ_RQ_QUEUE_ERROR
;
948 nvme_free_iod(dev
, iod
);
949 return BLK_MQ_RQ_QUEUE_BUSY
;
952 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
956 head
= nvmeq
->cq_head
;
957 phase
= nvmeq
->cq_phase
;
961 nvme_completion_fn fn
;
962 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
963 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
965 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
966 if (++head
== nvmeq
->q_depth
) {
970 ctx
= nvme_finish_cmd(nvmeq
, cqe
.command_id
, &fn
);
971 fn(nvmeq
, ctx
, &cqe
);
974 /* If the controller ignores the cq head doorbell and continuously
975 * writes to the queue, it is theoretically possible to wrap around
976 * the queue twice and mistakenly return IRQ_NONE. Linux only
977 * requires that 0.1% of your interrupts are handled, so this isn't
980 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
983 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
984 nvmeq
->cq_head
= head
;
985 nvmeq
->cq_phase
= phase
;
991 static irqreturn_t
nvme_irq(int irq
, void *data
)
994 struct nvme_queue
*nvmeq
= data
;
995 spin_lock(&nvmeq
->q_lock
);
996 nvme_process_cq(nvmeq
);
997 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
999 spin_unlock(&nvmeq
->q_lock
);
1003 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
1005 struct nvme_queue
*nvmeq
= data
;
1006 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
1007 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
1009 return IRQ_WAKE_THREAD
;
1013 * Returns 0 on success. If the result is negative, it's a Linux error code;
1014 * if the result is positive, it's an NVM Express status code
1016 int __nvme_submit_sync_cmd(struct request_queue
*q
, struct nvme_command
*cmd
,
1017 void *buffer
, void __user
*ubuffer
, unsigned bufflen
,
1018 u32
*result
, unsigned timeout
)
1020 bool write
= cmd
->common
.opcode
& 1;
1021 struct bio
*bio
= NULL
;
1022 struct request
*req
;
1025 req
= blk_mq_alloc_request(q
, write
, GFP_KERNEL
, false);
1027 return PTR_ERR(req
);
1029 req
->cmd_type
= REQ_TYPE_DRV_PRIV
;
1030 req
->cmd_flags
|= REQ_FAILFAST_DRIVER
;
1031 req
->__data_len
= 0;
1032 req
->__sector
= (sector_t
) -1;
1033 req
->bio
= req
->biotail
= NULL
;
1035 req
->timeout
= timeout
? timeout
: ADMIN_TIMEOUT
;
1037 req
->cmd
= (unsigned char *)cmd
;
1038 req
->cmd_len
= sizeof(struct nvme_command
);
1039 req
->special
= (void *)0;
1041 if (buffer
&& bufflen
) {
1042 ret
= blk_rq_map_kern(q
, req
, buffer
, bufflen
, __GFP_WAIT
);
1045 } else if (ubuffer
&& bufflen
) {
1046 ret
= blk_rq_map_user(q
, req
, NULL
, ubuffer
, bufflen
, __GFP_WAIT
);
1052 blk_execute_rq(req
->q
, NULL
, req
, 0);
1054 blk_rq_unmap_user(bio
);
1056 *result
= (u32
)(uintptr_t)req
->special
;
1059 blk_mq_free_request(req
);
1063 int nvme_submit_sync_cmd(struct request_queue
*q
, struct nvme_command
*cmd
,
1064 void *buffer
, unsigned bufflen
)
1066 return __nvme_submit_sync_cmd(q
, cmd
, buffer
, NULL
, bufflen
, NULL
, 0);
1069 static int nvme_submit_async_admin_req(struct nvme_dev
*dev
)
1071 struct nvme_queue
*nvmeq
= dev
->queues
[0];
1072 struct nvme_command c
;
1073 struct nvme_cmd_info
*cmd_info
;
1074 struct request
*req
;
1076 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
, true);
1078 return PTR_ERR(req
);
1080 req
->cmd_flags
|= REQ_NO_TIMEOUT
;
1081 cmd_info
= blk_mq_rq_to_pdu(req
);
1082 nvme_set_info(cmd_info
, NULL
, async_req_completion
);
1084 memset(&c
, 0, sizeof(c
));
1085 c
.common
.opcode
= nvme_admin_async_event
;
1086 c
.common
.command_id
= req
->tag
;
1088 blk_mq_free_request(req
);
1089 __nvme_submit_cmd(nvmeq
, &c
);
1093 static int nvme_submit_admin_async_cmd(struct nvme_dev
*dev
,
1094 struct nvme_command
*cmd
,
1095 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
1097 struct nvme_queue
*nvmeq
= dev
->queues
[0];
1098 struct request
*req
;
1099 struct nvme_cmd_info
*cmd_rq
;
1101 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
1103 return PTR_ERR(req
);
1105 req
->timeout
= timeout
;
1106 cmd_rq
= blk_mq_rq_to_pdu(req
);
1108 nvme_set_info(cmd_rq
, cmdinfo
, async_completion
);
1109 cmdinfo
->status
= -EINTR
;
1111 cmd
->common
.command_id
= req
->tag
;
1113 nvme_submit_cmd(nvmeq
, cmd
);
1117 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
1119 struct nvme_command c
;
1121 memset(&c
, 0, sizeof(c
));
1122 c
.delete_queue
.opcode
= opcode
;
1123 c
.delete_queue
.qid
= cpu_to_le16(id
);
1125 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1128 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
1129 struct nvme_queue
*nvmeq
)
1131 struct nvme_command c
;
1132 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
1135 * Note: we (ab)use the fact the the prp fields survive if no data
1136 * is attached to the request.
1138 memset(&c
, 0, sizeof(c
));
1139 c
.create_cq
.opcode
= nvme_admin_create_cq
;
1140 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
1141 c
.create_cq
.cqid
= cpu_to_le16(qid
);
1142 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1143 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
1144 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
1146 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1149 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
1150 struct nvme_queue
*nvmeq
)
1152 struct nvme_command c
;
1153 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
1156 * Note: we (ab)use the fact the the prp fields survive if no data
1157 * is attached to the request.
1159 memset(&c
, 0, sizeof(c
));
1160 c
.create_sq
.opcode
= nvme_admin_create_sq
;
1161 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
1162 c
.create_sq
.sqid
= cpu_to_le16(qid
);
1163 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1164 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
1165 c
.create_sq
.cqid
= cpu_to_le16(qid
);
1167 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1170 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1172 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1175 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1177 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1180 int nvme_identify_ctrl(struct nvme_dev
*dev
, struct nvme_id_ctrl
**id
)
1182 struct nvme_command c
= { };
1185 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1186 c
.identify
.opcode
= nvme_admin_identify
;
1187 c
.identify
.cns
= cpu_to_le32(1);
1189 *id
= kmalloc(sizeof(struct nvme_id_ctrl
), GFP_KERNEL
);
1193 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *id
,
1194 sizeof(struct nvme_id_ctrl
));
1200 int nvme_identify_ns(struct nvme_dev
*dev
, unsigned nsid
,
1201 struct nvme_id_ns
**id
)
1203 struct nvme_command c
= { };
1206 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1207 c
.identify
.opcode
= nvme_admin_identify
,
1208 c
.identify
.nsid
= cpu_to_le32(nsid
),
1210 *id
= kmalloc(sizeof(struct nvme_id_ns
), GFP_KERNEL
);
1214 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *id
,
1215 sizeof(struct nvme_id_ns
));
1221 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
1222 dma_addr_t dma_addr
, u32
*result
)
1224 struct nvme_command c
;
1226 memset(&c
, 0, sizeof(c
));
1227 c
.features
.opcode
= nvme_admin_get_features
;
1228 c
.features
.nsid
= cpu_to_le32(nsid
);
1229 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1230 c
.features
.fid
= cpu_to_le32(fid
);
1232 return __nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, NULL
, 0,
1236 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
1237 dma_addr_t dma_addr
, u32
*result
)
1239 struct nvme_command c
;
1241 memset(&c
, 0, sizeof(c
));
1242 c
.features
.opcode
= nvme_admin_set_features
;
1243 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1244 c
.features
.fid
= cpu_to_le32(fid
);
1245 c
.features
.dword11
= cpu_to_le32(dword11
);
1247 return __nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, NULL
, 0,
1251 int nvme_get_log_page(struct nvme_dev
*dev
, struct nvme_smart_log
**log
)
1253 struct nvme_command c
= { };
1256 c
.common
.opcode
= nvme_admin_get_log_page
,
1257 c
.common
.nsid
= cpu_to_le32(0xFFFFFFFF),
1258 c
.common
.cdw10
[0] = cpu_to_le32(
1259 (((sizeof(struct nvme_smart_log
) / 4) - 1) << 16) |
1262 *log
= kmalloc(sizeof(struct nvme_smart_log
), GFP_KERNEL
);
1266 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *log
,
1267 sizeof(struct nvme_smart_log
));
1274 * nvme_abort_req - Attempt aborting a request
1276 * Schedule controller reset if the command was already aborted once before and
1277 * still hasn't been returned to the driver, or if this is the admin queue.
1279 static void nvme_abort_req(struct request
*req
)
1281 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
1282 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
1283 struct nvme_dev
*dev
= nvmeq
->dev
;
1284 struct request
*abort_req
;
1285 struct nvme_cmd_info
*abort_cmd
;
1286 struct nvme_command cmd
;
1288 if (!nvmeq
->qid
|| cmd_rq
->aborted
) {
1289 spin_lock(&dev_list_lock
);
1290 if (!__nvme_reset(dev
)) {
1292 "I/O %d QID %d timeout, reset controller\n",
1293 req
->tag
, nvmeq
->qid
);
1295 spin_unlock(&dev_list_lock
);
1299 if (!dev
->abort_limit
)
1302 abort_req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
,
1304 if (IS_ERR(abort_req
))
1307 abort_cmd
= blk_mq_rq_to_pdu(abort_req
);
1308 nvme_set_info(abort_cmd
, abort_req
, abort_completion
);
1310 memset(&cmd
, 0, sizeof(cmd
));
1311 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1312 cmd
.abort
.cid
= req
->tag
;
1313 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1314 cmd
.abort
.command_id
= abort_req
->tag
;
1317 cmd_rq
->aborted
= 1;
1319 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", req
->tag
,
1321 nvme_submit_cmd(dev
->queues
[0], &cmd
);
1324 static void nvme_cancel_queue_ios(struct request
*req
, void *data
, bool reserved
)
1326 struct nvme_queue
*nvmeq
= data
;
1328 nvme_completion_fn fn
;
1329 struct nvme_cmd_info
*cmd
;
1330 struct nvme_completion cqe
;
1332 if (!blk_mq_request_started(req
))
1335 cmd
= blk_mq_rq_to_pdu(req
);
1337 if (cmd
->ctx
== CMD_CTX_CANCELLED
)
1340 if (blk_queue_dying(req
->q
))
1341 cqe
.status
= cpu_to_le16((NVME_SC_ABORT_REQ
| NVME_SC_DNR
) << 1);
1343 cqe
.status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1);
1346 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n",
1347 req
->tag
, nvmeq
->qid
);
1348 ctx
= cancel_cmd_info(cmd
, &fn
);
1349 fn(nvmeq
, ctx
, &cqe
);
1352 static enum blk_eh_timer_return
nvme_timeout(struct request
*req
, bool reserved
)
1354 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
1355 struct nvme_queue
*nvmeq
= cmd
->nvmeq
;
1357 dev_warn(nvmeq
->q_dmadev
, "Timeout I/O %d QID %d\n", req
->tag
,
1359 spin_lock_irq(&nvmeq
->q_lock
);
1360 nvme_abort_req(req
);
1361 spin_unlock_irq(&nvmeq
->q_lock
);
1364 * The aborted req will be completed on receiving the abort req.
1365 * We enable the timer again. If hit twice, it'll cause a device reset,
1366 * as the device then is in a faulty state.
1368 return BLK_EH_RESET_TIMER
;
1371 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1373 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1374 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1376 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1377 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1381 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1385 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1386 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1388 dev
->queues
[i
] = NULL
;
1389 nvme_free_queue(nvmeq
);
1394 * nvme_suspend_queue - put queue into suspended state
1395 * @nvmeq - queue to suspend
1397 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1401 spin_lock_irq(&nvmeq
->q_lock
);
1402 if (nvmeq
->cq_vector
== -1) {
1403 spin_unlock_irq(&nvmeq
->q_lock
);
1406 vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1407 nvmeq
->dev
->online_queues
--;
1408 nvmeq
->cq_vector
= -1;
1409 spin_unlock_irq(&nvmeq
->q_lock
);
1411 if (!nvmeq
->qid
&& nvmeq
->dev
->admin_q
)
1412 blk_mq_freeze_queue_start(nvmeq
->dev
->admin_q
);
1414 irq_set_affinity_hint(vector
, NULL
);
1415 free_irq(vector
, nvmeq
);
1420 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1422 spin_lock_irq(&nvmeq
->q_lock
);
1423 if (nvmeq
->tags
&& *nvmeq
->tags
)
1424 blk_mq_all_tag_busy_iter(*nvmeq
->tags
, nvme_cancel_queue_ios
, nvmeq
);
1425 spin_unlock_irq(&nvmeq
->q_lock
);
1428 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1430 struct nvme_queue
*nvmeq
= dev
->queues
[qid
];
1434 if (nvme_suspend_queue(nvmeq
))
1437 /* Don't tell the adapter to delete the admin queue.
1438 * Don't tell a removed adapter to delete IO queues. */
1439 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1440 adapter_delete_sq(dev
, qid
);
1441 adapter_delete_cq(dev
, qid
);
1444 spin_lock_irq(&nvmeq
->q_lock
);
1445 nvme_process_cq(nvmeq
);
1446 spin_unlock_irq(&nvmeq
->q_lock
);
1449 static int nvme_cmb_qdepth(struct nvme_dev
*dev
, int nr_io_queues
,
1452 int q_depth
= dev
->q_depth
;
1453 unsigned q_size_aligned
= roundup(q_depth
* entry_size
, dev
->page_size
);
1455 if (q_size_aligned
* nr_io_queues
> dev
->cmb_size
) {
1456 u64 mem_per_q
= div_u64(dev
->cmb_size
, nr_io_queues
);
1457 mem_per_q
= round_down(mem_per_q
, dev
->page_size
);
1458 q_depth
= div_u64(mem_per_q
, entry_size
);
1461 * Ensure the reduced q_depth is above some threshold where it
1462 * would be better to map queues in system memory with the
1472 static int nvme_alloc_sq_cmds(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1475 if (qid
&& dev
->cmb
&& use_cmb_sqes
&& NVME_CMB_SQS(dev
->cmbsz
)) {
1476 unsigned offset
= (qid
- 1) *
1477 roundup(SQ_SIZE(depth
), dev
->page_size
);
1478 nvmeq
->sq_dma_addr
= dev
->cmb_dma_addr
+ offset
;
1479 nvmeq
->sq_cmds_io
= dev
->cmb
+ offset
;
1481 nvmeq
->sq_cmds
= dma_alloc_coherent(dev
->dev
, SQ_SIZE(depth
),
1482 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1483 if (!nvmeq
->sq_cmds
)
1490 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1493 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
), GFP_KERNEL
);
1497 nvmeq
->cqes
= dma_zalloc_coherent(dev
->dev
, CQ_SIZE(depth
),
1498 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1502 if (nvme_alloc_sq_cmds(dev
, nvmeq
, qid
, depth
))
1505 nvmeq
->q_dmadev
= dev
->dev
;
1507 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1508 dev
->instance
, qid
);
1509 spin_lock_init(&nvmeq
->q_lock
);
1511 nvmeq
->cq_phase
= 1;
1512 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1513 nvmeq
->q_depth
= depth
;
1515 nvmeq
->cq_vector
= -1;
1516 dev
->queues
[qid
] = nvmeq
;
1518 /* make sure queue descriptor is set before queue count, for kthread */
1525 dma_free_coherent(dev
->dev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1526 nvmeq
->cq_dma_addr
);
1532 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1535 if (use_threaded_interrupts
)
1536 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1537 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1539 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1540 IRQF_SHARED
, name
, nvmeq
);
1543 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1545 struct nvme_dev
*dev
= nvmeq
->dev
;
1547 spin_lock_irq(&nvmeq
->q_lock
);
1550 nvmeq
->cq_phase
= 1;
1551 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1552 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1553 dev
->online_queues
++;
1554 spin_unlock_irq(&nvmeq
->q_lock
);
1557 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1559 struct nvme_dev
*dev
= nvmeq
->dev
;
1562 nvmeq
->cq_vector
= qid
- 1;
1563 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1567 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1571 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1575 nvme_init_queue(nvmeq
, qid
);
1579 adapter_delete_sq(dev
, qid
);
1581 adapter_delete_cq(dev
, qid
);
1585 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1587 unsigned long timeout
;
1588 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1590 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1592 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1594 if (fatal_signal_pending(current
))
1596 if (time_after(jiffies
, timeout
)) {
1598 "Device not ready; aborting %s\n", enabled
?
1599 "initialisation" : "reset");
1608 * If the device has been passed off to us in an enabled state, just clear
1609 * the enabled bit. The spec says we should set the 'shutdown notification
1610 * bits', but doing so may cause the device to complete commands to the
1611 * admin queue ... and we don't know what memory that might be pointing at!
1613 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1615 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1616 dev
->ctrl_config
&= ~NVME_CC_ENABLE
;
1617 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1619 return nvme_wait_ready(dev
, cap
, false);
1622 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1624 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1625 dev
->ctrl_config
|= NVME_CC_ENABLE
;
1626 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1628 return nvme_wait_ready(dev
, cap
, true);
1631 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1633 unsigned long timeout
;
1635 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1636 dev
->ctrl_config
|= NVME_CC_SHN_NORMAL
;
1638 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1640 timeout
= SHUTDOWN_TIMEOUT
+ jiffies
;
1641 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1642 NVME_CSTS_SHST_CMPLT
) {
1644 if (fatal_signal_pending(current
))
1646 if (time_after(jiffies
, timeout
)) {
1648 "Device shutdown incomplete; abort shutdown\n");
1656 static struct blk_mq_ops nvme_mq_admin_ops
= {
1657 .queue_rq
= nvme_queue_rq
,
1658 .map_queue
= blk_mq_map_queue
,
1659 .init_hctx
= nvme_admin_init_hctx
,
1660 .exit_hctx
= nvme_admin_exit_hctx
,
1661 .init_request
= nvme_admin_init_request
,
1662 .timeout
= nvme_timeout
,
1665 static struct blk_mq_ops nvme_mq_ops
= {
1666 .queue_rq
= nvme_queue_rq
,
1667 .map_queue
= blk_mq_map_queue
,
1668 .init_hctx
= nvme_init_hctx
,
1669 .init_request
= nvme_init_request
,
1670 .timeout
= nvme_timeout
,
1673 static void nvme_dev_remove_admin(struct nvme_dev
*dev
)
1675 if (dev
->admin_q
&& !blk_queue_dying(dev
->admin_q
)) {
1676 blk_cleanup_queue(dev
->admin_q
);
1677 blk_mq_free_tag_set(&dev
->admin_tagset
);
1681 static int nvme_alloc_admin_tags(struct nvme_dev
*dev
)
1683 if (!dev
->admin_q
) {
1684 dev
->admin_tagset
.ops
= &nvme_mq_admin_ops
;
1685 dev
->admin_tagset
.nr_hw_queues
= 1;
1686 dev
->admin_tagset
.queue_depth
= NVME_AQ_DEPTH
- 1;
1687 dev
->admin_tagset
.reserved_tags
= 1;
1688 dev
->admin_tagset
.timeout
= ADMIN_TIMEOUT
;
1689 dev
->admin_tagset
.numa_node
= dev_to_node(dev
->dev
);
1690 dev
->admin_tagset
.cmd_size
= nvme_cmd_size(dev
);
1691 dev
->admin_tagset
.driver_data
= dev
;
1693 if (blk_mq_alloc_tag_set(&dev
->admin_tagset
))
1696 dev
->admin_q
= blk_mq_init_queue(&dev
->admin_tagset
);
1697 if (IS_ERR(dev
->admin_q
)) {
1698 blk_mq_free_tag_set(&dev
->admin_tagset
);
1701 if (!blk_get_queue(dev
->admin_q
)) {
1702 nvme_dev_remove_admin(dev
);
1703 dev
->admin_q
= NULL
;
1707 blk_mq_unfreeze_queue(dev
->admin_q
);
1712 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1716 u64 cap
= readq(&dev
->bar
->cap
);
1717 struct nvme_queue
*nvmeq
;
1718 unsigned page_shift
= PAGE_SHIFT
;
1719 unsigned dev_page_min
= NVME_CAP_MPSMIN(cap
) + 12;
1720 unsigned dev_page_max
= NVME_CAP_MPSMAX(cap
) + 12;
1722 if (page_shift
< dev_page_min
) {
1724 "Minimum device page size (%u) too large for "
1725 "host (%u)\n", 1 << dev_page_min
,
1729 if (page_shift
> dev_page_max
) {
1731 "Device maximum page size (%u) smaller than "
1732 "host (%u); enabling work-around\n",
1733 1 << dev_page_max
, 1 << page_shift
);
1734 page_shift
= dev_page_max
;
1737 dev
->subsystem
= readl(&dev
->bar
->vs
) >= NVME_VS(1, 1) ?
1738 NVME_CAP_NSSRC(cap
) : 0;
1740 if (dev
->subsystem
&& (readl(&dev
->bar
->csts
) & NVME_CSTS_NSSRO
))
1741 writel(NVME_CSTS_NSSRO
, &dev
->bar
->csts
);
1743 result
= nvme_disable_ctrl(dev
, cap
);
1747 nvmeq
= dev
->queues
[0];
1749 nvmeq
= nvme_alloc_queue(dev
, 0, NVME_AQ_DEPTH
);
1754 aqa
= nvmeq
->q_depth
- 1;
1757 dev
->page_size
= 1 << page_shift
;
1759 dev
->ctrl_config
= NVME_CC_CSS_NVM
;
1760 dev
->ctrl_config
|= (page_shift
- 12) << NVME_CC_MPS_SHIFT
;
1761 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1762 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1764 writel(aqa
, &dev
->bar
->aqa
);
1765 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1766 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1768 result
= nvme_enable_ctrl(dev
, cap
);
1772 nvmeq
->cq_vector
= 0;
1773 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1775 nvmeq
->cq_vector
= -1;
1782 nvme_free_queues(dev
, 0);
1786 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1788 struct nvme_dev
*dev
= ns
->dev
;
1789 struct nvme_user_io io
;
1790 struct nvme_command c
;
1791 unsigned length
, meta_len
;
1793 dma_addr_t meta_dma
= 0;
1795 void __user
*metadata
;
1797 if (copy_from_user(&io
, uio
, sizeof(io
)))
1800 switch (io
.opcode
) {
1801 case nvme_cmd_write
:
1803 case nvme_cmd_compare
:
1809 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1810 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1811 metadata
= (void __user
*)(uintptr_t)io
.metadata
;
1812 write
= io
.opcode
& 1;
1819 if (((io
.metadata
& 3) || !io
.metadata
) && !ns
->ext
)
1822 meta
= dma_alloc_coherent(dev
->dev
, meta_len
,
1823 &meta_dma
, GFP_KERNEL
);
1830 if (copy_from_user(meta
, metadata
, meta_len
)) {
1837 memset(&c
, 0, sizeof(c
));
1838 c
.rw
.opcode
= io
.opcode
;
1839 c
.rw
.flags
= io
.flags
;
1840 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1841 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1842 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1843 c
.rw
.control
= cpu_to_le16(io
.control
);
1844 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1845 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1846 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1847 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1848 c
.rw
.metadata
= cpu_to_le64(meta_dma
);
1850 status
= __nvme_submit_sync_cmd(ns
->queue
, &c
, NULL
,
1851 (void __user
*)(uintptr_t)io
.addr
, length
, NULL
, 0);
1854 if (status
== NVME_SC_SUCCESS
&& !write
) {
1855 if (copy_to_user(metadata
, meta
, meta_len
))
1858 dma_free_coherent(dev
->dev
, meta_len
, meta
, meta_dma
);
1863 static int nvme_user_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
1864 struct nvme_passthru_cmd __user
*ucmd
)
1866 struct nvme_passthru_cmd cmd
;
1867 struct nvme_command c
;
1868 unsigned timeout
= 0;
1871 if (!capable(CAP_SYS_ADMIN
))
1873 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1876 memset(&c
, 0, sizeof(c
));
1877 c
.common
.opcode
= cmd
.opcode
;
1878 c
.common
.flags
= cmd
.flags
;
1879 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1880 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1881 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1882 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1883 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1884 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1885 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1886 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1887 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1890 timeout
= msecs_to_jiffies(cmd
.timeout_ms
);
1892 status
= __nvme_submit_sync_cmd(ns
? ns
->queue
: dev
->admin_q
, &c
,
1893 NULL
, (void __user
*)(uintptr_t)cmd
.addr
, cmd
.data_len
,
1894 &cmd
.result
, timeout
);
1896 if (put_user(cmd
.result
, &ucmd
->result
))
1903 static int nvme_subsys_reset(struct nvme_dev
*dev
)
1905 if (!dev
->subsystem
)
1908 writel(0x4E564D65, &dev
->bar
->nssr
); /* "NVMe" */
1912 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1915 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1919 force_successful_syscall_return();
1921 case NVME_IOCTL_ADMIN_CMD
:
1922 return nvme_user_cmd(ns
->dev
, NULL
, (void __user
*)arg
);
1923 case NVME_IOCTL_IO_CMD
:
1924 return nvme_user_cmd(ns
->dev
, ns
, (void __user
*)arg
);
1925 case NVME_IOCTL_SUBMIT_IO
:
1926 return nvme_submit_io(ns
, (void __user
*)arg
);
1927 case SG_GET_VERSION_NUM
:
1928 return nvme_sg_get_version_num((void __user
*)arg
);
1930 return nvme_sg_io(ns
, (void __user
*)arg
);
1936 #ifdef CONFIG_COMPAT
1937 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1938 unsigned int cmd
, unsigned long arg
)
1942 return -ENOIOCTLCMD
;
1944 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1947 #define nvme_compat_ioctl NULL
1950 static void nvme_free_dev(struct kref
*kref
);
1951 static void nvme_free_ns(struct kref
*kref
)
1953 struct nvme_ns
*ns
= container_of(kref
, struct nvme_ns
, kref
);
1955 if (ns
->type
== NVME_NS_LIGHTNVM
)
1956 nvme_nvm_unregister(ns
->queue
, ns
->disk
->disk_name
);
1958 spin_lock(&dev_list_lock
);
1959 ns
->disk
->private_data
= NULL
;
1960 spin_unlock(&dev_list_lock
);
1962 kref_put(&ns
->dev
->kref
, nvme_free_dev
);
1967 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1972 spin_lock(&dev_list_lock
);
1973 ns
= bdev
->bd_disk
->private_data
;
1976 else if (!kref_get_unless_zero(&ns
->kref
))
1978 spin_unlock(&dev_list_lock
);
1983 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1985 struct nvme_ns
*ns
= disk
->private_data
;
1986 kref_put(&ns
->kref
, nvme_free_ns
);
1989 static int nvme_getgeo(struct block_device
*bd
, struct hd_geometry
*geo
)
1991 /* some standard values */
1992 geo
->heads
= 1 << 6;
1993 geo
->sectors
= 1 << 5;
1994 geo
->cylinders
= get_capacity(bd
->bd_disk
) >> 11;
1998 static void nvme_config_discard(struct nvme_ns
*ns
)
2000 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
2001 ns
->queue
->limits
.discard_zeroes_data
= 0;
2002 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
2003 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
2004 blk_queue_max_discard_sectors(ns
->queue
, 0xffffffff);
2005 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
2008 static int nvme_revalidate_disk(struct gendisk
*disk
)
2010 struct nvme_ns
*ns
= disk
->private_data
;
2011 struct nvme_dev
*dev
= ns
->dev
;
2012 struct nvme_id_ns
*id
;
2017 if (nvme_identify_ns(dev
, ns
->ns_id
, &id
)) {
2018 dev_warn(dev
->dev
, "%s: Identify failure nvme%dn%d\n", __func__
,
2019 dev
->instance
, ns
->ns_id
);
2022 if (id
->ncap
== 0) {
2027 if (nvme_nvm_ns_supported(ns
, id
) && ns
->type
!= NVME_NS_LIGHTNVM
) {
2028 if (nvme_nvm_register(ns
->queue
, disk
->disk_name
)) {
2030 "%s: LightNVM init failure\n", __func__
);
2034 ns
->type
= NVME_NS_LIGHTNVM
;
2038 lbaf
= id
->flbas
& NVME_NS_FLBAS_LBA_MASK
;
2039 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
2040 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
2041 ns
->ext
= ns
->ms
&& (id
->flbas
& NVME_NS_FLBAS_META_EXT
);
2044 * If identify namespace failed, use default 512 byte block size so
2045 * block layer can use before failing read/write for 0 capacity.
2047 if (ns
->lba_shift
== 0)
2049 bs
= 1 << ns
->lba_shift
;
2051 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2052 pi_type
= ns
->ms
== sizeof(struct t10_pi_tuple
) ?
2053 id
->dps
& NVME_NS_DPS_PI_MASK
: 0;
2055 if (blk_get_integrity(disk
) && (ns
->pi_type
!= pi_type
||
2057 bs
!= queue_logical_block_size(disk
->queue
) ||
2058 (ns
->ms
&& ns
->ext
)))
2059 blk_integrity_unregister(disk
);
2061 ns
->pi_type
= pi_type
;
2062 blk_queue_logical_block_size(ns
->queue
, bs
);
2064 if (ns
->ms
&& !blk_get_integrity(disk
) && (disk
->flags
& GENHD_FL_UP
) &&
2066 nvme_init_integrity(ns
);
2068 if ((ns
->ms
&& !(ns
->ms
== 8 && ns
->pi_type
) &&
2069 !blk_get_integrity(disk
)) ||
2070 ns
->type
== NVME_NS_LIGHTNVM
)
2071 set_capacity(disk
, 0);
2073 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
2075 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
2076 nvme_config_discard(ns
);
2082 static const struct block_device_operations nvme_fops
= {
2083 .owner
= THIS_MODULE
,
2084 .ioctl
= nvme_ioctl
,
2085 .compat_ioctl
= nvme_compat_ioctl
,
2087 .release
= nvme_release
,
2088 .getgeo
= nvme_getgeo
,
2089 .revalidate_disk
= nvme_revalidate_disk
,
2092 static int nvme_kthread(void *data
)
2094 struct nvme_dev
*dev
, *next
;
2096 while (!kthread_should_stop()) {
2097 set_current_state(TASK_INTERRUPTIBLE
);
2098 spin_lock(&dev_list_lock
);
2099 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
2101 u32 csts
= readl(&dev
->bar
->csts
);
2103 if ((dev
->subsystem
&& (csts
& NVME_CSTS_NSSRO
)) ||
2104 csts
& NVME_CSTS_CFS
) {
2105 if (!__nvme_reset(dev
)) {
2107 "Failed status: %x, reset controller\n",
2108 readl(&dev
->bar
->csts
));
2112 for (i
= 0; i
< dev
->queue_count
; i
++) {
2113 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2116 spin_lock_irq(&nvmeq
->q_lock
);
2117 nvme_process_cq(nvmeq
);
2119 while ((i
== 0) && (dev
->event_limit
> 0)) {
2120 if (nvme_submit_async_admin_req(dev
))
2124 spin_unlock_irq(&nvmeq
->q_lock
);
2127 spin_unlock(&dev_list_lock
);
2128 schedule_timeout(round_jiffies_relative(HZ
));
2133 static void nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
)
2136 struct gendisk
*disk
;
2137 int node
= dev_to_node(dev
->dev
);
2139 ns
= kzalloc_node(sizeof(*ns
), GFP_KERNEL
, node
);
2143 ns
->queue
= blk_mq_init_queue(&dev
->tagset
);
2144 if (IS_ERR(ns
->queue
))
2146 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
2147 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
2149 ns
->queue
->queuedata
= ns
;
2151 disk
= alloc_disk_node(0, node
);
2153 goto out_free_queue
;
2155 kref_init(&ns
->kref
);
2158 ns
->lba_shift
= 9; /* set to a default value for 512 until disk is validated */
2159 list_add_tail(&ns
->list
, &dev
->namespaces
);
2161 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
2162 if (dev
->max_hw_sectors
) {
2163 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
2164 blk_queue_max_segments(ns
->queue
,
2165 ((dev
->max_hw_sectors
<< 9) / dev
->page_size
) + 1);
2167 if (dev
->stripe_size
)
2168 blk_queue_chunk_sectors(ns
->queue
, dev
->stripe_size
>> 9);
2169 if (dev
->vwc
& NVME_CTRL_VWC_PRESENT
)
2170 blk_queue_flush(ns
->queue
, REQ_FLUSH
| REQ_FUA
);
2171 blk_queue_virt_boundary(ns
->queue
, dev
->page_size
- 1);
2173 disk
->major
= nvme_major
;
2174 disk
->first_minor
= 0;
2175 disk
->fops
= &nvme_fops
;
2176 disk
->private_data
= ns
;
2177 disk
->queue
= ns
->queue
;
2178 disk
->driverfs_dev
= dev
->device
;
2179 disk
->flags
= GENHD_FL_EXT_DEVT
;
2180 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
2183 * Initialize capacity to 0 until we establish the namespace format and
2184 * setup integrity extentions if necessary. The revalidate_disk after
2185 * add_disk allows the driver to register with integrity if the format
2188 set_capacity(disk
, 0);
2189 if (nvme_revalidate_disk(ns
->disk
))
2192 kref_get(&dev
->kref
);
2193 if (ns
->type
!= NVME_NS_LIGHTNVM
) {
2196 struct block_device
*bd
= bdget_disk(ns
->disk
, 0);
2199 if (blkdev_get(bd
, FMODE_READ
, NULL
)) {
2203 blkdev_reread_part(bd
);
2204 blkdev_put(bd
, FMODE_READ
);
2210 list_del(&ns
->list
);
2212 blk_cleanup_queue(ns
->queue
);
2218 * Create I/O queues. Failing to create an I/O queue is not an issue,
2219 * we can continue with less than the desired amount of queues, and
2220 * even a controller without I/O queues an still be used to issue
2221 * admin commands. This might be useful to upgrade a buggy firmware
2224 static void nvme_create_io_queues(struct nvme_dev
*dev
)
2228 for (i
= dev
->queue_count
; i
<= dev
->max_qid
; i
++)
2229 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
))
2232 for (i
= dev
->online_queues
; i
<= dev
->queue_count
- 1; i
++)
2233 if (nvme_create_queue(dev
->queues
[i
], i
)) {
2234 nvme_free_queues(dev
, i
);
2239 static int set_queue_count(struct nvme_dev
*dev
, int count
)
2243 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
2245 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
2250 dev_err(dev
->dev
, "Could not set queue count (%d)\n", status
);
2253 return min(result
& 0xffff, result
>> 16) + 1;
2256 static void __iomem
*nvme_map_cmb(struct nvme_dev
*dev
)
2258 u64 szu
, size
, offset
;
2260 resource_size_t bar_size
;
2261 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2263 dma_addr_t dma_addr
;
2268 dev
->cmbsz
= readl(&dev
->bar
->cmbsz
);
2269 if (!(NVME_CMB_SZ(dev
->cmbsz
)))
2272 cmbloc
= readl(&dev
->bar
->cmbloc
);
2274 szu
= (u64
)1 << (12 + 4 * NVME_CMB_SZU(dev
->cmbsz
));
2275 size
= szu
* NVME_CMB_SZ(dev
->cmbsz
);
2276 offset
= szu
* NVME_CMB_OFST(cmbloc
);
2277 bar_size
= pci_resource_len(pdev
, NVME_CMB_BIR(cmbloc
));
2279 if (offset
> bar_size
)
2283 * Controllers may support a CMB size larger than their BAR,
2284 * for example, due to being behind a bridge. Reduce the CMB to
2285 * the reported size of the BAR
2287 if (size
> bar_size
- offset
)
2288 size
= bar_size
- offset
;
2290 dma_addr
= pci_resource_start(pdev
, NVME_CMB_BIR(cmbloc
)) + offset
;
2291 cmb
= ioremap_wc(dma_addr
, size
);
2295 dev
->cmb_dma_addr
= dma_addr
;
2296 dev
->cmb_size
= size
;
2300 static inline void nvme_release_cmb(struct nvme_dev
*dev
)
2308 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
2310 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
2313 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
2315 struct nvme_queue
*adminq
= dev
->queues
[0];
2316 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2317 int result
, i
, vecs
, nr_io_queues
, size
;
2319 nr_io_queues
= num_possible_cpus();
2320 result
= set_queue_count(dev
, nr_io_queues
);
2323 if (result
< nr_io_queues
)
2324 nr_io_queues
= result
;
2326 if (dev
->cmb
&& NVME_CMB_SQS(dev
->cmbsz
)) {
2327 result
= nvme_cmb_qdepth(dev
, nr_io_queues
,
2328 sizeof(struct nvme_command
));
2330 dev
->q_depth
= result
;
2332 nvme_release_cmb(dev
);
2335 size
= db_bar_size(dev
, nr_io_queues
);
2339 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
2342 if (!--nr_io_queues
)
2344 size
= db_bar_size(dev
, nr_io_queues
);
2346 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2347 adminq
->q_db
= dev
->dbs
;
2350 /* Deregister the admin queue's interrupt */
2351 free_irq(dev
->entry
[0].vector
, adminq
);
2354 * If we enable msix early due to not intx, disable it again before
2355 * setting up the full range we need.
2358 pci_disable_msix(pdev
);
2360 for (i
= 0; i
< nr_io_queues
; i
++)
2361 dev
->entry
[i
].entry
= i
;
2362 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
2364 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
2368 for (i
= 0; i
< vecs
; i
++)
2369 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
2374 * Should investigate if there's a performance win from allocating
2375 * more queues than interrupt vectors; it might allow the submission
2376 * path to scale better, even if the receive path is limited by the
2377 * number of interrupts.
2379 nr_io_queues
= vecs
;
2380 dev
->max_qid
= nr_io_queues
;
2382 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
2384 adminq
->cq_vector
= -1;
2388 /* Free previously allocated queues that are no longer usable */
2389 nvme_free_queues(dev
, nr_io_queues
+ 1);
2390 nvme_create_io_queues(dev
);
2395 nvme_free_queues(dev
, 1);
2399 static int ns_cmp(void *priv
, struct list_head
*a
, struct list_head
*b
)
2401 struct nvme_ns
*nsa
= container_of(a
, struct nvme_ns
, list
);
2402 struct nvme_ns
*nsb
= container_of(b
, struct nvme_ns
, list
);
2404 return nsa
->ns_id
- nsb
->ns_id
;
2407 static struct nvme_ns
*nvme_find_ns(struct nvme_dev
*dev
, unsigned nsid
)
2411 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2412 if (ns
->ns_id
== nsid
)
2414 if (ns
->ns_id
> nsid
)
2420 static inline bool nvme_io_incapable(struct nvme_dev
*dev
)
2422 return (!dev
->bar
|| readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
||
2423 dev
->online_queues
< 2);
2426 static void nvme_ns_remove(struct nvme_ns
*ns
)
2428 bool kill
= nvme_io_incapable(ns
->dev
) && !blk_queue_dying(ns
->queue
);
2431 blk_set_queue_dying(ns
->queue
);
2432 if (ns
->disk
->flags
& GENHD_FL_UP
) {
2433 if (blk_get_integrity(ns
->disk
))
2434 blk_integrity_unregister(ns
->disk
);
2435 del_gendisk(ns
->disk
);
2437 if (kill
|| !blk_queue_dying(ns
->queue
)) {
2438 blk_mq_abort_requeue_list(ns
->queue
);
2439 blk_cleanup_queue(ns
->queue
);
2441 list_del_init(&ns
->list
);
2442 kref_put(&ns
->kref
, nvme_free_ns
);
2445 static void nvme_scan_namespaces(struct nvme_dev
*dev
, unsigned nn
)
2447 struct nvme_ns
*ns
, *next
;
2450 for (i
= 1; i
<= nn
; i
++) {
2451 ns
= nvme_find_ns(dev
, i
);
2453 if (revalidate_disk(ns
->disk
))
2456 nvme_alloc_ns(dev
, i
);
2458 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2462 list_sort(NULL
, &dev
->namespaces
, ns_cmp
);
2465 static void nvme_set_irq_hints(struct nvme_dev
*dev
)
2467 struct nvme_queue
*nvmeq
;
2470 for (i
= 0; i
< dev
->online_queues
; i
++) {
2471 nvmeq
= dev
->queues
[i
];
2473 if (!nvmeq
->tags
|| !(*nvmeq
->tags
))
2476 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
2477 blk_mq_tags_cpumask(*nvmeq
->tags
));
2481 static void nvme_dev_scan(struct work_struct
*work
)
2483 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, scan_work
);
2484 struct nvme_id_ctrl
*ctrl
;
2486 if (!dev
->tagset
.tags
)
2488 if (nvme_identify_ctrl(dev
, &ctrl
))
2490 nvme_scan_namespaces(dev
, le32_to_cpup(&ctrl
->nn
));
2492 nvme_set_irq_hints(dev
);
2496 * Return: error value if an error occurred setting up the queues or calling
2497 * Identify Device. 0 if these succeeded, even if adding some of the
2498 * namespaces failed. At the moment, these failures are silent. TBD which
2499 * failures should be reported.
2501 static int nvme_dev_add(struct nvme_dev
*dev
)
2503 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2505 struct nvme_id_ctrl
*ctrl
;
2506 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2508 res
= nvme_identify_ctrl(dev
, &ctrl
);
2510 dev_err(dev
->dev
, "Identify Controller failed (%d)\n", res
);
2514 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2515 dev
->abort_limit
= ctrl
->acl
+ 1;
2516 dev
->vwc
= ctrl
->vwc
;
2517 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2518 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2519 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2521 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2522 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2523 (pdev
->device
== 0x0953) && ctrl
->vs
[3]) {
2524 unsigned int max_hw_sectors
;
2526 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2527 max_hw_sectors
= dev
->stripe_size
>> (shift
- 9);
2528 if (dev
->max_hw_sectors
) {
2529 dev
->max_hw_sectors
= min(max_hw_sectors
,
2530 dev
->max_hw_sectors
);
2532 dev
->max_hw_sectors
= max_hw_sectors
;
2536 if (!dev
->tagset
.tags
) {
2537 dev
->tagset
.ops
= &nvme_mq_ops
;
2538 dev
->tagset
.nr_hw_queues
= dev
->online_queues
- 1;
2539 dev
->tagset
.timeout
= NVME_IO_TIMEOUT
;
2540 dev
->tagset
.numa_node
= dev_to_node(dev
->dev
);
2541 dev
->tagset
.queue_depth
=
2542 min_t(int, dev
->q_depth
, BLK_MQ_MAX_DEPTH
) - 1;
2543 dev
->tagset
.cmd_size
= nvme_cmd_size(dev
);
2544 dev
->tagset
.flags
= BLK_MQ_F_SHOULD_MERGE
;
2545 dev
->tagset
.driver_data
= dev
;
2547 if (blk_mq_alloc_tag_set(&dev
->tagset
))
2550 schedule_work(&dev
->scan_work
);
2554 static int nvme_dev_map(struct nvme_dev
*dev
)
2557 int bars
, result
= -ENOMEM
;
2558 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2560 if (pci_enable_device_mem(pdev
))
2563 dev
->entry
[0].vector
= pdev
->irq
;
2564 pci_set_master(pdev
);
2565 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2569 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2572 if (dma_set_mask_and_coherent(dev
->dev
, DMA_BIT_MASK(64)) &&
2573 dma_set_mask_and_coherent(dev
->dev
, DMA_BIT_MASK(32)))
2576 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2580 if (readl(&dev
->bar
->csts
) == -1) {
2586 * Some devices don't advertse INTx interrupts, pre-enable a single
2587 * MSIX vec for setup. We'll adjust this later.
2590 result
= pci_enable_msix(pdev
, dev
->entry
, 1);
2595 cap
= readq(&dev
->bar
->cap
);
2596 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
2597 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
2598 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2599 if (readl(&dev
->bar
->vs
) >= NVME_VS(1, 2))
2600 dev
->cmb
= nvme_map_cmb(dev
);
2608 pci_release_regions(pdev
);
2610 pci_disable_device(pdev
);
2614 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2616 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2618 if (pdev
->msi_enabled
)
2619 pci_disable_msi(pdev
);
2620 else if (pdev
->msix_enabled
)
2621 pci_disable_msix(pdev
);
2626 pci_release_regions(pdev
);
2629 if (pci_is_enabled(pdev
))
2630 pci_disable_device(pdev
);
2633 struct nvme_delq_ctx
{
2634 struct task_struct
*waiter
;
2635 struct kthread_worker
*worker
;
2639 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2641 dq
->waiter
= current
;
2645 set_current_state(TASK_KILLABLE
);
2646 if (!atomic_read(&dq
->refcount
))
2648 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2649 fatal_signal_pending(current
)) {
2651 * Disable the controller first since we can't trust it
2652 * at this point, but leave the admin queue enabled
2653 * until all queue deletion requests are flushed.
2654 * FIXME: This may take a while if there are more h/w
2655 * queues than admin tags.
2657 set_current_state(TASK_RUNNING
);
2658 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2659 nvme_clear_queue(dev
->queues
[0]);
2660 flush_kthread_worker(dq
->worker
);
2661 nvme_disable_queue(dev
, 0);
2665 set_current_state(TASK_RUNNING
);
2668 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2670 atomic_dec(&dq
->refcount
);
2672 wake_up_process(dq
->waiter
);
2675 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2677 atomic_inc(&dq
->refcount
);
2681 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2683 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2687 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2688 kthread_work_func_t fn
)
2690 struct nvme_command c
;
2692 memset(&c
, 0, sizeof(c
));
2693 c
.delete_queue
.opcode
= opcode
;
2694 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2696 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2697 return nvme_submit_admin_async_cmd(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
,
2701 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2703 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2705 nvme_del_queue_end(nvmeq
);
2708 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2710 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2711 nvme_del_cq_work_handler
);
2714 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2716 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2718 int status
= nvmeq
->cmdinfo
.status
;
2721 status
= nvme_delete_cq(nvmeq
);
2723 nvme_del_queue_end(nvmeq
);
2726 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2728 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2729 nvme_del_sq_work_handler
);
2732 static void nvme_del_queue_start(struct kthread_work
*work
)
2734 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2736 if (nvme_delete_sq(nvmeq
))
2737 nvme_del_queue_end(nvmeq
);
2740 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2743 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2744 struct nvme_delq_ctx dq
;
2745 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2746 &worker
, "nvme%d", dev
->instance
);
2748 if (IS_ERR(kworker_task
)) {
2750 "Failed to create queue del task\n");
2751 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2752 nvme_disable_queue(dev
, i
);
2757 atomic_set(&dq
.refcount
, 0);
2758 dq
.worker
= &worker
;
2759 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2760 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2762 if (nvme_suspend_queue(nvmeq
))
2764 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2765 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2766 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2767 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2769 nvme_wait_dq(&dq
, dev
);
2770 kthread_stop(kworker_task
);
2774 * Remove the node from the device list and check
2775 * for whether or not we need to stop the nvme_thread.
2777 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2779 struct task_struct
*tmp
= NULL
;
2781 spin_lock(&dev_list_lock
);
2782 list_del_init(&dev
->node
);
2783 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2787 spin_unlock(&dev_list_lock
);
2793 static void nvme_freeze_queues(struct nvme_dev
*dev
)
2797 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2798 blk_mq_freeze_queue_start(ns
->queue
);
2800 spin_lock_irq(ns
->queue
->queue_lock
);
2801 queue_flag_set(QUEUE_FLAG_STOPPED
, ns
->queue
);
2802 spin_unlock_irq(ns
->queue
->queue_lock
);
2804 blk_mq_cancel_requeue_work(ns
->queue
);
2805 blk_mq_stop_hw_queues(ns
->queue
);
2809 static void nvme_unfreeze_queues(struct nvme_dev
*dev
)
2813 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2814 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED
, ns
->queue
);
2815 blk_mq_unfreeze_queue(ns
->queue
);
2816 blk_mq_start_stopped_hw_queues(ns
->queue
, true);
2817 blk_mq_kick_requeue_list(ns
->queue
);
2821 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2826 nvme_dev_list_remove(dev
);
2829 nvme_freeze_queues(dev
);
2830 csts
= readl(&dev
->bar
->csts
);
2832 if (csts
& NVME_CSTS_CFS
|| !(csts
& NVME_CSTS_RDY
)) {
2833 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2834 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2835 nvme_suspend_queue(nvmeq
);
2838 nvme_disable_io_queues(dev
);
2839 nvme_shutdown_ctrl(dev
);
2840 nvme_disable_queue(dev
, 0);
2842 nvme_dev_unmap(dev
);
2844 for (i
= dev
->queue_count
- 1; i
>= 0; i
--)
2845 nvme_clear_queue(dev
->queues
[i
]);
2848 static void nvme_dev_remove(struct nvme_dev
*dev
)
2850 struct nvme_ns
*ns
, *next
;
2852 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
)
2856 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2858 dev
->prp_page_pool
= dma_pool_create("prp list page", dev
->dev
,
2859 PAGE_SIZE
, PAGE_SIZE
, 0);
2860 if (!dev
->prp_page_pool
)
2863 /* Optimisation for I/Os between 4k and 128k */
2864 dev
->prp_small_pool
= dma_pool_create("prp list 256", dev
->dev
,
2866 if (!dev
->prp_small_pool
) {
2867 dma_pool_destroy(dev
->prp_page_pool
);
2873 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2875 dma_pool_destroy(dev
->prp_page_pool
);
2876 dma_pool_destroy(dev
->prp_small_pool
);
2879 static DEFINE_IDA(nvme_instance_ida
);
2881 static int nvme_set_instance(struct nvme_dev
*dev
)
2883 int instance
, error
;
2886 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2889 spin_lock(&dev_list_lock
);
2890 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2891 spin_unlock(&dev_list_lock
);
2892 } while (error
== -EAGAIN
);
2897 dev
->instance
= instance
;
2901 static void nvme_release_instance(struct nvme_dev
*dev
)
2903 spin_lock(&dev_list_lock
);
2904 ida_remove(&nvme_instance_ida
, dev
->instance
);
2905 spin_unlock(&dev_list_lock
);
2908 static void nvme_free_dev(struct kref
*kref
)
2910 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2912 put_device(dev
->dev
);
2913 put_device(dev
->device
);
2914 nvme_release_instance(dev
);
2915 if (dev
->tagset
.tags
)
2916 blk_mq_free_tag_set(&dev
->tagset
);
2918 blk_put_queue(dev
->admin_q
);
2924 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2926 struct nvme_dev
*dev
;
2927 int instance
= iminor(inode
);
2930 spin_lock(&dev_list_lock
);
2931 list_for_each_entry(dev
, &dev_list
, node
) {
2932 if (dev
->instance
== instance
) {
2933 if (!dev
->admin_q
) {
2937 if (!kref_get_unless_zero(&dev
->kref
))
2939 f
->private_data
= dev
;
2944 spin_unlock(&dev_list_lock
);
2949 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2951 struct nvme_dev
*dev
= f
->private_data
;
2952 kref_put(&dev
->kref
, nvme_free_dev
);
2956 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2958 struct nvme_dev
*dev
= f
->private_data
;
2962 case NVME_IOCTL_ADMIN_CMD
:
2963 return nvme_user_cmd(dev
, NULL
, (void __user
*)arg
);
2964 case NVME_IOCTL_IO_CMD
:
2965 if (list_empty(&dev
->namespaces
))
2967 ns
= list_first_entry(&dev
->namespaces
, struct nvme_ns
, list
);
2968 return nvme_user_cmd(dev
, ns
, (void __user
*)arg
);
2969 case NVME_IOCTL_RESET
:
2970 dev_warn(dev
->dev
, "resetting controller\n");
2971 return nvme_reset(dev
);
2972 case NVME_IOCTL_SUBSYS_RESET
:
2973 return nvme_subsys_reset(dev
);
2979 static const struct file_operations nvme_dev_fops
= {
2980 .owner
= THIS_MODULE
,
2981 .open
= nvme_dev_open
,
2982 .release
= nvme_dev_release
,
2983 .unlocked_ioctl
= nvme_dev_ioctl
,
2984 .compat_ioctl
= nvme_dev_ioctl
,
2987 static void nvme_probe_work(struct work_struct
*work
)
2989 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, probe_work
);
2990 bool start_thread
= false;
2993 result
= nvme_dev_map(dev
);
2997 result
= nvme_configure_admin_queue(dev
);
3001 spin_lock(&dev_list_lock
);
3002 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
3003 start_thread
= true;
3006 list_add(&dev
->node
, &dev_list
);
3007 spin_unlock(&dev_list_lock
);
3010 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
3011 wake_up_all(&nvme_kthread_wait
);
3013 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
3015 if (IS_ERR_OR_NULL(nvme_thread
)) {
3016 result
= nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
3020 nvme_init_queue(dev
->queues
[0], 0);
3021 result
= nvme_alloc_admin_tags(dev
);
3025 result
= nvme_setup_io_queues(dev
);
3029 dev
->event_limit
= 1;
3032 * Keep the controller around but remove all namespaces if we don't have
3033 * any working I/O queue.
3035 if (dev
->online_queues
< 2) {
3036 dev_warn(dev
->dev
, "IO queues not created\n");
3037 nvme_dev_remove(dev
);
3039 nvme_unfreeze_queues(dev
);
3046 nvme_dev_remove_admin(dev
);
3047 blk_put_queue(dev
->admin_q
);
3048 dev
->admin_q
= NULL
;
3049 dev
->queues
[0]->tags
= NULL
;
3051 nvme_disable_queue(dev
, 0);
3052 nvme_dev_list_remove(dev
);
3054 nvme_dev_unmap(dev
);
3056 if (!work_busy(&dev
->reset_work
))
3057 nvme_dead_ctrl(dev
);
3060 static int nvme_remove_dead_ctrl(void *arg
)
3062 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
3063 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
3065 if (pci_get_drvdata(pdev
))
3066 pci_stop_and_remove_bus_device_locked(pdev
);
3067 kref_put(&dev
->kref
, nvme_free_dev
);
3071 static void nvme_dead_ctrl(struct nvme_dev
*dev
)
3073 dev_warn(dev
->dev
, "Device failed to resume\n");
3074 kref_get(&dev
->kref
);
3075 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
3078 "Failed to start controller remove task\n");
3079 kref_put(&dev
->kref
, nvme_free_dev
);
3083 static void nvme_reset_work(struct work_struct
*ws
)
3085 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
3086 bool in_probe
= work_busy(&dev
->probe_work
);
3088 nvme_dev_shutdown(dev
);
3090 /* Synchronize with device probe so that work will see failure status
3091 * and exit gracefully without trying to schedule another reset */
3092 flush_work(&dev
->probe_work
);
3094 /* Fail this device if reset occured during probe to avoid
3095 * infinite initialization loops. */
3097 nvme_dead_ctrl(dev
);
3100 /* Schedule device resume asynchronously so the reset work is available
3101 * to cleanup errors that may occur during reinitialization */
3102 schedule_work(&dev
->probe_work
);
3105 static int __nvme_reset(struct nvme_dev
*dev
)
3107 if (work_pending(&dev
->reset_work
))
3109 list_del_init(&dev
->node
);
3110 queue_work(nvme_workq
, &dev
->reset_work
);
3114 static int nvme_reset(struct nvme_dev
*dev
)
3118 if (!dev
->admin_q
|| blk_queue_dying(dev
->admin_q
))
3121 spin_lock(&dev_list_lock
);
3122 ret
= __nvme_reset(dev
);
3123 spin_unlock(&dev_list_lock
);
3126 flush_work(&dev
->reset_work
);
3127 flush_work(&dev
->probe_work
);
3134 static ssize_t
nvme_sysfs_reset(struct device
*dev
,
3135 struct device_attribute
*attr
, const char *buf
,
3138 struct nvme_dev
*ndev
= dev_get_drvdata(dev
);
3141 ret
= nvme_reset(ndev
);
3147 static DEVICE_ATTR(reset_controller
, S_IWUSR
, NULL
, nvme_sysfs_reset
);
3149 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
3151 int node
, result
= -ENOMEM
;
3152 struct nvme_dev
*dev
;
3154 node
= dev_to_node(&pdev
->dev
);
3155 if (node
== NUMA_NO_NODE
)
3156 set_dev_node(&pdev
->dev
, 0);
3158 dev
= kzalloc_node(sizeof(*dev
), GFP_KERNEL
, node
);
3161 dev
->entry
= kzalloc_node(num_possible_cpus() * sizeof(*dev
->entry
),
3165 dev
->queues
= kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3170 INIT_LIST_HEAD(&dev
->namespaces
);
3171 INIT_WORK(&dev
->reset_work
, nvme_reset_work
);
3172 dev
->dev
= get_device(&pdev
->dev
);
3173 pci_set_drvdata(pdev
, dev
);
3174 result
= nvme_set_instance(dev
);
3178 result
= nvme_setup_prp_pools(dev
);
3182 kref_init(&dev
->kref
);
3183 dev
->device
= device_create(nvme_class
, &pdev
->dev
,
3184 MKDEV(nvme_char_major
, dev
->instance
),
3185 dev
, "nvme%d", dev
->instance
);
3186 if (IS_ERR(dev
->device
)) {
3187 result
= PTR_ERR(dev
->device
);
3190 get_device(dev
->device
);
3191 dev_set_drvdata(dev
->device
, dev
);
3193 result
= device_create_file(dev
->device
, &dev_attr_reset_controller
);
3197 INIT_LIST_HEAD(&dev
->node
);
3198 INIT_WORK(&dev
->scan_work
, nvme_dev_scan
);
3199 INIT_WORK(&dev
->probe_work
, nvme_probe_work
);
3200 schedule_work(&dev
->probe_work
);
3204 device_destroy(nvme_class
, MKDEV(nvme_char_major
, dev
->instance
));
3205 put_device(dev
->device
);
3207 nvme_release_prp_pools(dev
);
3209 nvme_release_instance(dev
);
3211 put_device(dev
->dev
);
3219 static void nvme_reset_notify(struct pci_dev
*pdev
, bool prepare
)
3221 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3224 nvme_dev_shutdown(dev
);
3226 schedule_work(&dev
->probe_work
);
3229 static void nvme_shutdown(struct pci_dev
*pdev
)
3231 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3232 nvme_dev_shutdown(dev
);
3235 static void nvme_remove(struct pci_dev
*pdev
)
3237 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3239 spin_lock(&dev_list_lock
);
3240 list_del_init(&dev
->node
);
3241 spin_unlock(&dev_list_lock
);
3243 pci_set_drvdata(pdev
, NULL
);
3244 flush_work(&dev
->probe_work
);
3245 flush_work(&dev
->reset_work
);
3246 flush_work(&dev
->scan_work
);
3247 device_remove_file(dev
->device
, &dev_attr_reset_controller
);
3248 nvme_dev_remove(dev
);
3249 nvme_dev_shutdown(dev
);
3250 nvme_dev_remove_admin(dev
);
3251 device_destroy(nvme_class
, MKDEV(nvme_char_major
, dev
->instance
));
3252 nvme_free_queues(dev
, 0);
3253 nvme_release_cmb(dev
);
3254 nvme_release_prp_pools(dev
);
3255 kref_put(&dev
->kref
, nvme_free_dev
);
3258 /* These functions are yet to be implemented */
3259 #define nvme_error_detected NULL
3260 #define nvme_dump_registers NULL
3261 #define nvme_link_reset NULL
3262 #define nvme_slot_reset NULL
3263 #define nvme_error_resume NULL
3265 #ifdef CONFIG_PM_SLEEP
3266 static int nvme_suspend(struct device
*dev
)
3268 struct pci_dev
*pdev
= to_pci_dev(dev
);
3269 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
3271 nvme_dev_shutdown(ndev
);
3275 static int nvme_resume(struct device
*dev
)
3277 struct pci_dev
*pdev
= to_pci_dev(dev
);
3278 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
3280 schedule_work(&ndev
->probe_work
);
3285 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
3287 static const struct pci_error_handlers nvme_err_handler
= {
3288 .error_detected
= nvme_error_detected
,
3289 .mmio_enabled
= nvme_dump_registers
,
3290 .link_reset
= nvme_link_reset
,
3291 .slot_reset
= nvme_slot_reset
,
3292 .resume
= nvme_error_resume
,
3293 .reset_notify
= nvme_reset_notify
,
3296 /* Move to pci_ids.h later */
3297 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3299 static const struct pci_device_id nvme_id_table
[] = {
3300 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
3303 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
3305 static struct pci_driver nvme_driver
= {
3307 .id_table
= nvme_id_table
,
3308 .probe
= nvme_probe
,
3309 .remove
= nvme_remove
,
3310 .shutdown
= nvme_shutdown
,
3312 .pm
= &nvme_dev_pm_ops
,
3314 .err_handler
= &nvme_err_handler
,
3317 static int __init
nvme_init(void)
3321 init_waitqueue_head(&nvme_kthread_wait
);
3323 nvme_workq
= create_singlethread_workqueue("nvme");
3327 result
= register_blkdev(nvme_major
, "nvme");
3330 else if (result
> 0)
3331 nvme_major
= result
;
3333 result
= __register_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme",
3336 goto unregister_blkdev
;
3337 else if (result
> 0)
3338 nvme_char_major
= result
;
3340 nvme_class
= class_create(THIS_MODULE
, "nvme");
3341 if (IS_ERR(nvme_class
)) {
3342 result
= PTR_ERR(nvme_class
);
3343 goto unregister_chrdev
;
3346 result
= pci_register_driver(&nvme_driver
);
3352 class_destroy(nvme_class
);
3354 __unregister_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme");
3356 unregister_blkdev(nvme_major
, "nvme");
3358 destroy_workqueue(nvme_workq
);
3362 static void __exit
nvme_exit(void)
3364 pci_unregister_driver(&nvme_driver
);
3365 unregister_blkdev(nvme_major
, "nvme");
3366 destroy_workqueue(nvme_workq
);
3367 class_destroy(nvme_class
);
3368 __unregister_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme");
3369 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
3373 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3374 MODULE_LICENSE("GPL");
3375 MODULE_VERSION("1.0");
3376 module_init(nvme_init
);
3377 module_exit(nvme_exit
);