2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
31 #include <linux/list_sort.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #include <uapi/linux/nvme_ioctl.h>
48 #define NVME_MINORS (1U << MINORBITS)
49 #define NVME_Q_DEPTH 1024
50 #define NVME_AQ_DEPTH 256
51 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
52 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
53 #define ADMIN_TIMEOUT (admin_timeout * HZ)
54 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
56 static unsigned char admin_timeout
= 60;
57 module_param(admin_timeout
, byte
, 0644);
58 MODULE_PARM_DESC(admin_timeout
, "timeout in seconds for admin commands");
60 unsigned char nvme_io_timeout
= 30;
61 module_param_named(io_timeout
, nvme_io_timeout
, byte
, 0644);
62 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
64 static unsigned char shutdown_timeout
= 5;
65 module_param(shutdown_timeout
, byte
, 0644);
66 MODULE_PARM_DESC(shutdown_timeout
, "timeout in seconds for controller shutdown");
68 static int nvme_major
;
69 module_param(nvme_major
, int, 0);
71 static int nvme_char_major
;
72 module_param(nvme_char_major
, int, 0);
74 static int use_threaded_interrupts
;
75 module_param(use_threaded_interrupts
, int, 0);
77 static bool use_cmb_sqes
= true;
78 module_param(use_cmb_sqes
, bool, 0644);
79 MODULE_PARM_DESC(use_cmb_sqes
, "use controller's memory buffer for I/O SQes");
81 static DEFINE_SPINLOCK(dev_list_lock
);
82 static LIST_HEAD(dev_list
);
83 static struct task_struct
*nvme_thread
;
84 static struct workqueue_struct
*nvme_workq
;
85 static wait_queue_head_t nvme_kthread_wait
;
87 static struct class *nvme_class
;
89 static int __nvme_reset(struct nvme_dev
*dev
);
90 static int nvme_reset(struct nvme_dev
*dev
);
91 static int nvme_process_cq(struct nvme_queue
*nvmeq
);
92 static void nvme_dead_ctrl(struct nvme_dev
*dev
);
94 struct async_cmd_info
{
95 struct kthread_work work
;
96 struct kthread_worker
*worker
;
104 * An NVM Express queue. Each device has at least two (one for admin
105 * commands and one for I/O commands).
108 struct device
*q_dmadev
;
109 struct nvme_dev
*dev
;
110 char irqname
[24]; /* nvme4294967295-65535\0 */
112 struct nvme_command
*sq_cmds
;
113 struct nvme_command __iomem
*sq_cmds_io
;
114 volatile struct nvme_completion
*cqes
;
115 struct blk_mq_tags
**tags
;
116 dma_addr_t sq_dma_addr
;
117 dma_addr_t cq_dma_addr
;
127 struct async_cmd_info cmdinfo
;
131 * Check we didin't inadvertently grow the command struct
133 static inline void _nvme_check_size(void)
135 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
140 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
141 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
142 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
143 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
144 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
145 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
146 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
149 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
150 struct nvme_completion
*);
152 struct nvme_cmd_info
{
153 nvme_completion_fn fn
;
156 struct nvme_queue
*nvmeq
;
157 struct nvme_iod iod
[0];
161 * Max size of iod being embedded in the request payload
163 #define NVME_INT_PAGES 2
164 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
165 #define NVME_INT_MASK 0x01
168 * Will slightly overestimate the number of pages needed. This is OK
169 * as it only leads to a small amount of wasted memory for the lifetime of
172 static int nvme_npages(unsigned size
, struct nvme_dev
*dev
)
174 unsigned nprps
= DIV_ROUND_UP(size
+ dev
->page_size
, dev
->page_size
);
175 return DIV_ROUND_UP(8 * nprps
, PAGE_SIZE
- 8);
178 static unsigned int nvme_cmd_size(struct nvme_dev
*dev
)
180 unsigned int ret
= sizeof(struct nvme_cmd_info
);
182 ret
+= sizeof(struct nvme_iod
);
183 ret
+= sizeof(__le64
*) * nvme_npages(NVME_INT_BYTES(dev
), dev
);
184 ret
+= sizeof(struct scatterlist
) * NVME_INT_PAGES
;
189 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
190 unsigned int hctx_idx
)
192 struct nvme_dev
*dev
= data
;
193 struct nvme_queue
*nvmeq
= dev
->queues
[0];
195 WARN_ON(hctx_idx
!= 0);
196 WARN_ON(dev
->admin_tagset
.tags
[0] != hctx
->tags
);
197 WARN_ON(nvmeq
->tags
);
199 hctx
->driver_data
= nvmeq
;
200 nvmeq
->tags
= &dev
->admin_tagset
.tags
[0];
204 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx
*hctx
, unsigned int hctx_idx
)
206 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
211 static int nvme_admin_init_request(void *data
, struct request
*req
,
212 unsigned int hctx_idx
, unsigned int rq_idx
,
213 unsigned int numa_node
)
215 struct nvme_dev
*dev
= data
;
216 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
217 struct nvme_queue
*nvmeq
= dev
->queues
[0];
224 static int nvme_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
225 unsigned int hctx_idx
)
227 struct nvme_dev
*dev
= data
;
228 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
231 nvmeq
->tags
= &dev
->tagset
.tags
[hctx_idx
];
233 WARN_ON(dev
->tagset
.tags
[hctx_idx
] != hctx
->tags
);
234 hctx
->driver_data
= nvmeq
;
238 static int nvme_init_request(void *data
, struct request
*req
,
239 unsigned int hctx_idx
, unsigned int rq_idx
,
240 unsigned int numa_node
)
242 struct nvme_dev
*dev
= data
;
243 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
244 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
251 static void nvme_set_info(struct nvme_cmd_info
*cmd
, void *ctx
,
252 nvme_completion_fn handler
)
257 blk_mq_start_request(blk_mq_rq_from_pdu(cmd
));
260 static void *iod_get_private(struct nvme_iod
*iod
)
262 return (void *) (iod
->private & ~0x1UL
);
266 * If bit 0 is set, the iod is embedded in the request payload.
268 static bool iod_should_kfree(struct nvme_iod
*iod
)
270 return (iod
->private & NVME_INT_MASK
) == 0;
273 /* Special values must be less than 0x1000 */
274 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
275 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
276 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
277 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
279 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
280 struct nvme_completion
*cqe
)
282 if (ctx
== CMD_CTX_CANCELLED
)
284 if (ctx
== CMD_CTX_COMPLETED
) {
285 dev_warn(nvmeq
->q_dmadev
,
286 "completed id %d twice on queue %d\n",
287 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
290 if (ctx
== CMD_CTX_INVALID
) {
291 dev_warn(nvmeq
->q_dmadev
,
292 "invalid id %d completed on queue %d\n",
293 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
296 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
299 static void *cancel_cmd_info(struct nvme_cmd_info
*cmd
, nvme_completion_fn
*fn
)
306 cmd
->fn
= special_completion
;
307 cmd
->ctx
= CMD_CTX_CANCELLED
;
311 static void async_req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
312 struct nvme_completion
*cqe
)
314 u32 result
= le32_to_cpup(&cqe
->result
);
315 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
317 if (status
== NVME_SC_SUCCESS
|| status
== NVME_SC_ABORT_REQ
)
318 ++nvmeq
->dev
->event_limit
;
319 if (status
!= NVME_SC_SUCCESS
)
322 switch (result
& 0xff07) {
323 case NVME_AER_NOTICE_NS_CHANGED
:
324 dev_info(nvmeq
->q_dmadev
, "rescanning\n");
325 schedule_work(&nvmeq
->dev
->scan_work
);
327 dev_warn(nvmeq
->q_dmadev
, "async event result %08x\n", result
);
331 static void abort_completion(struct nvme_queue
*nvmeq
, void *ctx
,
332 struct nvme_completion
*cqe
)
334 struct request
*req
= ctx
;
336 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
337 u32 result
= le32_to_cpup(&cqe
->result
);
339 blk_mq_free_request(req
);
341 dev_warn(nvmeq
->q_dmadev
, "Abort status:%x result:%x", status
, result
);
342 ++nvmeq
->dev
->abort_limit
;
345 static void async_completion(struct nvme_queue
*nvmeq
, void *ctx
,
346 struct nvme_completion
*cqe
)
348 struct async_cmd_info
*cmdinfo
= ctx
;
349 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
350 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
351 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
352 blk_mq_free_request(cmdinfo
->req
);
355 static inline struct nvme_cmd_info
*get_cmd_from_tag(struct nvme_queue
*nvmeq
,
358 struct request
*req
= blk_mq_tag_to_rq(*nvmeq
->tags
, tag
);
360 return blk_mq_rq_to_pdu(req
);
364 * Called with local interrupts disabled and the q_lock held. May not sleep.
366 static void *nvme_finish_cmd(struct nvme_queue
*nvmeq
, int tag
,
367 nvme_completion_fn
*fn
)
369 struct nvme_cmd_info
*cmd
= get_cmd_from_tag(nvmeq
, tag
);
371 if (tag
>= nvmeq
->q_depth
) {
372 *fn
= special_completion
;
373 return CMD_CTX_INVALID
;
378 cmd
->fn
= special_completion
;
379 cmd
->ctx
= CMD_CTX_COMPLETED
;
384 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
385 * @nvmeq: The queue to use
386 * @cmd: The command to send
388 * Safe to use from interrupt context
390 static void __nvme_submit_cmd(struct nvme_queue
*nvmeq
,
391 struct nvme_command
*cmd
)
393 u16 tail
= nvmeq
->sq_tail
;
395 if (nvmeq
->sq_cmds_io
)
396 memcpy_toio(&nvmeq
->sq_cmds_io
[tail
], cmd
, sizeof(*cmd
));
398 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
400 if (++tail
== nvmeq
->q_depth
)
402 writel(tail
, nvmeq
->q_db
);
403 nvmeq
->sq_tail
= tail
;
406 static void nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
409 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
410 __nvme_submit_cmd(nvmeq
, cmd
);
411 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
414 static __le64
**iod_list(struct nvme_iod
*iod
)
416 return ((void *)iod
) + iod
->offset
;
419 static inline void iod_init(struct nvme_iod
*iod
, unsigned nbytes
,
420 unsigned nseg
, unsigned long private)
422 iod
->private = private;
423 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
425 iod
->length
= nbytes
;
429 static struct nvme_iod
*
430 __nvme_alloc_iod(unsigned nseg
, unsigned bytes
, struct nvme_dev
*dev
,
431 unsigned long priv
, gfp_t gfp
)
433 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
434 sizeof(__le64
*) * nvme_npages(bytes
, dev
) +
435 sizeof(struct scatterlist
) * nseg
, gfp
);
438 iod_init(iod
, bytes
, nseg
, priv
);
443 static struct nvme_iod
*nvme_alloc_iod(struct request
*rq
, struct nvme_dev
*dev
,
446 unsigned size
= !(rq
->cmd_flags
& REQ_DISCARD
) ? blk_rq_bytes(rq
) :
447 sizeof(struct nvme_dsm_range
);
448 struct nvme_iod
*iod
;
450 if (rq
->nr_phys_segments
<= NVME_INT_PAGES
&&
451 size
<= NVME_INT_BYTES(dev
)) {
452 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(rq
);
455 iod_init(iod
, size
, rq
->nr_phys_segments
,
456 (unsigned long) rq
| NVME_INT_MASK
);
460 return __nvme_alloc_iod(rq
->nr_phys_segments
, size
, dev
,
461 (unsigned long) rq
, gfp
);
464 static void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
466 const int last_prp
= dev
->page_size
/ 8 - 1;
468 __le64
**list
= iod_list(iod
);
469 dma_addr_t prp_dma
= iod
->first_dma
;
471 if (iod
->npages
== 0)
472 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
473 for (i
= 0; i
< iod
->npages
; i
++) {
474 __le64
*prp_list
= list
[i
];
475 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
476 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
477 prp_dma
= next_prp_dma
;
480 if (iod_should_kfree(iod
))
484 static int nvme_error_status(u16 status
)
486 switch (status
& 0x7ff) {
487 case NVME_SC_SUCCESS
:
489 case NVME_SC_CAP_EXCEEDED
:
496 #ifdef CONFIG_BLK_DEV_INTEGRITY
497 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
499 if (be32_to_cpu(pi
->ref_tag
) == v
)
500 pi
->ref_tag
= cpu_to_be32(p
);
503 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
505 if (be32_to_cpu(pi
->ref_tag
) == p
)
506 pi
->ref_tag
= cpu_to_be32(v
);
510 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
512 * The virtual start sector is the one that was originally submitted by the
513 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
514 * start sector may be different. Remap protection information to match the
515 * physical LBA on writes, and back to the original seed on reads.
517 * Type 0 and 3 do not have a ref tag, so no remapping required.
519 static void nvme_dif_remap(struct request
*req
,
520 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
522 struct nvme_ns
*ns
= req
->rq_disk
->private_data
;
523 struct bio_integrity_payload
*bip
;
524 struct t10_pi_tuple
*pi
;
526 u32 i
, nlb
, ts
, phys
, virt
;
528 if (!ns
->pi_type
|| ns
->pi_type
== NVME_NS_DPS_PI_TYPE3
)
531 bip
= bio_integrity(req
->bio
);
535 pmap
= kmap_atomic(bip
->bip_vec
->bv_page
) + bip
->bip_vec
->bv_offset
;
538 virt
= bip_get_seed(bip
);
539 phys
= nvme_block_nr(ns
, blk_rq_pos(req
));
540 nlb
= (blk_rq_bytes(req
) >> ns
->lba_shift
);
541 ts
= ns
->disk
->integrity
.tuple_size
;
543 for (i
= 0; i
< nlb
; i
++, virt
++, phys
++) {
544 pi
= (struct t10_pi_tuple
*)p
;
545 dif_swap(phys
, virt
, pi
);
551 static int nvme_noop_verify(struct blk_integrity_iter
*iter
)
556 static int nvme_noop_generate(struct blk_integrity_iter
*iter
)
561 struct blk_integrity_profile nvme_meta_noop
= {
562 .name
= "NVME_META_NOOP",
563 .generate_fn
= nvme_noop_generate
,
564 .verify_fn
= nvme_noop_verify
,
567 static void nvme_init_integrity(struct nvme_ns
*ns
)
569 struct blk_integrity integrity
;
571 switch (ns
->pi_type
) {
572 case NVME_NS_DPS_PI_TYPE3
:
573 integrity
.profile
= &t10_pi_type3_crc
;
575 case NVME_NS_DPS_PI_TYPE1
:
576 case NVME_NS_DPS_PI_TYPE2
:
577 integrity
.profile
= &t10_pi_type1_crc
;
580 integrity
.profile
= &nvme_meta_noop
;
583 integrity
.tuple_size
= ns
->ms
;
584 blk_integrity_register(ns
->disk
, &integrity
);
585 blk_queue_max_integrity_segments(ns
->queue
, 1);
587 #else /* CONFIG_BLK_DEV_INTEGRITY */
588 static void nvme_dif_remap(struct request
*req
,
589 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
592 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
595 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
598 static void nvme_init_integrity(struct nvme_ns
*ns
)
603 static void req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
604 struct nvme_completion
*cqe
)
606 struct nvme_iod
*iod
= ctx
;
607 struct request
*req
= iod_get_private(iod
);
608 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
609 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
612 if (unlikely(status
)) {
613 if (!(status
& NVME_SC_DNR
|| blk_noretry_request(req
))
614 && (jiffies
- req
->start_time
) < req
->timeout
) {
617 blk_mq_requeue_request(req
);
618 spin_lock_irqsave(req
->q
->queue_lock
, flags
);
619 if (!blk_queue_stopped(req
->q
))
620 blk_mq_kick_requeue_list(req
->q
);
621 spin_unlock_irqrestore(req
->q
->queue_lock
, flags
);
625 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
) {
626 if (cmd_rq
->ctx
== CMD_CTX_CANCELLED
)
631 error
= nvme_error_status(status
);
635 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
) {
636 u32 result
= le32_to_cpup(&cqe
->result
);
637 req
->special
= (void *)(uintptr_t)result
;
641 dev_warn(nvmeq
->dev
->dev
,
642 "completing aborted command with status:%04x\n",
646 dma_unmap_sg(nvmeq
->dev
->dev
, iod
->sg
, iod
->nents
,
647 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
648 if (blk_integrity_rq(req
)) {
649 if (!rq_data_dir(req
))
650 nvme_dif_remap(req
, nvme_dif_complete
);
651 dma_unmap_sg(nvmeq
->dev
->dev
, iod
->meta_sg
, 1,
652 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
655 nvme_free_iod(nvmeq
->dev
, iod
);
657 blk_mq_complete_request(req
, error
);
660 /* length is in bytes. gfp flags indicates whether we may sleep. */
661 static int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
,
662 int total_len
, gfp_t gfp
)
664 struct dma_pool
*pool
;
665 int length
= total_len
;
666 struct scatterlist
*sg
= iod
->sg
;
667 int dma_len
= sg_dma_len(sg
);
668 u64 dma_addr
= sg_dma_address(sg
);
669 u32 page_size
= dev
->page_size
;
670 int offset
= dma_addr
& (page_size
- 1);
672 __le64
**list
= iod_list(iod
);
676 length
-= (page_size
- offset
);
680 dma_len
-= (page_size
- offset
);
682 dma_addr
+= (page_size
- offset
);
685 dma_addr
= sg_dma_address(sg
);
686 dma_len
= sg_dma_len(sg
);
689 if (length
<= page_size
) {
690 iod
->first_dma
= dma_addr
;
694 nprps
= DIV_ROUND_UP(length
, page_size
);
695 if (nprps
<= (256 / 8)) {
696 pool
= dev
->prp_small_pool
;
699 pool
= dev
->prp_page_pool
;
703 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
705 iod
->first_dma
= dma_addr
;
707 return (total_len
- length
) + page_size
;
710 iod
->first_dma
= prp_dma
;
713 if (i
== page_size
>> 3) {
714 __le64
*old_prp_list
= prp_list
;
715 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
717 return total_len
- length
;
718 list
[iod
->npages
++] = prp_list
;
719 prp_list
[0] = old_prp_list
[i
- 1];
720 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
723 prp_list
[i
++] = cpu_to_le64(dma_addr
);
724 dma_len
-= page_size
;
725 dma_addr
+= page_size
;
733 dma_addr
= sg_dma_address(sg
);
734 dma_len
= sg_dma_len(sg
);
740 static void nvme_submit_priv(struct nvme_queue
*nvmeq
, struct request
*req
,
741 struct nvme_iod
*iod
)
743 struct nvme_command cmnd
;
745 memcpy(&cmnd
, req
->cmd
, sizeof(cmnd
));
746 cmnd
.rw
.command_id
= req
->tag
;
747 if (req
->nr_phys_segments
) {
748 cmnd
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
749 cmnd
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
752 __nvme_submit_cmd(nvmeq
, &cmnd
);
756 * We reuse the small pool to allocate the 16-byte range here as it is not
757 * worth having a special pool for these or additional cases to handle freeing
760 static void nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
761 struct request
*req
, struct nvme_iod
*iod
)
763 struct nvme_dsm_range
*range
=
764 (struct nvme_dsm_range
*)iod_list(iod
)[0];
765 struct nvme_command cmnd
;
767 range
->cattr
= cpu_to_le32(0);
768 range
->nlb
= cpu_to_le32(blk_rq_bytes(req
) >> ns
->lba_shift
);
769 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
771 memset(&cmnd
, 0, sizeof(cmnd
));
772 cmnd
.dsm
.opcode
= nvme_cmd_dsm
;
773 cmnd
.dsm
.command_id
= req
->tag
;
774 cmnd
.dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
775 cmnd
.dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
777 cmnd
.dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
779 __nvme_submit_cmd(nvmeq
, &cmnd
);
782 static void nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
785 struct nvme_command cmnd
;
787 memset(&cmnd
, 0, sizeof(cmnd
));
788 cmnd
.common
.opcode
= nvme_cmd_flush
;
789 cmnd
.common
.command_id
= cmdid
;
790 cmnd
.common
.nsid
= cpu_to_le32(ns
->ns_id
);
792 __nvme_submit_cmd(nvmeq
, &cmnd
);
795 static int nvme_submit_iod(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
798 struct request
*req
= iod_get_private(iod
);
799 struct nvme_command cmnd
;
803 if (req
->cmd_flags
& REQ_FUA
)
804 control
|= NVME_RW_FUA
;
805 if (req
->cmd_flags
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
806 control
|= NVME_RW_LR
;
808 if (req
->cmd_flags
& REQ_RAHEAD
)
809 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
811 memset(&cmnd
, 0, sizeof(cmnd
));
812 cmnd
.rw
.opcode
= (rq_data_dir(req
) ? nvme_cmd_write
: nvme_cmd_read
);
813 cmnd
.rw
.command_id
= req
->tag
;
814 cmnd
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
815 cmnd
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
816 cmnd
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
817 cmnd
.rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
818 cmnd
.rw
.length
= cpu_to_le16((blk_rq_bytes(req
) >> ns
->lba_shift
) - 1);
821 switch (ns
->pi_type
) {
822 case NVME_NS_DPS_PI_TYPE3
:
823 control
|= NVME_RW_PRINFO_PRCHK_GUARD
;
825 case NVME_NS_DPS_PI_TYPE1
:
826 case NVME_NS_DPS_PI_TYPE2
:
827 control
|= NVME_RW_PRINFO_PRCHK_GUARD
|
828 NVME_RW_PRINFO_PRCHK_REF
;
829 cmnd
.rw
.reftag
= cpu_to_le32(
830 nvme_block_nr(ns
, blk_rq_pos(req
)));
833 if (blk_integrity_rq(req
))
835 cpu_to_le64(sg_dma_address(iod
->meta_sg
));
837 control
|= NVME_RW_PRINFO_PRACT
;
840 cmnd
.rw
.control
= cpu_to_le16(control
);
841 cmnd
.rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
843 __nvme_submit_cmd(nvmeq
, &cmnd
);
849 * NOTE: ns is NULL when called on the admin queue.
851 static int nvme_queue_rq(struct blk_mq_hw_ctx
*hctx
,
852 const struct blk_mq_queue_data
*bd
)
854 struct nvme_ns
*ns
= hctx
->queue
->queuedata
;
855 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
856 struct nvme_dev
*dev
= nvmeq
->dev
;
857 struct request
*req
= bd
->rq
;
858 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
859 struct nvme_iod
*iod
;
860 enum dma_data_direction dma_dir
;
863 * If formated with metadata, require the block layer provide a buffer
864 * unless this namespace is formated such that the metadata can be
865 * stripped/generated by the controller with PRACT=1.
867 if (ns
&& ns
->ms
&& !blk_integrity_rq(req
)) {
868 if (!(ns
->pi_type
&& ns
->ms
== 8) &&
869 req
->cmd_type
!= REQ_TYPE_DRV_PRIV
) {
870 blk_mq_complete_request(req
, -EFAULT
);
871 return BLK_MQ_RQ_QUEUE_OK
;
875 iod
= nvme_alloc_iod(req
, dev
, GFP_ATOMIC
);
877 return BLK_MQ_RQ_QUEUE_BUSY
;
879 if (req
->cmd_flags
& REQ_DISCARD
) {
882 * We reuse the small pool to allocate the 16-byte range here
883 * as it is not worth having a special pool for these or
884 * additional cases to handle freeing the iod.
886 range
= dma_pool_alloc(dev
->prp_small_pool
, GFP_ATOMIC
,
890 iod_list(iod
)[0] = (__le64
*)range
;
892 } else if (req
->nr_phys_segments
) {
893 dma_dir
= rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
895 sg_init_table(iod
->sg
, req
->nr_phys_segments
);
896 iod
->nents
= blk_rq_map_sg(req
->q
, req
, iod
->sg
);
900 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
))
903 if (blk_rq_bytes(req
) !=
904 nvme_setup_prps(dev
, iod
, blk_rq_bytes(req
), GFP_ATOMIC
)) {
905 dma_unmap_sg(dev
->dev
, iod
->sg
, iod
->nents
, dma_dir
);
908 if (blk_integrity_rq(req
)) {
909 if (blk_rq_count_integrity_sg(req
->q
, req
->bio
) != 1)
912 sg_init_table(iod
->meta_sg
, 1);
913 if (blk_rq_map_integrity_sg(
914 req
->q
, req
->bio
, iod
->meta_sg
) != 1)
917 if (rq_data_dir(req
))
918 nvme_dif_remap(req
, nvme_dif_prep
);
920 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->meta_sg
, 1, dma_dir
))
925 nvme_set_info(cmd
, iod
, req_completion
);
926 spin_lock_irq(&nvmeq
->q_lock
);
927 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
)
928 nvme_submit_priv(nvmeq
, req
, iod
);
929 else if (req
->cmd_flags
& REQ_DISCARD
)
930 nvme_submit_discard(nvmeq
, ns
, req
, iod
);
931 else if (req
->cmd_flags
& REQ_FLUSH
)
932 nvme_submit_flush(nvmeq
, ns
, req
->tag
);
934 nvme_submit_iod(nvmeq
, iod
, ns
);
936 nvme_process_cq(nvmeq
);
937 spin_unlock_irq(&nvmeq
->q_lock
);
938 return BLK_MQ_RQ_QUEUE_OK
;
941 nvme_free_iod(dev
, iod
);
942 return BLK_MQ_RQ_QUEUE_ERROR
;
944 nvme_free_iod(dev
, iod
);
945 return BLK_MQ_RQ_QUEUE_BUSY
;
948 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
952 head
= nvmeq
->cq_head
;
953 phase
= nvmeq
->cq_phase
;
957 nvme_completion_fn fn
;
958 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
959 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
961 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
962 if (++head
== nvmeq
->q_depth
) {
966 ctx
= nvme_finish_cmd(nvmeq
, cqe
.command_id
, &fn
);
967 fn(nvmeq
, ctx
, &cqe
);
970 /* If the controller ignores the cq head doorbell and continuously
971 * writes to the queue, it is theoretically possible to wrap around
972 * the queue twice and mistakenly return IRQ_NONE. Linux only
973 * requires that 0.1% of your interrupts are handled, so this isn't
976 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
979 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
980 nvmeq
->cq_head
= head
;
981 nvmeq
->cq_phase
= phase
;
987 static irqreturn_t
nvme_irq(int irq
, void *data
)
990 struct nvme_queue
*nvmeq
= data
;
991 spin_lock(&nvmeq
->q_lock
);
992 nvme_process_cq(nvmeq
);
993 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
995 spin_unlock(&nvmeq
->q_lock
);
999 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
1001 struct nvme_queue
*nvmeq
= data
;
1002 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
1003 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
1005 return IRQ_WAKE_THREAD
;
1009 * Returns 0 on success. If the result is negative, it's a Linux error code;
1010 * if the result is positive, it's an NVM Express status code
1012 int __nvme_submit_sync_cmd(struct request_queue
*q
, struct nvme_command
*cmd
,
1013 void *buffer
, void __user
*ubuffer
, unsigned bufflen
,
1014 u32
*result
, unsigned timeout
)
1016 bool write
= cmd
->common
.opcode
& 1;
1017 struct bio
*bio
= NULL
;
1018 struct request
*req
;
1021 req
= blk_mq_alloc_request(q
, write
, GFP_KERNEL
, false);
1023 return PTR_ERR(req
);
1025 req
->cmd_type
= REQ_TYPE_DRV_PRIV
;
1026 req
->cmd_flags
|= REQ_FAILFAST_DRIVER
;
1027 req
->__data_len
= 0;
1028 req
->__sector
= (sector_t
) -1;
1029 req
->bio
= req
->biotail
= NULL
;
1031 req
->timeout
= timeout
? timeout
: ADMIN_TIMEOUT
;
1033 req
->cmd
= (unsigned char *)cmd
;
1034 req
->cmd_len
= sizeof(struct nvme_command
);
1035 req
->special
= (void *)0;
1037 if (buffer
&& bufflen
) {
1038 ret
= blk_rq_map_kern(q
, req
, buffer
, bufflen
, __GFP_WAIT
);
1041 } else if (ubuffer
&& bufflen
) {
1042 ret
= blk_rq_map_user(q
, req
, NULL
, ubuffer
, bufflen
, __GFP_WAIT
);
1048 blk_execute_rq(req
->q
, NULL
, req
, 0);
1050 blk_rq_unmap_user(bio
);
1052 *result
= (u32
)(uintptr_t)req
->special
;
1055 blk_mq_free_request(req
);
1059 int nvme_submit_sync_cmd(struct request_queue
*q
, struct nvme_command
*cmd
,
1060 void *buffer
, unsigned bufflen
)
1062 return __nvme_submit_sync_cmd(q
, cmd
, buffer
, NULL
, bufflen
, NULL
, 0);
1065 static int nvme_submit_async_admin_req(struct nvme_dev
*dev
)
1067 struct nvme_queue
*nvmeq
= dev
->queues
[0];
1068 struct nvme_command c
;
1069 struct nvme_cmd_info
*cmd_info
;
1070 struct request
*req
;
1072 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
, true);
1074 return PTR_ERR(req
);
1076 req
->cmd_flags
|= REQ_NO_TIMEOUT
;
1077 cmd_info
= blk_mq_rq_to_pdu(req
);
1078 nvme_set_info(cmd_info
, NULL
, async_req_completion
);
1080 memset(&c
, 0, sizeof(c
));
1081 c
.common
.opcode
= nvme_admin_async_event
;
1082 c
.common
.command_id
= req
->tag
;
1084 blk_mq_free_request(req
);
1085 __nvme_submit_cmd(nvmeq
, &c
);
1089 static int nvme_submit_admin_async_cmd(struct nvme_dev
*dev
,
1090 struct nvme_command
*cmd
,
1091 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
1093 struct nvme_queue
*nvmeq
= dev
->queues
[0];
1094 struct request
*req
;
1095 struct nvme_cmd_info
*cmd_rq
;
1097 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
1099 return PTR_ERR(req
);
1101 req
->timeout
= timeout
;
1102 cmd_rq
= blk_mq_rq_to_pdu(req
);
1104 nvme_set_info(cmd_rq
, cmdinfo
, async_completion
);
1105 cmdinfo
->status
= -EINTR
;
1107 cmd
->common
.command_id
= req
->tag
;
1109 nvme_submit_cmd(nvmeq
, cmd
);
1113 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
1115 struct nvme_command c
;
1117 memset(&c
, 0, sizeof(c
));
1118 c
.delete_queue
.opcode
= opcode
;
1119 c
.delete_queue
.qid
= cpu_to_le16(id
);
1121 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1124 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
1125 struct nvme_queue
*nvmeq
)
1127 struct nvme_command c
;
1128 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
1131 * Note: we (ab)use the fact the the prp fields survive if no data
1132 * is attached to the request.
1134 memset(&c
, 0, sizeof(c
));
1135 c
.create_cq
.opcode
= nvme_admin_create_cq
;
1136 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
1137 c
.create_cq
.cqid
= cpu_to_le16(qid
);
1138 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1139 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
1140 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
1142 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1145 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
1146 struct nvme_queue
*nvmeq
)
1148 struct nvme_command c
;
1149 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
1152 * Note: we (ab)use the fact the the prp fields survive if no data
1153 * is attached to the request.
1155 memset(&c
, 0, sizeof(c
));
1156 c
.create_sq
.opcode
= nvme_admin_create_sq
;
1157 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
1158 c
.create_sq
.sqid
= cpu_to_le16(qid
);
1159 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1160 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
1161 c
.create_sq
.cqid
= cpu_to_le16(qid
);
1163 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1166 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1168 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1171 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1173 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1176 int nvme_identify_ctrl(struct nvme_dev
*dev
, struct nvme_id_ctrl
**id
)
1178 struct nvme_command c
= { };
1181 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1182 c
.identify
.opcode
= nvme_admin_identify
;
1183 c
.identify
.cns
= cpu_to_le32(1);
1185 *id
= kmalloc(sizeof(struct nvme_id_ctrl
), GFP_KERNEL
);
1189 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *id
,
1190 sizeof(struct nvme_id_ctrl
));
1196 int nvme_identify_ns(struct nvme_dev
*dev
, unsigned nsid
,
1197 struct nvme_id_ns
**id
)
1199 struct nvme_command c
= { };
1202 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1203 c
.identify
.opcode
= nvme_admin_identify
,
1204 c
.identify
.nsid
= cpu_to_le32(nsid
),
1206 *id
= kmalloc(sizeof(struct nvme_id_ns
), GFP_KERNEL
);
1210 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *id
,
1211 sizeof(struct nvme_id_ns
));
1217 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
1218 dma_addr_t dma_addr
, u32
*result
)
1220 struct nvme_command c
;
1222 memset(&c
, 0, sizeof(c
));
1223 c
.features
.opcode
= nvme_admin_get_features
;
1224 c
.features
.nsid
= cpu_to_le32(nsid
);
1225 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1226 c
.features
.fid
= cpu_to_le32(fid
);
1228 return __nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, NULL
, 0,
1232 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
1233 dma_addr_t dma_addr
, u32
*result
)
1235 struct nvme_command c
;
1237 memset(&c
, 0, sizeof(c
));
1238 c
.features
.opcode
= nvme_admin_set_features
;
1239 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1240 c
.features
.fid
= cpu_to_le32(fid
);
1241 c
.features
.dword11
= cpu_to_le32(dword11
);
1243 return __nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, NULL
, 0,
1247 int nvme_get_log_page(struct nvme_dev
*dev
, struct nvme_smart_log
**log
)
1249 struct nvme_command c
= { };
1252 c
.common
.opcode
= nvme_admin_get_log_page
,
1253 c
.common
.nsid
= cpu_to_le32(0xFFFFFFFF),
1254 c
.common
.cdw10
[0] = cpu_to_le32(
1255 (((sizeof(struct nvme_smart_log
) / 4) - 1) << 16) |
1258 *log
= kmalloc(sizeof(struct nvme_smart_log
), GFP_KERNEL
);
1262 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *log
,
1263 sizeof(struct nvme_smart_log
));
1270 * nvme_abort_req - Attempt aborting a request
1272 * Schedule controller reset if the command was already aborted once before and
1273 * still hasn't been returned to the driver, or if this is the admin queue.
1275 static void nvme_abort_req(struct request
*req
)
1277 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
1278 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
1279 struct nvme_dev
*dev
= nvmeq
->dev
;
1280 struct request
*abort_req
;
1281 struct nvme_cmd_info
*abort_cmd
;
1282 struct nvme_command cmd
;
1284 if (!nvmeq
->qid
|| cmd_rq
->aborted
) {
1285 spin_lock(&dev_list_lock
);
1286 if (!__nvme_reset(dev
)) {
1288 "I/O %d QID %d timeout, reset controller\n",
1289 req
->tag
, nvmeq
->qid
);
1291 spin_unlock(&dev_list_lock
);
1295 if (!dev
->abort_limit
)
1298 abort_req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
,
1300 if (IS_ERR(abort_req
))
1303 abort_cmd
= blk_mq_rq_to_pdu(abort_req
);
1304 nvme_set_info(abort_cmd
, abort_req
, abort_completion
);
1306 memset(&cmd
, 0, sizeof(cmd
));
1307 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1308 cmd
.abort
.cid
= req
->tag
;
1309 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1310 cmd
.abort
.command_id
= abort_req
->tag
;
1313 cmd_rq
->aborted
= 1;
1315 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", req
->tag
,
1317 nvme_submit_cmd(dev
->queues
[0], &cmd
);
1320 static void nvme_cancel_queue_ios(struct request
*req
, void *data
, bool reserved
)
1322 struct nvme_queue
*nvmeq
= data
;
1324 nvme_completion_fn fn
;
1325 struct nvme_cmd_info
*cmd
;
1326 struct nvme_completion cqe
;
1328 if (!blk_mq_request_started(req
))
1331 cmd
= blk_mq_rq_to_pdu(req
);
1333 if (cmd
->ctx
== CMD_CTX_CANCELLED
)
1336 if (blk_queue_dying(req
->q
))
1337 cqe
.status
= cpu_to_le16((NVME_SC_ABORT_REQ
| NVME_SC_DNR
) << 1);
1339 cqe
.status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1);
1342 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n",
1343 req
->tag
, nvmeq
->qid
);
1344 ctx
= cancel_cmd_info(cmd
, &fn
);
1345 fn(nvmeq
, ctx
, &cqe
);
1348 static enum blk_eh_timer_return
nvme_timeout(struct request
*req
, bool reserved
)
1350 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
1351 struct nvme_queue
*nvmeq
= cmd
->nvmeq
;
1353 dev_warn(nvmeq
->q_dmadev
, "Timeout I/O %d QID %d\n", req
->tag
,
1355 spin_lock_irq(&nvmeq
->q_lock
);
1356 nvme_abort_req(req
);
1357 spin_unlock_irq(&nvmeq
->q_lock
);
1360 * The aborted req will be completed on receiving the abort req.
1361 * We enable the timer again. If hit twice, it'll cause a device reset,
1362 * as the device then is in a faulty state.
1364 return BLK_EH_RESET_TIMER
;
1367 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1369 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1370 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1372 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1373 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1377 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1381 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1382 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1384 dev
->queues
[i
] = NULL
;
1385 nvme_free_queue(nvmeq
);
1390 * nvme_suspend_queue - put queue into suspended state
1391 * @nvmeq - queue to suspend
1393 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1397 spin_lock_irq(&nvmeq
->q_lock
);
1398 if (nvmeq
->cq_vector
== -1) {
1399 spin_unlock_irq(&nvmeq
->q_lock
);
1402 vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1403 nvmeq
->dev
->online_queues
--;
1404 nvmeq
->cq_vector
= -1;
1405 spin_unlock_irq(&nvmeq
->q_lock
);
1407 if (!nvmeq
->qid
&& nvmeq
->dev
->admin_q
)
1408 blk_mq_freeze_queue_start(nvmeq
->dev
->admin_q
);
1410 irq_set_affinity_hint(vector
, NULL
);
1411 free_irq(vector
, nvmeq
);
1416 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1418 spin_lock_irq(&nvmeq
->q_lock
);
1419 if (nvmeq
->tags
&& *nvmeq
->tags
)
1420 blk_mq_all_tag_busy_iter(*nvmeq
->tags
, nvme_cancel_queue_ios
, nvmeq
);
1421 spin_unlock_irq(&nvmeq
->q_lock
);
1424 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1426 struct nvme_queue
*nvmeq
= dev
->queues
[qid
];
1430 if (nvme_suspend_queue(nvmeq
))
1433 /* Don't tell the adapter to delete the admin queue.
1434 * Don't tell a removed adapter to delete IO queues. */
1435 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1436 adapter_delete_sq(dev
, qid
);
1437 adapter_delete_cq(dev
, qid
);
1440 spin_lock_irq(&nvmeq
->q_lock
);
1441 nvme_process_cq(nvmeq
);
1442 spin_unlock_irq(&nvmeq
->q_lock
);
1445 static int nvme_cmb_qdepth(struct nvme_dev
*dev
, int nr_io_queues
,
1448 int q_depth
= dev
->q_depth
;
1449 unsigned q_size_aligned
= roundup(q_depth
* entry_size
, dev
->page_size
);
1451 if (q_size_aligned
* nr_io_queues
> dev
->cmb_size
) {
1452 u64 mem_per_q
= div_u64(dev
->cmb_size
, nr_io_queues
);
1453 mem_per_q
= round_down(mem_per_q
, dev
->page_size
);
1454 q_depth
= div_u64(mem_per_q
, entry_size
);
1457 * Ensure the reduced q_depth is above some threshold where it
1458 * would be better to map queues in system memory with the
1468 static int nvme_alloc_sq_cmds(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1471 if (qid
&& dev
->cmb
&& use_cmb_sqes
&& NVME_CMB_SQS(dev
->cmbsz
)) {
1472 unsigned offset
= (qid
- 1) *
1473 roundup(SQ_SIZE(depth
), dev
->page_size
);
1474 nvmeq
->sq_dma_addr
= dev
->cmb_dma_addr
+ offset
;
1475 nvmeq
->sq_cmds_io
= dev
->cmb
+ offset
;
1477 nvmeq
->sq_cmds
= dma_alloc_coherent(dev
->dev
, SQ_SIZE(depth
),
1478 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1479 if (!nvmeq
->sq_cmds
)
1486 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1489 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
), GFP_KERNEL
);
1493 nvmeq
->cqes
= dma_zalloc_coherent(dev
->dev
, CQ_SIZE(depth
),
1494 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1498 if (nvme_alloc_sq_cmds(dev
, nvmeq
, qid
, depth
))
1501 nvmeq
->q_dmadev
= dev
->dev
;
1503 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1504 dev
->instance
, qid
);
1505 spin_lock_init(&nvmeq
->q_lock
);
1507 nvmeq
->cq_phase
= 1;
1508 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1509 nvmeq
->q_depth
= depth
;
1511 nvmeq
->cq_vector
= -1;
1512 dev
->queues
[qid
] = nvmeq
;
1514 /* make sure queue descriptor is set before queue count, for kthread */
1521 dma_free_coherent(dev
->dev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1522 nvmeq
->cq_dma_addr
);
1528 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1531 if (use_threaded_interrupts
)
1532 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1533 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1535 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1536 IRQF_SHARED
, name
, nvmeq
);
1539 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1541 struct nvme_dev
*dev
= nvmeq
->dev
;
1543 spin_lock_irq(&nvmeq
->q_lock
);
1546 nvmeq
->cq_phase
= 1;
1547 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1548 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1549 dev
->online_queues
++;
1550 spin_unlock_irq(&nvmeq
->q_lock
);
1553 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1555 struct nvme_dev
*dev
= nvmeq
->dev
;
1558 nvmeq
->cq_vector
= qid
- 1;
1559 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1563 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1567 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1571 nvme_init_queue(nvmeq
, qid
);
1575 adapter_delete_sq(dev
, qid
);
1577 adapter_delete_cq(dev
, qid
);
1581 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1583 unsigned long timeout
;
1584 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1586 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1588 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1590 if (fatal_signal_pending(current
))
1592 if (time_after(jiffies
, timeout
)) {
1594 "Device not ready; aborting %s\n", enabled
?
1595 "initialisation" : "reset");
1604 * If the device has been passed off to us in an enabled state, just clear
1605 * the enabled bit. The spec says we should set the 'shutdown notification
1606 * bits', but doing so may cause the device to complete commands to the
1607 * admin queue ... and we don't know what memory that might be pointing at!
1609 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1611 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1612 dev
->ctrl_config
&= ~NVME_CC_ENABLE
;
1613 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1615 return nvme_wait_ready(dev
, cap
, false);
1618 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1620 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1621 dev
->ctrl_config
|= NVME_CC_ENABLE
;
1622 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1624 return nvme_wait_ready(dev
, cap
, true);
1627 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1629 unsigned long timeout
;
1631 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1632 dev
->ctrl_config
|= NVME_CC_SHN_NORMAL
;
1634 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1636 timeout
= SHUTDOWN_TIMEOUT
+ jiffies
;
1637 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1638 NVME_CSTS_SHST_CMPLT
) {
1640 if (fatal_signal_pending(current
))
1642 if (time_after(jiffies
, timeout
)) {
1644 "Device shutdown incomplete; abort shutdown\n");
1652 static struct blk_mq_ops nvme_mq_admin_ops
= {
1653 .queue_rq
= nvme_queue_rq
,
1654 .map_queue
= blk_mq_map_queue
,
1655 .init_hctx
= nvme_admin_init_hctx
,
1656 .exit_hctx
= nvme_admin_exit_hctx
,
1657 .init_request
= nvme_admin_init_request
,
1658 .timeout
= nvme_timeout
,
1661 static struct blk_mq_ops nvme_mq_ops
= {
1662 .queue_rq
= nvme_queue_rq
,
1663 .map_queue
= blk_mq_map_queue
,
1664 .init_hctx
= nvme_init_hctx
,
1665 .init_request
= nvme_init_request
,
1666 .timeout
= nvme_timeout
,
1669 static void nvme_dev_remove_admin(struct nvme_dev
*dev
)
1671 if (dev
->admin_q
&& !blk_queue_dying(dev
->admin_q
)) {
1672 blk_cleanup_queue(dev
->admin_q
);
1673 blk_mq_free_tag_set(&dev
->admin_tagset
);
1677 static int nvme_alloc_admin_tags(struct nvme_dev
*dev
)
1679 if (!dev
->admin_q
) {
1680 dev
->admin_tagset
.ops
= &nvme_mq_admin_ops
;
1681 dev
->admin_tagset
.nr_hw_queues
= 1;
1682 dev
->admin_tagset
.queue_depth
= NVME_AQ_DEPTH
- 1;
1683 dev
->admin_tagset
.reserved_tags
= 1;
1684 dev
->admin_tagset
.timeout
= ADMIN_TIMEOUT
;
1685 dev
->admin_tagset
.numa_node
= dev_to_node(dev
->dev
);
1686 dev
->admin_tagset
.cmd_size
= nvme_cmd_size(dev
);
1687 dev
->admin_tagset
.driver_data
= dev
;
1689 if (blk_mq_alloc_tag_set(&dev
->admin_tagset
))
1692 dev
->admin_q
= blk_mq_init_queue(&dev
->admin_tagset
);
1693 if (IS_ERR(dev
->admin_q
)) {
1694 blk_mq_free_tag_set(&dev
->admin_tagset
);
1697 if (!blk_get_queue(dev
->admin_q
)) {
1698 nvme_dev_remove_admin(dev
);
1699 dev
->admin_q
= NULL
;
1703 blk_mq_unfreeze_queue(dev
->admin_q
);
1708 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1712 u64 cap
= readq(&dev
->bar
->cap
);
1713 struct nvme_queue
*nvmeq
;
1714 unsigned page_shift
= PAGE_SHIFT
;
1715 unsigned dev_page_min
= NVME_CAP_MPSMIN(cap
) + 12;
1716 unsigned dev_page_max
= NVME_CAP_MPSMAX(cap
) + 12;
1718 if (page_shift
< dev_page_min
) {
1720 "Minimum device page size (%u) too large for "
1721 "host (%u)\n", 1 << dev_page_min
,
1725 if (page_shift
> dev_page_max
) {
1727 "Device maximum page size (%u) smaller than "
1728 "host (%u); enabling work-around\n",
1729 1 << dev_page_max
, 1 << page_shift
);
1730 page_shift
= dev_page_max
;
1733 dev
->subsystem
= readl(&dev
->bar
->vs
) >= NVME_VS(1, 1) ?
1734 NVME_CAP_NSSRC(cap
) : 0;
1736 if (dev
->subsystem
&& (readl(&dev
->bar
->csts
) & NVME_CSTS_NSSRO
))
1737 writel(NVME_CSTS_NSSRO
, &dev
->bar
->csts
);
1739 result
= nvme_disable_ctrl(dev
, cap
);
1743 nvmeq
= dev
->queues
[0];
1745 nvmeq
= nvme_alloc_queue(dev
, 0, NVME_AQ_DEPTH
);
1750 aqa
= nvmeq
->q_depth
- 1;
1753 dev
->page_size
= 1 << page_shift
;
1755 dev
->ctrl_config
= NVME_CC_CSS_NVM
;
1756 dev
->ctrl_config
|= (page_shift
- 12) << NVME_CC_MPS_SHIFT
;
1757 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1758 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1760 writel(aqa
, &dev
->bar
->aqa
);
1761 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1762 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1764 result
= nvme_enable_ctrl(dev
, cap
);
1768 nvmeq
->cq_vector
= 0;
1769 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1771 nvmeq
->cq_vector
= -1;
1778 nvme_free_queues(dev
, 0);
1782 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1784 struct nvme_dev
*dev
= ns
->dev
;
1785 struct nvme_user_io io
;
1786 struct nvme_command c
;
1787 unsigned length
, meta_len
;
1789 dma_addr_t meta_dma
= 0;
1791 void __user
*metadata
;
1793 if (copy_from_user(&io
, uio
, sizeof(io
)))
1796 switch (io
.opcode
) {
1797 case nvme_cmd_write
:
1799 case nvme_cmd_compare
:
1805 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1806 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1807 metadata
= (void __user
*)(uintptr_t)io
.metadata
;
1808 write
= io
.opcode
& 1;
1815 if (((io
.metadata
& 3) || !io
.metadata
) && !ns
->ext
)
1818 meta
= dma_alloc_coherent(dev
->dev
, meta_len
,
1819 &meta_dma
, GFP_KERNEL
);
1826 if (copy_from_user(meta
, metadata
, meta_len
)) {
1833 memset(&c
, 0, sizeof(c
));
1834 c
.rw
.opcode
= io
.opcode
;
1835 c
.rw
.flags
= io
.flags
;
1836 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1837 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1838 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1839 c
.rw
.control
= cpu_to_le16(io
.control
);
1840 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1841 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1842 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1843 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1844 c
.rw
.metadata
= cpu_to_le64(meta_dma
);
1846 status
= __nvme_submit_sync_cmd(ns
->queue
, &c
, NULL
,
1847 (void __user
*)(uintptr_t)io
.addr
, length
, NULL
, 0);
1850 if (status
== NVME_SC_SUCCESS
&& !write
) {
1851 if (copy_to_user(metadata
, meta
, meta_len
))
1854 dma_free_coherent(dev
->dev
, meta_len
, meta
, meta_dma
);
1859 static int nvme_user_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
1860 struct nvme_passthru_cmd __user
*ucmd
)
1862 struct nvme_passthru_cmd cmd
;
1863 struct nvme_command c
;
1864 unsigned timeout
= 0;
1867 if (!capable(CAP_SYS_ADMIN
))
1869 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1872 memset(&c
, 0, sizeof(c
));
1873 c
.common
.opcode
= cmd
.opcode
;
1874 c
.common
.flags
= cmd
.flags
;
1875 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1876 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1877 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1878 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1879 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1880 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1881 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1882 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1883 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1886 timeout
= msecs_to_jiffies(cmd
.timeout_ms
);
1888 status
= __nvme_submit_sync_cmd(ns
? ns
->queue
: dev
->admin_q
, &c
,
1889 NULL
, (void __user
*)(uintptr_t)cmd
.addr
, cmd
.data_len
,
1890 &cmd
.result
, timeout
);
1892 if (put_user(cmd
.result
, &ucmd
->result
))
1899 static int nvme_subsys_reset(struct nvme_dev
*dev
)
1901 if (!dev
->subsystem
)
1904 writel(0x4E564D65, &dev
->bar
->nssr
); /* "NVMe" */
1908 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1911 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1915 force_successful_syscall_return();
1917 case NVME_IOCTL_ADMIN_CMD
:
1918 return nvme_user_cmd(ns
->dev
, NULL
, (void __user
*)arg
);
1919 case NVME_IOCTL_IO_CMD
:
1920 return nvme_user_cmd(ns
->dev
, ns
, (void __user
*)arg
);
1921 case NVME_IOCTL_SUBMIT_IO
:
1922 return nvme_submit_io(ns
, (void __user
*)arg
);
1923 case SG_GET_VERSION_NUM
:
1924 return nvme_sg_get_version_num((void __user
*)arg
);
1926 return nvme_sg_io(ns
, (void __user
*)arg
);
1932 #ifdef CONFIG_COMPAT
1933 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1934 unsigned int cmd
, unsigned long arg
)
1938 return -ENOIOCTLCMD
;
1940 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1943 #define nvme_compat_ioctl NULL
1946 static void nvme_free_dev(struct kref
*kref
);
1947 static void nvme_free_ns(struct kref
*kref
)
1949 struct nvme_ns
*ns
= container_of(kref
, struct nvme_ns
, kref
);
1951 spin_lock(&dev_list_lock
);
1952 ns
->disk
->private_data
= NULL
;
1953 spin_unlock(&dev_list_lock
);
1955 kref_put(&ns
->dev
->kref
, nvme_free_dev
);
1960 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1965 spin_lock(&dev_list_lock
);
1966 ns
= bdev
->bd_disk
->private_data
;
1969 else if (!kref_get_unless_zero(&ns
->kref
))
1971 spin_unlock(&dev_list_lock
);
1976 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1978 struct nvme_ns
*ns
= disk
->private_data
;
1979 kref_put(&ns
->kref
, nvme_free_ns
);
1982 static int nvme_getgeo(struct block_device
*bd
, struct hd_geometry
*geo
)
1984 /* some standard values */
1985 geo
->heads
= 1 << 6;
1986 geo
->sectors
= 1 << 5;
1987 geo
->cylinders
= get_capacity(bd
->bd_disk
) >> 11;
1991 static void nvme_config_discard(struct nvme_ns
*ns
)
1993 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
1994 ns
->queue
->limits
.discard_zeroes_data
= 0;
1995 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
1996 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
1997 blk_queue_max_discard_sectors(ns
->queue
, 0xffffffff);
1998 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
2001 static int nvme_revalidate_disk(struct gendisk
*disk
)
2003 struct nvme_ns
*ns
= disk
->private_data
;
2004 struct nvme_dev
*dev
= ns
->dev
;
2005 struct nvme_id_ns
*id
;
2010 if (nvme_identify_ns(dev
, ns
->ns_id
, &id
)) {
2011 dev_warn(dev
->dev
, "%s: Identify failure nvme%dn%d\n", __func__
,
2012 dev
->instance
, ns
->ns_id
);
2015 if (id
->ncap
== 0) {
2021 lbaf
= id
->flbas
& NVME_NS_FLBAS_LBA_MASK
;
2022 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
2023 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
2024 ns
->ext
= ns
->ms
&& (id
->flbas
& NVME_NS_FLBAS_META_EXT
);
2027 * If identify namespace failed, use default 512 byte block size so
2028 * block layer can use before failing read/write for 0 capacity.
2030 if (ns
->lba_shift
== 0)
2032 bs
= 1 << ns
->lba_shift
;
2034 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2035 pi_type
= ns
->ms
== sizeof(struct t10_pi_tuple
) ?
2036 id
->dps
& NVME_NS_DPS_PI_MASK
: 0;
2038 if (blk_get_integrity(disk
) && (ns
->pi_type
!= pi_type
||
2040 bs
!= queue_logical_block_size(disk
->queue
) ||
2041 (ns
->ms
&& ns
->ext
)))
2042 blk_integrity_unregister(disk
);
2044 ns
->pi_type
= pi_type
;
2045 blk_queue_logical_block_size(ns
->queue
, bs
);
2047 if (ns
->ms
&& !ns
->ext
)
2048 nvme_init_integrity(ns
);
2050 if (ns
->ms
&& !(ns
->ms
== 8 && ns
->pi_type
) && !blk_get_integrity(disk
))
2051 set_capacity(disk
, 0);
2053 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
2055 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
2056 nvme_config_discard(ns
);
2062 static const struct block_device_operations nvme_fops
= {
2063 .owner
= THIS_MODULE
,
2064 .ioctl
= nvme_ioctl
,
2065 .compat_ioctl
= nvme_compat_ioctl
,
2067 .release
= nvme_release
,
2068 .getgeo
= nvme_getgeo
,
2069 .revalidate_disk
= nvme_revalidate_disk
,
2072 static int nvme_kthread(void *data
)
2074 struct nvme_dev
*dev
, *next
;
2076 while (!kthread_should_stop()) {
2077 set_current_state(TASK_INTERRUPTIBLE
);
2078 spin_lock(&dev_list_lock
);
2079 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
2081 u32 csts
= readl(&dev
->bar
->csts
);
2083 if ((dev
->subsystem
&& (csts
& NVME_CSTS_NSSRO
)) ||
2084 csts
& NVME_CSTS_CFS
) {
2085 if (!__nvme_reset(dev
)) {
2087 "Failed status: %x, reset controller\n",
2088 readl(&dev
->bar
->csts
));
2092 for (i
= 0; i
< dev
->queue_count
; i
++) {
2093 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2096 spin_lock_irq(&nvmeq
->q_lock
);
2097 nvme_process_cq(nvmeq
);
2099 while ((i
== 0) && (dev
->event_limit
> 0)) {
2100 if (nvme_submit_async_admin_req(dev
))
2104 spin_unlock_irq(&nvmeq
->q_lock
);
2107 spin_unlock(&dev_list_lock
);
2108 schedule_timeout(round_jiffies_relative(HZ
));
2113 static void nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
)
2116 struct gendisk
*disk
;
2117 int node
= dev_to_node(dev
->dev
);
2119 ns
= kzalloc_node(sizeof(*ns
), GFP_KERNEL
, node
);
2123 ns
->queue
= blk_mq_init_queue(&dev
->tagset
);
2124 if (IS_ERR(ns
->queue
))
2126 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
2127 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
2129 ns
->queue
->queuedata
= ns
;
2131 disk
= alloc_disk_node(0, node
);
2133 goto out_free_queue
;
2135 kref_init(&ns
->kref
);
2138 ns
->lba_shift
= 9; /* set to a default value for 512 until disk is validated */
2139 list_add_tail(&ns
->list
, &dev
->namespaces
);
2141 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
2142 if (dev
->max_hw_sectors
) {
2143 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
2144 blk_queue_max_segments(ns
->queue
,
2145 ((dev
->max_hw_sectors
<< 9) / dev
->page_size
) + 1);
2147 if (dev
->stripe_size
)
2148 blk_queue_chunk_sectors(ns
->queue
, dev
->stripe_size
>> 9);
2149 if (dev
->vwc
& NVME_CTRL_VWC_PRESENT
)
2150 blk_queue_flush(ns
->queue
, REQ_FLUSH
| REQ_FUA
);
2151 blk_queue_virt_boundary(ns
->queue
, dev
->page_size
- 1);
2153 disk
->major
= nvme_major
;
2154 disk
->first_minor
= 0;
2155 disk
->fops
= &nvme_fops
;
2156 disk
->private_data
= ns
;
2157 disk
->queue
= ns
->queue
;
2158 disk
->driverfs_dev
= dev
->device
;
2159 disk
->flags
= GENHD_FL_EXT_DEVT
;
2160 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
2163 * Initialize capacity to 0 until we establish the namespace format and
2164 * setup integrity extentions if necessary. The revalidate_disk after
2165 * add_disk allows the driver to register with integrity if the format
2168 set_capacity(disk
, 0);
2169 if (nvme_revalidate_disk(ns
->disk
))
2172 kref_get(&dev
->kref
);
2175 struct block_device
*bd
= bdget_disk(ns
->disk
, 0);
2178 if (blkdev_get(bd
, FMODE_READ
, NULL
)) {
2182 blkdev_reread_part(bd
);
2183 blkdev_put(bd
, FMODE_READ
);
2188 list_del(&ns
->list
);
2190 blk_cleanup_queue(ns
->queue
);
2196 * Create I/O queues. Failing to create an I/O queue is not an issue,
2197 * we can continue with less than the desired amount of queues, and
2198 * even a controller without I/O queues an still be used to issue
2199 * admin commands. This might be useful to upgrade a buggy firmware
2202 static void nvme_create_io_queues(struct nvme_dev
*dev
)
2206 for (i
= dev
->queue_count
; i
<= dev
->max_qid
; i
++)
2207 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
))
2210 for (i
= dev
->online_queues
; i
<= dev
->queue_count
- 1; i
++)
2211 if (nvme_create_queue(dev
->queues
[i
], i
)) {
2212 nvme_free_queues(dev
, i
);
2217 static int set_queue_count(struct nvme_dev
*dev
, int count
)
2221 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
2223 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
2228 dev_err(dev
->dev
, "Could not set queue count (%d)\n", status
);
2231 return min(result
& 0xffff, result
>> 16) + 1;
2234 static void __iomem
*nvme_map_cmb(struct nvme_dev
*dev
)
2236 u64 szu
, size
, offset
;
2238 resource_size_t bar_size
;
2239 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2241 dma_addr_t dma_addr
;
2246 dev
->cmbsz
= readl(&dev
->bar
->cmbsz
);
2247 if (!(NVME_CMB_SZ(dev
->cmbsz
)))
2250 cmbloc
= readl(&dev
->bar
->cmbloc
);
2252 szu
= (u64
)1 << (12 + 4 * NVME_CMB_SZU(dev
->cmbsz
));
2253 size
= szu
* NVME_CMB_SZ(dev
->cmbsz
);
2254 offset
= szu
* NVME_CMB_OFST(cmbloc
);
2255 bar_size
= pci_resource_len(pdev
, NVME_CMB_BIR(cmbloc
));
2257 if (offset
> bar_size
)
2261 * Controllers may support a CMB size larger than their BAR,
2262 * for example, due to being behind a bridge. Reduce the CMB to
2263 * the reported size of the BAR
2265 if (size
> bar_size
- offset
)
2266 size
= bar_size
- offset
;
2268 dma_addr
= pci_resource_start(pdev
, NVME_CMB_BIR(cmbloc
)) + offset
;
2269 cmb
= ioremap_wc(dma_addr
, size
);
2273 dev
->cmb_dma_addr
= dma_addr
;
2274 dev
->cmb_size
= size
;
2278 static inline void nvme_release_cmb(struct nvme_dev
*dev
)
2286 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
2288 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
2291 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
2293 struct nvme_queue
*adminq
= dev
->queues
[0];
2294 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2295 int result
, i
, vecs
, nr_io_queues
, size
;
2297 nr_io_queues
= num_possible_cpus();
2298 result
= set_queue_count(dev
, nr_io_queues
);
2301 if (result
< nr_io_queues
)
2302 nr_io_queues
= result
;
2304 if (dev
->cmb
&& NVME_CMB_SQS(dev
->cmbsz
)) {
2305 result
= nvme_cmb_qdepth(dev
, nr_io_queues
,
2306 sizeof(struct nvme_command
));
2308 dev
->q_depth
= result
;
2310 nvme_release_cmb(dev
);
2313 size
= db_bar_size(dev
, nr_io_queues
);
2317 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
2320 if (!--nr_io_queues
)
2322 size
= db_bar_size(dev
, nr_io_queues
);
2324 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2325 adminq
->q_db
= dev
->dbs
;
2328 /* Deregister the admin queue's interrupt */
2329 free_irq(dev
->entry
[0].vector
, adminq
);
2332 * If we enable msix early due to not intx, disable it again before
2333 * setting up the full range we need.
2336 pci_disable_msix(pdev
);
2338 for (i
= 0; i
< nr_io_queues
; i
++)
2339 dev
->entry
[i
].entry
= i
;
2340 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
2342 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
2346 for (i
= 0; i
< vecs
; i
++)
2347 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
2352 * Should investigate if there's a performance win from allocating
2353 * more queues than interrupt vectors; it might allow the submission
2354 * path to scale better, even if the receive path is limited by the
2355 * number of interrupts.
2357 nr_io_queues
= vecs
;
2358 dev
->max_qid
= nr_io_queues
;
2360 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
2362 adminq
->cq_vector
= -1;
2366 /* Free previously allocated queues that are no longer usable */
2367 nvme_free_queues(dev
, nr_io_queues
+ 1);
2368 nvme_create_io_queues(dev
);
2373 nvme_free_queues(dev
, 1);
2377 static int ns_cmp(void *priv
, struct list_head
*a
, struct list_head
*b
)
2379 struct nvme_ns
*nsa
= container_of(a
, struct nvme_ns
, list
);
2380 struct nvme_ns
*nsb
= container_of(b
, struct nvme_ns
, list
);
2382 return nsa
->ns_id
- nsb
->ns_id
;
2385 static struct nvme_ns
*nvme_find_ns(struct nvme_dev
*dev
, unsigned nsid
)
2389 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2390 if (ns
->ns_id
== nsid
)
2392 if (ns
->ns_id
> nsid
)
2398 static inline bool nvme_io_incapable(struct nvme_dev
*dev
)
2400 return (!dev
->bar
|| readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
||
2401 dev
->online_queues
< 2);
2404 static void nvme_ns_remove(struct nvme_ns
*ns
)
2406 bool kill
= nvme_io_incapable(ns
->dev
) && !blk_queue_dying(ns
->queue
);
2409 blk_set_queue_dying(ns
->queue
);
2410 if (ns
->disk
->flags
& GENHD_FL_UP
) {
2411 if (blk_get_integrity(ns
->disk
))
2412 blk_integrity_unregister(ns
->disk
);
2413 del_gendisk(ns
->disk
);
2415 if (kill
|| !blk_queue_dying(ns
->queue
)) {
2416 blk_mq_abort_requeue_list(ns
->queue
);
2417 blk_cleanup_queue(ns
->queue
);
2419 list_del_init(&ns
->list
);
2420 kref_put(&ns
->kref
, nvme_free_ns
);
2423 static void nvme_scan_namespaces(struct nvme_dev
*dev
, unsigned nn
)
2425 struct nvme_ns
*ns
, *next
;
2428 for (i
= 1; i
<= nn
; i
++) {
2429 ns
= nvme_find_ns(dev
, i
);
2431 if (revalidate_disk(ns
->disk
))
2434 nvme_alloc_ns(dev
, i
);
2436 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2440 list_sort(NULL
, &dev
->namespaces
, ns_cmp
);
2443 static void nvme_set_irq_hints(struct nvme_dev
*dev
)
2445 struct nvme_queue
*nvmeq
;
2448 for (i
= 0; i
< dev
->online_queues
; i
++) {
2449 nvmeq
= dev
->queues
[i
];
2451 if (!nvmeq
->tags
|| !(*nvmeq
->tags
))
2454 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
2455 blk_mq_tags_cpumask(*nvmeq
->tags
));
2459 static void nvme_dev_scan(struct work_struct
*work
)
2461 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, scan_work
);
2462 struct nvme_id_ctrl
*ctrl
;
2464 if (!dev
->tagset
.tags
)
2466 if (nvme_identify_ctrl(dev
, &ctrl
))
2468 nvme_scan_namespaces(dev
, le32_to_cpup(&ctrl
->nn
));
2470 nvme_set_irq_hints(dev
);
2474 * Return: error value if an error occurred setting up the queues or calling
2475 * Identify Device. 0 if these succeeded, even if adding some of the
2476 * namespaces failed. At the moment, these failures are silent. TBD which
2477 * failures should be reported.
2479 static int nvme_dev_add(struct nvme_dev
*dev
)
2481 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2483 struct nvme_id_ctrl
*ctrl
;
2484 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2486 res
= nvme_identify_ctrl(dev
, &ctrl
);
2488 dev_err(dev
->dev
, "Identify Controller failed (%d)\n", res
);
2492 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2493 dev
->abort_limit
= ctrl
->acl
+ 1;
2494 dev
->vwc
= ctrl
->vwc
;
2495 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2496 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2497 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2499 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2500 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2501 (pdev
->device
== 0x0953) && ctrl
->vs
[3]) {
2502 unsigned int max_hw_sectors
;
2504 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2505 max_hw_sectors
= dev
->stripe_size
>> (shift
- 9);
2506 if (dev
->max_hw_sectors
) {
2507 dev
->max_hw_sectors
= min(max_hw_sectors
,
2508 dev
->max_hw_sectors
);
2510 dev
->max_hw_sectors
= max_hw_sectors
;
2514 if (!dev
->tagset
.tags
) {
2515 dev
->tagset
.ops
= &nvme_mq_ops
;
2516 dev
->tagset
.nr_hw_queues
= dev
->online_queues
- 1;
2517 dev
->tagset
.timeout
= NVME_IO_TIMEOUT
;
2518 dev
->tagset
.numa_node
= dev_to_node(dev
->dev
);
2519 dev
->tagset
.queue_depth
=
2520 min_t(int, dev
->q_depth
, BLK_MQ_MAX_DEPTH
) - 1;
2521 dev
->tagset
.cmd_size
= nvme_cmd_size(dev
);
2522 dev
->tagset
.flags
= BLK_MQ_F_SHOULD_MERGE
;
2523 dev
->tagset
.driver_data
= dev
;
2525 if (blk_mq_alloc_tag_set(&dev
->tagset
))
2528 schedule_work(&dev
->scan_work
);
2532 static int nvme_dev_map(struct nvme_dev
*dev
)
2535 int bars
, result
= -ENOMEM
;
2536 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2538 if (pci_enable_device_mem(pdev
))
2541 dev
->entry
[0].vector
= pdev
->irq
;
2542 pci_set_master(pdev
);
2543 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2547 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2550 if (dma_set_mask_and_coherent(dev
->dev
, DMA_BIT_MASK(64)) &&
2551 dma_set_mask_and_coherent(dev
->dev
, DMA_BIT_MASK(32)))
2554 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2558 if (readl(&dev
->bar
->csts
) == -1) {
2564 * Some devices don't advertse INTx interrupts, pre-enable a single
2565 * MSIX vec for setup. We'll adjust this later.
2568 result
= pci_enable_msix(pdev
, dev
->entry
, 1);
2573 cap
= readq(&dev
->bar
->cap
);
2574 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
2575 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
2576 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2577 if (readl(&dev
->bar
->vs
) >= NVME_VS(1, 2))
2578 dev
->cmb
= nvme_map_cmb(dev
);
2586 pci_release_regions(pdev
);
2588 pci_disable_device(pdev
);
2592 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2594 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2596 if (pdev
->msi_enabled
)
2597 pci_disable_msi(pdev
);
2598 else if (pdev
->msix_enabled
)
2599 pci_disable_msix(pdev
);
2604 pci_release_regions(pdev
);
2607 if (pci_is_enabled(pdev
))
2608 pci_disable_device(pdev
);
2611 struct nvme_delq_ctx
{
2612 struct task_struct
*waiter
;
2613 struct kthread_worker
*worker
;
2617 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2619 dq
->waiter
= current
;
2623 set_current_state(TASK_KILLABLE
);
2624 if (!atomic_read(&dq
->refcount
))
2626 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2627 fatal_signal_pending(current
)) {
2629 * Disable the controller first since we can't trust it
2630 * at this point, but leave the admin queue enabled
2631 * until all queue deletion requests are flushed.
2632 * FIXME: This may take a while if there are more h/w
2633 * queues than admin tags.
2635 set_current_state(TASK_RUNNING
);
2636 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2637 nvme_clear_queue(dev
->queues
[0]);
2638 flush_kthread_worker(dq
->worker
);
2639 nvme_disable_queue(dev
, 0);
2643 set_current_state(TASK_RUNNING
);
2646 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2648 atomic_dec(&dq
->refcount
);
2650 wake_up_process(dq
->waiter
);
2653 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2655 atomic_inc(&dq
->refcount
);
2659 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2661 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2665 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2666 kthread_work_func_t fn
)
2668 struct nvme_command c
;
2670 memset(&c
, 0, sizeof(c
));
2671 c
.delete_queue
.opcode
= opcode
;
2672 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2674 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2675 return nvme_submit_admin_async_cmd(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
,
2679 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2681 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2683 nvme_del_queue_end(nvmeq
);
2686 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2688 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2689 nvme_del_cq_work_handler
);
2692 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2694 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2696 int status
= nvmeq
->cmdinfo
.status
;
2699 status
= nvme_delete_cq(nvmeq
);
2701 nvme_del_queue_end(nvmeq
);
2704 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2706 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2707 nvme_del_sq_work_handler
);
2710 static void nvme_del_queue_start(struct kthread_work
*work
)
2712 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2714 if (nvme_delete_sq(nvmeq
))
2715 nvme_del_queue_end(nvmeq
);
2718 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2721 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2722 struct nvme_delq_ctx dq
;
2723 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2724 &worker
, "nvme%d", dev
->instance
);
2726 if (IS_ERR(kworker_task
)) {
2728 "Failed to create queue del task\n");
2729 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2730 nvme_disable_queue(dev
, i
);
2735 atomic_set(&dq
.refcount
, 0);
2736 dq
.worker
= &worker
;
2737 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2738 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2740 if (nvme_suspend_queue(nvmeq
))
2742 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2743 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2744 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2745 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2747 nvme_wait_dq(&dq
, dev
);
2748 kthread_stop(kworker_task
);
2752 * Remove the node from the device list and check
2753 * for whether or not we need to stop the nvme_thread.
2755 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2757 struct task_struct
*tmp
= NULL
;
2759 spin_lock(&dev_list_lock
);
2760 list_del_init(&dev
->node
);
2761 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2765 spin_unlock(&dev_list_lock
);
2771 static void nvme_freeze_queues(struct nvme_dev
*dev
)
2775 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2776 blk_mq_freeze_queue_start(ns
->queue
);
2778 spin_lock_irq(ns
->queue
->queue_lock
);
2779 queue_flag_set(QUEUE_FLAG_STOPPED
, ns
->queue
);
2780 spin_unlock_irq(ns
->queue
->queue_lock
);
2782 blk_mq_cancel_requeue_work(ns
->queue
);
2783 blk_mq_stop_hw_queues(ns
->queue
);
2787 static void nvme_unfreeze_queues(struct nvme_dev
*dev
)
2791 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2792 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED
, ns
->queue
);
2793 blk_mq_unfreeze_queue(ns
->queue
);
2794 blk_mq_start_stopped_hw_queues(ns
->queue
, true);
2795 blk_mq_kick_requeue_list(ns
->queue
);
2799 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2804 nvme_dev_list_remove(dev
);
2807 nvme_freeze_queues(dev
);
2808 csts
= readl(&dev
->bar
->csts
);
2810 if (csts
& NVME_CSTS_CFS
|| !(csts
& NVME_CSTS_RDY
)) {
2811 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2812 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2813 nvme_suspend_queue(nvmeq
);
2816 nvme_disable_io_queues(dev
);
2817 nvme_shutdown_ctrl(dev
);
2818 nvme_disable_queue(dev
, 0);
2820 nvme_dev_unmap(dev
);
2822 for (i
= dev
->queue_count
- 1; i
>= 0; i
--)
2823 nvme_clear_queue(dev
->queues
[i
]);
2826 static void nvme_dev_remove(struct nvme_dev
*dev
)
2828 struct nvme_ns
*ns
, *next
;
2830 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
)
2834 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2836 dev
->prp_page_pool
= dma_pool_create("prp list page", dev
->dev
,
2837 PAGE_SIZE
, PAGE_SIZE
, 0);
2838 if (!dev
->prp_page_pool
)
2841 /* Optimisation for I/Os between 4k and 128k */
2842 dev
->prp_small_pool
= dma_pool_create("prp list 256", dev
->dev
,
2844 if (!dev
->prp_small_pool
) {
2845 dma_pool_destroy(dev
->prp_page_pool
);
2851 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2853 dma_pool_destroy(dev
->prp_page_pool
);
2854 dma_pool_destroy(dev
->prp_small_pool
);
2857 static DEFINE_IDA(nvme_instance_ida
);
2859 static int nvme_set_instance(struct nvme_dev
*dev
)
2861 int instance
, error
;
2864 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2867 spin_lock(&dev_list_lock
);
2868 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2869 spin_unlock(&dev_list_lock
);
2870 } while (error
== -EAGAIN
);
2875 dev
->instance
= instance
;
2879 static void nvme_release_instance(struct nvme_dev
*dev
)
2881 spin_lock(&dev_list_lock
);
2882 ida_remove(&nvme_instance_ida
, dev
->instance
);
2883 spin_unlock(&dev_list_lock
);
2886 static void nvme_free_dev(struct kref
*kref
)
2888 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2890 put_device(dev
->dev
);
2891 put_device(dev
->device
);
2892 nvme_release_instance(dev
);
2893 if (dev
->tagset
.tags
)
2894 blk_mq_free_tag_set(&dev
->tagset
);
2896 blk_put_queue(dev
->admin_q
);
2902 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2904 struct nvme_dev
*dev
;
2905 int instance
= iminor(inode
);
2908 spin_lock(&dev_list_lock
);
2909 list_for_each_entry(dev
, &dev_list
, node
) {
2910 if (dev
->instance
== instance
) {
2911 if (!dev
->admin_q
) {
2915 if (!kref_get_unless_zero(&dev
->kref
))
2917 f
->private_data
= dev
;
2922 spin_unlock(&dev_list_lock
);
2927 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2929 struct nvme_dev
*dev
= f
->private_data
;
2930 kref_put(&dev
->kref
, nvme_free_dev
);
2934 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2936 struct nvme_dev
*dev
= f
->private_data
;
2940 case NVME_IOCTL_ADMIN_CMD
:
2941 return nvme_user_cmd(dev
, NULL
, (void __user
*)arg
);
2942 case NVME_IOCTL_IO_CMD
:
2943 if (list_empty(&dev
->namespaces
))
2945 ns
= list_first_entry(&dev
->namespaces
, struct nvme_ns
, list
);
2946 return nvme_user_cmd(dev
, ns
, (void __user
*)arg
);
2947 case NVME_IOCTL_RESET
:
2948 dev_warn(dev
->dev
, "resetting controller\n");
2949 return nvme_reset(dev
);
2950 case NVME_IOCTL_SUBSYS_RESET
:
2951 return nvme_subsys_reset(dev
);
2957 static const struct file_operations nvme_dev_fops
= {
2958 .owner
= THIS_MODULE
,
2959 .open
= nvme_dev_open
,
2960 .release
= nvme_dev_release
,
2961 .unlocked_ioctl
= nvme_dev_ioctl
,
2962 .compat_ioctl
= nvme_dev_ioctl
,
2965 static void nvme_probe_work(struct work_struct
*work
)
2967 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, probe_work
);
2968 bool start_thread
= false;
2971 result
= nvme_dev_map(dev
);
2975 result
= nvme_configure_admin_queue(dev
);
2979 spin_lock(&dev_list_lock
);
2980 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
2981 start_thread
= true;
2984 list_add(&dev
->node
, &dev_list
);
2985 spin_unlock(&dev_list_lock
);
2988 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
2989 wake_up_all(&nvme_kthread_wait
);
2991 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
2993 if (IS_ERR_OR_NULL(nvme_thread
)) {
2994 result
= nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
2998 nvme_init_queue(dev
->queues
[0], 0);
2999 result
= nvme_alloc_admin_tags(dev
);
3003 result
= nvme_setup_io_queues(dev
);
3007 dev
->event_limit
= 1;
3010 * Keep the controller around but remove all namespaces if we don't have
3011 * any working I/O queue.
3013 if (dev
->online_queues
< 2) {
3014 dev_warn(dev
->dev
, "IO queues not created\n");
3015 nvme_dev_remove(dev
);
3017 nvme_unfreeze_queues(dev
);
3024 nvme_dev_remove_admin(dev
);
3025 blk_put_queue(dev
->admin_q
);
3026 dev
->admin_q
= NULL
;
3027 dev
->queues
[0]->tags
= NULL
;
3029 nvme_disable_queue(dev
, 0);
3030 nvme_dev_list_remove(dev
);
3032 nvme_dev_unmap(dev
);
3034 if (!work_busy(&dev
->reset_work
))
3035 nvme_dead_ctrl(dev
);
3038 static int nvme_remove_dead_ctrl(void *arg
)
3040 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
3041 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
3043 if (pci_get_drvdata(pdev
))
3044 pci_stop_and_remove_bus_device_locked(pdev
);
3045 kref_put(&dev
->kref
, nvme_free_dev
);
3049 static void nvme_dead_ctrl(struct nvme_dev
*dev
)
3051 dev_warn(dev
->dev
, "Device failed to resume\n");
3052 kref_get(&dev
->kref
);
3053 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
3056 "Failed to start controller remove task\n");
3057 kref_put(&dev
->kref
, nvme_free_dev
);
3061 static void nvme_reset_work(struct work_struct
*ws
)
3063 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
3064 bool in_probe
= work_busy(&dev
->probe_work
);
3066 nvme_dev_shutdown(dev
);
3068 /* Synchronize with device probe so that work will see failure status
3069 * and exit gracefully without trying to schedule another reset */
3070 flush_work(&dev
->probe_work
);
3072 /* Fail this device if reset occured during probe to avoid
3073 * infinite initialization loops. */
3075 nvme_dead_ctrl(dev
);
3078 /* Schedule device resume asynchronously so the reset work is available
3079 * to cleanup errors that may occur during reinitialization */
3080 schedule_work(&dev
->probe_work
);
3083 static int __nvme_reset(struct nvme_dev
*dev
)
3085 if (work_pending(&dev
->reset_work
))
3087 list_del_init(&dev
->node
);
3088 queue_work(nvme_workq
, &dev
->reset_work
);
3092 static int nvme_reset(struct nvme_dev
*dev
)
3096 if (!dev
->admin_q
|| blk_queue_dying(dev
->admin_q
))
3099 spin_lock(&dev_list_lock
);
3100 ret
= __nvme_reset(dev
);
3101 spin_unlock(&dev_list_lock
);
3104 flush_work(&dev
->reset_work
);
3105 flush_work(&dev
->probe_work
);
3112 static ssize_t
nvme_sysfs_reset(struct device
*dev
,
3113 struct device_attribute
*attr
, const char *buf
,
3116 struct nvme_dev
*ndev
= dev_get_drvdata(dev
);
3119 ret
= nvme_reset(ndev
);
3125 static DEVICE_ATTR(reset_controller
, S_IWUSR
, NULL
, nvme_sysfs_reset
);
3127 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
3129 int node
, result
= -ENOMEM
;
3130 struct nvme_dev
*dev
;
3132 node
= dev_to_node(&pdev
->dev
);
3133 if (node
== NUMA_NO_NODE
)
3134 set_dev_node(&pdev
->dev
, 0);
3136 dev
= kzalloc_node(sizeof(*dev
), GFP_KERNEL
, node
);
3139 dev
->entry
= kzalloc_node(num_possible_cpus() * sizeof(*dev
->entry
),
3143 dev
->queues
= kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3148 INIT_LIST_HEAD(&dev
->namespaces
);
3149 INIT_WORK(&dev
->reset_work
, nvme_reset_work
);
3150 dev
->dev
= get_device(&pdev
->dev
);
3151 pci_set_drvdata(pdev
, dev
);
3152 result
= nvme_set_instance(dev
);
3156 result
= nvme_setup_prp_pools(dev
);
3160 kref_init(&dev
->kref
);
3161 dev
->device
= device_create(nvme_class
, &pdev
->dev
,
3162 MKDEV(nvme_char_major
, dev
->instance
),
3163 dev
, "nvme%d", dev
->instance
);
3164 if (IS_ERR(dev
->device
)) {
3165 result
= PTR_ERR(dev
->device
);
3168 get_device(dev
->device
);
3169 dev_set_drvdata(dev
->device
, dev
);
3171 result
= device_create_file(dev
->device
, &dev_attr_reset_controller
);
3175 INIT_LIST_HEAD(&dev
->node
);
3176 INIT_WORK(&dev
->scan_work
, nvme_dev_scan
);
3177 INIT_WORK(&dev
->probe_work
, nvme_probe_work
);
3178 schedule_work(&dev
->probe_work
);
3182 device_destroy(nvme_class
, MKDEV(nvme_char_major
, dev
->instance
));
3183 put_device(dev
->device
);
3185 nvme_release_prp_pools(dev
);
3187 nvme_release_instance(dev
);
3189 put_device(dev
->dev
);
3197 static void nvme_reset_notify(struct pci_dev
*pdev
, bool prepare
)
3199 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3202 nvme_dev_shutdown(dev
);
3204 schedule_work(&dev
->probe_work
);
3207 static void nvme_shutdown(struct pci_dev
*pdev
)
3209 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3210 nvme_dev_shutdown(dev
);
3213 static void nvme_remove(struct pci_dev
*pdev
)
3215 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3217 spin_lock(&dev_list_lock
);
3218 list_del_init(&dev
->node
);
3219 spin_unlock(&dev_list_lock
);
3221 pci_set_drvdata(pdev
, NULL
);
3222 flush_work(&dev
->probe_work
);
3223 flush_work(&dev
->reset_work
);
3224 flush_work(&dev
->scan_work
);
3225 device_remove_file(dev
->device
, &dev_attr_reset_controller
);
3226 nvme_dev_remove(dev
);
3227 nvme_dev_shutdown(dev
);
3228 nvme_dev_remove_admin(dev
);
3229 device_destroy(nvme_class
, MKDEV(nvme_char_major
, dev
->instance
));
3230 nvme_free_queues(dev
, 0);
3231 nvme_release_cmb(dev
);
3232 nvme_release_prp_pools(dev
);
3233 kref_put(&dev
->kref
, nvme_free_dev
);
3236 /* These functions are yet to be implemented */
3237 #define nvme_error_detected NULL
3238 #define nvme_dump_registers NULL
3239 #define nvme_link_reset NULL
3240 #define nvme_slot_reset NULL
3241 #define nvme_error_resume NULL
3243 #ifdef CONFIG_PM_SLEEP
3244 static int nvme_suspend(struct device
*dev
)
3246 struct pci_dev
*pdev
= to_pci_dev(dev
);
3247 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
3249 nvme_dev_shutdown(ndev
);
3253 static int nvme_resume(struct device
*dev
)
3255 struct pci_dev
*pdev
= to_pci_dev(dev
);
3256 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
3258 schedule_work(&ndev
->probe_work
);
3263 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
3265 static const struct pci_error_handlers nvme_err_handler
= {
3266 .error_detected
= nvme_error_detected
,
3267 .mmio_enabled
= nvme_dump_registers
,
3268 .link_reset
= nvme_link_reset
,
3269 .slot_reset
= nvme_slot_reset
,
3270 .resume
= nvme_error_resume
,
3271 .reset_notify
= nvme_reset_notify
,
3274 /* Move to pci_ids.h later */
3275 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3277 static const struct pci_device_id nvme_id_table
[] = {
3278 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
3281 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
3283 static struct pci_driver nvme_driver
= {
3285 .id_table
= nvme_id_table
,
3286 .probe
= nvme_probe
,
3287 .remove
= nvme_remove
,
3288 .shutdown
= nvme_shutdown
,
3290 .pm
= &nvme_dev_pm_ops
,
3292 .err_handler
= &nvme_err_handler
,
3295 static int __init
nvme_init(void)
3299 init_waitqueue_head(&nvme_kthread_wait
);
3301 nvme_workq
= create_singlethread_workqueue("nvme");
3305 result
= register_blkdev(nvme_major
, "nvme");
3308 else if (result
> 0)
3309 nvme_major
= result
;
3311 result
= __register_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme",
3314 goto unregister_blkdev
;
3315 else if (result
> 0)
3316 nvme_char_major
= result
;
3318 nvme_class
= class_create(THIS_MODULE
, "nvme");
3319 if (IS_ERR(nvme_class
)) {
3320 result
= PTR_ERR(nvme_class
);
3321 goto unregister_chrdev
;
3324 result
= pci_register_driver(&nvme_driver
);
3330 class_destroy(nvme_class
);
3332 __unregister_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme");
3334 unregister_blkdev(nvme_major
, "nvme");
3336 destroy_workqueue(nvme_workq
);
3340 static void __exit
nvme_exit(void)
3342 pci_unregister_driver(&nvme_driver
);
3343 unregister_blkdev(nvme_major
, "nvme");
3344 destroy_workqueue(nvme_workq
);
3345 class_destroy(nvme_class
);
3346 __unregister_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme");
3347 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
3351 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3352 MODULE_LICENSE("GPL");
3353 MODULE_VERSION("1.0");
3354 module_init(nvme_init
);
3355 module_exit(nvme_exit
);