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1 /* National Semiconductor NS87560UBD Super I/O controller used in
2 * HP [BCJ]x000 workstations.
3 *
4 * This chip is a horrid piece of engineering, and National
5 * denies any knowledge of its existence. Thus no datasheet is
6 * available off www.national.com.
7 *
8 * (C) Copyright 2000 Linuxcare, Inc.
9 * (C) Copyright 2000 Linuxcare Canada, Inc.
10 * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
11 * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
12 * (C) Copyright 2001 John Marvin <jsm fc hp com>
13 * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
14 * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
15 * (C) Copyright 2006 Helge Deller <deller@gmx.de>
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * The initial version of this is by Martin Peterson. Alex deVries
23 * has spent a bit of time trying to coax it into working.
24 *
25 * Major changes to get basic interrupt infrastructure working to
26 * hopefully be able to support all SuperIO devices. Currently
27 * works with serial. -- John Marvin <jsm@fc.hp.com>
28 *
29 * Converted superio_init() to be a PCI_FIXUP_FINAL callee.
30 * -- Kyle McMartin <kyle@parisc-linux.org>
31 */
32
33
34 /* NOTES:
35 *
36 * Function 0 is an IDE controller. It is identical to a PC87415 IDE
37 * controller (and identifies itself as such).
38 *
39 * Function 1 is a "Legacy I/O" controller. Under this function is a
40 * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
41 * all the functionality in hardware, but the following is available:
42 *
43 * Two 16550A compatible serial controllers
44 * An IEEE 1284 compatible parallel port
45 * A floppy disk controller
46 *
47 * Function 2 is a USB controller.
48 *
49 * We must be incredibly careful during initialization. Since all
50 * interrupts are routed through function 1 (which is not allowed by
51 * the PCI spec), we need to program the PICs on the legacy I/O port
52 * *before* we attempt to set up IDE and USB. @#$!&
53 *
54 * According to HP, devices are only enabled by firmware if they have
55 * a physical device connected.
56 *
57 * Configuration register bits:
58 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
59 * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
60 *
61 */
62
63 #include <linux/errno.h>
64 #include <linux/init.h>
65 #include <linux/module.h>
66 #include <linux/types.h>
67 #include <linux/interrupt.h>
68 #include <linux/ioport.h>
69 #include <linux/serial.h>
70 #include <linux/pci.h>
71 #include <linux/parport.h>
72 #include <linux/parport_pc.h>
73 #include <linux/termios.h>
74 #include <linux/tty.h>
75 #include <linux/serial_core.h>
76 #include <linux/delay.h>
77
78 #include <asm/io.h>
79 #include <asm/hardware.h>
80 #include <asm/superio.h>
81
82 static struct superio_device sio_dev;
83
84
85 #undef DEBUG_SUPERIO_INIT
86
87 #ifdef DEBUG_SUPERIO_INIT
88 #define DBG_INIT(x...) printk(x)
89 #else
90 #define DBG_INIT(x...)
91 #endif
92
93 #define SUPERIO "SuperIO"
94 #define PFX SUPERIO ": "
95
96 static irqreturn_t
97 superio_interrupt(int parent_irq, void *devp, struct pt_regs *regs)
98 {
99 u8 results;
100 u8 local_irq;
101
102 /* Poll the 8259 to see if there's an interrupt. */
103 outb (OCW3_POLL,IC_PIC1+0);
104
105 results = inb(IC_PIC1+0);
106
107 /*
108 * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
109 * Bits 6-3: zero
110 * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
111 */
112 if ((results & 0x80) == 0) {
113 /* I suspect "spurious" interrupts are from unmasking an IRQ.
114 * We don't know if an interrupt was/is pending and thus
115 * just call the handler for that IRQ as if it were pending.
116 */
117 return IRQ_NONE;
118 }
119
120 /* Check to see which device is interrupting */
121 local_irq = results & 0x0f;
122
123 if (local_irq == 2 || local_irq > 7) {
124 printk(KERN_ERR PFX "slave interrupted!\n");
125 return IRQ_HANDLED;
126 }
127
128 if (local_irq == 7) {
129
130 /* Could be spurious. Check in service bits */
131
132 outb(OCW3_ISR,IC_PIC1+0);
133 results = inb(IC_PIC1+0);
134 if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
135 printk(KERN_WARNING PFX "spurious interrupt!\n");
136 return IRQ_HANDLED;
137 }
138 }
139
140 /* Call the appropriate device's interrupt */
141 __do_IRQ(local_irq, regs);
142
143 /* set EOI - forces a new interrupt if a lower priority device
144 * still needs service.
145 */
146 outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
147 return IRQ_HANDLED;
148 }
149
150 /* Initialize Super I/O device */
151 static void
152 superio_init(struct pci_dev *pcidev)
153 {
154 struct superio_device *sio = &sio_dev;
155 struct pci_dev *pdev = sio->lio_pdev;
156 u16 word;
157
158 if (sio->suckyio_irq_enabled)
159 return;
160
161 BUG_ON(!pdev);
162 BUG_ON(!sio->usb_pdev);
163
164 /* use the IRQ iosapic found for USB INT D... */
165 pdev->irq = sio->usb_pdev->irq;
166
167 /* ...then properly fixup the USB to point at suckyio PIC */
168 sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
169
170 printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
171 pci_name(pdev), pdev->irq);
172
173 pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
174 sio->sp1_base &= ~1;
175 printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);
176
177 pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
178 sio->sp2_base &= ~1;
179 printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);
180
181 pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
182 sio->pp_base &= ~1;
183 printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);
184
185 pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
186 sio->fdc_base &= ~1;
187 printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
188 pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
189 sio->acpi_base &= ~1;
190 printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);
191
192 request_region (IC_PIC1, 0x1f, "pic1");
193 request_region (IC_PIC2, 0x1f, "pic2");
194 request_region (sio->acpi_base, 0x1f, "acpi");
195
196 /* Enable the legacy I/O function */
197 pci_read_config_word (pdev, PCI_COMMAND, &word);
198 word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
199 pci_write_config_word (pdev, PCI_COMMAND, word);
200
201 pci_set_master (pdev);
202 pci_enable_device(pdev);
203
204 /*
205 * Next project is programming the onboard interrupt controllers.
206 * PDC hasn't done this for us, since it's using polled I/O.
207 *
208 * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
209 * space access. PCI is by nature a 32-bit bus and config
210 * space can be sensitive to that.
211 */
212
213 /* 0x64 - 0x67 :
214 DMA Rtg 2
215 DMA Rtg 3
216 DMA Chan Ctl
217 TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
218 */
219 pci_write_config_dword (pdev, 0x64, 0x82000000U);
220
221 /* 0x68 - 0x6b :
222 TRIGGER_2 == 0x00 all edge triggered (not used)
223 CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
224 CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
225 CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
226 */
227 pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
228
229 /* 0x6c - 0x6f :
230 CFG_IR_INTAB == 0x00
231 CFG_IR_INTCD == 0x10 USB = IRQ1
232 CFG_IR_PS2 == 0x00
233 CFG_IR_FXBUS == 0x00
234 */
235 pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
236
237 /* 0x70 - 0x73 :
238 CFG_IR_USB == 0x00 not used. USB is connected to INTD.
239 CFG_IR_ACPI == 0x00 not used.
240 DMA Priority == 0x4c88 Power on default value. NFC.
241 */
242 pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
243
244 /* PIC1 Initialization Command Word register programming */
245 outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
246 outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
247 outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
248 outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
249
250 /* PIC1 Program Operational Control Words */
251 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
252 outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
253
254 /* PIC2 Initialization Command Word register programming */
255 outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
256 outb (0x00,IC_PIC2+1); /* ICW2: N/A */
257 outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
258 outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
259
260 /* Program Operational Control Words */
261 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
262 outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
263
264 /* Write master mask reg */
265 outb (0xff,IC_PIC1+1);
266
267 /* Setup USB power regulation */
268 outb(1, sio->acpi_base + USB_REG_CR);
269 if (inb(sio->acpi_base + USB_REG_CR) & 1)
270 printk(KERN_INFO PFX "USB regulator enabled\n");
271 else
272 printk(KERN_ERR PFX "USB regulator not initialized!\n");
273
274 if (request_irq(pdev->irq, superio_interrupt, IRQF_DISABLED,
275 SUPERIO, (void *)sio)) {
276
277 printk(KERN_ERR PFX "could not get irq\n");
278 BUG();
279 return;
280 }
281
282 sio->suckyio_irq_enabled = 1;
283 }
284 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
285
286 static void superio_disable_irq(unsigned int irq)
287 {
288 u8 r8;
289
290 if ((irq < 1) || (irq == 2) || (irq > 7)) {
291 printk(KERN_ERR PFX "Illegal irq number.\n");
292 BUG();
293 return;
294 }
295
296 /* Mask interrupt */
297
298 r8 = inb(IC_PIC1+1);
299 r8 |= (1 << irq);
300 outb (r8,IC_PIC1+1);
301 }
302
303 static void superio_enable_irq(unsigned int irq)
304 {
305 u8 r8;
306
307 if ((irq < 1) || (irq == 2) || (irq > 7)) {
308 printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
309 BUG();
310 return;
311 }
312
313 /* Unmask interrupt */
314 r8 = inb(IC_PIC1+1);
315 r8 &= ~(1 << irq);
316 outb (r8,IC_PIC1+1);
317 }
318
319 static unsigned int superio_startup_irq(unsigned int irq)
320 {
321 superio_enable_irq(irq);
322 return 0;
323 }
324
325 static struct hw_interrupt_type superio_interrupt_type = {
326 .typename = SUPERIO,
327 .startup = superio_startup_irq,
328 .shutdown = superio_disable_irq,
329 .enable = superio_enable_irq,
330 .disable = superio_disable_irq,
331 .ack = no_ack_irq,
332 .end = no_end_irq,
333 };
334
335 #ifdef DEBUG_SUPERIO_INIT
336 static unsigned short expected_device[3] = {
337 PCI_DEVICE_ID_NS_87415,
338 PCI_DEVICE_ID_NS_87560_LIO,
339 PCI_DEVICE_ID_NS_87560_USB
340 };
341 #endif
342
343 int superio_fixup_irq(struct pci_dev *pcidev)
344 {
345 int local_irq, i;
346
347 #ifdef DEBUG_SUPERIO_INIT
348 int fn;
349 fn = PCI_FUNC(pcidev->devfn);
350
351 /* Verify the function number matches the expected device id. */
352 if (expected_device[fn] != pcidev->device) {
353 BUG();
354 return -1;
355 }
356 printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
357 pci_name(pcidev),
358 pcidev->vendor, pcidev->device,
359 __builtin_return_address(0));
360 #endif
361
362 for (i = 0; i < 16; i++) {
363 irq_desc[i].chip = &superio_interrupt_type;
364 }
365
366 /*
367 * We don't allocate a SuperIO irq for the legacy IO function,
368 * since it is a "bridge". Instead, we will allocate irq's for
369 * each legacy device as they are initialized.
370 */
371
372 switch(pcidev->device) {
373 case PCI_DEVICE_ID_NS_87415: /* Function 0 */
374 local_irq = IDE_IRQ;
375 break;
376 case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
377 sio_dev.lio_pdev = pcidev; /* save for superio_init() */
378 return -1;
379 case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
380 sio_dev.usb_pdev = pcidev; /* save for superio_init() */
381 local_irq = USB_IRQ;
382 break;
383 default:
384 local_irq = -1;
385 BUG();
386 break;
387 }
388
389 return local_irq;
390 }
391
392 static void __devinit superio_serial_init(void)
393 {
394 #ifdef CONFIG_SERIAL_8250
395 int retval;
396 struct uart_port serial_port;
397
398 memset(&serial_port, 0, sizeof(serial_port));
399 serial_port.iotype = UPIO_PORT;
400 serial_port.type = PORT_16550A;
401 serial_port.uartclk = 115200*16;
402 serial_port.fifosize = 16;
403 spin_lock_init(&serial_port.lock);
404
405 /* serial port #1 */
406 serial_port.iobase = sio_dev.sp1_base;
407 serial_port.irq = SP1_IRQ;
408 serial_port.line = 0;
409 retval = early_serial_setup(&serial_port);
410 if (retval < 0) {
411 printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
412 return;
413 }
414
415 /* serial port #2 */
416 serial_port.iobase = sio_dev.sp2_base;
417 serial_port.irq = SP2_IRQ;
418 serial_port.line = 1;
419 retval = early_serial_setup(&serial_port);
420 if (retval < 0)
421 printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
422 #endif /* CONFIG_SERIAL_8250 */
423 }
424
425
426 static void __devinit superio_parport_init(void)
427 {
428 #ifdef CONFIG_PARPORT_PC
429 if (!parport_pc_probe_port(sio_dev.pp_base,
430 0 /*base_hi*/,
431 PAR_IRQ,
432 PARPORT_DMA_NONE /* dma */,
433 NULL /*struct pci_dev* */) )
434
435 printk(KERN_WARNING PFX "Probing parallel port failed.\n");
436 #endif /* CONFIG_PARPORT_PC */
437 }
438
439
440 static void superio_fixup_pci(struct pci_dev *pdev)
441 {
442 u8 prog;
443
444 pdev->class |= 0x5;
445 pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
446
447 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
448 printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
449 }
450 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
451
452
453 static int __devinit
454 superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
455 {
456 struct superio_device *sio = &sio_dev;
457
458 /*
459 ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
460 ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
461 ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
462 */
463 DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
464 pci_name(dev),
465 dev->vendor, dev->device,
466 dev->subsystem_vendor, dev->subsystem_device,
467 dev->class);
468
469 BUG_ON(!sio->suckyio_irq_enabled); /* Enabled by PCI_FIXUP_FINAL */
470
471 if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
472 superio_parport_init();
473 superio_serial_init();
474 /* REVISIT XXX : superio_fdc_init() ? */
475 return 0;
476 } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
477 DBG_INIT("superio_probe: ignoring IDE 87415\n");
478 } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
479 DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
480 } else {
481 DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
482 }
483
484 /* Let appropriate other driver claim this device. */
485 return -ENODEV;
486 }
487
488 static struct pci_device_id superio_tbl[] = {
489 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
490 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
491 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
492 { 0, }
493 };
494
495 static struct pci_driver superio_driver = {
496 .name = SUPERIO,
497 .id_table = superio_tbl,
498 .probe = superio_probe,
499 };
500
501 static int __init superio_modinit(void)
502 {
503 return pci_register_driver(&superio_driver);
504 }
505
506 static void __exit superio_exit(void)
507 {
508 pci_unregister_driver(&superio_driver);
509 }
510
511 module_init(superio_modinit);
512 module_exit(superio_exit);