drivers/pci/ats.c

   1 /*
   2  * drivers/pci/ats.c
   3  *
   4  * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
   5  * Copyright (C) 2011 Advanced Micro Devices,
   6  *
   7  * PCI Express I/O Virtualization (IOV) support.
   8  *   Address Translation Service 1.0
   9  *   Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
  10  *   PASID support added by Joerg Roedel <joerg.roedel@amd.com>
  11  */
  12
  13 #include <linux/export.h>
  14 #include <linux/pci-ats.h>
  15 #include <linux/pci.h>
  16 #include <linux/slab.h>
  17
  18 #include "pci.h"
  19
  20 static void ats_alloc_one(struct pci_dev *dev)
  21 {
  22         int pos;
  23         u16 cap;
  24
  25         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
  26         if (!pos)
  27                 return;
  28
  29         dev->ats_cap = pos;
  30         pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CAP, &cap);
  31         dev->ats_qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
  32                                             PCI_ATS_MAX_QDEP;
  33 }
  34
  35 void pci_ats_init(struct pci_dev *dev)
  36 {
  37         ats_alloc_one(dev);
  38 }
  39
  40 /**
  41  * pci_enable_ats - enable the ATS capability
  42  * @dev: the PCI device
  43  * @ps: the IOMMU page shift
  44  *
  45  * Returns 0 on success, or negative on failure.
  46  */
  47 int pci_enable_ats(struct pci_dev *dev, int ps)
  48 {
  49         u16 ctrl;
  50
  51         BUG_ON(dev->ats_cap && dev->ats_enabled);
  52
  53         if (!dev->ats_cap)
  54                 return -EINVAL;
  55
  56         if (ps < PCI_ATS_MIN_STU)
  57                 return -EINVAL;
  58
  59         /*
  60          * Note that enabling ATS on a VF fails unless it's already enabled
  61          * with the same STU on the PF.
  62          */
  63         ctrl = PCI_ATS_CTRL_ENABLE;
  64         if (dev->is_virtfn) {
  65                 struct pci_dev *pdev = dev->physfn;
  66
  67                 if (pdev->ats_stu != ps)
  68                         return -EINVAL;
  69
  70                 atomic_inc(&pdev->ats_ref_cnt);  /* count enabled VFs */
  71         } else {
  72                 dev->ats_stu = ps;
  73                 ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
  74         }
  75         pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
  76
  77         dev->ats_enabled = 1;
  78         return 0;
  79 }
  80 EXPORT_SYMBOL_GPL(pci_enable_ats);
  81
  82 /**
  83  * pci_disable_ats - disable the ATS capability
  84  * @dev: the PCI device
  85  */
  86 void pci_disable_ats(struct pci_dev *dev)
  87 {
  88         u16 ctrl;
  89
  90         BUG_ON(!dev->ats_cap || !dev->ats_enabled);
  91
  92         if (atomic_read(&dev->ats_ref_cnt))
  93                 return;         /* VFs still enabled */
  94
  95         if (dev->is_virtfn) {
  96                 struct pci_dev *pdev = dev->physfn;
  97
  98                 atomic_dec(&pdev->ats_ref_cnt);
  99         }
 100
 101         pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, &ctrl);
 102         ctrl &= ~PCI_ATS_CTRL_ENABLE;
 103         pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
 104
 105         dev->ats_enabled = 0;
 106 }
 107 EXPORT_SYMBOL_GPL(pci_disable_ats);
 108
 109 void pci_restore_ats_state(struct pci_dev *dev)
 110 {
 111         u16 ctrl;
 112
 113         if (!pci_ats_enabled(dev))
 114                 return;
 115         if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS))
 116                 BUG();
 117
 118         ctrl = PCI_ATS_CTRL_ENABLE;
 119         if (!dev->is_virtfn)
 120                 ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
 121         pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
 122 }
 123 EXPORT_SYMBOL_GPL(pci_restore_ats_state);
 124
 125 /**
 126  * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
 127  * @dev: the PCI device
 128  *
 129  * Returns the queue depth on success, or negative on failure.
 130  *
 131  * The ATS spec uses 0 in the Invalidate Queue Depth field to
 132  * indicate that the function can accept 32 Invalidate Request.
 133  * But here we use the `real' values (i.e. 1~32) for the Queue
 134  * Depth; and 0 indicates the function shares the Queue with
 135  * other functions (doesn't exclusively own a Queue).
 136  */
 137 int pci_ats_queue_depth(struct pci_dev *dev)
 138 {
 139         if (dev->is_virtfn)
 140                 return 0;
 141
 142         if (dev->ats_cap)
 143                 return dev->ats_qdep;
 144
 145         return -ENODEV;
 146 }
 147 EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
 148
 149 #ifdef CONFIG_PCI_PRI
 150 /**
 151  * pci_enable_pri - Enable PRI capability
 152  * @ pdev: PCI device structure
 153  *
 154  * Returns 0 on success, negative value on error
 155  */
 156 int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
 157 {
 158         u16 control, status;
 159         u32 max_requests;
 160         int pos;
 161
 162         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
 163         if (!pos)
 164                 return -EINVAL;
 165
 166         pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
 167         pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
 168         if ((control & PCI_PRI_CTRL_ENABLE) ||
 169             !(status & PCI_PRI_STATUS_STOPPED))
 170                 return -EBUSY;
 171
 172         pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
 173         reqs = min(max_requests, reqs);
 174         pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
 175
 176         control |= PCI_PRI_CTRL_ENABLE;
 177         pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
 178
 179         return 0;
 180 }
 181 EXPORT_SYMBOL_GPL(pci_enable_pri);
 182
 183 /**
 184  * pci_disable_pri - Disable PRI capability
 185  * @pdev: PCI device structure
 186  *
 187  * Only clears the enabled-bit, regardless of its former value
 188  */
 189 void pci_disable_pri(struct pci_dev *pdev)
 190 {
 191         u16 control;
 192         int pos;
 193
 194         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
 195         if (!pos)
 196                 return;
 197
 198         pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
 199         control &= ~PCI_PRI_CTRL_ENABLE;
 200         pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
 201 }
 202 EXPORT_SYMBOL_GPL(pci_disable_pri);
 203
 204 /**
 205  * pci_reset_pri - Resets device's PRI state
 206  * @pdev: PCI device structure
 207  *
 208  * The PRI capability must be disabled before this function is called.
 209  * Returns 0 on success, negative value on error.
 210  */
 211 int pci_reset_pri(struct pci_dev *pdev)
 212 {
 213         u16 control;
 214         int pos;
 215
 216         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
 217         if (!pos)
 218                 return -EINVAL;
 219
 220         pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
 221         if (control & PCI_PRI_CTRL_ENABLE)
 222                 return -EBUSY;
 223
 224         control |= PCI_PRI_CTRL_RESET;
 225
 226         pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
 227
 228         return 0;
 229 }
 230 EXPORT_SYMBOL_GPL(pci_reset_pri);
 231 #endif /* CONFIG_PCI_PRI */
 232
 233 #ifdef CONFIG_PCI_PASID
 234 /**
 235  * pci_enable_pasid - Enable the PASID capability
 236  * @pdev: PCI device structure
 237  * @features: Features to enable
 238  *
 239  * Returns 0 on success, negative value on error. This function checks
 240  * whether the features are actually supported by the device and returns
 241  * an error if not.
 242  */
 243 int pci_enable_pasid(struct pci_dev *pdev, int features)
 244 {
 245         u16 control, supported;
 246         int pos;
 247
 248         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
 249         if (!pos)
 250                 return -EINVAL;
 251
 252         pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control);
 253         pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
 254
 255         if (control & PCI_PASID_CTRL_ENABLE)
 256                 return -EINVAL;
 257
 258         supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
 259
 260         /* User wants to enable anything unsupported? */
 261         if ((supported & features) != features)
 262                 return -EINVAL;
 263
 264         control = PCI_PASID_CTRL_ENABLE | features;
 265
 266         pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
 267
 268         return 0;
 269 }
 270 EXPORT_SYMBOL_GPL(pci_enable_pasid);
 271
 272 /**
 273  * pci_disable_pasid - Disable the PASID capability
 274  * @pdev: PCI device structure
 275  *
 276  */
 277 void pci_disable_pasid(struct pci_dev *pdev)
 278 {
 279         u16 control = 0;
 280         int pos;
 281
 282         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
 283         if (!pos)
 284                 return;
 285
 286         pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
 287 }
 288 EXPORT_SYMBOL_GPL(pci_disable_pasid);
 289
 290 /**
 291  * pci_pasid_features - Check which PASID features are supported
 292  * @pdev: PCI device structure
 293  *
 294  * Returns a negative value when no PASI capability is present.
 295  * Otherwise is returns a bitmask with supported features. Current
 296  * features reported are:
 297  * PCI_PASID_CAP_EXEC - Execute permission supported
 298  * PCI_PASID_CAP_PRIV - Privileged mode supported
 299  */
 300 int pci_pasid_features(struct pci_dev *pdev)
 301 {
 302         u16 supported;
 303         int pos;
 304
 305         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
 306         if (!pos)
 307                 return -EINVAL;
 308
 309         pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
 310
 311         supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
 312
 313         return supported;
 314 }
 315 EXPORT_SYMBOL_GPL(pci_pasid_features);
 316
 317 #define PASID_NUMBER_SHIFT      8
 318 #define PASID_NUMBER_MASK       (0x1f << PASID_NUMBER_SHIFT)
 319 /**
 320  * pci_max_pasid - Get maximum number of PASIDs supported by device
 321  * @pdev: PCI device structure
 322  *
 323  * Returns negative value when PASID capability is not present.
 324  * Otherwise it returns the numer of supported PASIDs.
 325  */
 326 int pci_max_pasids(struct pci_dev *pdev)
 327 {
 328         u16 supported;
 329         int pos;
 330
 331         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
 332         if (!pos)
 333                 return -EINVAL;
 334
 335         pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
 336
 337         supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
 338
 339         return (1 << supported);
 340 }
 341 EXPORT_SYMBOL_GPL(pci_max_pasids);
 342 #endif /* CONFIG_PCI_PASID */