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1 /*
2 * Copyright (c) Microsoft Corporation.
3 *
4 * Author:
5 * Jake Oshins <jakeo@microsoft.com>
6 *
7 * This driver acts as a paravirtual front-end for PCI Express root buses.
8 * When a PCI Express function (either an entire device or an SR-IOV
9 * Virtual Function) is being passed through to the VM, this driver exposes
10 * a new bus to the guest VM. This is modeled as a root PCI bus because
11 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
12 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
13 * until a device as been exposed using this driver.
14 *
15 * Each root PCI bus has its own PCI domain, which is called "Segment" in
16 * the PCI Firmware Specifications. Thus while each device passed through
17 * to the VM using this front-end will appear at "device 0", the domain will
18 * be unique. Typically, each bus will have one PCI function on it, though
19 * this driver does support more than one.
20 *
21 * In order to map the interrupts from the device through to the guest VM,
22 * this driver also implements an IRQ Domain, which handles interrupts (either
23 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
24 * set up, torn down, or reaffined, this driver communicates with the
25 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
26 * interrupt will be delivered to the correct virtual processor at the right
27 * vector. This driver does not support level-triggered (line-based)
28 * interrupts, and will report that the Interrupt Line register in the
29 * function's configuration space is zero.
30 *
31 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
32 * facilities. For instance, the configuration space of a function exposed
33 * by Hyper-V is mapped into a single page of memory space, and the
34 * read and write handlers for config space must be aware of this mechanism.
35 * Similarly, device setup and teardown involves messages sent to and from
36 * the PCI back-end driver in Hyper-V.
37 *
38 * This program is free software; you can redistribute it and/or modify it
39 * under the terms of the GNU General Public License version 2 as published
40 * by the Free Software Foundation.
41 *
42 * This program is distributed in the hope that it will be useful, but
43 * WITHOUT ANY WARRANTY; without even the implied warranty of
44 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
45 * NON INFRINGEMENT. See the GNU General Public License for more
46 * details.
47 *
48 */
49
50 #include <linux/kernel.h>
51 #include <linux/module.h>
52 #include <linux/pci.h>
53 #include <linux/semaphore.h>
54 #include <linux/irqdomain.h>
55 #include <asm/irqdomain.h>
56 #include <asm/apic.h>
57 #include <linux/msi.h>
58 #include <linux/hyperv.h>
59 #include <asm/mshyperv.h>
60
61 /*
62 * Protocol versions. The low word is the minor version, the high word the
63 * major version.
64 */
65
66 #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (major)))
67 #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
68 #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
69
70 enum {
71 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1),
72 PCI_PROTOCOL_VERSION_CURRENT = PCI_PROTOCOL_VERSION_1_1
73 };
74
75 #define PCI_CONFIG_MMIO_LENGTH 0x2000
76 #define CFG_PAGE_OFFSET 0x1000
77 #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
78
79 #define MAX_SUPPORTED_MSI_MESSAGES 0x400
80
81 /*
82 * Message Types
83 */
84
85 enum pci_message_type {
86 /*
87 * Version 1.1
88 */
89 PCI_MESSAGE_BASE = 0x42490000,
90 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
91 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
92 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
93 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
94 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
95 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
96 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
97 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
98 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
99 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
100 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
101 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
102 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
103 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
104 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
105 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
106 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
107 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
108 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
109 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
110 PCI_MESSAGE_MAXIMUM
111 };
112
113 /*
114 * Structures defining the virtual PCI Express protocol.
115 */
116
117 union pci_version {
118 struct {
119 u16 minor_version;
120 u16 major_version;
121 } parts;
122 u32 version;
123 } __packed;
124
125 /*
126 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
127 * which is all this driver does. This representation is the one used in
128 * Windows, which is what is expected when sending this back and forth with
129 * the Hyper-V parent partition.
130 */
131 union win_slot_encoding {
132 struct {
133 u32 func:8;
134 u32 reserved:24;
135 } bits;
136 u32 slot;
137 } __packed;
138
139 /*
140 * Pretty much as defined in the PCI Specifications.
141 */
142 struct pci_function_description {
143 u16 v_id; /* vendor ID */
144 u16 d_id; /* device ID */
145 u8 rev;
146 u8 prog_intf;
147 u8 subclass;
148 u8 base_class;
149 u32 subsystem_id;
150 union win_slot_encoding win_slot;
151 u32 ser; /* serial number */
152 } __packed;
153
154 /**
155 * struct hv_msi_desc
156 * @vector: IDT entry
157 * @delivery_mode: As defined in Intel's Programmer's
158 * Reference Manual, Volume 3, Chapter 8.
159 * @vector_count: Number of contiguous entries in the
160 * Interrupt Descriptor Table that are
161 * occupied by this Message-Signaled
162 * Interrupt. For "MSI", as first defined
163 * in PCI 2.2, this can be between 1 and
164 * 32. For "MSI-X," as first defined in PCI
165 * 3.0, this must be 1, as each MSI-X table
166 * entry would have its own descriptor.
167 * @reserved: Empty space
168 * @cpu_mask: All the target virtual processors.
169 */
170 struct hv_msi_desc {
171 u8 vector;
172 u8 delivery_mode;
173 u16 vector_count;
174 u32 reserved;
175 u64 cpu_mask;
176 } __packed;
177
178 /**
179 * struct tran_int_desc
180 * @reserved: unused, padding
181 * @vector_count: same as in hv_msi_desc
182 * @data: This is the "data payload" value that is
183 * written by the device when it generates
184 * a message-signaled interrupt, either MSI
185 * or MSI-X.
186 * @address: This is the address to which the data
187 * payload is written on interrupt
188 * generation.
189 */
190 struct tran_int_desc {
191 u16 reserved;
192 u16 vector_count;
193 u32 data;
194 u64 address;
195 } __packed;
196
197 /*
198 * A generic message format for virtual PCI.
199 * Specific message formats are defined later in the file.
200 */
201
202 struct pci_message {
203 u32 type;
204 } __packed;
205
206 struct pci_child_message {
207 struct pci_message message_type;
208 union win_slot_encoding wslot;
209 } __packed;
210
211 struct pci_incoming_message {
212 struct vmpacket_descriptor hdr;
213 struct pci_message message_type;
214 } __packed;
215
216 struct pci_response {
217 struct vmpacket_descriptor hdr;
218 s32 status; /* negative values are failures */
219 } __packed;
220
221 struct pci_packet {
222 void (*completion_func)(void *context, struct pci_response *resp,
223 int resp_packet_size);
224 void *compl_ctxt;
225
226 struct pci_message message[0];
227 };
228
229 /*
230 * Specific message types supporting the PCI protocol.
231 */
232
233 /*
234 * Version negotiation message. Sent from the guest to the host.
235 * The guest is free to try different versions until the host
236 * accepts the version.
237 *
238 * pci_version: The protocol version requested.
239 * is_last_attempt: If TRUE, this is the last version guest will request.
240 * reservedz: Reserved field, set to zero.
241 */
242
243 struct pci_version_request {
244 struct pci_message message_type;
245 enum pci_message_type protocol_version;
246 } __packed;
247
248 /*
249 * Bus D0 Entry. This is sent from the guest to the host when the virtual
250 * bus (PCI Express port) is ready for action.
251 */
252
253 struct pci_bus_d0_entry {
254 struct pci_message message_type;
255 u32 reserved;
256 u64 mmio_base;
257 } __packed;
258
259 struct pci_bus_relations {
260 struct pci_incoming_message incoming;
261 u32 device_count;
262 struct pci_function_description func[1];
263 } __packed;
264
265 struct pci_q_res_req_response {
266 struct vmpacket_descriptor hdr;
267 s32 status; /* negative values are failures */
268 u32 probed_bar[6];
269 } __packed;
270
271 struct pci_set_power {
272 struct pci_message message_type;
273 union win_slot_encoding wslot;
274 u32 power_state; /* In Windows terms */
275 u32 reserved;
276 } __packed;
277
278 struct pci_set_power_response {
279 struct vmpacket_descriptor hdr;
280 s32 status; /* negative values are failures */
281 union win_slot_encoding wslot;
282 u32 resultant_state; /* In Windows terms */
283 u32 reserved;
284 } __packed;
285
286 struct pci_resources_assigned {
287 struct pci_message message_type;
288 union win_slot_encoding wslot;
289 u8 memory_range[0x14][6]; /* not used here */
290 u32 msi_descriptors;
291 u32 reserved[4];
292 } __packed;
293
294 struct pci_create_interrupt {
295 struct pci_message message_type;
296 union win_slot_encoding wslot;
297 struct hv_msi_desc int_desc;
298 } __packed;
299
300 struct pci_create_int_response {
301 struct pci_response response;
302 u32 reserved;
303 struct tran_int_desc int_desc;
304 } __packed;
305
306 struct pci_delete_interrupt {
307 struct pci_message message_type;
308 union win_slot_encoding wslot;
309 struct tran_int_desc int_desc;
310 } __packed;
311
312 struct pci_dev_incoming {
313 struct pci_incoming_message incoming;
314 union win_slot_encoding wslot;
315 } __packed;
316
317 struct pci_eject_response {
318 struct pci_message message_type;
319 union win_slot_encoding wslot;
320 u32 status;
321 } __packed;
322
323 static int pci_ring_size = (4 * PAGE_SIZE);
324
325 /*
326 * Definitions or interrupt steering hypercall.
327 */
328 #define HV_PARTITION_ID_SELF ((u64)-1)
329 #define HVCALL_RETARGET_INTERRUPT 0x7e
330
331 struct retarget_msi_interrupt {
332 u64 partition_id; /* use "self" */
333 u64 device_id;
334 u32 source; /* 1 for MSI(-X) */
335 u32 reserved1;
336 u32 address;
337 u32 data;
338 u64 reserved2;
339 u32 vector;
340 u32 flags;
341 u64 vp_mask;
342 } __packed;
343
344 /*
345 * Driver specific state.
346 */
347
348 enum hv_pcibus_state {
349 hv_pcibus_init = 0,
350 hv_pcibus_probed,
351 hv_pcibus_installed,
352 hv_pcibus_maximum
353 };
354
355 struct hv_pcibus_device {
356 struct pci_sysdata sysdata;
357 enum hv_pcibus_state state;
358 atomic_t remove_lock;
359 struct hv_device *hdev;
360 resource_size_t low_mmio_space;
361 resource_size_t high_mmio_space;
362 struct resource *mem_config;
363 struct resource *low_mmio_res;
364 struct resource *high_mmio_res;
365 struct completion *survey_event;
366 struct completion remove_event;
367 struct pci_bus *pci_bus;
368 spinlock_t config_lock; /* Avoid two threads writing index page */
369 spinlock_t device_list_lock; /* Protect lists below */
370 void __iomem *cfg_addr;
371
372 struct semaphore enum_sem;
373 struct list_head resources_for_children;
374
375 struct list_head children;
376 struct list_head dr_list;
377 struct work_struct wrk;
378
379 struct msi_domain_info msi_info;
380 struct msi_controller msi_chip;
381 struct irq_domain *irq_domain;
382 };
383
384 /*
385 * Tracks "Device Relations" messages from the host, which must be both
386 * processed in order and deferred so that they don't run in the context
387 * of the incoming packet callback.
388 */
389 struct hv_dr_work {
390 struct work_struct wrk;
391 struct hv_pcibus_device *bus;
392 };
393
394 struct hv_dr_state {
395 struct list_head list_entry;
396 u32 device_count;
397 struct pci_function_description func[1];
398 };
399
400 enum hv_pcichild_state {
401 hv_pcichild_init = 0,
402 hv_pcichild_requirements,
403 hv_pcichild_resourced,
404 hv_pcichild_ejecting,
405 hv_pcichild_maximum
406 };
407
408 enum hv_pcidev_ref_reason {
409 hv_pcidev_ref_invalid = 0,
410 hv_pcidev_ref_initial,
411 hv_pcidev_ref_by_slot,
412 hv_pcidev_ref_packet,
413 hv_pcidev_ref_pnp,
414 hv_pcidev_ref_childlist,
415 hv_pcidev_irqdata,
416 hv_pcidev_ref_max
417 };
418
419 struct hv_pci_dev {
420 /* List protected by pci_rescan_remove_lock */
421 struct list_head list_entry;
422 atomic_t refs;
423 enum hv_pcichild_state state;
424 struct pci_function_description desc;
425 bool reported_missing;
426 struct hv_pcibus_device *hbus;
427 struct work_struct wrk;
428
429 /*
430 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
431 * read it back, for each of the BAR offsets within config space.
432 */
433 u32 probed_bar[6];
434 };
435
436 struct hv_pci_compl {
437 struct completion host_event;
438 s32 completion_status;
439 };
440
441 /**
442 * hv_pci_generic_compl() - Invoked for a completion packet
443 * @context: Set up by the sender of the packet.
444 * @resp: The response packet
445 * @resp_packet_size: Size in bytes of the packet
446 *
447 * This function is used to trigger an event and report status
448 * for any message for which the completion packet contains a
449 * status and nothing else.
450 */
451 static
452 void
453 hv_pci_generic_compl(void *context, struct pci_response *resp,
454 int resp_packet_size)
455 {
456 struct hv_pci_compl *comp_pkt = context;
457
458 if (resp_packet_size >= offsetofend(struct pci_response, status))
459 comp_pkt->completion_status = resp->status;
460 complete(&comp_pkt->host_event);
461 }
462
463 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
464 u32 wslot);
465 static void get_pcichild(struct hv_pci_dev *hv_pcidev,
466 enum hv_pcidev_ref_reason reason);
467 static void put_pcichild(struct hv_pci_dev *hv_pcidev,
468 enum hv_pcidev_ref_reason reason);
469
470 static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
471 static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
472
473 /**
474 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
475 * @devfn: The Linux representation of PCI slot
476 *
477 * Windows uses a slightly different representation of PCI slot.
478 *
479 * Return: The Windows representation
480 */
481 static u32 devfn_to_wslot(int devfn)
482 {
483 union win_slot_encoding wslot;
484
485 wslot.slot = 0;
486 wslot.bits.func = PCI_SLOT(devfn) | (PCI_FUNC(devfn) << 5);
487
488 return wslot.slot;
489 }
490
491 /**
492 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
493 * @wslot: The Windows representation of PCI slot
494 *
495 * Windows uses a slightly different representation of PCI slot.
496 *
497 * Return: The Linux representation
498 */
499 static int wslot_to_devfn(u32 wslot)
500 {
501 union win_slot_encoding slot_no;
502
503 slot_no.slot = wslot;
504 return PCI_DEVFN(0, slot_no.bits.func);
505 }
506
507 /*
508 * PCI Configuration Space for these root PCI buses is implemented as a pair
509 * of pages in memory-mapped I/O space. Writing to the first page chooses
510 * the PCI function being written or read. Once the first page has been
511 * written to, the following page maps in the entire configuration space of
512 * the function.
513 */
514
515 /**
516 * _hv_pcifront_read_config() - Internal PCI config read
517 * @hpdev: The PCI driver's representation of the device
518 * @where: Offset within config space
519 * @size: Size of the transfer
520 * @val: Pointer to the buffer receiving the data
521 */
522 static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
523 int size, u32 *val)
524 {
525 unsigned long flags;
526 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
527
528 /*
529 * If the attempt is to read the IDs or the ROM BAR, simulate that.
530 */
531 if (where + size <= PCI_COMMAND) {
532 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
533 } else if (where >= PCI_CLASS_REVISION && where + size <=
534 PCI_CACHE_LINE_SIZE) {
535 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
536 PCI_CLASS_REVISION, size);
537 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
538 PCI_ROM_ADDRESS) {
539 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
540 PCI_SUBSYSTEM_VENDOR_ID, size);
541 } else if (where >= PCI_ROM_ADDRESS && where + size <=
542 PCI_CAPABILITY_LIST) {
543 /* ROM BARs are unimplemented */
544 *val = 0;
545 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
546 PCI_INTERRUPT_PIN) {
547 /*
548 * Interrupt Line and Interrupt PIN are hard-wired to zero
549 * because this front-end only supports message-signaled
550 * interrupts.
551 */
552 *val = 0;
553 } else if (where + size <= CFG_PAGE_SIZE) {
554 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
555 /* Choose the function to be read. (See comment above) */
556 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
557 /* Make sure the function was chosen before we start reading. */
558 mb();
559 /* Read from that function's config space. */
560 switch (size) {
561 case 1:
562 *val = readb(addr);
563 break;
564 case 2:
565 *val = readw(addr);
566 break;
567 default:
568 *val = readl(addr);
569 break;
570 }
571 /*
572 * Make sure the write was done before we release the spinlock
573 * allowing consecutive reads/writes.
574 */
575 mb();
576 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
577 } else {
578 dev_err(&hpdev->hbus->hdev->device,
579 "Attempt to read beyond a function's config space.\n");
580 }
581 }
582
583 /**
584 * _hv_pcifront_write_config() - Internal PCI config write
585 * @hpdev: The PCI driver's representation of the device
586 * @where: Offset within config space
587 * @size: Size of the transfer
588 * @val: The data being transferred
589 */
590 static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
591 int size, u32 val)
592 {
593 unsigned long flags;
594 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
595
596 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
597 where + size <= PCI_CAPABILITY_LIST) {
598 /* SSIDs and ROM BARs are read-only */
599 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
600 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
601 /* Choose the function to be written. (See comment above) */
602 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
603 /* Make sure the function was chosen before we start writing. */
604 wmb();
605 /* Write to that function's config space. */
606 switch (size) {
607 case 1:
608 writeb(val, addr);
609 break;
610 case 2:
611 writew(val, addr);
612 break;
613 default:
614 writel(val, addr);
615 break;
616 }
617 /*
618 * Make sure the write was done before we release the spinlock
619 * allowing consecutive reads/writes.
620 */
621 mb();
622 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
623 } else {
624 dev_err(&hpdev->hbus->hdev->device,
625 "Attempt to write beyond a function's config space.\n");
626 }
627 }
628
629 /**
630 * hv_pcifront_read_config() - Read configuration space
631 * @bus: PCI Bus structure
632 * @devfn: Device/function
633 * @where: Offset from base
634 * @size: Byte/word/dword
635 * @val: Value to be read
636 *
637 * Return: PCIBIOS_SUCCESSFUL on success
638 * PCIBIOS_DEVICE_NOT_FOUND on failure
639 */
640 static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
641 int where, int size, u32 *val)
642 {
643 struct hv_pcibus_device *hbus =
644 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
645 struct hv_pci_dev *hpdev;
646
647 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
648 if (!hpdev)
649 return PCIBIOS_DEVICE_NOT_FOUND;
650
651 _hv_pcifront_read_config(hpdev, where, size, val);
652
653 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
654 return PCIBIOS_SUCCESSFUL;
655 }
656
657 /**
658 * hv_pcifront_write_config() - Write configuration space
659 * @bus: PCI Bus structure
660 * @devfn: Device/function
661 * @where: Offset from base
662 * @size: Byte/word/dword
663 * @val: Value to be written to device
664 *
665 * Return: PCIBIOS_SUCCESSFUL on success
666 * PCIBIOS_DEVICE_NOT_FOUND on failure
667 */
668 static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
669 int where, int size, u32 val)
670 {
671 struct hv_pcibus_device *hbus =
672 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
673 struct hv_pci_dev *hpdev;
674
675 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
676 if (!hpdev)
677 return PCIBIOS_DEVICE_NOT_FOUND;
678
679 _hv_pcifront_write_config(hpdev, where, size, val);
680
681 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
682 return PCIBIOS_SUCCESSFUL;
683 }
684
685 /* PCIe operations */
686 static struct pci_ops hv_pcifront_ops = {
687 .read = hv_pcifront_read_config,
688 .write = hv_pcifront_write_config,
689 };
690
691 /* Interrupt management hooks */
692 static void hv_int_desc_free(struct hv_pci_dev *hpdev,
693 struct tran_int_desc *int_desc)
694 {
695 struct pci_delete_interrupt *int_pkt;
696 struct {
697 struct pci_packet pkt;
698 u8 buffer[sizeof(struct pci_delete_interrupt)];
699 } ctxt;
700
701 memset(&ctxt, 0, sizeof(ctxt));
702 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
703 int_pkt->message_type.type =
704 PCI_DELETE_INTERRUPT_MESSAGE;
705 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
706 int_pkt->int_desc = *int_desc;
707 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
708 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
709 kfree(int_desc);
710 }
711
712 /**
713 * hv_msi_free() - Free the MSI.
714 * @domain: The interrupt domain pointer
715 * @info: Extra MSI-related context
716 * @irq: Identifies the IRQ.
717 *
718 * The Hyper-V parent partition and hypervisor are tracking the
719 * messages that are in use, keeping the interrupt redirection
720 * table up to date. This callback sends a message that frees
721 * the IRT entry and related tracking nonsense.
722 */
723 static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
724 unsigned int irq)
725 {
726 struct hv_pcibus_device *hbus;
727 struct hv_pci_dev *hpdev;
728 struct pci_dev *pdev;
729 struct tran_int_desc *int_desc;
730 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
731 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
732
733 pdev = msi_desc_to_pci_dev(msi);
734 hbus = info->data;
735 int_desc = irq_data_get_irq_chip_data(irq_data);
736 if (!int_desc)
737 return;
738
739 irq_data->chip_data = NULL;
740 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
741 if (!hpdev) {
742 kfree(int_desc);
743 return;
744 }
745
746 hv_int_desc_free(hpdev, int_desc);
747 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
748 }
749
750 static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
751 bool force)
752 {
753 struct irq_data *parent = data->parent_data;
754
755 return parent->chip->irq_set_affinity(parent, dest, force);
756 }
757
758 void hv_irq_mask(struct irq_data *data)
759 {
760 pci_msi_mask_irq(data);
761 }
762
763 /**
764 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
765 * affinity.
766 * @data: Describes the IRQ
767 *
768 * Build new a destination for the MSI and make a hypercall to
769 * update the Interrupt Redirection Table. "Device Logical ID"
770 * is built out of this PCI bus's instance GUID and the function
771 * number of the device.
772 */
773 void hv_irq_unmask(struct irq_data *data)
774 {
775 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
776 struct irq_cfg *cfg = irqd_cfg(data);
777 struct retarget_msi_interrupt params;
778 struct hv_pcibus_device *hbus;
779 struct cpumask *dest;
780 struct pci_bus *pbus;
781 struct pci_dev *pdev;
782 int cpu;
783
784 dest = irq_data_get_affinity_mask(data);
785 pdev = msi_desc_to_pci_dev(msi_desc);
786 pbus = pdev->bus;
787 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
788
789 memset(&params, 0, sizeof(params));
790 params.partition_id = HV_PARTITION_ID_SELF;
791 params.source = 1; /* MSI(-X) */
792 params.address = msi_desc->msg.address_lo;
793 params.data = msi_desc->msg.data;
794 params.device_id = (hbus->hdev->dev_instance.b[5] << 24) |
795 (hbus->hdev->dev_instance.b[4] << 16) |
796 (hbus->hdev->dev_instance.b[7] << 8) |
797 (hbus->hdev->dev_instance.b[6] & 0xf8) |
798 PCI_FUNC(pdev->devfn);
799 params.vector = cfg->vector;
800
801 for_each_cpu_and(cpu, dest, cpu_online_mask)
802 params.vp_mask |= (1ULL << vmbus_cpu_number_to_vp_number(cpu));
803
804 hv_do_hypercall(HVCALL_RETARGET_INTERRUPT, &params, NULL);
805
806 pci_msi_unmask_irq(data);
807 }
808
809 struct compose_comp_ctxt {
810 struct hv_pci_compl comp_pkt;
811 struct tran_int_desc int_desc;
812 };
813
814 static void hv_pci_compose_compl(void *context, struct pci_response *resp,
815 int resp_packet_size)
816 {
817 struct compose_comp_ctxt *comp_pkt = context;
818 struct pci_create_int_response *int_resp =
819 (struct pci_create_int_response *)resp;
820
821 comp_pkt->comp_pkt.completion_status = resp->status;
822 comp_pkt->int_desc = int_resp->int_desc;
823 complete(&comp_pkt->comp_pkt.host_event);
824 }
825
826 /**
827 * hv_compose_msi_msg() - Supplies a valid MSI address/data
828 * @data: Everything about this MSI
829 * @msg: Buffer that is filled in by this function
830 *
831 * This function unpacks the IRQ looking for target CPU set, IDT
832 * vector and mode and sends a message to the parent partition
833 * asking for a mapping for that tuple in this partition. The
834 * response supplies a data value and address to which that data
835 * should be written to trigger that interrupt.
836 */
837 static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
838 {
839 struct irq_cfg *cfg = irqd_cfg(data);
840 struct hv_pcibus_device *hbus;
841 struct hv_pci_dev *hpdev;
842 struct pci_bus *pbus;
843 struct pci_dev *pdev;
844 struct pci_create_interrupt *int_pkt;
845 struct compose_comp_ctxt comp;
846 struct tran_int_desc *int_desc;
847 struct cpumask *affinity;
848 struct {
849 struct pci_packet pkt;
850 u8 buffer[sizeof(struct pci_create_interrupt)];
851 } ctxt;
852 int cpu;
853 int ret;
854
855 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
856 pbus = pdev->bus;
857 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
858 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
859 if (!hpdev)
860 goto return_null_message;
861
862 /* Free any previous message that might have already been composed. */
863 if (data->chip_data) {
864 int_desc = data->chip_data;
865 data->chip_data = NULL;
866 hv_int_desc_free(hpdev, int_desc);
867 }
868
869 int_desc = kzalloc(sizeof(*int_desc), GFP_KERNEL);
870 if (!int_desc)
871 goto drop_reference;
872
873 memset(&ctxt, 0, sizeof(ctxt));
874 init_completion(&comp.comp_pkt.host_event);
875 ctxt.pkt.completion_func = hv_pci_compose_compl;
876 ctxt.pkt.compl_ctxt = &comp;
877 int_pkt = (struct pci_create_interrupt *)&ctxt.pkt.message;
878 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
879 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
880 int_pkt->int_desc.vector = cfg->vector;
881 int_pkt->int_desc.vector_count = 1;
882 int_pkt->int_desc.delivery_mode =
883 (apic->irq_delivery_mode == dest_LowestPrio) ? 1 : 0;
884
885 /*
886 * This bit doesn't have to work on machines with more than 64
887 * processors because Hyper-V only supports 64 in a guest.
888 */
889 affinity = irq_data_get_affinity_mask(data);
890 for_each_cpu_and(cpu, affinity, cpu_online_mask) {
891 int_pkt->int_desc.cpu_mask |=
892 (1ULL << vmbus_cpu_number_to_vp_number(cpu));
893 }
894
895 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt,
896 sizeof(*int_pkt), (unsigned long)&ctxt.pkt,
897 VM_PKT_DATA_INBAND,
898 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
899 if (!ret)
900 wait_for_completion(&comp.comp_pkt.host_event);
901
902 if (comp.comp_pkt.completion_status < 0) {
903 dev_err(&hbus->hdev->device,
904 "Request for interrupt failed: 0x%x",
905 comp.comp_pkt.completion_status);
906 goto free_int_desc;
907 }
908
909 /*
910 * Record the assignment so that this can be unwound later. Using
911 * irq_set_chip_data() here would be appropriate, but the lock it takes
912 * is already held.
913 */
914 *int_desc = comp.int_desc;
915 data->chip_data = int_desc;
916
917 /* Pass up the result. */
918 msg->address_hi = comp.int_desc.address >> 32;
919 msg->address_lo = comp.int_desc.address & 0xffffffff;
920 msg->data = comp.int_desc.data;
921
922 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
923 return;
924
925 free_int_desc:
926 kfree(int_desc);
927 drop_reference:
928 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
929 return_null_message:
930 msg->address_hi = 0;
931 msg->address_lo = 0;
932 msg->data = 0;
933 }
934
935 /* HW Interrupt Chip Descriptor */
936 static struct irq_chip hv_msi_irq_chip = {
937 .name = "Hyper-V PCIe MSI",
938 .irq_compose_msi_msg = hv_compose_msi_msg,
939 .irq_set_affinity = hv_set_affinity,
940 .irq_ack = irq_chip_ack_parent,
941 .irq_mask = hv_irq_mask,
942 .irq_unmask = hv_irq_unmask,
943 };
944
945 static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
946 msi_alloc_info_t *arg)
947 {
948 return arg->msi_hwirq;
949 }
950
951 static struct msi_domain_ops hv_msi_ops = {
952 .get_hwirq = hv_msi_domain_ops_get_hwirq,
953 .msi_prepare = pci_msi_prepare,
954 .set_desc = pci_msi_set_desc,
955 .msi_free = hv_msi_free,
956 };
957
958 /**
959 * hv_pcie_init_irq_domain() - Initialize IRQ domain
960 * @hbus: The root PCI bus
961 *
962 * This function creates an IRQ domain which will be used for
963 * interrupts from devices that have been passed through. These
964 * devices only support MSI and MSI-X, not line-based interrupts
965 * or simulations of line-based interrupts through PCIe's
966 * fabric-layer messages. Because interrupts are remapped, we
967 * can support multi-message MSI here.
968 *
969 * Return: '0' on success and error value on failure
970 */
971 static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
972 {
973 hbus->msi_info.chip = &hv_msi_irq_chip;
974 hbus->msi_info.ops = &hv_msi_ops;
975 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
976 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
977 MSI_FLAG_PCI_MSIX);
978 hbus->msi_info.handler = handle_edge_irq;
979 hbus->msi_info.handler_name = "edge";
980 hbus->msi_info.data = hbus;
981 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
982 &hbus->msi_info,
983 x86_vector_domain);
984 if (!hbus->irq_domain) {
985 dev_err(&hbus->hdev->device,
986 "Failed to build an MSI IRQ domain\n");
987 return -ENODEV;
988 }
989
990 return 0;
991 }
992
993 /**
994 * get_bar_size() - Get the address space consumed by a BAR
995 * @bar_val: Value that a BAR returned after -1 was written
996 * to it.
997 *
998 * This function returns the size of the BAR, rounded up to 1
999 * page. It has to be rounded up because the hypervisor's page
1000 * table entry that maps the BAR into the VM can't specify an
1001 * offset within a page. The invariant is that the hypervisor
1002 * must place any BARs of smaller than page length at the
1003 * beginning of a page.
1004 *
1005 * Return: Size in bytes of the consumed MMIO space.
1006 */
1007 static u64 get_bar_size(u64 bar_val)
1008 {
1009 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1010 PAGE_SIZE);
1011 }
1012
1013 /**
1014 * survey_child_resources() - Total all MMIO requirements
1015 * @hbus: Root PCI bus, as understood by this driver
1016 */
1017 static void survey_child_resources(struct hv_pcibus_device *hbus)
1018 {
1019 struct list_head *iter;
1020 struct hv_pci_dev *hpdev;
1021 resource_size_t bar_size = 0;
1022 unsigned long flags;
1023 struct completion *event;
1024 u64 bar_val;
1025 int i;
1026
1027 /* If nobody is waiting on the answer, don't compute it. */
1028 event = xchg(&hbus->survey_event, NULL);
1029 if (!event)
1030 return;
1031
1032 /* If the answer has already been computed, go with it. */
1033 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1034 complete(event);
1035 return;
1036 }
1037
1038 spin_lock_irqsave(&hbus->device_list_lock, flags);
1039
1040 /*
1041 * Due to an interesting quirk of the PCI spec, all memory regions
1042 * for a child device are a power of 2 in size and aligned in memory,
1043 * so it's sufficient to just add them up without tracking alignment.
1044 */
1045 list_for_each(iter, &hbus->children) {
1046 hpdev = container_of(iter, struct hv_pci_dev, list_entry);
1047 for (i = 0; i < 6; i++) {
1048 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1049 dev_err(&hbus->hdev->device,
1050 "There's an I/O BAR in this list!\n");
1051
1052 if (hpdev->probed_bar[i] != 0) {
1053 /*
1054 * A probed BAR has all the upper bits set that
1055 * can be changed.
1056 */
1057
1058 bar_val = hpdev->probed_bar[i];
1059 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1060 bar_val |=
1061 ((u64)hpdev->probed_bar[++i] << 32);
1062 else
1063 bar_val |= 0xffffffff00000000ULL;
1064
1065 bar_size = get_bar_size(bar_val);
1066
1067 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1068 hbus->high_mmio_space += bar_size;
1069 else
1070 hbus->low_mmio_space += bar_size;
1071 }
1072 }
1073 }
1074
1075 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1076 complete(event);
1077 }
1078
1079 /**
1080 * prepopulate_bars() - Fill in BARs with defaults
1081 * @hbus: Root PCI bus, as understood by this driver
1082 *
1083 * The core PCI driver code seems much, much happier if the BARs
1084 * for a device have values upon first scan. So fill them in.
1085 * The algorithm below works down from large sizes to small,
1086 * attempting to pack the assignments optimally. The assumption,
1087 * enforced in other parts of the code, is that the beginning of
1088 * the memory-mapped I/O space will be aligned on the largest
1089 * BAR size.
1090 */
1091 static void prepopulate_bars(struct hv_pcibus_device *hbus)
1092 {
1093 resource_size_t high_size = 0;
1094 resource_size_t low_size = 0;
1095 resource_size_t high_base = 0;
1096 resource_size_t low_base = 0;
1097 resource_size_t bar_size;
1098 struct hv_pci_dev *hpdev;
1099 struct list_head *iter;
1100 unsigned long flags;
1101 u64 bar_val;
1102 u32 command;
1103 bool high;
1104 int i;
1105
1106 if (hbus->low_mmio_space) {
1107 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1108 low_base = hbus->low_mmio_res->start;
1109 }
1110
1111 if (hbus->high_mmio_space) {
1112 high_size = 1ULL <<
1113 (63 - __builtin_clzll(hbus->high_mmio_space));
1114 high_base = hbus->high_mmio_res->start;
1115 }
1116
1117 spin_lock_irqsave(&hbus->device_list_lock, flags);
1118
1119 /* Pick addresses for the BARs. */
1120 do {
1121 list_for_each(iter, &hbus->children) {
1122 hpdev = container_of(iter, struct hv_pci_dev,
1123 list_entry);
1124 for (i = 0; i < 6; i++) {
1125 bar_val = hpdev->probed_bar[i];
1126 if (bar_val == 0)
1127 continue;
1128 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1129 if (high) {
1130 bar_val |=
1131 ((u64)hpdev->probed_bar[i + 1]
1132 << 32);
1133 } else {
1134 bar_val |= 0xffffffffULL << 32;
1135 }
1136 bar_size = get_bar_size(bar_val);
1137 if (high) {
1138 if (high_size != bar_size) {
1139 i++;
1140 continue;
1141 }
1142 _hv_pcifront_write_config(hpdev,
1143 PCI_BASE_ADDRESS_0 + (4 * i),
1144 4,
1145 (u32)(high_base & 0xffffff00));
1146 i++;
1147 _hv_pcifront_write_config(hpdev,
1148 PCI_BASE_ADDRESS_0 + (4 * i),
1149 4, (u32)(high_base >> 32));
1150 high_base += bar_size;
1151 } else {
1152 if (low_size != bar_size)
1153 continue;
1154 _hv_pcifront_write_config(hpdev,
1155 PCI_BASE_ADDRESS_0 + (4 * i),
1156 4,
1157 (u32)(low_base & 0xffffff00));
1158 low_base += bar_size;
1159 }
1160 }
1161 if (high_size <= 1 && low_size <= 1) {
1162 /* Set the memory enable bit. */
1163 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1164 &command);
1165 command |= PCI_COMMAND_MEMORY;
1166 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1167 command);
1168 break;
1169 }
1170 }
1171
1172 high_size >>= 1;
1173 low_size >>= 1;
1174 } while (high_size || low_size);
1175
1176 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1177 }
1178
1179 /**
1180 * create_root_hv_pci_bus() - Expose a new root PCI bus
1181 * @hbus: Root PCI bus, as understood by this driver
1182 *
1183 * Return: 0 on success, -errno on failure
1184 */
1185 static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1186 {
1187 /* Register the device */
1188 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1189 0, /* bus number is always zero */
1190 &hv_pcifront_ops,
1191 &hbus->sysdata,
1192 &hbus->resources_for_children);
1193 if (!hbus->pci_bus)
1194 return -ENODEV;
1195
1196 hbus->pci_bus->msi = &hbus->msi_chip;
1197 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1198
1199 pci_scan_child_bus(hbus->pci_bus);
1200 pci_bus_assign_resources(hbus->pci_bus);
1201 pci_bus_add_devices(hbus->pci_bus);
1202 hbus->state = hv_pcibus_installed;
1203 return 0;
1204 }
1205
1206 struct q_res_req_compl {
1207 struct completion host_event;
1208 struct hv_pci_dev *hpdev;
1209 };
1210
1211 /**
1212 * q_resource_requirements() - Query Resource Requirements
1213 * @context: The completion context.
1214 * @resp: The response that came from the host.
1215 * @resp_packet_size: The size in bytes of resp.
1216 *
1217 * This function is invoked on completion of a Query Resource
1218 * Requirements packet.
1219 */
1220 static void q_resource_requirements(void *context, struct pci_response *resp,
1221 int resp_packet_size)
1222 {
1223 struct q_res_req_compl *completion = context;
1224 struct pci_q_res_req_response *q_res_req =
1225 (struct pci_q_res_req_response *)resp;
1226 int i;
1227
1228 if (resp->status < 0) {
1229 dev_err(&completion->hpdev->hbus->hdev->device,
1230 "query resource requirements failed: %x\n",
1231 resp->status);
1232 } else {
1233 for (i = 0; i < 6; i++) {
1234 completion->hpdev->probed_bar[i] =
1235 q_res_req->probed_bar[i];
1236 }
1237 }
1238
1239 complete(&completion->host_event);
1240 }
1241
1242 static void get_pcichild(struct hv_pci_dev *hpdev,
1243 enum hv_pcidev_ref_reason reason)
1244 {
1245 atomic_inc(&hpdev->refs);
1246 }
1247
1248 static void put_pcichild(struct hv_pci_dev *hpdev,
1249 enum hv_pcidev_ref_reason reason)
1250 {
1251 if (atomic_dec_and_test(&hpdev->refs))
1252 kfree(hpdev);
1253 }
1254
1255 /**
1256 * new_pcichild_device() - Create a new child device
1257 * @hbus: The internal struct tracking this root PCI bus.
1258 * @desc: The information supplied so far from the host
1259 * about the device.
1260 *
1261 * This function creates the tracking structure for a new child
1262 * device and kicks off the process of figuring out what it is.
1263 *
1264 * Return: Pointer to the new tracking struct
1265 */
1266 static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1267 struct pci_function_description *desc)
1268 {
1269 struct hv_pci_dev *hpdev;
1270 struct pci_child_message *res_req;
1271 struct q_res_req_compl comp_pkt;
1272 union {
1273 struct pci_packet init_packet;
1274 u8 buffer[0x100];
1275 } pkt;
1276 unsigned long flags;
1277 int ret;
1278
1279 hpdev = kzalloc(sizeof(*hpdev), GFP_ATOMIC);
1280 if (!hpdev)
1281 return NULL;
1282
1283 hpdev->hbus = hbus;
1284
1285 memset(&pkt, 0, sizeof(pkt));
1286 init_completion(&comp_pkt.host_event);
1287 comp_pkt.hpdev = hpdev;
1288 pkt.init_packet.compl_ctxt = &comp_pkt;
1289 pkt.init_packet.completion_func = q_resource_requirements;
1290 res_req = (struct pci_child_message *)&pkt.init_packet.message;
1291 res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1292 res_req->wslot.slot = desc->win_slot.slot;
1293
1294 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1295 sizeof(struct pci_child_message),
1296 (unsigned long)&pkt.init_packet,
1297 VM_PKT_DATA_INBAND,
1298 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1299 if (ret)
1300 goto error;
1301
1302 wait_for_completion(&comp_pkt.host_event);
1303
1304 hpdev->desc = *desc;
1305 get_pcichild(hpdev, hv_pcidev_ref_initial);
1306 get_pcichild(hpdev, hv_pcidev_ref_childlist);
1307 spin_lock_irqsave(&hbus->device_list_lock, flags);
1308 list_add_tail(&hpdev->list_entry, &hbus->children);
1309 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1310 return hpdev;
1311
1312 error:
1313 kfree(hpdev);
1314 return NULL;
1315 }
1316
1317 /**
1318 * get_pcichild_wslot() - Find device from slot
1319 * @hbus: Root PCI bus, as understood by this driver
1320 * @wslot: Location on the bus
1321 *
1322 * This function looks up a PCI device and returns the internal
1323 * representation of it. It acquires a reference on it, so that
1324 * the device won't be deleted while somebody is using it. The
1325 * caller is responsible for calling put_pcichild() to release
1326 * this reference.
1327 *
1328 * Return: Internal representation of a PCI device
1329 */
1330 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1331 u32 wslot)
1332 {
1333 unsigned long flags;
1334 struct hv_pci_dev *iter, *hpdev = NULL;
1335
1336 spin_lock_irqsave(&hbus->device_list_lock, flags);
1337 list_for_each_entry(iter, &hbus->children, list_entry) {
1338 if (iter->desc.win_slot.slot == wslot) {
1339 hpdev = iter;
1340 get_pcichild(hpdev, hv_pcidev_ref_by_slot);
1341 break;
1342 }
1343 }
1344 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1345
1346 return hpdev;
1347 }
1348
1349 /**
1350 * pci_devices_present_work() - Handle new list of child devices
1351 * @work: Work struct embedded in struct hv_dr_work
1352 *
1353 * "Bus Relations" is the Windows term for "children of this
1354 * bus." The terminology is preserved here for people trying to
1355 * debug the interaction between Hyper-V and Linux. This
1356 * function is called when the parent partition reports a list
1357 * of functions that should be observed under this PCI Express
1358 * port (bus).
1359 *
1360 * This function updates the list, and must tolerate being
1361 * called multiple times with the same information. The typical
1362 * number of child devices is one, with very atypical cases
1363 * involving three or four, so the algorithms used here can be
1364 * simple and inefficient.
1365 *
1366 * It must also treat the omission of a previously observed device as
1367 * notification that the device no longer exists.
1368 *
1369 * Note that this function is a work item, and it may not be
1370 * invoked in the order that it was queued. Back to back
1371 * updates of the list of present devices may involve queuing
1372 * multiple work items, and this one may run before ones that
1373 * were sent later. As such, this function only does something
1374 * if is the last one in the queue.
1375 */
1376 static void pci_devices_present_work(struct work_struct *work)
1377 {
1378 u32 child_no;
1379 bool found;
1380 struct list_head *iter;
1381 struct pci_function_description *new_desc;
1382 struct hv_pci_dev *hpdev;
1383 struct hv_pcibus_device *hbus;
1384 struct list_head removed;
1385 struct hv_dr_work *dr_wrk;
1386 struct hv_dr_state *dr = NULL;
1387 unsigned long flags;
1388
1389 dr_wrk = container_of(work, struct hv_dr_work, wrk);
1390 hbus = dr_wrk->bus;
1391 kfree(dr_wrk);
1392
1393 INIT_LIST_HEAD(&removed);
1394
1395 if (down_interruptible(&hbus->enum_sem)) {
1396 put_hvpcibus(hbus);
1397 return;
1398 }
1399
1400 /* Pull this off the queue and process it if it was the last one. */
1401 spin_lock_irqsave(&hbus->device_list_lock, flags);
1402 while (!list_empty(&hbus->dr_list)) {
1403 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
1404 list_entry);
1405 list_del(&dr->list_entry);
1406
1407 /* Throw this away if the list still has stuff in it. */
1408 if (!list_empty(&hbus->dr_list)) {
1409 kfree(dr);
1410 continue;
1411 }
1412 }
1413 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1414
1415 if (!dr) {
1416 up(&hbus->enum_sem);
1417 put_hvpcibus(hbus);
1418 return;
1419 }
1420
1421 /* First, mark all existing children as reported missing. */
1422 spin_lock_irqsave(&hbus->device_list_lock, flags);
1423 list_for_each(iter, &hbus->children) {
1424 hpdev = container_of(iter, struct hv_pci_dev,
1425 list_entry);
1426 hpdev->reported_missing = true;
1427 }
1428 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1429
1430 /* Next, add back any reported devices. */
1431 for (child_no = 0; child_no < dr->device_count; child_no++) {
1432 found = false;
1433 new_desc = &dr->func[child_no];
1434
1435 spin_lock_irqsave(&hbus->device_list_lock, flags);
1436 list_for_each(iter, &hbus->children) {
1437 hpdev = container_of(iter, struct hv_pci_dev,
1438 list_entry);
1439 if ((hpdev->desc.win_slot.slot ==
1440 new_desc->win_slot.slot) &&
1441 (hpdev->desc.v_id == new_desc->v_id) &&
1442 (hpdev->desc.d_id == new_desc->d_id) &&
1443 (hpdev->desc.ser == new_desc->ser)) {
1444 hpdev->reported_missing = false;
1445 found = true;
1446 }
1447 }
1448 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1449
1450 if (!found) {
1451 hpdev = new_pcichild_device(hbus, new_desc);
1452 if (!hpdev)
1453 dev_err(&hbus->hdev->device,
1454 "couldn't record a child device.\n");
1455 }
1456 }
1457
1458 /* Move missing children to a list on the stack. */
1459 spin_lock_irqsave(&hbus->device_list_lock, flags);
1460 do {
1461 found = false;
1462 list_for_each(iter, &hbus->children) {
1463 hpdev = container_of(iter, struct hv_pci_dev,
1464 list_entry);
1465 if (hpdev->reported_missing) {
1466 found = true;
1467 put_pcichild(hpdev, hv_pcidev_ref_childlist);
1468 list_move_tail(&hpdev->list_entry, &removed);
1469 break;
1470 }
1471 }
1472 } while (found);
1473 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1474
1475 /* Delete everything that should no longer exist. */
1476 while (!list_empty(&removed)) {
1477 hpdev = list_first_entry(&removed, struct hv_pci_dev,
1478 list_entry);
1479 list_del(&hpdev->list_entry);
1480 put_pcichild(hpdev, hv_pcidev_ref_initial);
1481 }
1482
1483 /* Tell the core to rescan bus because there may have been changes. */
1484 if (hbus->state == hv_pcibus_installed) {
1485 pci_lock_rescan_remove();
1486 pci_scan_child_bus(hbus->pci_bus);
1487 pci_unlock_rescan_remove();
1488 } else {
1489 survey_child_resources(hbus);
1490 }
1491
1492 up(&hbus->enum_sem);
1493 put_hvpcibus(hbus);
1494 kfree(dr);
1495 }
1496
1497 /**
1498 * hv_pci_devices_present() - Handles list of new children
1499 * @hbus: Root PCI bus, as understood by this driver
1500 * @relations: Packet from host listing children
1501 *
1502 * This function is invoked whenever a new list of devices for
1503 * this bus appears.
1504 */
1505 static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
1506 struct pci_bus_relations *relations)
1507 {
1508 struct hv_dr_state *dr;
1509 struct hv_dr_work *dr_wrk;
1510 unsigned long flags;
1511
1512 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
1513 if (!dr_wrk)
1514 return;
1515
1516 dr = kzalloc(offsetof(struct hv_dr_state, func) +
1517 (sizeof(struct pci_function_description) *
1518 (relations->device_count)), GFP_NOWAIT);
1519 if (!dr) {
1520 kfree(dr_wrk);
1521 return;
1522 }
1523
1524 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
1525 dr_wrk->bus = hbus;
1526 dr->device_count = relations->device_count;
1527 if (dr->device_count != 0) {
1528 memcpy(dr->func, relations->func,
1529 sizeof(struct pci_function_description) *
1530 dr->device_count);
1531 }
1532
1533 spin_lock_irqsave(&hbus->device_list_lock, flags);
1534 list_add_tail(&dr->list_entry, &hbus->dr_list);
1535 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1536
1537 get_hvpcibus(hbus);
1538 schedule_work(&dr_wrk->wrk);
1539 }
1540
1541 /**
1542 * hv_eject_device_work() - Asynchronously handles ejection
1543 * @work: Work struct embedded in internal device struct
1544 *
1545 * This function handles ejecting a device. Windows will
1546 * attempt to gracefully eject a device, waiting 60 seconds to
1547 * hear back from the guest OS that this completed successfully.
1548 * If this timer expires, the device will be forcibly removed.
1549 */
1550 static void hv_eject_device_work(struct work_struct *work)
1551 {
1552 struct pci_eject_response *ejct_pkt;
1553 struct hv_pci_dev *hpdev;
1554 struct pci_dev *pdev;
1555 unsigned long flags;
1556 int wslot;
1557 struct {
1558 struct pci_packet pkt;
1559 u8 buffer[sizeof(struct pci_eject_response)];
1560 } ctxt;
1561
1562 hpdev = container_of(work, struct hv_pci_dev, wrk);
1563
1564 if (hpdev->state != hv_pcichild_ejecting) {
1565 put_pcichild(hpdev, hv_pcidev_ref_pnp);
1566 return;
1567 }
1568
1569 /*
1570 * Ejection can come before or after the PCI bus has been set up, so
1571 * attempt to find it and tear down the bus state, if it exists. This
1572 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
1573 * because hbus->pci_bus may not exist yet.
1574 */
1575 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
1576 pdev = pci_get_domain_bus_and_slot(hpdev->hbus->sysdata.domain, 0,
1577 wslot);
1578 if (pdev) {
1579 pci_stop_and_remove_bus_device(pdev);
1580 pci_dev_put(pdev);
1581 }
1582
1583 memset(&ctxt, 0, sizeof(ctxt));
1584 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
1585 ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
1586 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1587 vmbus_sendpacket(hpdev->hbus->hdev->channel, ejct_pkt,
1588 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
1589 VM_PKT_DATA_INBAND, 0);
1590
1591 spin_lock_irqsave(&hpdev->hbus->device_list_lock, flags);
1592 list_del(&hpdev->list_entry);
1593 spin_unlock_irqrestore(&hpdev->hbus->device_list_lock, flags);
1594
1595 put_pcichild(hpdev, hv_pcidev_ref_childlist);
1596 put_pcichild(hpdev, hv_pcidev_ref_pnp);
1597 put_hvpcibus(hpdev->hbus);
1598 }
1599
1600 /**
1601 * hv_pci_eject_device() - Handles device ejection
1602 * @hpdev: Internal device tracking struct
1603 *
1604 * This function is invoked when an ejection packet arrives. It
1605 * just schedules work so that we don't re-enter the packet
1606 * delivery code handling the ejection.
1607 */
1608 static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
1609 {
1610 hpdev->state = hv_pcichild_ejecting;
1611 get_pcichild(hpdev, hv_pcidev_ref_pnp);
1612 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
1613 get_hvpcibus(hpdev->hbus);
1614 schedule_work(&hpdev->wrk);
1615 }
1616
1617 /**
1618 * hv_pci_onchannelcallback() - Handles incoming packets
1619 * @context: Internal bus tracking struct
1620 *
1621 * This function is invoked whenever the host sends a packet to
1622 * this channel (which is private to this root PCI bus).
1623 */
1624 static void hv_pci_onchannelcallback(void *context)
1625 {
1626 const int packet_size = 0x100;
1627 int ret;
1628 struct hv_pcibus_device *hbus = context;
1629 u32 bytes_recvd;
1630 u64 req_id;
1631 struct vmpacket_descriptor *desc;
1632 unsigned char *buffer;
1633 int bufferlen = packet_size;
1634 struct pci_packet *comp_packet;
1635 struct pci_response *response;
1636 struct pci_incoming_message *new_message;
1637 struct pci_bus_relations *bus_rel;
1638 struct pci_dev_incoming *dev_message;
1639 struct hv_pci_dev *hpdev;
1640
1641 buffer = kmalloc(bufferlen, GFP_ATOMIC);
1642 if (!buffer)
1643 return;
1644
1645 while (1) {
1646 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
1647 bufferlen, &bytes_recvd, &req_id);
1648
1649 if (ret == -ENOBUFS) {
1650 kfree(buffer);
1651 /* Handle large packet */
1652 bufferlen = bytes_recvd;
1653 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
1654 if (!buffer)
1655 return;
1656 continue;
1657 }
1658
1659 /* Zero length indicates there are no more packets. */
1660 if (ret || !bytes_recvd)
1661 break;
1662
1663 /*
1664 * All incoming packets must be at least as large as a
1665 * response.
1666 */
1667 if (bytes_recvd <= sizeof(struct pci_response))
1668 continue;
1669 desc = (struct vmpacket_descriptor *)buffer;
1670
1671 switch (desc->type) {
1672 case VM_PKT_COMP:
1673
1674 /*
1675 * The host is trusted, and thus it's safe to interpret
1676 * this transaction ID as a pointer.
1677 */
1678 comp_packet = (struct pci_packet *)req_id;
1679 response = (struct pci_response *)buffer;
1680 comp_packet->completion_func(comp_packet->compl_ctxt,
1681 response,
1682 bytes_recvd);
1683 break;
1684
1685 case VM_PKT_DATA_INBAND:
1686
1687 new_message = (struct pci_incoming_message *)buffer;
1688 switch (new_message->message_type.type) {
1689 case PCI_BUS_RELATIONS:
1690
1691 bus_rel = (struct pci_bus_relations *)buffer;
1692 if (bytes_recvd <
1693 offsetof(struct pci_bus_relations, func) +
1694 (sizeof(struct pci_function_description) *
1695 (bus_rel->device_count))) {
1696 dev_err(&hbus->hdev->device,
1697 "bus relations too small\n");
1698 break;
1699 }
1700
1701 hv_pci_devices_present(hbus, bus_rel);
1702 break;
1703
1704 case PCI_EJECT:
1705
1706 dev_message = (struct pci_dev_incoming *)buffer;
1707 hpdev = get_pcichild_wslot(hbus,
1708 dev_message->wslot.slot);
1709 if (hpdev) {
1710 hv_pci_eject_device(hpdev);
1711 put_pcichild(hpdev,
1712 hv_pcidev_ref_by_slot);
1713 }
1714 break;
1715
1716 default:
1717 dev_warn(&hbus->hdev->device,
1718 "Unimplemented protocol message %x\n",
1719 new_message->message_type.type);
1720 break;
1721 }
1722 break;
1723
1724 default:
1725 dev_err(&hbus->hdev->device,
1726 "unhandled packet type %d, tid %llx len %d\n",
1727 desc->type, req_id, bytes_recvd);
1728 break;
1729 }
1730 }
1731
1732 kfree(buffer);
1733 }
1734
1735 /**
1736 * hv_pci_protocol_negotiation() - Set up protocol
1737 * @hdev: VMBus's tracking struct for this root PCI bus
1738 *
1739 * This driver is intended to support running on Windows 10
1740 * (server) and later versions. It will not run on earlier
1741 * versions, as they assume that many of the operations which
1742 * Linux needs accomplished with a spinlock held were done via
1743 * asynchronous messaging via VMBus. Windows 10 increases the
1744 * surface area of PCI emulation so that these actions can take
1745 * place by suspending a virtual processor for their duration.
1746 *
1747 * This function negotiates the channel protocol version,
1748 * failing if the host doesn't support the necessary protocol
1749 * level.
1750 */
1751 static int hv_pci_protocol_negotiation(struct hv_device *hdev)
1752 {
1753 struct pci_version_request *version_req;
1754 struct hv_pci_compl comp_pkt;
1755 struct pci_packet *pkt;
1756 int ret;
1757
1758 /*
1759 * Initiate the handshake with the host and negotiate
1760 * a version that the host can support. We start with the
1761 * highest version number and go down if the host cannot
1762 * support it.
1763 */
1764 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
1765 if (!pkt)
1766 return -ENOMEM;
1767
1768 init_completion(&comp_pkt.host_event);
1769 pkt->completion_func = hv_pci_generic_compl;
1770 pkt->compl_ctxt = &comp_pkt;
1771 version_req = (struct pci_version_request *)&pkt->message;
1772 version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
1773 version_req->protocol_version = PCI_PROTOCOL_VERSION_CURRENT;
1774
1775 ret = vmbus_sendpacket(hdev->channel, version_req,
1776 sizeof(struct pci_version_request),
1777 (unsigned long)pkt, VM_PKT_DATA_INBAND,
1778 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1779 if (ret)
1780 goto exit;
1781
1782 wait_for_completion(&comp_pkt.host_event);
1783
1784 if (comp_pkt.completion_status < 0) {
1785 dev_err(&hdev->device,
1786 "PCI Pass-through VSP failed version request %x\n",
1787 comp_pkt.completion_status);
1788 ret = -EPROTO;
1789 goto exit;
1790 }
1791
1792 ret = 0;
1793
1794 exit:
1795 kfree(pkt);
1796 return ret;
1797 }
1798
1799 /**
1800 * hv_pci_free_bridge_windows() - Release memory regions for the
1801 * bus
1802 * @hbus: Root PCI bus, as understood by this driver
1803 */
1804 static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
1805 {
1806 /*
1807 * Set the resources back to the way they looked when they
1808 * were allocated by setting IORESOURCE_BUSY again.
1809 */
1810
1811 if (hbus->low_mmio_space && hbus->low_mmio_res) {
1812 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
1813 vmbus_free_mmio(hbus->low_mmio_res->start,
1814 resource_size(hbus->low_mmio_res));
1815 }
1816
1817 if (hbus->high_mmio_space && hbus->high_mmio_res) {
1818 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
1819 vmbus_free_mmio(hbus->high_mmio_res->start,
1820 resource_size(hbus->high_mmio_res));
1821 }
1822 }
1823
1824 /**
1825 * hv_pci_allocate_bridge_windows() - Allocate memory regions
1826 * for the bus
1827 * @hbus: Root PCI bus, as understood by this driver
1828 *
1829 * This function calls vmbus_allocate_mmio(), which is itself a
1830 * bit of a compromise. Ideally, we might change the pnp layer
1831 * in the kernel such that it comprehends either PCI devices
1832 * which are "grandchildren of ACPI," with some intermediate bus
1833 * node (in this case, VMBus) or change it such that it
1834 * understands VMBus. The pnp layer, however, has been declared
1835 * deprecated, and not subject to change.
1836 *
1837 * The workaround, implemented here, is to ask VMBus to allocate
1838 * MMIO space for this bus. VMBus itself knows which ranges are
1839 * appropriate by looking at its own ACPI objects. Then, after
1840 * these ranges are claimed, they're modified to look like they
1841 * would have looked if the ACPI and pnp code had allocated
1842 * bridge windows. These descriptors have to exist in this form
1843 * in order to satisfy the code which will get invoked when the
1844 * endpoint PCI function driver calls request_mem_region() or
1845 * request_mem_region_exclusive().
1846 *
1847 * Return: 0 on success, -errno on failure
1848 */
1849 static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
1850 {
1851 resource_size_t align;
1852 int ret;
1853
1854 if (hbus->low_mmio_space) {
1855 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1856 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
1857 (u64)(u32)0xffffffff,
1858 hbus->low_mmio_space,
1859 align, false);
1860 if (ret) {
1861 dev_err(&hbus->hdev->device,
1862 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
1863 hbus->low_mmio_space);
1864 return ret;
1865 }
1866
1867 /* Modify this resource to become a bridge window. */
1868 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
1869 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
1870 pci_add_resource(&hbus->resources_for_children,
1871 hbus->low_mmio_res);
1872 }
1873
1874 if (hbus->high_mmio_space) {
1875 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
1876 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
1877 0x100000000, -1,
1878 hbus->high_mmio_space, align,
1879 false);
1880 if (ret) {
1881 dev_err(&hbus->hdev->device,
1882 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
1883 hbus->high_mmio_space);
1884 goto release_low_mmio;
1885 }
1886
1887 /* Modify this resource to become a bridge window. */
1888 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
1889 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
1890 pci_add_resource(&hbus->resources_for_children,
1891 hbus->high_mmio_res);
1892 }
1893
1894 return 0;
1895
1896 release_low_mmio:
1897 if (hbus->low_mmio_res) {
1898 vmbus_free_mmio(hbus->low_mmio_res->start,
1899 resource_size(hbus->low_mmio_res));
1900 }
1901
1902 return ret;
1903 }
1904
1905 /**
1906 * hv_allocate_config_window() - Find MMIO space for PCI Config
1907 * @hbus: Root PCI bus, as understood by this driver
1908 *
1909 * This function claims memory-mapped I/O space for accessing
1910 * configuration space for the functions on this bus.
1911 *
1912 * Return: 0 on success, -errno on failure
1913 */
1914 static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
1915 {
1916 int ret;
1917
1918 /*
1919 * Set up a region of MMIO space to use for accessing configuration
1920 * space.
1921 */
1922 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
1923 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
1924 if (ret)
1925 return ret;
1926
1927 /*
1928 * vmbus_allocate_mmio() gets used for allocating both device endpoint
1929 * resource claims (those which cannot be overlapped) and the ranges
1930 * which are valid for the children of this bus, which are intended
1931 * to be overlapped by those children. Set the flag on this claim
1932 * meaning that this region can't be overlapped.
1933 */
1934
1935 hbus->mem_config->flags |= IORESOURCE_BUSY;
1936
1937 return 0;
1938 }
1939
1940 static void hv_free_config_window(struct hv_pcibus_device *hbus)
1941 {
1942 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
1943 }
1944
1945 /**
1946 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
1947 * @hdev: VMBus's tracking struct for this root PCI bus
1948 *
1949 * Return: 0 on success, -errno on failure
1950 */
1951 static int hv_pci_enter_d0(struct hv_device *hdev)
1952 {
1953 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
1954 struct pci_bus_d0_entry *d0_entry;
1955 struct hv_pci_compl comp_pkt;
1956 struct pci_packet *pkt;
1957 int ret;
1958
1959 /*
1960 * Tell the host that the bus is ready to use, and moved into the
1961 * powered-on state. This includes telling the host which region
1962 * of memory-mapped I/O space has been chosen for configuration space
1963 * access.
1964 */
1965 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
1966 if (!pkt)
1967 return -ENOMEM;
1968
1969 init_completion(&comp_pkt.host_event);
1970 pkt->completion_func = hv_pci_generic_compl;
1971 pkt->compl_ctxt = &comp_pkt;
1972 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
1973 d0_entry->message_type.type = PCI_BUS_D0ENTRY;
1974 d0_entry->mmio_base = hbus->mem_config->start;
1975
1976 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
1977 (unsigned long)pkt, VM_PKT_DATA_INBAND,
1978 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1979 if (ret)
1980 goto exit;
1981
1982 wait_for_completion(&comp_pkt.host_event);
1983
1984 if (comp_pkt.completion_status < 0) {
1985 dev_err(&hdev->device,
1986 "PCI Pass-through VSP failed D0 Entry with status %x\n",
1987 comp_pkt.completion_status);
1988 ret = -EPROTO;
1989 goto exit;
1990 }
1991
1992 ret = 0;
1993
1994 exit:
1995 kfree(pkt);
1996 return ret;
1997 }
1998
1999 /**
2000 * hv_pci_query_relations() - Ask host to send list of child
2001 * devices
2002 * @hdev: VMBus's tracking struct for this root PCI bus
2003 *
2004 * Return: 0 on success, -errno on failure
2005 */
2006 static int hv_pci_query_relations(struct hv_device *hdev)
2007 {
2008 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2009 struct pci_message message;
2010 struct completion comp;
2011 int ret;
2012
2013 /* Ask the host to send along the list of child devices */
2014 init_completion(&comp);
2015 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2016 return -ENOTEMPTY;
2017
2018 memset(&message, 0, sizeof(message));
2019 message.type = PCI_QUERY_BUS_RELATIONS;
2020
2021 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2022 0, VM_PKT_DATA_INBAND, 0);
2023 if (ret)
2024 return ret;
2025
2026 wait_for_completion(&comp);
2027 return 0;
2028 }
2029
2030 /**
2031 * hv_send_resources_allocated() - Report local resource choices
2032 * @hdev: VMBus's tracking struct for this root PCI bus
2033 *
2034 * The host OS is expecting to be sent a request as a message
2035 * which contains all the resources that the device will use.
2036 * The response contains those same resources, "translated"
2037 * which is to say, the values which should be used by the
2038 * hardware, when it delivers an interrupt. (MMIO resources are
2039 * used in local terms.) This is nice for Windows, and lines up
2040 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2041 * is deeply expecting to scan an emulated PCI configuration
2042 * space. So this message is sent here only to drive the state
2043 * machine on the host forward.
2044 *
2045 * Return: 0 on success, -errno on failure
2046 */
2047 static int hv_send_resources_allocated(struct hv_device *hdev)
2048 {
2049 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2050 struct pci_resources_assigned *res_assigned;
2051 struct hv_pci_compl comp_pkt;
2052 struct hv_pci_dev *hpdev;
2053 struct pci_packet *pkt;
2054 u32 wslot;
2055 int ret;
2056
2057 pkt = kmalloc(sizeof(*pkt) + sizeof(*res_assigned), GFP_KERNEL);
2058 if (!pkt)
2059 return -ENOMEM;
2060
2061 ret = 0;
2062
2063 for (wslot = 0; wslot < 256; wslot++) {
2064 hpdev = get_pcichild_wslot(hbus, wslot);
2065 if (!hpdev)
2066 continue;
2067
2068 memset(pkt, 0, sizeof(*pkt) + sizeof(*res_assigned));
2069 init_completion(&comp_pkt.host_event);
2070 pkt->completion_func = hv_pci_generic_compl;
2071 pkt->compl_ctxt = &comp_pkt;
2072 res_assigned = (struct pci_resources_assigned *)&pkt->message;
2073 res_assigned->message_type.type = PCI_RESOURCES_ASSIGNED;
2074 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2075
2076 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
2077
2078 ret = vmbus_sendpacket(
2079 hdev->channel, &pkt->message,
2080 sizeof(*res_assigned),
2081 (unsigned long)pkt,
2082 VM_PKT_DATA_INBAND,
2083 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2084 if (ret)
2085 break;
2086
2087 wait_for_completion(&comp_pkt.host_event);
2088
2089 if (comp_pkt.completion_status < 0) {
2090 ret = -EPROTO;
2091 dev_err(&hdev->device,
2092 "resource allocated returned 0x%x",
2093 comp_pkt.completion_status);
2094 break;
2095 }
2096 }
2097
2098 kfree(pkt);
2099 return ret;
2100 }
2101
2102 /**
2103 * hv_send_resources_released() - Report local resources
2104 * released
2105 * @hdev: VMBus's tracking struct for this root PCI bus
2106 *
2107 * Return: 0 on success, -errno on failure
2108 */
2109 static int hv_send_resources_released(struct hv_device *hdev)
2110 {
2111 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2112 struct pci_child_message pkt;
2113 struct hv_pci_dev *hpdev;
2114 u32 wslot;
2115 int ret;
2116
2117 for (wslot = 0; wslot < 256; wslot++) {
2118 hpdev = get_pcichild_wslot(hbus, wslot);
2119 if (!hpdev)
2120 continue;
2121
2122 memset(&pkt, 0, sizeof(pkt));
2123 pkt.message_type.type = PCI_RESOURCES_RELEASED;
2124 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2125
2126 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
2127
2128 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2129 VM_PKT_DATA_INBAND, 0);
2130 if (ret)
2131 return ret;
2132 }
2133
2134 return 0;
2135 }
2136
2137 static void get_hvpcibus(struct hv_pcibus_device *hbus)
2138 {
2139 atomic_inc(&hbus->remove_lock);
2140 }
2141
2142 static void put_hvpcibus(struct hv_pcibus_device *hbus)
2143 {
2144 if (atomic_dec_and_test(&hbus->remove_lock))
2145 complete(&hbus->remove_event);
2146 }
2147
2148 /**
2149 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
2150 * @hdev: VMBus's tracking struct for this root PCI bus
2151 * @dev_id: Identifies the device itself
2152 *
2153 * Return: 0 on success, -errno on failure
2154 */
2155 static int hv_pci_probe(struct hv_device *hdev,
2156 const struct hv_vmbus_device_id *dev_id)
2157 {
2158 struct hv_pcibus_device *hbus;
2159 int ret;
2160
2161 hbus = kzalloc(sizeof(*hbus), GFP_KERNEL);
2162 if (!hbus)
2163 return -ENOMEM;
2164
2165 /*
2166 * The PCI bus "domain" is what is called "segment" in ACPI and
2167 * other specs. Pull it from the instance ID, to get something
2168 * unique. Bytes 8 and 9 are what is used in Windows guests, so
2169 * do the same thing for consistency. Note that, since this code
2170 * only runs in a Hyper-V VM, Hyper-V can (and does) guarantee
2171 * that (1) the only domain in use for something that looks like
2172 * a physical PCI bus (which is actually emulated by the
2173 * hypervisor) is domain 0 and (2) there will be no overlap
2174 * between domains derived from these instance IDs in the same
2175 * VM.
2176 */
2177 hbus->sysdata.domain = hdev->dev_instance.b[9] |
2178 hdev->dev_instance.b[8] << 8;
2179
2180 hbus->hdev = hdev;
2181 atomic_inc(&hbus->remove_lock);
2182 INIT_LIST_HEAD(&hbus->children);
2183 INIT_LIST_HEAD(&hbus->dr_list);
2184 INIT_LIST_HEAD(&hbus->resources_for_children);
2185 spin_lock_init(&hbus->config_lock);
2186 spin_lock_init(&hbus->device_list_lock);
2187 sema_init(&hbus->enum_sem, 1);
2188 init_completion(&hbus->remove_event);
2189
2190 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
2191 hv_pci_onchannelcallback, hbus);
2192 if (ret)
2193 goto free_bus;
2194
2195 hv_set_drvdata(hdev, hbus);
2196
2197 ret = hv_pci_protocol_negotiation(hdev);
2198 if (ret)
2199 goto close;
2200
2201 ret = hv_allocate_config_window(hbus);
2202 if (ret)
2203 goto close;
2204
2205 hbus->cfg_addr = ioremap(hbus->mem_config->start,
2206 PCI_CONFIG_MMIO_LENGTH);
2207 if (!hbus->cfg_addr) {
2208 dev_err(&hdev->device,
2209 "Unable to map a virtual address for config space\n");
2210 ret = -ENOMEM;
2211 goto free_config;
2212 }
2213
2214 hbus->sysdata.fwnode = irq_domain_alloc_fwnode(hbus);
2215 if (!hbus->sysdata.fwnode) {
2216 ret = -ENOMEM;
2217 goto unmap;
2218 }
2219
2220 ret = hv_pcie_init_irq_domain(hbus);
2221 if (ret)
2222 goto free_fwnode;
2223
2224 ret = hv_pci_query_relations(hdev);
2225 if (ret)
2226 goto free_irq_domain;
2227
2228 ret = hv_pci_enter_d0(hdev);
2229 if (ret)
2230 goto free_irq_domain;
2231
2232 ret = hv_pci_allocate_bridge_windows(hbus);
2233 if (ret)
2234 goto free_irq_domain;
2235
2236 ret = hv_send_resources_allocated(hdev);
2237 if (ret)
2238 goto free_windows;
2239
2240 prepopulate_bars(hbus);
2241
2242 hbus->state = hv_pcibus_probed;
2243
2244 ret = create_root_hv_pci_bus(hbus);
2245 if (ret)
2246 goto free_windows;
2247
2248 return 0;
2249
2250 free_windows:
2251 hv_pci_free_bridge_windows(hbus);
2252 free_irq_domain:
2253 irq_domain_remove(hbus->irq_domain);
2254 free_fwnode:
2255 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2256 unmap:
2257 iounmap(hbus->cfg_addr);
2258 free_config:
2259 hv_free_config_window(hbus);
2260 close:
2261 vmbus_close(hdev->channel);
2262 free_bus:
2263 kfree(hbus);
2264 return ret;
2265 }
2266
2267 /**
2268 * hv_pci_remove() - Remove routine for this VMBus channel
2269 * @hdev: VMBus's tracking struct for this root PCI bus
2270 *
2271 * Return: 0 on success, -errno on failure
2272 */
2273 static int hv_pci_remove(struct hv_device *hdev)
2274 {
2275 int ret;
2276 struct hv_pcibus_device *hbus;
2277 union {
2278 struct pci_packet teardown_packet;
2279 u8 buffer[0x100];
2280 } pkt;
2281 struct pci_bus_relations relations;
2282 struct hv_pci_compl comp_pkt;
2283
2284 hbus = hv_get_drvdata(hdev);
2285
2286 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
2287 init_completion(&comp_pkt.host_event);
2288 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
2289 pkt.teardown_packet.compl_ctxt = &comp_pkt;
2290 pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
2291
2292 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
2293 sizeof(struct pci_message),
2294 (unsigned long)&pkt.teardown_packet,
2295 VM_PKT_DATA_INBAND,
2296 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2297 if (!ret)
2298 wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ);
2299
2300 if (hbus->state == hv_pcibus_installed) {
2301 /* Remove the bus from PCI's point of view. */
2302 pci_lock_rescan_remove();
2303 pci_stop_root_bus(hbus->pci_bus);
2304 pci_remove_root_bus(hbus->pci_bus);
2305 pci_unlock_rescan_remove();
2306 }
2307
2308 ret = hv_send_resources_released(hdev);
2309 if (ret)
2310 dev_err(&hdev->device,
2311 "Couldn't send resources released packet(s)\n");
2312
2313 vmbus_close(hdev->channel);
2314
2315 /* Delete any children which might still exist. */
2316 memset(&relations, 0, sizeof(relations));
2317 hv_pci_devices_present(hbus, &relations);
2318
2319 iounmap(hbus->cfg_addr);
2320 hv_free_config_window(hbus);
2321 pci_free_resource_list(&hbus->resources_for_children);
2322 hv_pci_free_bridge_windows(hbus);
2323 irq_domain_remove(hbus->irq_domain);
2324 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2325 put_hvpcibus(hbus);
2326 wait_for_completion(&hbus->remove_event);
2327 kfree(hbus);
2328 return 0;
2329 }
2330
2331 static const struct hv_vmbus_device_id hv_pci_id_table[] = {
2332 /* PCI Pass-through Class ID */
2333 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
2334 { HV_PCIE_GUID, },
2335 { },
2336 };
2337
2338 MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
2339
2340 static struct hv_driver hv_pci_drv = {
2341 .name = "hv_pci",
2342 .id_table = hv_pci_id_table,
2343 .probe = hv_pci_probe,
2344 .remove = hv_pci_remove,
2345 };
2346
2347 static void __exit exit_hv_pci_drv(void)
2348 {
2349 vmbus_driver_unregister(&hv_pci_drv);
2350 }
2351
2352 static int __init init_hv_pci_drv(void)
2353 {
2354 return vmbus_driver_register(&hv_pci_drv);
2355 }
2356
2357 module_init(init_hv_pci_drv);
2358 module_exit(exit_hv_pci_drv);
2359
2360 MODULE_DESCRIPTION("Hyper-V PCI");
2361 MODULE_LICENSE("GPL v2");