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1 /*
2 * Volume Management Device driver
3 * Copyright (c) 2015, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 #include <linux/device.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/msi.h>
21 #include <linux/pci.h>
22 #include <linux/srcu.h>
23 #include <linux/rculist.h>
24 #include <linux/rcupdate.h>
25
26 #include <asm/irqdomain.h>
27 #include <asm/device.h>
28 #include <asm/msi.h>
29 #include <asm/msidef.h>
30
31 #define VMD_CFGBAR 0
32 #define VMD_MEMBAR1 2
33 #define VMD_MEMBAR2 4
34
35 /*
36 * Lock for manipulating VMD IRQ lists.
37 */
38 static DEFINE_RAW_SPINLOCK(list_lock);
39
40 /**
41 * struct vmd_irq - private data to map driver IRQ to the VMD shared vector
42 * @node: list item for parent traversal.
43 * @irq: back pointer to parent.
44 * @enabled: true if driver enabled IRQ
45 * @virq: the virtual IRQ value provided to the requesting driver.
46 *
47 * Every MSI/MSI-X IRQ requested for a device in a VMD domain will be mapped to
48 * a VMD IRQ using this structure.
49 */
50 struct vmd_irq {
51 struct list_head node;
52 struct vmd_irq_list *irq;
53 bool enabled;
54 unsigned int virq;
55 };
56
57 /**
58 * struct vmd_irq_list - list of driver requested IRQs mapping to a VMD vector
59 * @irq_list: the list of irq's the VMD one demuxes to.
60 * @srcu: SRCU struct for local synchronization.
61 * @count: number of child IRQs assigned to this vector; used to track
62 * sharing.
63 */
64 struct vmd_irq_list {
65 struct list_head irq_list;
66 struct srcu_struct srcu;
67 unsigned int count;
68 };
69
70 struct vmd_dev {
71 struct pci_dev *dev;
72
73 spinlock_t cfg_lock;
74 char __iomem *cfgbar;
75
76 int msix_count;
77 struct vmd_irq_list *irqs;
78
79 struct pci_sysdata sysdata;
80 struct resource resources[3];
81 struct irq_domain *irq_domain;
82 struct pci_bus *bus;
83
84 #ifdef CONFIG_X86_DEV_DMA_OPS
85 struct dma_map_ops dma_ops;
86 struct dma_domain dma_domain;
87 #endif
88 };
89
90 static inline struct vmd_dev *vmd_from_bus(struct pci_bus *bus)
91 {
92 return container_of(bus->sysdata, struct vmd_dev, sysdata);
93 }
94
95 static inline unsigned int index_from_irqs(struct vmd_dev *vmd,
96 struct vmd_irq_list *irqs)
97 {
98 return irqs - vmd->irqs;
99 }
100
101 /*
102 * Drivers managing a device in a VMD domain allocate their own IRQs as before,
103 * but the MSI entry for the hardware it's driving will be programmed with a
104 * destination ID for the VMD MSI-X table. The VMD muxes interrupts in its
105 * domain into one of its own, and the VMD driver de-muxes these for the
106 * handlers sharing that VMD IRQ. The vmd irq_domain provides the operations
107 * and irq_chip to set this up.
108 */
109 static void vmd_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
110 {
111 struct vmd_irq *vmdirq = data->chip_data;
112 struct vmd_irq_list *irq = vmdirq->irq;
113 struct vmd_dev *vmd = irq_data_get_irq_handler_data(data);
114
115 msg->address_hi = MSI_ADDR_BASE_HI;
116 msg->address_lo = MSI_ADDR_BASE_LO |
117 MSI_ADDR_DEST_ID(index_from_irqs(vmd, irq));
118 msg->data = 0;
119 }
120
121 /*
122 * We rely on MSI_FLAG_USE_DEF_CHIP_OPS to set the IRQ mask/unmask ops.
123 */
124 static void vmd_irq_enable(struct irq_data *data)
125 {
126 struct vmd_irq *vmdirq = data->chip_data;
127 unsigned long flags;
128
129 raw_spin_lock_irqsave(&list_lock, flags);
130 WARN_ON(vmdirq->enabled);
131 list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list);
132 vmdirq->enabled = true;
133 raw_spin_unlock_irqrestore(&list_lock, flags);
134
135 data->chip->irq_unmask(data);
136 }
137
138 static void vmd_irq_disable(struct irq_data *data)
139 {
140 struct vmd_irq *vmdirq = data->chip_data;
141 unsigned long flags;
142
143 data->chip->irq_mask(data);
144
145 raw_spin_lock_irqsave(&list_lock, flags);
146 if (vmdirq->enabled) {
147 list_del_rcu(&vmdirq->node);
148 vmdirq->enabled = false;
149 }
150 raw_spin_unlock_irqrestore(&list_lock, flags);
151 }
152
153 /*
154 * XXX: Stubbed until we develop acceptable way to not create conflicts with
155 * other devices sharing the same vector.
156 */
157 static int vmd_irq_set_affinity(struct irq_data *data,
158 const struct cpumask *dest, bool force)
159 {
160 return -EINVAL;
161 }
162
163 static struct irq_chip vmd_msi_controller = {
164 .name = "VMD-MSI",
165 .irq_enable = vmd_irq_enable,
166 .irq_disable = vmd_irq_disable,
167 .irq_compose_msi_msg = vmd_compose_msi_msg,
168 .irq_set_affinity = vmd_irq_set_affinity,
169 };
170
171 static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info,
172 msi_alloc_info_t *arg)
173 {
174 return 0;
175 }
176
177 /*
178 * XXX: We can be even smarter selecting the best IRQ once we solve the
179 * affinity problem.
180 */
181 static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_desc *desc)
182 {
183 int i, best = 1;
184 unsigned long flags;
185
186 if (pci_is_bridge(msi_desc_to_pci_dev(desc)) || vmd->msix_count == 1)
187 return &vmd->irqs[0];
188
189 raw_spin_lock_irqsave(&list_lock, flags);
190 for (i = 1; i < vmd->msix_count; i++)
191 if (vmd->irqs[i].count < vmd->irqs[best].count)
192 best = i;
193 vmd->irqs[best].count++;
194 raw_spin_unlock_irqrestore(&list_lock, flags);
195
196 return &vmd->irqs[best];
197 }
198
199 static int vmd_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
200 unsigned int virq, irq_hw_number_t hwirq,
201 msi_alloc_info_t *arg)
202 {
203 struct msi_desc *desc = arg->desc;
204 struct vmd_dev *vmd = vmd_from_bus(msi_desc_to_pci_dev(desc)->bus);
205 struct vmd_irq *vmdirq = kzalloc(sizeof(*vmdirq), GFP_KERNEL);
206 unsigned int index, vector;
207
208 if (!vmdirq)
209 return -ENOMEM;
210
211 INIT_LIST_HEAD(&vmdirq->node);
212 vmdirq->irq = vmd_next_irq(vmd, desc);
213 vmdirq->virq = virq;
214 index = index_from_irqs(vmd, vmdirq->irq);
215 vector = pci_irq_vector(vmd->dev, index);
216
217 irq_domain_set_info(domain, virq, vector, info->chip, vmdirq,
218 handle_untracked_irq, vmd, NULL);
219 return 0;
220 }
221
222 static void vmd_msi_free(struct irq_domain *domain,
223 struct msi_domain_info *info, unsigned int virq)
224 {
225 struct vmd_irq *vmdirq = irq_get_chip_data(virq);
226 unsigned long flags;
227
228 synchronize_srcu(&vmdirq->irq->srcu);
229
230 /* XXX: Potential optimization to rebalance */
231 raw_spin_lock_irqsave(&list_lock, flags);
232 vmdirq->irq->count--;
233 raw_spin_unlock_irqrestore(&list_lock, flags);
234
235 kfree(vmdirq);
236 }
237
238 static int vmd_msi_prepare(struct irq_domain *domain, struct device *dev,
239 int nvec, msi_alloc_info_t *arg)
240 {
241 struct pci_dev *pdev = to_pci_dev(dev);
242 struct vmd_dev *vmd = vmd_from_bus(pdev->bus);
243
244 if (nvec > vmd->msix_count)
245 return vmd->msix_count;
246
247 memset(arg, 0, sizeof(*arg));
248 return 0;
249 }
250
251 static void vmd_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
252 {
253 arg->desc = desc;
254 }
255
256 static struct msi_domain_ops vmd_msi_domain_ops = {
257 .get_hwirq = vmd_get_hwirq,
258 .msi_init = vmd_msi_init,
259 .msi_free = vmd_msi_free,
260 .msi_prepare = vmd_msi_prepare,
261 .set_desc = vmd_set_desc,
262 };
263
264 static struct msi_domain_info vmd_msi_domain_info = {
265 .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
266 MSI_FLAG_PCI_MSIX,
267 .ops = &vmd_msi_domain_ops,
268 .chip = &vmd_msi_controller,
269 };
270
271 #ifdef CONFIG_X86_DEV_DMA_OPS
272 /*
273 * VMD replaces the requester ID with its own. DMA mappings for devices in a
274 * VMD domain need to be mapped for the VMD, not the device requiring
275 * the mapping.
276 */
277 static struct device *to_vmd_dev(struct device *dev)
278 {
279 struct pci_dev *pdev = to_pci_dev(dev);
280 struct vmd_dev *vmd = vmd_from_bus(pdev->bus);
281
282 return &vmd->dev->dev;
283 }
284
285 static const struct dma_map_ops *vmd_dma_ops(struct device *dev)
286 {
287 return get_dma_ops(to_vmd_dev(dev));
288 }
289
290 static void *vmd_alloc(struct device *dev, size_t size, dma_addr_t *addr,
291 gfp_t flag, unsigned long attrs)
292 {
293 return vmd_dma_ops(dev)->alloc(to_vmd_dev(dev), size, addr, flag,
294 attrs);
295 }
296
297 static void vmd_free(struct device *dev, size_t size, void *vaddr,
298 dma_addr_t addr, unsigned long attrs)
299 {
300 return vmd_dma_ops(dev)->free(to_vmd_dev(dev), size, vaddr, addr,
301 attrs);
302 }
303
304 static int vmd_mmap(struct device *dev, struct vm_area_struct *vma,
305 void *cpu_addr, dma_addr_t addr, size_t size,
306 unsigned long attrs)
307 {
308 return vmd_dma_ops(dev)->mmap(to_vmd_dev(dev), vma, cpu_addr, addr,
309 size, attrs);
310 }
311
312 static int vmd_get_sgtable(struct device *dev, struct sg_table *sgt,
313 void *cpu_addr, dma_addr_t addr, size_t size,
314 unsigned long attrs)
315 {
316 return vmd_dma_ops(dev)->get_sgtable(to_vmd_dev(dev), sgt, cpu_addr,
317 addr, size, attrs);
318 }
319
320 static dma_addr_t vmd_map_page(struct device *dev, struct page *page,
321 unsigned long offset, size_t size,
322 enum dma_data_direction dir,
323 unsigned long attrs)
324 {
325 return vmd_dma_ops(dev)->map_page(to_vmd_dev(dev), page, offset, size,
326 dir, attrs);
327 }
328
329 static void vmd_unmap_page(struct device *dev, dma_addr_t addr, size_t size,
330 enum dma_data_direction dir, unsigned long attrs)
331 {
332 vmd_dma_ops(dev)->unmap_page(to_vmd_dev(dev), addr, size, dir, attrs);
333 }
334
335 static int vmd_map_sg(struct device *dev, struct scatterlist *sg, int nents,
336 enum dma_data_direction dir, unsigned long attrs)
337 {
338 return vmd_dma_ops(dev)->map_sg(to_vmd_dev(dev), sg, nents, dir, attrs);
339 }
340
341 static void vmd_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
342 enum dma_data_direction dir, unsigned long attrs)
343 {
344 vmd_dma_ops(dev)->unmap_sg(to_vmd_dev(dev), sg, nents, dir, attrs);
345 }
346
347 static void vmd_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
348 size_t size, enum dma_data_direction dir)
349 {
350 vmd_dma_ops(dev)->sync_single_for_cpu(to_vmd_dev(dev), addr, size, dir);
351 }
352
353 static void vmd_sync_single_for_device(struct device *dev, dma_addr_t addr,
354 size_t size, enum dma_data_direction dir)
355 {
356 vmd_dma_ops(dev)->sync_single_for_device(to_vmd_dev(dev), addr, size,
357 dir);
358 }
359
360 static void vmd_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
361 int nents, enum dma_data_direction dir)
362 {
363 vmd_dma_ops(dev)->sync_sg_for_cpu(to_vmd_dev(dev), sg, nents, dir);
364 }
365
366 static void vmd_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
367 int nents, enum dma_data_direction dir)
368 {
369 vmd_dma_ops(dev)->sync_sg_for_device(to_vmd_dev(dev), sg, nents, dir);
370 }
371
372 static int vmd_mapping_error(struct device *dev, dma_addr_t addr)
373 {
374 return vmd_dma_ops(dev)->mapping_error(to_vmd_dev(dev), addr);
375 }
376
377 static int vmd_dma_supported(struct device *dev, u64 mask)
378 {
379 return vmd_dma_ops(dev)->dma_supported(to_vmd_dev(dev), mask);
380 }
381
382 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
383 static u64 vmd_get_required_mask(struct device *dev)
384 {
385 return vmd_dma_ops(dev)->get_required_mask(to_vmd_dev(dev));
386 }
387 #endif
388
389 static void vmd_teardown_dma_ops(struct vmd_dev *vmd)
390 {
391 struct dma_domain *domain = &vmd->dma_domain;
392
393 if (get_dma_ops(&vmd->dev->dev))
394 del_dma_domain(domain);
395 }
396
397 #define ASSIGN_VMD_DMA_OPS(source, dest, fn) \
398 do { \
399 if (source->fn) \
400 dest->fn = vmd_##fn; \
401 } while (0)
402
403 static void vmd_setup_dma_ops(struct vmd_dev *vmd)
404 {
405 const struct dma_map_ops *source = get_dma_ops(&vmd->dev->dev);
406 struct dma_map_ops *dest = &vmd->dma_ops;
407 struct dma_domain *domain = &vmd->dma_domain;
408
409 domain->domain_nr = vmd->sysdata.domain;
410 domain->dma_ops = dest;
411
412 if (!source)
413 return;
414 ASSIGN_VMD_DMA_OPS(source, dest, alloc);
415 ASSIGN_VMD_DMA_OPS(source, dest, free);
416 ASSIGN_VMD_DMA_OPS(source, dest, mmap);
417 ASSIGN_VMD_DMA_OPS(source, dest, get_sgtable);
418 ASSIGN_VMD_DMA_OPS(source, dest, map_page);
419 ASSIGN_VMD_DMA_OPS(source, dest, unmap_page);
420 ASSIGN_VMD_DMA_OPS(source, dest, map_sg);
421 ASSIGN_VMD_DMA_OPS(source, dest, unmap_sg);
422 ASSIGN_VMD_DMA_OPS(source, dest, sync_single_for_cpu);
423 ASSIGN_VMD_DMA_OPS(source, dest, sync_single_for_device);
424 ASSIGN_VMD_DMA_OPS(source, dest, sync_sg_for_cpu);
425 ASSIGN_VMD_DMA_OPS(source, dest, sync_sg_for_device);
426 ASSIGN_VMD_DMA_OPS(source, dest, mapping_error);
427 ASSIGN_VMD_DMA_OPS(source, dest, dma_supported);
428 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
429 ASSIGN_VMD_DMA_OPS(source, dest, get_required_mask);
430 #endif
431 add_dma_domain(domain);
432 }
433 #undef ASSIGN_VMD_DMA_OPS
434 #else
435 static void vmd_teardown_dma_ops(struct vmd_dev *vmd) {}
436 static void vmd_setup_dma_ops(struct vmd_dev *vmd) {}
437 #endif
438
439 static char __iomem *vmd_cfg_addr(struct vmd_dev *vmd, struct pci_bus *bus,
440 unsigned int devfn, int reg, int len)
441 {
442 char __iomem *addr = vmd->cfgbar +
443 (bus->number << 20) + (devfn << 12) + reg;
444
445 if ((addr - vmd->cfgbar) + len >=
446 resource_size(&vmd->dev->resource[VMD_CFGBAR]))
447 return NULL;
448
449 return addr;
450 }
451
452 /*
453 * CPU may deadlock if config space is not serialized on some versions of this
454 * hardware, so all config space access is done under a spinlock.
455 */
456 static int vmd_pci_read(struct pci_bus *bus, unsigned int devfn, int reg,
457 int len, u32 *value)
458 {
459 struct vmd_dev *vmd = vmd_from_bus(bus);
460 char __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
461 unsigned long flags;
462 int ret = 0;
463
464 if (!addr)
465 return -EFAULT;
466
467 spin_lock_irqsave(&vmd->cfg_lock, flags);
468 switch (len) {
469 case 1:
470 *value = readb(addr);
471 break;
472 case 2:
473 *value = readw(addr);
474 break;
475 case 4:
476 *value = readl(addr);
477 break;
478 default:
479 ret = -EINVAL;
480 break;
481 }
482 spin_unlock_irqrestore(&vmd->cfg_lock, flags);
483 return ret;
484 }
485
486 /*
487 * VMD h/w converts non-posted config writes to posted memory writes. The
488 * read-back in this function forces the completion so it returns only after
489 * the config space was written, as expected.
490 */
491 static int vmd_pci_write(struct pci_bus *bus, unsigned int devfn, int reg,
492 int len, u32 value)
493 {
494 struct vmd_dev *vmd = vmd_from_bus(bus);
495 char __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
496 unsigned long flags;
497 int ret = 0;
498
499 if (!addr)
500 return -EFAULT;
501
502 spin_lock_irqsave(&vmd->cfg_lock, flags);
503 switch (len) {
504 case 1:
505 writeb(value, addr);
506 readb(addr);
507 break;
508 case 2:
509 writew(value, addr);
510 readw(addr);
511 break;
512 case 4:
513 writel(value, addr);
514 readl(addr);
515 break;
516 default:
517 ret = -EINVAL;
518 break;
519 }
520 spin_unlock_irqrestore(&vmd->cfg_lock, flags);
521 return ret;
522 }
523
524 static struct pci_ops vmd_ops = {
525 .read = vmd_pci_read,
526 .write = vmd_pci_write,
527 };
528
529 static void vmd_attach_resources(struct vmd_dev *vmd)
530 {
531 vmd->dev->resource[VMD_MEMBAR1].child = &vmd->resources[1];
532 vmd->dev->resource[VMD_MEMBAR2].child = &vmd->resources[2];
533 }
534
535 static void vmd_detach_resources(struct vmd_dev *vmd)
536 {
537 vmd->dev->resource[VMD_MEMBAR1].child = NULL;
538 vmd->dev->resource[VMD_MEMBAR2].child = NULL;
539 }
540
541 /*
542 * VMD domains start at 0x10000 to not clash with ACPI _SEG domains.
543 * Per ACPI r6.0, sec 6.5.6, _SEG returns an integer, of which the lower
544 * 16 bits are the PCI Segment Group (domain) number. Other bits are
545 * currently reserved.
546 */
547 static int vmd_find_free_domain(void)
548 {
549 int domain = 0xffff;
550 struct pci_bus *bus = NULL;
551
552 while ((bus = pci_find_next_bus(bus)) != NULL)
553 domain = max_t(int, domain, pci_domain_nr(bus));
554 return domain + 1;
555 }
556
557 static int vmd_enable_domain(struct vmd_dev *vmd)
558 {
559 struct pci_sysdata *sd = &vmd->sysdata;
560 struct fwnode_handle *fn;
561 struct resource *res;
562 u32 upper_bits;
563 unsigned long flags;
564 LIST_HEAD(resources);
565
566 res = &vmd->dev->resource[VMD_CFGBAR];
567 vmd->resources[0] = (struct resource) {
568 .name = "VMD CFGBAR",
569 .start = 0,
570 .end = (resource_size(res) >> 20) - 1,
571 .flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED,
572 };
573
574 /*
575 * If the window is below 4GB, clear IORESOURCE_MEM_64 so we can
576 * put 32-bit resources in the window.
577 *
578 * There's no hardware reason why a 64-bit window *couldn't*
579 * contain a 32-bit resource, but pbus_size_mem() computes the
580 * bridge window size assuming a 64-bit window will contain no
581 * 32-bit resources. __pci_assign_resource() enforces that
582 * artificial restriction to make sure everything will fit.
583 *
584 * The only way we could use a 64-bit non-prefechable MEMBAR is
585 * if its address is <4GB so that we can convert it to a 32-bit
586 * resource. To be visible to the host OS, all VMD endpoints must
587 * be initially configured by platform BIOS, which includes setting
588 * up these resources. We can assume the device is configured
589 * according to the platform needs.
590 */
591 res = &vmd->dev->resource[VMD_MEMBAR1];
592 upper_bits = upper_32_bits(res->end);
593 flags = res->flags & ~IORESOURCE_SIZEALIGN;
594 if (!upper_bits)
595 flags &= ~IORESOURCE_MEM_64;
596 vmd->resources[1] = (struct resource) {
597 .name = "VMD MEMBAR1",
598 .start = res->start,
599 .end = res->end,
600 .flags = flags,
601 .parent = res,
602 };
603
604 res = &vmd->dev->resource[VMD_MEMBAR2];
605 upper_bits = upper_32_bits(res->end);
606 flags = res->flags & ~IORESOURCE_SIZEALIGN;
607 if (!upper_bits)
608 flags &= ~IORESOURCE_MEM_64;
609 vmd->resources[2] = (struct resource) {
610 .name = "VMD MEMBAR2",
611 .start = res->start + 0x2000,
612 .end = res->end,
613 .flags = flags,
614 .parent = res,
615 };
616
617 sd->vmd_domain = true;
618 sd->domain = vmd_find_free_domain();
619 if (sd->domain < 0)
620 return sd->domain;
621
622 sd->node = pcibus_to_node(vmd->dev->bus);
623
624 fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
625 if (!fn)
626 return -ENODEV;
627
628 vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info,
629 x86_vector_domain);
630 irq_domain_free_fwnode(fn);
631 if (!vmd->irq_domain)
632 return -ENODEV;
633
634 pci_add_resource(&resources, &vmd->resources[0]);
635 pci_add_resource(&resources, &vmd->resources[1]);
636 pci_add_resource(&resources, &vmd->resources[2]);
637 vmd->bus = pci_create_root_bus(&vmd->dev->dev, 0, &vmd_ops, sd,
638 &resources);
639 if (!vmd->bus) {
640 pci_free_resource_list(&resources);
641 irq_domain_remove(vmd->irq_domain);
642 return -ENODEV;
643 }
644
645 vmd_attach_resources(vmd);
646 vmd_setup_dma_ops(vmd);
647 dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain);
648 pci_rescan_bus(vmd->bus);
649
650 WARN(sysfs_create_link(&vmd->dev->dev.kobj, &vmd->bus->dev.kobj,
651 "domain"), "Can't create symlink to domain\n");
652 return 0;
653 }
654
655 static irqreturn_t vmd_irq(int irq, void *data)
656 {
657 struct vmd_irq_list *irqs = data;
658 struct vmd_irq *vmdirq;
659 int idx;
660
661 idx = srcu_read_lock(&irqs->srcu);
662 list_for_each_entry_rcu(vmdirq, &irqs->irq_list, node)
663 generic_handle_irq(vmdirq->virq);
664 srcu_read_unlock(&irqs->srcu, idx);
665
666 return IRQ_HANDLED;
667 }
668
669 static int vmd_probe(struct pci_dev *dev, const struct pci_device_id *id)
670 {
671 struct vmd_dev *vmd;
672 int i, err;
673
674 /*
675 * The first vector is reserved for special use, so start affinity at
676 * the second vector
677 */
678 struct irq_affinity affd = {
679 .pre_vectors = 1,
680 };
681
682 if (resource_size(&dev->resource[VMD_CFGBAR]) < (1 << 20))
683 return -ENOMEM;
684
685 vmd = devm_kzalloc(&dev->dev, sizeof(*vmd), GFP_KERNEL);
686 if (!vmd)
687 return -ENOMEM;
688
689 vmd->dev = dev;
690 err = pcim_enable_device(dev);
691 if (err < 0)
692 return err;
693
694 vmd->cfgbar = pcim_iomap(dev, VMD_CFGBAR, 0);
695 if (!vmd->cfgbar)
696 return -ENOMEM;
697
698 pci_set_master(dev);
699 if (dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(64)) &&
700 dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)))
701 return -ENODEV;
702
703 vmd->msix_count = pci_msix_vec_count(dev);
704 if (vmd->msix_count < 0)
705 return -ENODEV;
706
707 vmd->msix_count = pci_alloc_irq_vectors_affinity(dev, 1, vmd->msix_count,
708 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, &affd);
709 if (vmd->msix_count < 0)
710 return vmd->msix_count;
711
712 vmd->irqs = devm_kcalloc(&dev->dev, vmd->msix_count, sizeof(*vmd->irqs),
713 GFP_KERNEL);
714 if (!vmd->irqs)
715 return -ENOMEM;
716
717 for (i = 0; i < vmd->msix_count; i++) {
718 err = init_srcu_struct(&vmd->irqs[i].srcu);
719 if (err)
720 return err;
721
722 INIT_LIST_HEAD(&vmd->irqs[i].irq_list);
723 err = devm_request_irq(&dev->dev, pci_irq_vector(dev, i),
724 vmd_irq, IRQF_NO_THREAD,
725 "vmd", &vmd->irqs[i]);
726 if (err)
727 return err;
728 }
729
730 spin_lock_init(&vmd->cfg_lock);
731 pci_set_drvdata(dev, vmd);
732 err = vmd_enable_domain(vmd);
733 if (err)
734 return err;
735
736 dev_info(&vmd->dev->dev, "Bound to PCI domain %04x\n",
737 vmd->sysdata.domain);
738 return 0;
739 }
740
741 static void vmd_cleanup_srcu(struct vmd_dev *vmd)
742 {
743 int i;
744
745 for (i = 0; i < vmd->msix_count; i++)
746 cleanup_srcu_struct(&vmd->irqs[i].srcu);
747 }
748
749 static void vmd_remove(struct pci_dev *dev)
750 {
751 struct vmd_dev *vmd = pci_get_drvdata(dev);
752
753 vmd_detach_resources(vmd);
754 sysfs_remove_link(&vmd->dev->dev.kobj, "domain");
755 pci_stop_root_bus(vmd->bus);
756 pci_remove_root_bus(vmd->bus);
757 vmd_cleanup_srcu(vmd);
758 vmd_teardown_dma_ops(vmd);
759 irq_domain_remove(vmd->irq_domain);
760 }
761
762 #ifdef CONFIG_PM_SLEEP
763 static int vmd_suspend(struct device *dev)
764 {
765 struct pci_dev *pdev = to_pci_dev(dev);
766
767 pci_save_state(pdev);
768 return 0;
769 }
770
771 static int vmd_resume(struct device *dev)
772 {
773 struct pci_dev *pdev = to_pci_dev(dev);
774
775 pci_restore_state(pdev);
776 return 0;
777 }
778 #endif
779 static SIMPLE_DEV_PM_OPS(vmd_dev_pm_ops, vmd_suspend, vmd_resume);
780
781 static const struct pci_device_id vmd_ids[] = {
782 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x201d),},
783 {0,}
784 };
785 MODULE_DEVICE_TABLE(pci, vmd_ids);
786
787 static struct pci_driver vmd_drv = {
788 .name = "vmd",
789 .id_table = vmd_ids,
790 .probe = vmd_probe,
791 .remove = vmd_remove,
792 .driver = {
793 .pm = &vmd_dev_pm_ops,
794 },
795 };
796 module_pci_driver(vmd_drv);
797
798 MODULE_AUTHOR("Intel Corporation");
799 MODULE_LICENSE("GPL v2");
800 MODULE_VERSION("0.6");