drivers/pci/hotplug/pciehp.h

   1 /*
   2  * PCI Express Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6  * Copyright (C) 2001 IBM Corp.
   7  * Copyright (C) 2003-2004 Intel Corporation
   8  *
   9  * All rights reserved.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  19  * NON INFRINGEMENT.  See the GNU General Public License for more
  20  * details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
  27  *
  28  */
  29 #ifndef _PCIEHP_H
  30 #define _PCIEHP_H
  31
  32 #include <linux/types.h>
  33 #include <linux/pci.h>
  34 #include <linux/delay.h>
  35 #include <linux/pcieport_if.h>
  36 #include "pci_hotplug.h"
  37
  38 #define MY_NAME "pciehp"
  39
  40 extern int pciehp_poll_mode;
  41 extern int pciehp_poll_time;
  42 extern int pciehp_debug;
  43
  44 /*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/
  45 #define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
  46 #define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
  47 #define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
  48 #define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
  49
  50 struct hotplug_params {
  51         u8 cache_line_size;
  52         u8 latency_timer;
  53         u8 enable_serr;
  54         u8 enable_perr;
  55 };
  56
  57 struct slot {
  58         struct slot *next;
  59         u8 bus;
  60         u8 device;
  61         u16 status;
  62         u32 number;
  63         u8 state;
  64         struct timer_list task_event;
  65         u8 hp_slot;
  66         struct controller *ctrl;
  67         struct hpc_ops *hpc_ops;
  68         struct hotplug_slot *hotplug_slot;
  69         struct list_head        slot_list;
  70 };
  71
  72 struct event_info {
  73         u32 event_type;
  74         u8 hp_slot;
  75 };
  76
  77 typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
  78
  79 struct php_ctlr_state_s {
  80         struct php_ctlr_state_s *pnext;
  81         struct pci_dev *pci_dev;
  82         unsigned int irq;
  83         unsigned long flags;                            /* spinlock's */
  84         u32 slot_device_offset;
  85         u32 num_slots;
  86         struct timer_list       int_poll_timer;         /* Added for poll event */
  87         php_intr_callback_t     attention_button_callback;
  88         php_intr_callback_t     switch_change_callback;
  89         php_intr_callback_t     presence_change_callback;
  90         php_intr_callback_t     power_fault_callback;
  91         void                    *callback_instance_id;
  92         struct ctrl_reg         *creg;                          /* Ptr to controller register space */
  93 };
  94
  95 #define MAX_EVENTS              10
  96 struct controller {
  97         struct controller *next;
  98         struct semaphore crit_sect;     /* critical section semaphore */
  99         struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
 100         int num_slots;                  /* Number of slots on ctlr */
 101         int slot_num_inc;               /* 1 or -1 */
 102         struct pci_dev *pci_dev;
 103         struct pci_bus *pci_bus;
 104         struct event_info event_queue[MAX_EVENTS];
 105         struct slot *slot;
 106         struct hpc_ops *hpc_ops;
 107         wait_queue_head_t queue;        /* sleep & wake process */
 108         u8 next_event;
 109         u8 bus;
 110         u8 device;
 111         u8 function;
 112         u8 slot_device_offset;
 113         u32 first_slot;         /* First physical slot number */  /* PCIE only has 1 slot */
 114         u8 slot_bus;            /* Bus where the slots handled by this controller sit */
 115         u8 ctrlcap;
 116         u16 vendor_id;
 117         u8 cap_base;
 118 };
 119
 120 #define INT_BUTTON_IGNORE               0
 121 #define INT_PRESENCE_ON                 1
 122 #define INT_PRESENCE_OFF                2
 123 #define INT_SWITCH_CLOSE                3
 124 #define INT_SWITCH_OPEN                 4
 125 #define INT_POWER_FAULT                 5
 126 #define INT_POWER_FAULT_CLEAR           6
 127 #define INT_BUTTON_PRESS                7
 128 #define INT_BUTTON_RELEASE              8
 129 #define INT_BUTTON_CANCEL               9
 130
 131 #define STATIC_STATE                    0
 132 #define BLINKINGON_STATE                1
 133 #define BLINKINGOFF_STATE               2
 134 #define POWERON_STATE                   3
 135 #define POWEROFF_STATE                  4
 136
 137 #define PCI_TO_PCI_BRIDGE_CLASS         0x00060400
 138
 139 /* Error messages */
 140 #define INTERLOCK_OPEN                  0x00000002
 141 #define ADD_NOT_SUPPORTED               0x00000003
 142 #define CARD_FUNCTIONING                0x00000005
 143 #define ADAPTER_NOT_SAME                0x00000006
 144 #define NO_ADAPTER_PRESENT              0x00000009
 145 #define NOT_ENOUGH_RESOURCES            0x0000000B
 146 #define DEVICE_TYPE_NOT_SUPPORTED       0x0000000C
 147 #define WRONG_BUS_FREQUENCY             0x0000000D
 148 #define POWER_FAILURE                   0x0000000E
 149
 150 #define REMOVE_NOT_SUPPORTED            0x00000003
 151
 152 #define DISABLE_CARD                    1
 153
 154 /* Field definitions in Slot Capabilities Register */
 155 #define ATTN_BUTTN_PRSN 0x00000001
 156 #define PWR_CTRL_PRSN   0x00000002
 157 #define MRL_SENS_PRSN   0x00000004
 158 #define ATTN_LED_PRSN   0x00000008
 159 #define PWR_LED_PRSN    0x00000010
 160 #define HP_SUPR_RM_SUP  0x00000020
 161
 162 #define ATTN_BUTTN(cap)         (cap & ATTN_BUTTN_PRSN)
 163 #define POWER_CTRL(cap)         (cap & PWR_CTRL_PRSN)
 164 #define MRL_SENS(cap)           (cap & MRL_SENS_PRSN)
 165 #define ATTN_LED(cap)           (cap & ATTN_LED_PRSN)
 166 #define PWR_LED(cap)            (cap & PWR_LED_PRSN)
 167 #define HP_SUPR_RM(cap)         (cap & HP_SUPR_RM_SUP)
 168
 169 /*
 170  * error Messages
 171  */
 172 #define msg_initialization_err  "Initialization failure, error=%d\n"
 173 #define msg_button_on           "PCI slot #%d - powering on due to button press.\n"
 174 #define msg_button_off          "PCI slot #%d - powering off due to button press.\n"
 175 #define msg_button_cancel       "PCI slot #%d - action canceled due to button press.\n"
 176 #define msg_button_ignore       "PCI slot #%d - button press ignored.  (action in progress...)\n"
 177
 178 /* controller functions */
 179 extern int      pciehp_event_start_thread       (void);
 180 extern void     pciehp_event_stop_thread        (void);
 181 extern int      pciehp_enable_slot              (struct slot *slot);
 182 extern int      pciehp_disable_slot             (struct slot *slot);
 183
 184 extern u8       pciehp_handle_attention_button  (u8 hp_slot, void *inst_id);
 185 extern u8       pciehp_handle_switch_change     (u8 hp_slot, void *inst_id);
 186 extern u8       pciehp_handle_presence_change   (u8 hp_slot, void *inst_id);
 187 extern u8       pciehp_handle_power_fault       (u8 hp_slot, void *inst_id);
 188 /* extern void  long_delay (int delay); */
 189
 190 /* pci functions */
 191 extern int      pciehp_configure_device         (struct slot *p_slot);
 192 extern int      pciehp_unconfigure_device       (struct slot *p_slot);
 193 extern int      get_hp_hw_control_from_firmware(struct pci_dev *dev);
 194 extern void     get_hp_params_from_firmware(struct pci_dev *dev,
 195                 struct hotplug_params *hpp);
 196
 197
 198
 199 /* Global variables */
 200 extern struct controller *pciehp_ctrl_list;
 201
 202 /* Inline functions */
 203
 204 static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
 205 {
 206         struct slot *p_slot, *tmp_slot = NULL;
 207
 208         p_slot = ctrl->slot;
 209
 210         dbg("p_slot = %p\n", p_slot);
 211
 212         while (p_slot && (p_slot->device != device)) {
 213                 tmp_slot = p_slot;
 214                 p_slot = p_slot->next;
 215                 dbg("In while loop, p_slot = %p\n", p_slot);
 216         }
 217         if (p_slot == NULL) {
 218                 err("ERROR: pciehp_find_slot device=0x%x\n", device);
 219                 p_slot = tmp_slot;
 220         }
 221
 222         return p_slot;
 223 }
 224
 225 static inline int wait_for_ctrl_irq(struct controller *ctrl)
 226 {
 227         int retval = 0;
 228
 229         DECLARE_WAITQUEUE(wait, current);
 230
 231         dbg("%s : start\n", __FUNCTION__);
 232         add_wait_queue(&ctrl->queue, &wait);
 233         if (!pciehp_poll_mode)
 234                 /* Sleep for up to 1 second */
 235                 msleep_interruptible(1000);
 236         else
 237                 msleep_interruptible(2500);
 238
 239         remove_wait_queue(&ctrl->queue, &wait);
 240         if (signal_pending(current))
 241                 retval =  -EINTR;
 242
 243         dbg("%s : end\n", __FUNCTION__);
 244         return retval;
 245 }
 246
 247 #define SLOT_NAME_SIZE 10
 248
 249 static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
 250 {
 251         snprintf(buffer, buffer_size, "%04d_%04d", slot->bus, slot->number);
 252 }
 253
 254 enum php_ctlr_type {
 255         PCI,
 256         ISA,
 257         ACPI
 258 };
 259
 260 int pcie_init(struct controller *ctrl, struct pcie_device *dev);
 261
 262 /* This has no meaning for PCI Express, as there is only 1 slot per port */
 263 int pcie_get_ctlr_slot_config(struct controller *ctrl,
 264                 int *num_ctlr_slots,
 265                 int *first_device_num,
 266                 int *physical_slot_num,
 267                 u8 *ctrlcap);
 268
 269 struct hpc_ops {
 270         int     (*power_on_slot)        (struct slot *slot);
 271         int     (*power_off_slot)       (struct slot *slot);
 272         int     (*get_power_status)     (struct slot *slot, u8 *status);
 273         int     (*get_attention_status) (struct slot *slot, u8 *status);
 274         int     (*set_attention_status) (struct slot *slot, u8 status);
 275         int     (*get_latch_status)     (struct slot *slot, u8 *status);
 276         int     (*get_adapter_status)   (struct slot *slot, u8 *status);
 277
 278         int     (*get_max_bus_speed)    (struct slot *slot, enum pci_bus_speed *speed);
 279         int     (*get_cur_bus_speed)    (struct slot *slot, enum pci_bus_speed *speed);
 280
 281         int     (*get_max_lnk_width)    (struct slot *slot, enum pcie_link_width *value);
 282         int     (*get_cur_lnk_width)    (struct slot *slot, enum pcie_link_width *value);
 283
 284         int     (*query_power_fault)    (struct slot *slot);
 285         void    (*green_led_on)         (struct slot *slot);
 286         void    (*green_led_off)        (struct slot *slot);
 287         void    (*green_led_blink)      (struct slot *slot);
 288         void    (*release_ctlr)         (struct controller *ctrl);
 289         int     (*check_lnk_status)     (struct controller *ctrl);
 290 };
 291
 292 #endif                          /* _PCIEHP_H */