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PCI: pciehp: Replace pciehp_debug module param with dyndbg
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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * PCI Express Hot Plug Controller Driver
4 *
5 * Copyright (C) 1995,2001 Compaq Computer Corporation
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
7 * Copyright (C) 2001 IBM Corp.
8 * Copyright (C) 2003-2004 Intel Corporation
9 *
10 * All rights reserved.
11 *
12 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
13 *
14 */
15 #ifndef _PCIEHP_H
16 #define _PCIEHP_H
17
18 #include <linux/types.h>
19 #include <linux/pci.h>
20 #include <linux/pci_hotplug.h>
21 #include <linux/delay.h>
22 #include <linux/mutex.h>
23 #include <linux/rwsem.h>
24 #include <linux/workqueue.h>
25
26 #include "../pcie/portdrv.h"
27
28 #define MY_NAME "pciehp"
29
30 extern bool pciehp_poll_mode;
31 extern int pciehp_poll_time;
32
33 /*
34 * Set CONFIG_DYNAMIC_DEBUG=y and boot with 'dyndbg="file pciehp* +p"' to
35 * enable debug messages.
36 */
37 #define dbg(format, arg...) \
38 pr_debug("%s: " format, MY_NAME, ## arg);
39 #define err(format, arg...) \
40 printk(KERN_ERR "%s: " format, MY_NAME, ## arg)
41 #define info(format, arg...) \
42 printk(KERN_INFO "%s: " format, MY_NAME, ## arg)
43 #define warn(format, arg...) \
44 printk(KERN_WARNING "%s: " format, MY_NAME, ## arg)
45
46 #define ctrl_dbg(ctrl, format, arg...) \
47 dev_dbg(&ctrl->pcie->device, format, ## arg)
48 #define ctrl_err(ctrl, format, arg...) \
49 dev_err(&ctrl->pcie->device, format, ## arg)
50 #define ctrl_info(ctrl, format, arg...) \
51 dev_info(&ctrl->pcie->device, format, ## arg)
52 #define ctrl_warn(ctrl, format, arg...) \
53 dev_warn(&ctrl->pcie->device, format, ## arg)
54
55 #define SLOT_NAME_SIZE 10
56
57 /**
58 * struct controller - PCIe hotplug controller
59 * @pcie: pointer to the controller's PCIe port service device
60 * @slot_cap: cached copy of the Slot Capabilities register
61 * @slot_ctrl: cached copy of the Slot Control register
62 * @ctrl_lock: serializes writes to the Slot Control register
63 * @cmd_started: jiffies when the Slot Control register was last written;
64 * the next write is allowed 1 second later, absent a Command Completed
65 * interrupt (PCIe r4.0, sec 6.7.3.2)
66 * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler
67 * on reception of a Command Completed event
68 * @queue: wait queue to wake up on reception of a Command Completed event,
69 * used for synchronous writes to the Slot Control register
70 * @pending_events: used by the IRQ handler to save events retrieved from the
71 * Slot Status register for later consumption by the IRQ thread
72 * @notification_enabled: whether the IRQ was requested successfully
73 * @power_fault_detected: whether a power fault was detected by the hardware
74 * that has not yet been cleared by the user
75 * @poll_thread: thread to poll for slot events if no IRQ is available,
76 * enabled with pciehp_poll_mode module parameter
77 * @state: current state machine position
78 * @state_lock: protects reads and writes of @state;
79 * protects scheduling, execution and cancellation of @button_work
80 * @button_work: work item to turn the slot on or off after 5 seconds
81 * in response to an Attention Button press
82 * @hotplug_slot: structure registered with the PCI hotplug core
83 * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
84 * Link Status register and to the Presence Detect State bit in the Slot
85 * Status register during a slot reset which may cause them to flap
86 * @request_result: result of last user request submitted to the IRQ thread
87 * @requester: wait queue to wake up on completion of user request,
88 * used for synchronous slot enable/disable request via sysfs
89 *
90 * PCIe hotplug has a 1:1 relationship between controller and slot, hence
91 * unlike other drivers, the two aren't represented by separate structures.
92 */
93 struct controller {
94 struct pcie_device *pcie;
95
96 u32 slot_cap; /* capabilities and quirks */
97
98 u16 slot_ctrl; /* control register access */
99 struct mutex ctrl_lock;
100 unsigned long cmd_started;
101 unsigned int cmd_busy:1;
102 wait_queue_head_t queue;
103
104 atomic_t pending_events; /* event handling */
105 unsigned int notification_enabled:1;
106 unsigned int power_fault_detected;
107 struct task_struct *poll_thread;
108
109 u8 state; /* state machine */
110 struct mutex state_lock;
111 struct delayed_work button_work;
112
113 struct hotplug_slot hotplug_slot; /* hotplug core interface */
114 struct rw_semaphore reset_lock;
115 int request_result;
116 wait_queue_head_t requester;
117 };
118
119 /**
120 * DOC: Slot state
121 *
122 * @OFF_STATE: slot is powered off, no subordinate devices are enumerated
123 * @BLINKINGON_STATE: slot will be powered on after the 5 second delay,
124 * green led is blinking
125 * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay,
126 * green led is blinking
127 * @POWERON_STATE: slot is currently powering on
128 * @POWEROFF_STATE: slot is currently powering off
129 * @ON_STATE: slot is powered on, subordinate devices have been enumerated
130 */
131 #define OFF_STATE 0
132 #define BLINKINGON_STATE 1
133 #define BLINKINGOFF_STATE 2
134 #define POWERON_STATE 3
135 #define POWEROFF_STATE 4
136 #define ON_STATE 5
137
138 /**
139 * DOC: Flags to request an action from the IRQ thread
140 *
141 * These are stored together with events read from the Slot Status register,
142 * hence must be greater than its 16-bit width.
143 *
144 * %DISABLE_SLOT: Disable the slot in response to a user request via sysfs or
145 * an Attention Button press after the 5 second delay
146 * %RERUN_ISR: Used by the IRQ handler to inform the IRQ thread that the
147 * hotplug port was inaccessible when the interrupt occurred, requiring
148 * that the IRQ handler is rerun by the IRQ thread after it has made the
149 * hotplug port accessible by runtime resuming its parents to D0
150 */
151 #define DISABLE_SLOT (1 << 16)
152 #define RERUN_ISR (1 << 17)
153
154 #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
155 #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
156 #define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
157 #define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
158 #define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
159 #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
160 #define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
161 #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
162 #define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
163
164 void pciehp_request(struct controller *ctrl, int action);
165 void pciehp_handle_button_press(struct controller *ctrl);
166 void pciehp_handle_disable_request(struct controller *ctrl);
167 void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events);
168 int pciehp_configure_device(struct controller *ctrl);
169 void pciehp_unconfigure_device(struct controller *ctrl, bool presence);
170 void pciehp_queue_pushbutton_work(struct work_struct *work);
171 struct controller *pcie_init(struct pcie_device *dev);
172 int pcie_init_notification(struct controller *ctrl);
173 void pcie_shutdown_notification(struct controller *ctrl);
174 void pcie_clear_hotplug_events(struct controller *ctrl);
175 void pcie_enable_interrupt(struct controller *ctrl);
176 void pcie_disable_interrupt(struct controller *ctrl);
177 int pciehp_power_on_slot(struct controller *ctrl);
178 void pciehp_power_off_slot(struct controller *ctrl);
179 void pciehp_get_power_status(struct controller *ctrl, u8 *status);
180
181 void pciehp_set_attention_status(struct controller *ctrl, u8 status);
182 void pciehp_get_latch_status(struct controller *ctrl, u8 *status);
183 int pciehp_query_power_fault(struct controller *ctrl);
184 void pciehp_green_led_on(struct controller *ctrl);
185 void pciehp_green_led_off(struct controller *ctrl);
186 void pciehp_green_led_blink(struct controller *ctrl);
187 bool pciehp_card_present(struct controller *ctrl);
188 bool pciehp_card_present_or_link_active(struct controller *ctrl);
189 int pciehp_check_link_status(struct controller *ctrl);
190 bool pciehp_check_link_active(struct controller *ctrl);
191 void pciehp_release_ctrl(struct controller *ctrl);
192
193 int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot);
194 int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot);
195 int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, int probe);
196 int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status);
197 int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status);
198 int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status);
199
200 static inline const char *slot_name(struct controller *ctrl)
201 {
202 return hotplug_slot_name(&ctrl->hotplug_slot);
203 }
204
205 static inline struct controller *to_ctrl(struct hotplug_slot *hotplug_slot)
206 {
207 return container_of(hotplug_slot, struct controller, hotplug_slot);
208 }
209
210 #endif /* _PCIEHP_H */