]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/pci/iov.c
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[mirror_ubuntu-bionic-kernel.git] / drivers / pci / iov.c
1 /*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
8 * Address Translation Service 1.0
9 */
10
11 #include <linux/pci.h>
12 #include <linux/slab.h>
13 #include <linux/mutex.h>
14 #include <linux/export.h>
15 #include <linux/string.h>
16 #include <linux/delay.h>
17 #include <linux/pci-ats.h>
18 #include "pci.h"
19
20 #define VIRTFN_ID_LEN 16
21
22 int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
23 {
24 if (!dev->is_physfn)
25 return -EINVAL;
26 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
27 dev->sriov->stride * vf_id) >> 8);
28 }
29
30 int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
31 {
32 if (!dev->is_physfn)
33 return -EINVAL;
34 return (dev->devfn + dev->sriov->offset +
35 dev->sriov->stride * vf_id) & 0xff;
36 }
37
38 /*
39 * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
40 * change when NumVFs changes.
41 *
42 * Update iov->offset and iov->stride when NumVFs is written.
43 */
44 static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
45 {
46 struct pci_sriov *iov = dev->sriov;
47
48 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
49 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
50 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
51 }
52
53 /*
54 * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
55 * determine how many additional bus numbers will be consumed by VFs.
56 *
57 * Iterate over all valid NumVFs, validate offset and stride, and calculate
58 * the maximum number of bus numbers that could ever be required.
59 */
60 static int compute_max_vf_buses(struct pci_dev *dev)
61 {
62 struct pci_sriov *iov = dev->sriov;
63 int nr_virtfn, busnr, rc = 0;
64
65 for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
66 pci_iov_set_numvfs(dev, nr_virtfn);
67 if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
68 rc = -EIO;
69 goto out;
70 }
71
72 busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
73 if (busnr > iov->max_VF_buses)
74 iov->max_VF_buses = busnr;
75 }
76
77 out:
78 pci_iov_set_numvfs(dev, 0);
79 return rc;
80 }
81
82 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
83 {
84 struct pci_bus *child;
85
86 if (bus->number == busnr)
87 return bus;
88
89 child = pci_find_bus(pci_domain_nr(bus), busnr);
90 if (child)
91 return child;
92
93 child = pci_add_new_bus(bus, NULL, busnr);
94 if (!child)
95 return NULL;
96
97 pci_bus_insert_busn_res(child, busnr, busnr);
98
99 return child;
100 }
101
102 static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
103 {
104 if (physbus != virtbus && list_empty(&virtbus->devices))
105 pci_remove_bus(virtbus);
106 }
107
108 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
109 {
110 if (!dev->is_physfn)
111 return 0;
112
113 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
114 }
115
116 int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset)
117 {
118 int i;
119 int rc = -ENOMEM;
120 u64 size;
121 char buf[VIRTFN_ID_LEN];
122 struct pci_dev *virtfn;
123 struct resource *res;
124 struct pci_sriov *iov = dev->sriov;
125 struct pci_bus *bus;
126
127 bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
128 if (!bus)
129 goto failed;
130
131 virtfn = pci_alloc_dev(bus);
132 if (!virtfn)
133 goto failed0;
134
135 virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
136 virtfn->vendor = dev->vendor;
137 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
138 rc = pci_setup_device(virtfn);
139 if (rc)
140 goto failed0;
141
142 virtfn->dev.parent = dev->dev.parent;
143 virtfn->physfn = pci_dev_get(dev);
144 virtfn->is_virtfn = 1;
145 virtfn->multifunction = 0;
146
147 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
148 res = &dev->resource[i + PCI_IOV_RESOURCES];
149 if (!res->parent)
150 continue;
151 virtfn->resource[i].name = pci_name(virtfn);
152 virtfn->resource[i].flags = res->flags;
153 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
154 virtfn->resource[i].start = res->start + size * id;
155 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
156 rc = request_resource(res, &virtfn->resource[i]);
157 BUG_ON(rc);
158 }
159
160 if (reset)
161 __pci_reset_function(virtfn);
162
163 pci_device_add(virtfn, virtfn->bus);
164
165 pci_bus_add_device(virtfn);
166 sprintf(buf, "virtfn%u", id);
167 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
168 if (rc)
169 goto failed1;
170 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
171 if (rc)
172 goto failed2;
173
174 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
175
176 return 0;
177
178 failed2:
179 sysfs_remove_link(&dev->dev.kobj, buf);
180 failed1:
181 pci_dev_put(dev);
182 pci_stop_and_remove_bus_device(virtfn);
183 failed0:
184 virtfn_remove_bus(dev->bus, bus);
185 failed:
186
187 return rc;
188 }
189
190 void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset)
191 {
192 char buf[VIRTFN_ID_LEN];
193 struct pci_dev *virtfn;
194
195 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
196 pci_iov_virtfn_bus(dev, id),
197 pci_iov_virtfn_devfn(dev, id));
198 if (!virtfn)
199 return;
200
201 if (reset) {
202 device_release_driver(&virtfn->dev);
203 __pci_reset_function(virtfn);
204 }
205
206 sprintf(buf, "virtfn%u", id);
207 sysfs_remove_link(&dev->dev.kobj, buf);
208 /*
209 * pci_stop_dev() could have been called for this virtfn already,
210 * so the directory for the virtfn may have been removed before.
211 * Double check to avoid spurious sysfs warnings.
212 */
213 if (virtfn->dev.kobj.sd)
214 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
215
216 pci_stop_and_remove_bus_device(virtfn);
217 virtfn_remove_bus(dev->bus, virtfn->bus);
218
219 /* balance pci_get_domain_bus_and_slot() */
220 pci_dev_put(virtfn);
221 pci_dev_put(dev);
222 }
223
224 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
225 {
226 return 0;
227 }
228
229 int __weak pcibios_sriov_disable(struct pci_dev *pdev)
230 {
231 return 0;
232 }
233
234 static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
235 {
236 int rc;
237 int i;
238 int nres;
239 u16 initial;
240 struct resource *res;
241 struct pci_dev *pdev;
242 struct pci_sriov *iov = dev->sriov;
243 int bars = 0;
244 int bus;
245
246 if (!nr_virtfn)
247 return 0;
248
249 if (iov->num_VFs)
250 return -EINVAL;
251
252 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
253 if (initial > iov->total_VFs ||
254 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
255 return -EIO;
256
257 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
258 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
259 return -EINVAL;
260
261 nres = 0;
262 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
263 bars |= (1 << (i + PCI_IOV_RESOURCES));
264 res = &dev->resource[i + PCI_IOV_RESOURCES];
265 if (res->parent)
266 nres++;
267 }
268 if (nres != iov->nres) {
269 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
270 return -ENOMEM;
271 }
272
273 bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
274 if (bus > dev->bus->busn_res.end) {
275 dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
276 nr_virtfn, bus, &dev->bus->busn_res);
277 return -ENOMEM;
278 }
279
280 if (pci_enable_resources(dev, bars)) {
281 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
282 return -ENOMEM;
283 }
284
285 if (iov->link != dev->devfn) {
286 pdev = pci_get_slot(dev->bus, iov->link);
287 if (!pdev)
288 return -ENODEV;
289
290 if (!pdev->is_physfn) {
291 pci_dev_put(pdev);
292 return -ENOSYS;
293 }
294
295 rc = sysfs_create_link(&dev->dev.kobj,
296 &pdev->dev.kobj, "dep_link");
297 pci_dev_put(pdev);
298 if (rc)
299 return rc;
300 }
301
302 iov->initial_VFs = initial;
303 if (nr_virtfn < initial)
304 initial = nr_virtfn;
305
306 rc = pcibios_sriov_enable(dev, initial);
307 if (rc) {
308 dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc);
309 goto err_pcibios;
310 }
311
312 pci_iov_set_numvfs(dev, nr_virtfn);
313 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
314 pci_cfg_access_lock(dev);
315 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
316 msleep(100);
317 pci_cfg_access_unlock(dev);
318
319 for (i = 0; i < initial; i++) {
320 rc = pci_iov_add_virtfn(dev, i, 0);
321 if (rc)
322 goto failed;
323 }
324
325 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
326 iov->num_VFs = nr_virtfn;
327
328 return 0;
329
330 failed:
331 while (i--)
332 pci_iov_remove_virtfn(dev, i, 0);
333
334 pcibios_sriov_disable(dev);
335 err_pcibios:
336 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
337 pci_cfg_access_lock(dev);
338 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
339 ssleep(1);
340 pci_cfg_access_unlock(dev);
341
342 if (iov->link != dev->devfn)
343 sysfs_remove_link(&dev->dev.kobj, "dep_link");
344
345 pci_iov_set_numvfs(dev, 0);
346 return rc;
347 }
348
349 static void sriov_disable(struct pci_dev *dev)
350 {
351 int i;
352 struct pci_sriov *iov = dev->sriov;
353
354 if (!iov->num_VFs)
355 return;
356
357 for (i = 0; i < iov->num_VFs; i++)
358 pci_iov_remove_virtfn(dev, i, 0);
359
360 pcibios_sriov_disable(dev);
361
362 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
363 pci_cfg_access_lock(dev);
364 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
365 ssleep(1);
366 pci_cfg_access_unlock(dev);
367
368 if (iov->link != dev->devfn)
369 sysfs_remove_link(&dev->dev.kobj, "dep_link");
370
371 iov->num_VFs = 0;
372 pci_iov_set_numvfs(dev, 0);
373 }
374
375 static int sriov_init(struct pci_dev *dev, int pos)
376 {
377 int i, bar64;
378 int rc;
379 int nres;
380 u32 pgsz;
381 u16 ctrl, total;
382 struct pci_sriov *iov;
383 struct resource *res;
384 struct pci_dev *pdev;
385
386 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
387 if (ctrl & PCI_SRIOV_CTRL_VFE) {
388 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
389 ssleep(1);
390 }
391
392 ctrl = 0;
393 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
394 if (pdev->is_physfn)
395 goto found;
396
397 pdev = NULL;
398 if (pci_ari_enabled(dev->bus))
399 ctrl |= PCI_SRIOV_CTRL_ARI;
400
401 found:
402 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
403
404 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
405 if (!total)
406 return 0;
407
408 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
409 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
410 pgsz &= ~((1 << i) - 1);
411 if (!pgsz)
412 return -EIO;
413
414 pgsz &= ~(pgsz - 1);
415 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
416
417 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
418 if (!iov)
419 return -ENOMEM;
420
421 nres = 0;
422 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
423 res = &dev->resource[i + PCI_IOV_RESOURCES];
424 /*
425 * If it is already FIXED, don't change it, something
426 * (perhaps EA or header fixups) wants it this way.
427 */
428 if (res->flags & IORESOURCE_PCI_FIXED)
429 bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
430 else
431 bar64 = __pci_read_base(dev, pci_bar_unknown, res,
432 pos + PCI_SRIOV_BAR + i * 4);
433 if (!res->flags)
434 continue;
435 if (resource_size(res) & (PAGE_SIZE - 1)) {
436 rc = -EIO;
437 goto failed;
438 }
439 iov->barsz[i] = resource_size(res);
440 res->end = res->start + resource_size(res) * total - 1;
441 dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
442 i, res, i, total);
443 i += bar64;
444 nres++;
445 }
446
447 iov->pos = pos;
448 iov->nres = nres;
449 iov->ctrl = ctrl;
450 iov->total_VFs = total;
451 iov->pgsz = pgsz;
452 iov->self = dev;
453 iov->drivers_autoprobe = true;
454 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
455 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
456 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
457 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
458
459 if (pdev)
460 iov->dev = pci_dev_get(pdev);
461 else
462 iov->dev = dev;
463
464 mutex_init(&iov->lock);
465
466 dev->sriov = iov;
467 dev->is_physfn = 1;
468 rc = compute_max_vf_buses(dev);
469 if (rc)
470 goto fail_max_buses;
471
472 return 0;
473
474 fail_max_buses:
475 dev->sriov = NULL;
476 dev->is_physfn = 0;
477 failed:
478 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
479 res = &dev->resource[i + PCI_IOV_RESOURCES];
480 res->flags = 0;
481 }
482
483 kfree(iov);
484 return rc;
485 }
486
487 static void sriov_release(struct pci_dev *dev)
488 {
489 BUG_ON(dev->sriov->num_VFs);
490
491 if (dev != dev->sriov->dev)
492 pci_dev_put(dev->sriov->dev);
493
494 mutex_destroy(&dev->sriov->lock);
495
496 kfree(dev->sriov);
497 dev->sriov = NULL;
498 }
499
500 static void sriov_restore_state(struct pci_dev *dev)
501 {
502 int i;
503 u16 ctrl;
504 struct pci_sriov *iov = dev->sriov;
505
506 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
507 if (ctrl & PCI_SRIOV_CTRL_VFE)
508 return;
509
510 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
511 pci_update_resource(dev, i);
512
513 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
514 pci_iov_set_numvfs(dev, iov->num_VFs);
515 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
516 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
517 msleep(100);
518 }
519
520 /**
521 * pci_iov_init - initialize the IOV capability
522 * @dev: the PCI device
523 *
524 * Returns 0 on success, or negative on failure.
525 */
526 int pci_iov_init(struct pci_dev *dev)
527 {
528 int pos;
529
530 if (!pci_is_pcie(dev))
531 return -ENODEV;
532
533 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
534 if (pos)
535 return sriov_init(dev, pos);
536
537 return -ENODEV;
538 }
539
540 /**
541 * pci_iov_release - release resources used by the IOV capability
542 * @dev: the PCI device
543 */
544 void pci_iov_release(struct pci_dev *dev)
545 {
546 if (dev->is_physfn)
547 sriov_release(dev);
548 }
549
550 /**
551 * pci_iov_update_resource - update a VF BAR
552 * @dev: the PCI device
553 * @resno: the resource number
554 *
555 * Update a VF BAR in the SR-IOV capability of a PF.
556 */
557 void pci_iov_update_resource(struct pci_dev *dev, int resno)
558 {
559 struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
560 struct resource *res = dev->resource + resno;
561 int vf_bar = resno - PCI_IOV_RESOURCES;
562 struct pci_bus_region region;
563 u16 cmd;
564 u32 new;
565 int reg;
566
567 /*
568 * The generic pci_restore_bars() path calls this for all devices,
569 * including VFs and non-SR-IOV devices. If this is not a PF, we
570 * have nothing to do.
571 */
572 if (!iov)
573 return;
574
575 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
576 if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
577 dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
578 vf_bar, res);
579 return;
580 }
581
582 /*
583 * Ignore unimplemented BARs, unused resource slots for 64-bit
584 * BARs, and non-movable resources, e.g., those described via
585 * Enhanced Allocation.
586 */
587 if (!res->flags)
588 return;
589
590 if (res->flags & IORESOURCE_UNSET)
591 return;
592
593 if (res->flags & IORESOURCE_PCI_FIXED)
594 return;
595
596 pcibios_resource_to_bus(dev->bus, &region, res);
597 new = region.start;
598 new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
599
600 reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
601 pci_write_config_dword(dev, reg, new);
602 if (res->flags & IORESOURCE_MEM_64) {
603 new = region.start >> 16 >> 16;
604 pci_write_config_dword(dev, reg + 4, new);
605 }
606 }
607
608 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
609 int resno)
610 {
611 return pci_iov_resource_size(dev, resno);
612 }
613
614 /**
615 * pci_sriov_resource_alignment - get resource alignment for VF BAR
616 * @dev: the PCI device
617 * @resno: the resource number
618 *
619 * Returns the alignment of the VF BAR found in the SR-IOV capability.
620 * This is not the same as the resource size which is defined as
621 * the VF BAR size multiplied by the number of VFs. The alignment
622 * is just the VF BAR size.
623 */
624 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
625 {
626 return pcibios_iov_resource_alignment(dev, resno);
627 }
628
629 /**
630 * pci_restore_iov_state - restore the state of the IOV capability
631 * @dev: the PCI device
632 */
633 void pci_restore_iov_state(struct pci_dev *dev)
634 {
635 if (dev->is_physfn)
636 sriov_restore_state(dev);
637 }
638
639 /**
640 * pci_iov_bus_range - find bus range used by Virtual Function
641 * @bus: the PCI bus
642 *
643 * Returns max number of buses (exclude current one) used by Virtual
644 * Functions.
645 */
646 int pci_iov_bus_range(struct pci_bus *bus)
647 {
648 int max = 0;
649 struct pci_dev *dev;
650
651 list_for_each_entry(dev, &bus->devices, bus_list) {
652 if (!dev->is_physfn)
653 continue;
654 if (dev->sriov->max_VF_buses > max)
655 max = dev->sriov->max_VF_buses;
656 }
657
658 return max ? max - bus->number : 0;
659 }
660
661 /**
662 * pci_enable_sriov - enable the SR-IOV capability
663 * @dev: the PCI device
664 * @nr_virtfn: number of virtual functions to enable
665 *
666 * Returns 0 on success, or negative on failure.
667 */
668 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
669 {
670 might_sleep();
671
672 if (!dev->is_physfn)
673 return -ENOSYS;
674
675 return sriov_enable(dev, nr_virtfn);
676 }
677 EXPORT_SYMBOL_GPL(pci_enable_sriov);
678
679 /**
680 * pci_disable_sriov - disable the SR-IOV capability
681 * @dev: the PCI device
682 */
683 void pci_disable_sriov(struct pci_dev *dev)
684 {
685 might_sleep();
686
687 if (!dev->is_physfn)
688 return;
689
690 sriov_disable(dev);
691 }
692 EXPORT_SYMBOL_GPL(pci_disable_sriov);
693
694 /**
695 * pci_num_vf - return number of VFs associated with a PF device_release_driver
696 * @dev: the PCI device
697 *
698 * Returns number of VFs, or 0 if SR-IOV is not enabled.
699 */
700 int pci_num_vf(struct pci_dev *dev)
701 {
702 if (!dev->is_physfn)
703 return 0;
704
705 return dev->sriov->num_VFs;
706 }
707 EXPORT_SYMBOL_GPL(pci_num_vf);
708
709 /**
710 * pci_vfs_assigned - returns number of VFs are assigned to a guest
711 * @dev: the PCI device
712 *
713 * Returns number of VFs belonging to this device that are assigned to a guest.
714 * If device is not a physical function returns 0.
715 */
716 int pci_vfs_assigned(struct pci_dev *dev)
717 {
718 struct pci_dev *vfdev;
719 unsigned int vfs_assigned = 0;
720 unsigned short dev_id;
721
722 /* only search if we are a PF */
723 if (!dev->is_physfn)
724 return 0;
725
726 /*
727 * determine the device ID for the VFs, the vendor ID will be the
728 * same as the PF so there is no need to check for that one
729 */
730 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
731
732 /* loop through all the VFs to see if we own any that are assigned */
733 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
734 while (vfdev) {
735 /*
736 * It is considered assigned if it is a virtual function with
737 * our dev as the physical function and the assigned bit is set
738 */
739 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
740 pci_is_dev_assigned(vfdev))
741 vfs_assigned++;
742
743 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
744 }
745
746 return vfs_assigned;
747 }
748 EXPORT_SYMBOL_GPL(pci_vfs_assigned);
749
750 /**
751 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
752 * @dev: the PCI PF device
753 * @numvfs: number that should be used for TotalVFs supported
754 *
755 * Should be called from PF driver's probe routine with
756 * device's mutex held.
757 *
758 * Returns 0 if PF is an SRIOV-capable device and
759 * value of numvfs valid. If not a PF return -ENOSYS;
760 * if numvfs is invalid return -EINVAL;
761 * if VFs already enabled, return -EBUSY.
762 */
763 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
764 {
765 if (!dev->is_physfn)
766 return -ENOSYS;
767 if (numvfs > dev->sriov->total_VFs)
768 return -EINVAL;
769
770 /* Shouldn't change if VFs already enabled */
771 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
772 return -EBUSY;
773 else
774 dev->sriov->driver_max_VFs = numvfs;
775
776 return 0;
777 }
778 EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
779
780 /**
781 * pci_sriov_get_totalvfs -- get total VFs supported on this device
782 * @dev: the PCI PF device
783 *
784 * For a PCIe device with SRIOV support, return the PCIe
785 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
786 * if the driver reduced it. Otherwise 0.
787 */
788 int pci_sriov_get_totalvfs(struct pci_dev *dev)
789 {
790 if (!dev->is_physfn)
791 return 0;
792
793 if (dev->sriov->driver_max_VFs)
794 return dev->sriov->driver_max_VFs;
795
796 return dev->sriov->total_VFs;
797 }
798 EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);