1 // SPDX-License-Identifier: GPL-2.0
3 * PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 * Copyright (C) 2016 Christoph Hellwig.
10 #include <linux/err.h>
12 #include <linux/irq.h>
13 #include <linux/interrupt.h>
14 #include <linux/export.h>
15 #include <linux/ioport.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
18 #include <linux/msi.h>
19 #include <linux/smp.h>
20 #include <linux/errno.h>
22 #include <linux/acpi_iort.h>
23 #include <linux/slab.h>
24 #include <linux/irqdomain.h>
25 #include <linux/of_irq.h>
31 static int pci_msi_enable
= 1;
32 int pci_msi_ignore_mask
;
34 #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
36 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
37 static int pci_msi_setup_msi_irqs(struct pci_dev
*dev
, int nvec
, int type
)
39 struct irq_domain
*domain
;
41 domain
= dev_get_msi_domain(&dev
->dev
);
42 if (domain
&& irq_domain_is_hierarchy(domain
))
43 return msi_domain_alloc_irqs(domain
, &dev
->dev
, nvec
);
45 return arch_setup_msi_irqs(dev
, nvec
, type
);
48 static void pci_msi_teardown_msi_irqs(struct pci_dev
*dev
)
50 struct irq_domain
*domain
;
52 domain
= dev_get_msi_domain(&dev
->dev
);
53 if (domain
&& irq_domain_is_hierarchy(domain
))
54 msi_domain_free_irqs(domain
, &dev
->dev
);
56 arch_teardown_msi_irqs(dev
);
59 #define pci_msi_setup_msi_irqs arch_setup_msi_irqs
60 #define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
63 #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
65 int __weak
arch_setup_msi_irq(struct pci_dev
*dev
, struct msi_desc
*desc
)
70 void __weak
arch_teardown_msi_irq(unsigned int irq
)
74 int __weak
arch_setup_msi_irqs(struct pci_dev
*dev
, int nvec
, int type
)
76 struct msi_desc
*entry
;
80 * If an architecture wants to support multiple MSI, it needs to
81 * override arch_setup_msi_irqs()
83 if (type
== PCI_CAP_ID_MSI
&& nvec
> 1)
86 for_each_pci_msi_entry(entry
, dev
) {
87 ret
= arch_setup_msi_irq(dev
, entry
);
97 void __weak
arch_teardown_msi_irqs(struct pci_dev
*dev
)
100 struct msi_desc
*entry
;
102 for_each_pci_msi_entry(entry
, dev
)
104 for (i
= 0; i
< entry
->nvec_used
; i
++)
105 arch_teardown_msi_irq(entry
->irq
+ i
);
107 #endif /* CONFIG_PCI_MSI_ARCH_FALLBACKS */
109 static void default_restore_msi_irq(struct pci_dev
*dev
, int irq
)
111 struct msi_desc
*entry
;
114 if (dev
->msix_enabled
) {
115 for_each_pci_msi_entry(entry
, dev
) {
116 if (irq
== entry
->irq
)
119 } else if (dev
->msi_enabled
) {
120 entry
= irq_get_msi_desc(irq
);
124 __pci_write_msi_msg(entry
, &entry
->msg
);
127 void __weak
arch_restore_msi_irqs(struct pci_dev
*dev
)
129 return default_restore_msi_irqs(dev
);
132 static inline __attribute_const__ u32
msi_mask(unsigned x
)
134 /* Don't shift by >= width of type */
137 return (1 << (1 << x
)) - 1;
141 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
142 * mask all MSI interrupts by clearing the MSI enable bit does not work
143 * reliably as devices without an INTx disable bit will then generate a
144 * level IRQ which will never be cleared.
146 u32
__pci_msi_desc_mask_irq(struct msi_desc
*desc
, u32 mask
, u32 flag
)
148 u32 mask_bits
= desc
->masked
;
150 if (pci_msi_ignore_mask
|| !desc
->msi_attrib
.maskbit
)
155 pci_write_config_dword(msi_desc_to_pci_dev(desc
), desc
->mask_pos
,
161 static void msi_mask_irq(struct msi_desc
*desc
, u32 mask
, u32 flag
)
163 desc
->masked
= __pci_msi_desc_mask_irq(desc
, mask
, flag
);
166 static void __iomem
*pci_msix_desc_addr(struct msi_desc
*desc
)
168 if (desc
->msi_attrib
.is_virtual
)
171 return desc
->mask_base
+
172 desc
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
;
176 * This internal function does not flush PCI writes to the device.
177 * All users must ensure that they read from the device before either
178 * assuming that the device state is up to date, or returning out of this
179 * file. This saves a few milliseconds when initialising devices with lots
180 * of MSI-X interrupts.
182 u32
__pci_msix_desc_mask_irq(struct msi_desc
*desc
, u32 flag
)
184 u32 mask_bits
= desc
->masked
;
185 void __iomem
*desc_addr
;
187 if (pci_msi_ignore_mask
)
190 desc_addr
= pci_msix_desc_addr(desc
);
194 mask_bits
&= ~PCI_MSIX_ENTRY_CTRL_MASKBIT
;
195 if (flag
& PCI_MSIX_ENTRY_CTRL_MASKBIT
)
196 mask_bits
|= PCI_MSIX_ENTRY_CTRL_MASKBIT
;
198 writel(mask_bits
, desc_addr
+ PCI_MSIX_ENTRY_VECTOR_CTRL
);
203 static void msix_mask_irq(struct msi_desc
*desc
, u32 flag
)
205 desc
->masked
= __pci_msix_desc_mask_irq(desc
, flag
);
208 static void msi_set_mask_bit(struct irq_data
*data
, u32 flag
)
210 struct msi_desc
*desc
= irq_data_get_msi_desc(data
);
212 if (desc
->msi_attrib
.is_msix
) {
213 msix_mask_irq(desc
, flag
);
214 readl(desc
->mask_base
); /* Flush write to device */
216 unsigned offset
= data
->irq
- desc
->irq
;
217 msi_mask_irq(desc
, 1 << offset
, flag
<< offset
);
222 * pci_msi_mask_irq - Generic IRQ chip callback to mask PCI/MSI interrupts
223 * @data: pointer to irqdata associated to that interrupt
225 void pci_msi_mask_irq(struct irq_data
*data
)
227 msi_set_mask_bit(data
, 1);
229 EXPORT_SYMBOL_GPL(pci_msi_mask_irq
);
232 * pci_msi_unmask_irq - Generic IRQ chip callback to unmask PCI/MSI interrupts
233 * @data: pointer to irqdata associated to that interrupt
235 void pci_msi_unmask_irq(struct irq_data
*data
)
237 msi_set_mask_bit(data
, 0);
239 EXPORT_SYMBOL_GPL(pci_msi_unmask_irq
);
241 void default_restore_msi_irqs(struct pci_dev
*dev
)
243 struct msi_desc
*entry
;
245 for_each_pci_msi_entry(entry
, dev
)
246 default_restore_msi_irq(dev
, entry
->irq
);
249 void __pci_read_msi_msg(struct msi_desc
*entry
, struct msi_msg
*msg
)
251 struct pci_dev
*dev
= msi_desc_to_pci_dev(entry
);
253 BUG_ON(dev
->current_state
!= PCI_D0
);
255 if (entry
->msi_attrib
.is_msix
) {
256 void __iomem
*base
= pci_msix_desc_addr(entry
);
263 msg
->address_lo
= readl(base
+ PCI_MSIX_ENTRY_LOWER_ADDR
);
264 msg
->address_hi
= readl(base
+ PCI_MSIX_ENTRY_UPPER_ADDR
);
265 msg
->data
= readl(base
+ PCI_MSIX_ENTRY_DATA
);
267 int pos
= dev
->msi_cap
;
270 pci_read_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_LO
,
272 if (entry
->msi_attrib
.is_64
) {
273 pci_read_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_HI
,
275 pci_read_config_word(dev
, pos
+ PCI_MSI_DATA_64
, &data
);
278 pci_read_config_word(dev
, pos
+ PCI_MSI_DATA_32
, &data
);
284 void __pci_write_msi_msg(struct msi_desc
*entry
, struct msi_msg
*msg
)
286 struct pci_dev
*dev
= msi_desc_to_pci_dev(entry
);
288 if (dev
->current_state
!= PCI_D0
|| pci_dev_is_disconnected(dev
)) {
289 /* Don't touch the hardware now */
290 } else if (entry
->msi_attrib
.is_msix
) {
291 void __iomem
*base
= pci_msix_desc_addr(entry
);
296 writel(msg
->address_lo
, base
+ PCI_MSIX_ENTRY_LOWER_ADDR
);
297 writel(msg
->address_hi
, base
+ PCI_MSIX_ENTRY_UPPER_ADDR
);
298 writel(msg
->data
, base
+ PCI_MSIX_ENTRY_DATA
);
300 int pos
= dev
->msi_cap
;
303 pci_read_config_word(dev
, pos
+ PCI_MSI_FLAGS
, &msgctl
);
304 msgctl
&= ~PCI_MSI_FLAGS_QSIZE
;
305 msgctl
|= entry
->msi_attrib
.multiple
<< 4;
306 pci_write_config_word(dev
, pos
+ PCI_MSI_FLAGS
, msgctl
);
308 pci_write_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_LO
,
310 if (entry
->msi_attrib
.is_64
) {
311 pci_write_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_HI
,
313 pci_write_config_word(dev
, pos
+ PCI_MSI_DATA_64
,
316 pci_write_config_word(dev
, pos
+ PCI_MSI_DATA_32
,
324 if (entry
->write_msi_msg
)
325 entry
->write_msi_msg(entry
, entry
->write_msi_msg_data
);
329 void pci_write_msi_msg(unsigned int irq
, struct msi_msg
*msg
)
331 struct msi_desc
*entry
= irq_get_msi_desc(irq
);
333 __pci_write_msi_msg(entry
, msg
);
335 EXPORT_SYMBOL_GPL(pci_write_msi_msg
);
337 static void free_msi_irqs(struct pci_dev
*dev
)
339 struct list_head
*msi_list
= dev_to_msi_list(&dev
->dev
);
340 struct msi_desc
*entry
, *tmp
;
341 struct attribute
**msi_attrs
;
342 struct device_attribute
*dev_attr
;
345 for_each_pci_msi_entry(entry
, dev
)
347 for (i
= 0; i
< entry
->nvec_used
; i
++)
348 BUG_ON(irq_has_action(entry
->irq
+ i
));
350 pci_msi_teardown_msi_irqs(dev
);
352 list_for_each_entry_safe(entry
, tmp
, msi_list
, list
) {
353 if (entry
->msi_attrib
.is_msix
) {
354 if (list_is_last(&entry
->list
, msi_list
))
355 iounmap(entry
->mask_base
);
358 list_del(&entry
->list
);
359 free_msi_entry(entry
);
362 if (dev
->msi_irq_groups
) {
363 sysfs_remove_groups(&dev
->dev
.kobj
, dev
->msi_irq_groups
);
364 msi_attrs
= dev
->msi_irq_groups
[0]->attrs
;
365 while (msi_attrs
[count
]) {
366 dev_attr
= container_of(msi_attrs
[count
],
367 struct device_attribute
, attr
);
368 kfree(dev_attr
->attr
.name
);
373 kfree(dev
->msi_irq_groups
[0]);
374 kfree(dev
->msi_irq_groups
);
375 dev
->msi_irq_groups
= NULL
;
379 static void pci_intx_for_msi(struct pci_dev
*dev
, int enable
)
381 if (!(dev
->dev_flags
& PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG
))
382 pci_intx(dev
, enable
);
385 static void pci_msi_set_enable(struct pci_dev
*dev
, int enable
)
389 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
390 control
&= ~PCI_MSI_FLAGS_ENABLE
;
392 control
|= PCI_MSI_FLAGS_ENABLE
;
393 pci_write_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, control
);
396 static void __pci_restore_msi_state(struct pci_dev
*dev
)
399 struct msi_desc
*entry
;
401 if (!dev
->msi_enabled
)
404 entry
= irq_get_msi_desc(dev
->irq
);
406 pci_intx_for_msi(dev
, 0);
407 pci_msi_set_enable(dev
, 0);
408 arch_restore_msi_irqs(dev
);
410 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
411 msi_mask_irq(entry
, msi_mask(entry
->msi_attrib
.multi_cap
),
413 control
&= ~PCI_MSI_FLAGS_QSIZE
;
414 control
|= (entry
->msi_attrib
.multiple
<< 4) | PCI_MSI_FLAGS_ENABLE
;
415 pci_write_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, control
);
418 static void pci_msix_clear_and_set_ctrl(struct pci_dev
*dev
, u16 clear
, u16 set
)
422 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &ctrl
);
425 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, ctrl
);
428 static void __pci_restore_msix_state(struct pci_dev
*dev
)
430 struct msi_desc
*entry
;
432 if (!dev
->msix_enabled
)
434 BUG_ON(list_empty(dev_to_msi_list(&dev
->dev
)));
436 /* route the table */
437 pci_intx_for_msi(dev
, 0);
438 pci_msix_clear_and_set_ctrl(dev
, 0,
439 PCI_MSIX_FLAGS_ENABLE
| PCI_MSIX_FLAGS_MASKALL
);
441 arch_restore_msi_irqs(dev
);
442 for_each_pci_msi_entry(entry
, dev
)
443 msix_mask_irq(entry
, entry
->masked
);
445 pci_msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_MASKALL
, 0);
448 void pci_restore_msi_state(struct pci_dev
*dev
)
450 __pci_restore_msi_state(dev
);
451 __pci_restore_msix_state(dev
);
453 EXPORT_SYMBOL_GPL(pci_restore_msi_state
);
455 static ssize_t
msi_mode_show(struct device
*dev
, struct device_attribute
*attr
,
458 struct msi_desc
*entry
;
462 retval
= kstrtoul(attr
->attr
.name
, 10, &irq
);
466 entry
= irq_get_msi_desc(irq
);
468 return sprintf(buf
, "%s\n",
469 entry
->msi_attrib
.is_msix
? "msix" : "msi");
474 static int populate_msi_sysfs(struct pci_dev
*pdev
)
476 struct attribute
**msi_attrs
;
477 struct attribute
*msi_attr
;
478 struct device_attribute
*msi_dev_attr
;
479 struct attribute_group
*msi_irq_group
;
480 const struct attribute_group
**msi_irq_groups
;
481 struct msi_desc
*entry
;
487 /* Determine how many msi entries we have */
488 for_each_pci_msi_entry(entry
, pdev
)
489 num_msi
+= entry
->nvec_used
;
493 /* Dynamically create the MSI attributes for the PCI device */
494 msi_attrs
= kcalloc(num_msi
+ 1, sizeof(void *), GFP_KERNEL
);
497 for_each_pci_msi_entry(entry
, pdev
) {
498 for (i
= 0; i
< entry
->nvec_used
; i
++) {
499 msi_dev_attr
= kzalloc(sizeof(*msi_dev_attr
), GFP_KERNEL
);
502 msi_attrs
[count
] = &msi_dev_attr
->attr
;
504 sysfs_attr_init(&msi_dev_attr
->attr
);
505 msi_dev_attr
->attr
.name
= kasprintf(GFP_KERNEL
, "%d",
507 if (!msi_dev_attr
->attr
.name
)
509 msi_dev_attr
->attr
.mode
= S_IRUGO
;
510 msi_dev_attr
->show
= msi_mode_show
;
515 msi_irq_group
= kzalloc(sizeof(*msi_irq_group
), GFP_KERNEL
);
518 msi_irq_group
->name
= "msi_irqs";
519 msi_irq_group
->attrs
= msi_attrs
;
521 msi_irq_groups
= kcalloc(2, sizeof(void *), GFP_KERNEL
);
523 goto error_irq_group
;
524 msi_irq_groups
[0] = msi_irq_group
;
526 ret
= sysfs_create_groups(&pdev
->dev
.kobj
, msi_irq_groups
);
528 goto error_irq_groups
;
529 pdev
->msi_irq_groups
= msi_irq_groups
;
534 kfree(msi_irq_groups
);
536 kfree(msi_irq_group
);
539 msi_attr
= msi_attrs
[count
];
541 msi_dev_attr
= container_of(msi_attr
, struct device_attribute
, attr
);
542 kfree(msi_attr
->name
);
545 msi_attr
= msi_attrs
[count
];
551 static struct msi_desc
*
552 msi_setup_entry(struct pci_dev
*dev
, int nvec
, struct irq_affinity
*affd
)
554 struct irq_affinity_desc
*masks
= NULL
;
555 struct msi_desc
*entry
;
559 masks
= irq_create_affinity_masks(nvec
, affd
);
561 /* MSI Entry Initialization */
562 entry
= alloc_msi_entry(&dev
->dev
, nvec
, masks
);
566 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
568 entry
->msi_attrib
.is_msix
= 0;
569 entry
->msi_attrib
.is_64
= !!(control
& PCI_MSI_FLAGS_64BIT
);
570 entry
->msi_attrib
.is_virtual
= 0;
571 entry
->msi_attrib
.entry_nr
= 0;
572 entry
->msi_attrib
.maskbit
= !!(control
& PCI_MSI_FLAGS_MASKBIT
);
573 entry
->msi_attrib
.default_irq
= dev
->irq
; /* Save IOAPIC IRQ */
574 entry
->msi_attrib
.multi_cap
= (control
& PCI_MSI_FLAGS_QMASK
) >> 1;
575 entry
->msi_attrib
.multiple
= ilog2(__roundup_pow_of_two(nvec
));
577 if (control
& PCI_MSI_FLAGS_64BIT
)
578 entry
->mask_pos
= dev
->msi_cap
+ PCI_MSI_MASK_64
;
580 entry
->mask_pos
= dev
->msi_cap
+ PCI_MSI_MASK_32
;
582 /* Save the initial mask status */
583 if (entry
->msi_attrib
.maskbit
)
584 pci_read_config_dword(dev
, entry
->mask_pos
, &entry
->masked
);
591 static int msi_verify_entries(struct pci_dev
*dev
)
593 struct msi_desc
*entry
;
595 for_each_pci_msi_entry(entry
, dev
) {
596 if (entry
->msg
.address_hi
&& dev
->no_64bit_msi
) {
597 pci_err(dev
, "arch assigned 64-bit MSI address %#x%08x but device only supports 32 bits\n",
598 entry
->msg
.address_hi
, entry
->msg
.address_lo
);
606 * msi_capability_init - configure device's MSI capability structure
607 * @dev: pointer to the pci_dev data structure of MSI device function
608 * @nvec: number of interrupts to allocate
609 * @affd: description of automatic IRQ affinity assignments (may be %NULL)
611 * Setup the MSI capability structure of the device with the requested
612 * number of interrupts. A return value of zero indicates the successful
613 * setup of an entry with the new MSI IRQ. A negative return value indicates
614 * an error, and a positive return value indicates the number of interrupts
615 * which could have been allocated.
617 static int msi_capability_init(struct pci_dev
*dev
, int nvec
,
618 struct irq_affinity
*affd
)
620 struct msi_desc
*entry
;
624 pci_msi_set_enable(dev
, 0); /* Disable MSI during set up */
626 entry
= msi_setup_entry(dev
, nvec
, affd
);
630 /* All MSIs are unmasked by default; mask them all */
631 mask
= msi_mask(entry
->msi_attrib
.multi_cap
);
632 msi_mask_irq(entry
, mask
, mask
);
634 list_add_tail(&entry
->list
, dev_to_msi_list(&dev
->dev
));
636 /* Configure MSI capability structure */
637 ret
= pci_msi_setup_msi_irqs(dev
, nvec
, PCI_CAP_ID_MSI
);
639 msi_mask_irq(entry
, mask
, ~mask
);
644 ret
= msi_verify_entries(dev
);
646 msi_mask_irq(entry
, mask
, ~mask
);
651 ret
= populate_msi_sysfs(dev
);
653 msi_mask_irq(entry
, mask
, ~mask
);
658 /* Set MSI enabled bits */
659 pci_intx_for_msi(dev
, 0);
660 pci_msi_set_enable(dev
, 1);
661 dev
->msi_enabled
= 1;
663 pcibios_free_irq(dev
);
664 dev
->irq
= entry
->irq
;
668 static void __iomem
*msix_map_region(struct pci_dev
*dev
, unsigned nr_entries
)
670 resource_size_t phys_addr
;
675 pci_read_config_dword(dev
, dev
->msix_cap
+ PCI_MSIX_TABLE
,
677 bir
= (u8
)(table_offset
& PCI_MSIX_TABLE_BIR
);
678 flags
= pci_resource_flags(dev
, bir
);
679 if (!flags
|| (flags
& IORESOURCE_UNSET
))
682 table_offset
&= PCI_MSIX_TABLE_OFFSET
;
683 phys_addr
= pci_resource_start(dev
, bir
) + table_offset
;
685 return ioremap(phys_addr
, nr_entries
* PCI_MSIX_ENTRY_SIZE
);
688 static int msix_setup_entries(struct pci_dev
*dev
, void __iomem
*base
,
689 struct msix_entry
*entries
, int nvec
,
690 struct irq_affinity
*affd
)
692 struct irq_affinity_desc
*curmsk
, *masks
= NULL
;
693 struct msi_desc
*entry
;
695 int vec_count
= pci_msix_vec_count(dev
);
698 masks
= irq_create_affinity_masks(nvec
, affd
);
700 for (i
= 0, curmsk
= masks
; i
< nvec
; i
++) {
701 entry
= alloc_msi_entry(&dev
->dev
, 1, curmsk
);
707 /* No enough memory. Don't try again */
712 entry
->msi_attrib
.is_msix
= 1;
713 entry
->msi_attrib
.is_64
= 1;
715 entry
->msi_attrib
.entry_nr
= entries
[i
].entry
;
717 entry
->msi_attrib
.entry_nr
= i
;
719 entry
->msi_attrib
.is_virtual
=
720 entry
->msi_attrib
.entry_nr
>= vec_count
;
722 entry
->msi_attrib
.default_irq
= dev
->irq
;
723 entry
->mask_base
= base
;
725 list_add_tail(&entry
->list
, dev_to_msi_list(&dev
->dev
));
735 static void msix_program_entries(struct pci_dev
*dev
,
736 struct msix_entry
*entries
)
738 struct msi_desc
*entry
;
740 void __iomem
*desc_addr
;
742 for_each_pci_msi_entry(entry
, dev
) {
744 entries
[i
++].vector
= entry
->irq
;
746 desc_addr
= pci_msix_desc_addr(entry
);
748 entry
->masked
= readl(desc_addr
+
749 PCI_MSIX_ENTRY_VECTOR_CTRL
);
753 msix_mask_irq(entry
, 1);
758 * msix_capability_init - configure device's MSI-X capability
759 * @dev: pointer to the pci_dev data structure of MSI-X device function
760 * @entries: pointer to an array of struct msix_entry entries
761 * @nvec: number of @entries
762 * @affd: Optional pointer to enable automatic affinity assignment
764 * Setup the MSI-X capability structure of device function with a
765 * single MSI-X IRQ. A return of zero indicates the successful setup of
766 * requested MSI-X entries with allocated IRQs or non-zero for otherwise.
768 static int msix_capability_init(struct pci_dev
*dev
, struct msix_entry
*entries
,
769 int nvec
, struct irq_affinity
*affd
)
775 /* Ensure MSI-X is disabled while it is set up */
776 pci_msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_ENABLE
, 0);
778 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &control
);
779 /* Request & Map MSI-X table region */
780 base
= msix_map_region(dev
, msix_table_size(control
));
784 ret
= msix_setup_entries(dev
, base
, entries
, nvec
, affd
);
788 ret
= pci_msi_setup_msi_irqs(dev
, nvec
, PCI_CAP_ID_MSIX
);
792 /* Check if all MSI entries honor device restrictions */
793 ret
= msi_verify_entries(dev
);
798 * Some devices require MSI-X to be enabled before we can touch the
799 * MSI-X registers. We need to mask all the vectors to prevent
800 * interrupts coming in before they're fully set up.
802 pci_msix_clear_and_set_ctrl(dev
, 0,
803 PCI_MSIX_FLAGS_MASKALL
| PCI_MSIX_FLAGS_ENABLE
);
805 msix_program_entries(dev
, entries
);
807 ret
= populate_msi_sysfs(dev
);
811 /* Set MSI-X enabled bits and unmask the function */
812 pci_intx_for_msi(dev
, 0);
813 dev
->msix_enabled
= 1;
814 pci_msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_MASKALL
, 0);
816 pcibios_free_irq(dev
);
822 * If we had some success, report the number of IRQs
823 * we succeeded in setting up.
825 struct msi_desc
*entry
;
828 for_each_pci_msi_entry(entry
, dev
) {
843 * pci_msi_supported - check whether MSI may be enabled on a device
844 * @dev: pointer to the pci_dev data structure of MSI device function
845 * @nvec: how many MSIs have been requested?
847 * Look at global flags, the device itself, and its parent buses
848 * to determine if MSI/-X are supported for the device. If MSI/-X is
849 * supported return 1, else return 0.
851 static int pci_msi_supported(struct pci_dev
*dev
, int nvec
)
855 /* MSI must be globally enabled and supported by the device */
859 if (!dev
|| dev
->no_msi
)
863 * You can't ask to have 0 or less MSIs configured.
865 * b) the list manipulation code assumes nvec >= 1.
871 * Any bridge which does NOT route MSI transactions from its
872 * secondary bus to its primary bus must set NO_MSI flag on
873 * the secondary pci_bus.
875 * The NO_MSI flag can either be set directly by:
876 * - arch-specific PCI host bus controller drivers (deprecated)
877 * - quirks for specific PCI bridges
879 * or indirectly by platform-specific PCI host bridge drivers by
880 * advertising the 'msi_domain' property, which results in
881 * the NO_MSI flag when no MSI domain is found for this bridge
884 for (bus
= dev
->bus
; bus
; bus
= bus
->parent
)
885 if (bus
->bus_flags
& PCI_BUS_FLAGS_NO_MSI
)
892 * pci_msi_vec_count - Return the number of MSI vectors a device can send
893 * @dev: device to report about
895 * This function returns the number of MSI vectors a device requested via
896 * Multiple Message Capable register. It returns a negative errno if the
897 * device is not capable sending MSI interrupts. Otherwise, the call succeeds
898 * and returns a power of two, up to a maximum of 2^5 (32), according to the
901 int pci_msi_vec_count(struct pci_dev
*dev
)
909 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &msgctl
);
910 ret
= 1 << ((msgctl
& PCI_MSI_FLAGS_QMASK
) >> 1);
914 EXPORT_SYMBOL(pci_msi_vec_count
);
916 static void pci_msi_shutdown(struct pci_dev
*dev
)
918 struct msi_desc
*desc
;
921 if (!pci_msi_enable
|| !dev
|| !dev
->msi_enabled
)
924 BUG_ON(list_empty(dev_to_msi_list(&dev
->dev
)));
925 desc
= first_pci_msi_entry(dev
);
927 pci_msi_set_enable(dev
, 0);
928 pci_intx_for_msi(dev
, 1);
929 dev
->msi_enabled
= 0;
931 /* Return the device with MSI unmasked as initial states */
932 mask
= msi_mask(desc
->msi_attrib
.multi_cap
);
933 /* Keep cached state to be restored */
934 __pci_msi_desc_mask_irq(desc
, mask
, ~mask
);
936 /* Restore dev->irq to its default pin-assertion IRQ */
937 dev
->irq
= desc
->msi_attrib
.default_irq
;
938 pcibios_alloc_irq(dev
);
941 void pci_disable_msi(struct pci_dev
*dev
)
943 if (!pci_msi_enable
|| !dev
|| !dev
->msi_enabled
)
946 pci_msi_shutdown(dev
);
949 EXPORT_SYMBOL(pci_disable_msi
);
952 * pci_msix_vec_count - return the number of device's MSI-X table entries
953 * @dev: pointer to the pci_dev data structure of MSI-X device function
954 * This function returns the number of device's MSI-X table entries and
955 * therefore the number of MSI-X vectors device is capable of sending.
956 * It returns a negative errno if the device is not capable of sending MSI-X
959 int pci_msix_vec_count(struct pci_dev
*dev
)
966 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &control
);
967 return msix_table_size(control
);
969 EXPORT_SYMBOL(pci_msix_vec_count
);
971 static int __pci_enable_msix(struct pci_dev
*dev
, struct msix_entry
*entries
,
972 int nvec
, struct irq_affinity
*affd
, int flags
)
977 if (!pci_msi_supported(dev
, nvec
) || dev
->current_state
!= PCI_D0
)
980 nr_entries
= pci_msix_vec_count(dev
);
983 if (nvec
> nr_entries
&& !(flags
& PCI_IRQ_VIRTUAL
))
987 /* Check for any invalid entries */
988 for (i
= 0; i
< nvec
; i
++) {
989 if (entries
[i
].entry
>= nr_entries
)
990 return -EINVAL
; /* invalid entry */
991 for (j
= i
+ 1; j
< nvec
; j
++) {
992 if (entries
[i
].entry
== entries
[j
].entry
)
993 return -EINVAL
; /* duplicate entry */
998 /* Check whether driver already requested for MSI IRQ */
999 if (dev
->msi_enabled
) {
1000 pci_info(dev
, "can't enable MSI-X (MSI IRQ already assigned)\n");
1003 return msix_capability_init(dev
, entries
, nvec
, affd
);
1006 static void pci_msix_shutdown(struct pci_dev
*dev
)
1008 struct msi_desc
*entry
;
1010 if (!pci_msi_enable
|| !dev
|| !dev
->msix_enabled
)
1013 if (pci_dev_is_disconnected(dev
)) {
1014 dev
->msix_enabled
= 0;
1018 /* Return the device with MSI-X masked as initial states */
1019 for_each_pci_msi_entry(entry
, dev
) {
1020 /* Keep cached states to be restored */
1021 __pci_msix_desc_mask_irq(entry
, 1);
1024 pci_msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_ENABLE
, 0);
1025 pci_intx_for_msi(dev
, 1);
1026 dev
->msix_enabled
= 0;
1027 pcibios_alloc_irq(dev
);
1030 void pci_disable_msix(struct pci_dev
*dev
)
1032 if (!pci_msi_enable
|| !dev
|| !dev
->msix_enabled
)
1035 pci_msix_shutdown(dev
);
1038 EXPORT_SYMBOL(pci_disable_msix
);
1040 void pci_no_msi(void)
1046 * pci_msi_enabled - is MSI enabled?
1048 * Returns true if MSI has not been disabled by the command-line option
1051 int pci_msi_enabled(void)
1053 return pci_msi_enable
;
1055 EXPORT_SYMBOL(pci_msi_enabled
);
1057 static int __pci_enable_msi_range(struct pci_dev
*dev
, int minvec
, int maxvec
,
1058 struct irq_affinity
*affd
)
1063 if (!pci_msi_supported(dev
, minvec
) || dev
->current_state
!= PCI_D0
)
1066 /* Check whether driver already requested MSI-X IRQs */
1067 if (dev
->msix_enabled
) {
1068 pci_info(dev
, "can't enable MSI (MSI-X already enabled)\n");
1072 if (maxvec
< minvec
)
1075 if (WARN_ON_ONCE(dev
->msi_enabled
))
1078 nvec
= pci_msi_vec_count(dev
);
1089 nvec
= irq_calc_affinity_vectors(minvec
, nvec
, affd
);
1094 rc
= msi_capability_init(dev
, nvec
, affd
);
1107 /* deprecated, don't use */
1108 int pci_enable_msi(struct pci_dev
*dev
)
1110 int rc
= __pci_enable_msi_range(dev
, 1, 1, NULL
);
1115 EXPORT_SYMBOL(pci_enable_msi
);
1117 static int __pci_enable_msix_range(struct pci_dev
*dev
,
1118 struct msix_entry
*entries
, int minvec
,
1119 int maxvec
, struct irq_affinity
*affd
,
1122 int rc
, nvec
= maxvec
;
1124 if (maxvec
< minvec
)
1127 if (WARN_ON_ONCE(dev
->msix_enabled
))
1132 nvec
= irq_calc_affinity_vectors(minvec
, nvec
, affd
);
1137 rc
= __pci_enable_msix(dev
, entries
, nvec
, affd
, flags
);
1151 * pci_enable_msix_range - configure device's MSI-X capability structure
1152 * @dev: pointer to the pci_dev data structure of MSI-X device function
1153 * @entries: pointer to an array of MSI-X entries
1154 * @minvec: minimum number of MSI-X IRQs requested
1155 * @maxvec: maximum number of MSI-X IRQs requested
1157 * Setup the MSI-X capability structure of device function with a maximum
1158 * possible number of interrupts in the range between @minvec and @maxvec
1159 * upon its software driver call to request for MSI-X mode enabled on its
1160 * hardware device function. It returns a negative errno if an error occurs.
1161 * If it succeeds, it returns the actual number of interrupts allocated and
1162 * indicates the successful configuration of MSI-X capability structure
1163 * with new allocated MSI-X interrupts.
1165 int pci_enable_msix_range(struct pci_dev
*dev
, struct msix_entry
*entries
,
1166 int minvec
, int maxvec
)
1168 return __pci_enable_msix_range(dev
, entries
, minvec
, maxvec
, NULL
, 0);
1170 EXPORT_SYMBOL(pci_enable_msix_range
);
1173 * pci_alloc_irq_vectors_affinity - allocate multiple IRQs for a device
1174 * @dev: PCI device to operate on
1175 * @min_vecs: minimum number of vectors required (must be >= 1)
1176 * @max_vecs: maximum (desired) number of vectors
1177 * @flags: flags or quirks for the allocation
1178 * @affd: optional description of the affinity requirements
1180 * Allocate up to @max_vecs interrupt vectors for @dev, using MSI-X or MSI
1181 * vectors if available, and fall back to a single legacy vector
1182 * if neither is available. Return the number of vectors allocated,
1183 * (which might be smaller than @max_vecs) if successful, or a negative
1184 * error code on error. If less than @min_vecs interrupt vectors are
1185 * available for @dev the function will fail with -ENOSPC.
1187 * To get the Linux IRQ number used for a vector that can be passed to
1188 * request_irq() use the pci_irq_vector() helper.
1190 int pci_alloc_irq_vectors_affinity(struct pci_dev
*dev
, unsigned int min_vecs
,
1191 unsigned int max_vecs
, unsigned int flags
,
1192 struct irq_affinity
*affd
)
1194 struct irq_affinity msi_default_affd
= {0};
1195 int nvecs
= -ENOSPC
;
1197 if (flags
& PCI_IRQ_AFFINITY
) {
1199 affd
= &msi_default_affd
;
1205 if (flags
& PCI_IRQ_MSIX
) {
1206 nvecs
= __pci_enable_msix_range(dev
, NULL
, min_vecs
, max_vecs
,
1212 if (flags
& PCI_IRQ_MSI
) {
1213 nvecs
= __pci_enable_msi_range(dev
, min_vecs
, max_vecs
, affd
);
1218 /* use legacy IRQ if allowed */
1219 if (flags
& PCI_IRQ_LEGACY
) {
1220 if (min_vecs
== 1 && dev
->irq
) {
1222 * Invoke the affinity spreading logic to ensure that
1223 * the device driver can adjust queue configuration
1224 * for the single interrupt case.
1227 irq_create_affinity_masks(1, affd
);
1235 EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity
);
1238 * pci_free_irq_vectors - free previously allocated IRQs for a device
1239 * @dev: PCI device to operate on
1241 * Undoes the allocations and enabling in pci_alloc_irq_vectors().
1243 void pci_free_irq_vectors(struct pci_dev
*dev
)
1245 pci_disable_msix(dev
);
1246 pci_disable_msi(dev
);
1248 EXPORT_SYMBOL(pci_free_irq_vectors
);
1251 * pci_irq_vector - return Linux IRQ number of a device vector
1252 * @dev: PCI device to operate on
1253 * @nr: device-relative interrupt vector index (0-based).
1255 int pci_irq_vector(struct pci_dev
*dev
, unsigned int nr
)
1257 if (dev
->msix_enabled
) {
1258 struct msi_desc
*entry
;
1261 for_each_pci_msi_entry(entry
, dev
) {
1270 if (dev
->msi_enabled
) {
1271 struct msi_desc
*entry
= first_pci_msi_entry(dev
);
1273 if (WARN_ON_ONCE(nr
>= entry
->nvec_used
))
1276 if (WARN_ON_ONCE(nr
> 0))
1280 return dev
->irq
+ nr
;
1282 EXPORT_SYMBOL(pci_irq_vector
);
1285 * pci_irq_get_affinity - return the affinity of a particular MSI vector
1286 * @dev: PCI device to operate on
1287 * @nr: device-relative interrupt vector index (0-based).
1289 const struct cpumask
*pci_irq_get_affinity(struct pci_dev
*dev
, int nr
)
1291 if (dev
->msix_enabled
) {
1292 struct msi_desc
*entry
;
1295 for_each_pci_msi_entry(entry
, dev
) {
1297 return &entry
->affinity
->mask
;
1302 } else if (dev
->msi_enabled
) {
1303 struct msi_desc
*entry
= first_pci_msi_entry(dev
);
1305 if (WARN_ON_ONCE(!entry
|| !entry
->affinity
||
1306 nr
>= entry
->nvec_used
))
1309 return &entry
->affinity
[nr
].mask
;
1311 return cpu_possible_mask
;
1314 EXPORT_SYMBOL(pci_irq_get_affinity
);
1316 struct pci_dev
*msi_desc_to_pci_dev(struct msi_desc
*desc
)
1318 return to_pci_dev(desc
->dev
);
1320 EXPORT_SYMBOL(msi_desc_to_pci_dev
);
1322 void *msi_desc_to_pci_sysdata(struct msi_desc
*desc
)
1324 struct pci_dev
*dev
= msi_desc_to_pci_dev(desc
);
1326 return dev
->bus
->sysdata
;
1328 EXPORT_SYMBOL_GPL(msi_desc_to_pci_sysdata
);
1330 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
1332 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
1333 * @irq_data: Pointer to interrupt data of the MSI interrupt
1334 * @msg: Pointer to the message
1336 void pci_msi_domain_write_msg(struct irq_data
*irq_data
, struct msi_msg
*msg
)
1338 struct msi_desc
*desc
= irq_data_get_msi_desc(irq_data
);
1341 * For MSI-X desc->irq is always equal to irq_data->irq. For
1342 * MSI only the first interrupt of MULTI MSI passes the test.
1344 if (desc
->irq
== irq_data
->irq
)
1345 __pci_write_msi_msg(desc
, msg
);
1349 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
1350 * @desc: Pointer to the MSI descriptor
1352 * The ID number is only used within the irqdomain.
1354 static irq_hw_number_t
pci_msi_domain_calc_hwirq(struct msi_desc
*desc
)
1356 struct pci_dev
*dev
= msi_desc_to_pci_dev(desc
);
1358 return (irq_hw_number_t
)desc
->msi_attrib
.entry_nr
|
1359 pci_dev_id(dev
) << 11 |
1360 (pci_domain_nr(dev
->bus
) & 0xFFFFFFFF) << 27;
1363 static inline bool pci_msi_desc_is_multi_msi(struct msi_desc
*desc
)
1365 return !desc
->msi_attrib
.is_msix
&& desc
->nvec_used
> 1;
1369 * pci_msi_domain_check_cap - Verify that @domain supports the capabilities
1371 * @domain: The interrupt domain to check
1372 * @info: The domain info for verification
1373 * @dev: The device to check
1376 * 0 if the functionality is supported
1377 * 1 if Multi MSI is requested, but the domain does not support it
1378 * -ENOTSUPP otherwise
1380 int pci_msi_domain_check_cap(struct irq_domain
*domain
,
1381 struct msi_domain_info
*info
, struct device
*dev
)
1383 struct msi_desc
*desc
= first_pci_msi_entry(to_pci_dev(dev
));
1385 /* Special handling to support __pci_enable_msi_range() */
1386 if (pci_msi_desc_is_multi_msi(desc
) &&
1387 !(info
->flags
& MSI_FLAG_MULTI_PCI_MSI
))
1389 else if (desc
->msi_attrib
.is_msix
&& !(info
->flags
& MSI_FLAG_PCI_MSIX
))
1395 static int pci_msi_domain_handle_error(struct irq_domain
*domain
,
1396 struct msi_desc
*desc
, int error
)
1398 /* Special handling to support __pci_enable_msi_range() */
1399 if (pci_msi_desc_is_multi_msi(desc
) && error
== -ENOSPC
)
1405 static void pci_msi_domain_set_desc(msi_alloc_info_t
*arg
,
1406 struct msi_desc
*desc
)
1409 arg
->hwirq
= pci_msi_domain_calc_hwirq(desc
);
1412 static struct msi_domain_ops pci_msi_domain_ops_default
= {
1413 .set_desc
= pci_msi_domain_set_desc
,
1414 .msi_check
= pci_msi_domain_check_cap
,
1415 .handle_error
= pci_msi_domain_handle_error
,
1418 static void pci_msi_domain_update_dom_ops(struct msi_domain_info
*info
)
1420 struct msi_domain_ops
*ops
= info
->ops
;
1423 info
->ops
= &pci_msi_domain_ops_default
;
1425 if (ops
->set_desc
== NULL
)
1426 ops
->set_desc
= pci_msi_domain_set_desc
;
1427 if (ops
->msi_check
== NULL
)
1428 ops
->msi_check
= pci_msi_domain_check_cap
;
1429 if (ops
->handle_error
== NULL
)
1430 ops
->handle_error
= pci_msi_domain_handle_error
;
1434 static void pci_msi_domain_update_chip_ops(struct msi_domain_info
*info
)
1436 struct irq_chip
*chip
= info
->chip
;
1439 if (!chip
->irq_write_msi_msg
)
1440 chip
->irq_write_msi_msg
= pci_msi_domain_write_msg
;
1441 if (!chip
->irq_mask
)
1442 chip
->irq_mask
= pci_msi_mask_irq
;
1443 if (!chip
->irq_unmask
)
1444 chip
->irq_unmask
= pci_msi_unmask_irq
;
1448 * pci_msi_create_irq_domain - Create a MSI interrupt domain
1449 * @fwnode: Optional fwnode of the interrupt controller
1450 * @info: MSI domain info
1451 * @parent: Parent irq domain
1453 * Updates the domain and chip ops and creates a MSI interrupt domain.
1456 * A domain pointer or NULL in case of failure.
1458 struct irq_domain
*pci_msi_create_irq_domain(struct fwnode_handle
*fwnode
,
1459 struct msi_domain_info
*info
,
1460 struct irq_domain
*parent
)
1462 struct irq_domain
*domain
;
1464 if (WARN_ON(info
->flags
& MSI_FLAG_LEVEL_CAPABLE
))
1465 info
->flags
&= ~MSI_FLAG_LEVEL_CAPABLE
;
1467 if (info
->flags
& MSI_FLAG_USE_DEF_DOM_OPS
)
1468 pci_msi_domain_update_dom_ops(info
);
1469 if (info
->flags
& MSI_FLAG_USE_DEF_CHIP_OPS
)
1470 pci_msi_domain_update_chip_ops(info
);
1472 info
->flags
|= MSI_FLAG_ACTIVATE_EARLY
;
1473 if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE
))
1474 info
->flags
|= MSI_FLAG_MUST_REACTIVATE
;
1476 /* PCI-MSI is oneshot-safe */
1477 info
->chip
->flags
|= IRQCHIP_ONESHOT_SAFE
;
1479 domain
= msi_create_irq_domain(fwnode
, info
, parent
);
1483 irq_domain_update_bus_token(domain
, DOMAIN_BUS_PCI_MSI
);
1486 EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain
);
1489 * Users of the generic MSI infrastructure expect a device to have a single ID,
1490 * so with DMA aliases we have to pick the least-worst compromise. Devices with
1491 * DMA phantom functions tend to still emit MSIs from the real function number,
1492 * so we ignore those and only consider topological aliases where either the
1493 * alias device or RID appears on a different bus number. We also make the
1494 * reasonable assumption that bridges are walked in an upstream direction (so
1495 * the last one seen wins), and the much braver assumption that the most likely
1496 * case is that of PCI->PCIe so we should always use the alias RID. This echoes
1497 * the logic from intel_irq_remapping's set_msi_sid(), which presumably works
1498 * well enough in practice; in the face of the horrible PCIe<->PCI-X conditions
1499 * for taking ownership all we can really do is close our eyes and hope...
1501 static int get_msi_id_cb(struct pci_dev
*pdev
, u16 alias
, void *data
)
1504 u8 bus
= PCI_BUS_NUM(*pa
);
1506 if (pdev
->bus
->number
!= bus
|| PCI_BUS_NUM(alias
) != bus
)
1513 * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID)
1514 * @domain: The interrupt domain
1515 * @pdev: The PCI device.
1517 * The RID for a device is formed from the alias, with a firmware
1518 * supplied mapping applied
1522 u32
pci_msi_domain_get_msi_rid(struct irq_domain
*domain
, struct pci_dev
*pdev
)
1524 struct device_node
*of_node
;
1525 u32 rid
= pci_dev_id(pdev
);
1527 pci_for_each_dma_alias(pdev
, get_msi_id_cb
, &rid
);
1529 of_node
= irq_domain_get_of_node(domain
);
1530 rid
= of_node
? of_msi_map_id(&pdev
->dev
, of_node
, rid
) :
1531 iort_msi_map_id(&pdev
->dev
, rid
);
1537 * pci_msi_get_device_domain - Get the MSI domain for a given PCI device
1538 * @pdev: The PCI device
1540 * Use the firmware data to find a device-specific MSI domain
1541 * (i.e. not one that is set as a default).
1543 * Returns: The corresponding MSI domain or NULL if none has been found.
1545 struct irq_domain
*pci_msi_get_device_domain(struct pci_dev
*pdev
)
1547 struct irq_domain
*dom
;
1548 u32 rid
= pci_dev_id(pdev
);
1550 pci_for_each_dma_alias(pdev
, get_msi_id_cb
, &rid
);
1551 dom
= of_msi_map_get_device_domain(&pdev
->dev
, rid
, DOMAIN_BUS_PCI_MSI
);
1553 dom
= iort_get_device_domain(&pdev
->dev
, rid
,
1554 DOMAIN_BUS_PCI_MSI
);
1559 * pci_dev_has_special_msi_domain - Check whether the device is handled by
1560 * a non-standard PCI-MSI domain
1561 * @pdev: The PCI device to check.
1563 * Returns: True if the device irqdomain or the bus irqdomain is
1564 * non-standard PCI/MSI.
1566 bool pci_dev_has_special_msi_domain(struct pci_dev
*pdev
)
1568 struct irq_domain
*dom
= dev_get_msi_domain(&pdev
->dev
);
1571 dom
= dev_get_msi_domain(&pdev
->bus
->dev
);
1576 return dom
->bus_token
!= DOMAIN_BUS_PCI_MSI
;
1579 #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
1580 #endif /* CONFIG_PCI_MSI */
1582 void pci_msi_init(struct pci_dev
*dev
)
1587 * Disable the MSI hardware to avoid screaming interrupts
1588 * during boot. This is the power on reset default so
1589 * usually this should be a noop.
1591 dev
->msi_cap
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
1595 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &ctrl
);
1596 if (ctrl
& PCI_MSI_FLAGS_ENABLE
)
1597 pci_write_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
,
1598 ctrl
& ~PCI_MSI_FLAGS_ENABLE
);
1600 if (!(ctrl
& PCI_MSI_FLAGS_64BIT
))
1601 dev
->no_64bit_msi
= 1;
1604 void pci_msix_init(struct pci_dev
*dev
)
1608 dev
->msix_cap
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1612 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &ctrl
);
1613 if (ctrl
& PCI_MSIX_FLAGS_ENABLE
)
1614 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
,
1615 ctrl
& ~PCI_MSIX_FLAGS_ENABLE
);