3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
10 #include <linux/irq.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <linux/config.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
19 #include <asm/errno.h>
26 #define MSI_TARGET_CPU first_cpu(cpu_online_map)
28 static DEFINE_SPINLOCK(msi_lock
);
29 static struct msi_desc
* msi_desc
[NR_IRQS
] = { [0 ... NR_IRQS
-1] = NULL
};
30 static kmem_cache_t
* msi_cachep
;
32 static int pci_msi_enable
= 1;
33 static int last_alloc_vector
;
34 static int nr_released_vectors
;
35 static int nr_reserved_vectors
= NR_HP_RESERVED_VECTORS
;
36 static int nr_msix_devices
;
38 #ifndef CONFIG_X86_IO_APIC
39 int vector_irq
[NR_VECTORS
] = { [0 ... NR_VECTORS
- 1] = -1};
40 u8 irq_vector
[NR_IRQ_VECTORS
] = { FIRST_DEVICE_VECTOR
, 0 };
43 static void msi_cache_ctor(void *p
, kmem_cache_t
*cache
, unsigned long flags
)
45 memset(p
, 0, NR_IRQS
* sizeof(struct msi_desc
));
48 static int msi_cache_init(void)
50 msi_cachep
= kmem_cache_create("msi_cache",
51 NR_IRQS
* sizeof(struct msi_desc
),
52 0, SLAB_HWCACHE_ALIGN
, msi_cache_ctor
, NULL
);
59 static void msi_set_mask_bit(unsigned int vector
, int flag
)
61 struct msi_desc
*entry
;
63 entry
= (struct msi_desc
*)msi_desc
[vector
];
64 if (!entry
|| !entry
->dev
|| !entry
->mask_base
)
66 switch (entry
->msi_attrib
.type
) {
72 pos
= (long)entry
->mask_base
;
73 pci_read_config_dword(entry
->dev
, pos
, &mask_bits
);
76 pci_write_config_dword(entry
->dev
, pos
, mask_bits
);
81 int offset
= entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
82 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET
;
83 writel(flag
, entry
->mask_base
+ offset
);
92 static void set_msi_affinity(unsigned int vector
, cpumask_t cpu_mask
)
94 struct msi_desc
*entry
;
95 struct msg_address address
;
96 unsigned int irq
= vector
;
97 unsigned int dest_cpu
= first_cpu(cpu_mask
);
99 entry
= (struct msi_desc
*)msi_desc
[vector
];
100 if (!entry
|| !entry
->dev
)
103 switch (entry
->msi_attrib
.type
) {
106 int pos
= pci_find_capability(entry
->dev
, PCI_CAP_ID_MSI
);
111 pci_read_config_dword(entry
->dev
, msi_lower_address_reg(pos
),
112 &address
.lo_address
.value
);
113 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
114 address
.lo_address
.value
|= (cpu_physical_id(dest_cpu
) <<
115 MSI_TARGET_CPU_SHIFT
);
116 entry
->msi_attrib
.current_cpu
= cpu_physical_id(dest_cpu
);
117 pci_write_config_dword(entry
->dev
, msi_lower_address_reg(pos
),
118 address
.lo_address
.value
);
119 set_native_irq_info(irq
, cpu_mask
);
122 case PCI_CAP_ID_MSIX
:
124 int offset
= entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
125 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
;
127 address
.lo_address
.value
= readl(entry
->mask_base
+ offset
);
128 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
129 address
.lo_address
.value
|= (cpu_physical_id(dest_cpu
) <<
130 MSI_TARGET_CPU_SHIFT
);
131 entry
->msi_attrib
.current_cpu
= cpu_physical_id(dest_cpu
);
132 writel(address
.lo_address
.value
, entry
->mask_base
+ offset
);
133 set_native_irq_info(irq
, cpu_mask
);
141 #define set_msi_affinity NULL
142 #endif /* CONFIG_SMP */
144 static void mask_MSI_irq(unsigned int vector
)
146 msi_set_mask_bit(vector
, 1);
149 static void unmask_MSI_irq(unsigned int vector
)
151 msi_set_mask_bit(vector
, 0);
154 static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector
)
156 struct msi_desc
*entry
;
159 spin_lock_irqsave(&msi_lock
, flags
);
160 entry
= msi_desc
[vector
];
161 if (!entry
|| !entry
->dev
) {
162 spin_unlock_irqrestore(&msi_lock
, flags
);
165 entry
->msi_attrib
.state
= 1; /* Mark it active */
166 spin_unlock_irqrestore(&msi_lock
, flags
);
168 return 0; /* never anything pending */
171 static unsigned int startup_msi_irq_w_maskbit(unsigned int vector
)
173 startup_msi_irq_wo_maskbit(vector
);
174 unmask_MSI_irq(vector
);
175 return 0; /* never anything pending */
178 static void shutdown_msi_irq(unsigned int vector
)
180 struct msi_desc
*entry
;
183 spin_lock_irqsave(&msi_lock
, flags
);
184 entry
= msi_desc
[vector
];
185 if (entry
&& entry
->dev
)
186 entry
->msi_attrib
.state
= 0; /* Mark it not active */
187 spin_unlock_irqrestore(&msi_lock
, flags
);
190 static void end_msi_irq_wo_maskbit(unsigned int vector
)
192 move_native_irq(vector
);
196 static void end_msi_irq_w_maskbit(unsigned int vector
)
198 move_native_irq(vector
);
199 unmask_MSI_irq(vector
);
203 static void do_nothing(unsigned int vector
)
208 * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices,
209 * which implement the MSI-X Capability Structure.
211 static struct hw_interrupt_type msix_irq_type
= {
212 .typename
= "PCI-MSI-X",
213 .startup
= startup_msi_irq_w_maskbit
,
214 .shutdown
= shutdown_msi_irq
,
215 .enable
= unmask_MSI_irq
,
216 .disable
= mask_MSI_irq
,
218 .end
= end_msi_irq_w_maskbit
,
219 .set_affinity
= set_msi_affinity
223 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
224 * which implement the MSI Capability Structure with
225 * Mask-and-Pending Bits.
227 static struct hw_interrupt_type msi_irq_w_maskbit_type
= {
228 .typename
= "PCI-MSI",
229 .startup
= startup_msi_irq_w_maskbit
,
230 .shutdown
= shutdown_msi_irq
,
231 .enable
= unmask_MSI_irq
,
232 .disable
= mask_MSI_irq
,
234 .end
= end_msi_irq_w_maskbit
,
235 .set_affinity
= set_msi_affinity
239 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
240 * which implement the MSI Capability Structure without
241 * Mask-and-Pending Bits.
243 static struct hw_interrupt_type msi_irq_wo_maskbit_type
= {
244 .typename
= "PCI-MSI",
245 .startup
= startup_msi_irq_wo_maskbit
,
246 .shutdown
= shutdown_msi_irq
,
247 .enable
= do_nothing
,
248 .disable
= do_nothing
,
250 .end
= end_msi_irq_wo_maskbit
,
251 .set_affinity
= set_msi_affinity
254 static void msi_data_init(struct msg_data
*msi_data
,
257 memset(msi_data
, 0, sizeof(struct msg_data
));
258 msi_data
->vector
= (u8
)vector
;
259 msi_data
->delivery_mode
= MSI_DELIVERY_MODE
;
260 msi_data
->level
= MSI_LEVEL_MODE
;
261 msi_data
->trigger
= MSI_TRIGGER_MODE
;
264 static void msi_address_init(struct msg_address
*msi_address
)
266 unsigned int dest_id
;
267 unsigned long dest_phys_id
= cpu_physical_id(MSI_TARGET_CPU
);
269 memset(msi_address
, 0, sizeof(struct msg_address
));
270 msi_address
->hi_address
= (u32
)0;
271 dest_id
= (MSI_ADDRESS_HEADER
<< MSI_ADDRESS_HEADER_SHIFT
);
272 msi_address
->lo_address
.u
.dest_mode
= MSI_PHYSICAL_MODE
;
273 msi_address
->lo_address
.u
.redirection_hint
= MSI_REDIRECTION_HINT_MODE
;
274 msi_address
->lo_address
.u
.dest_id
= dest_id
;
275 msi_address
->lo_address
.value
|= (dest_phys_id
<< MSI_TARGET_CPU_SHIFT
);
278 static int msi_free_vector(struct pci_dev
* dev
, int vector
, int reassign
);
279 static int assign_msi_vector(void)
281 static int new_vector_avail
= 1;
286 * msi_lock is provided to ensure that successful allocation of MSI
287 * vector is assigned unique among drivers.
289 spin_lock_irqsave(&msi_lock
, flags
);
291 if (!new_vector_avail
) {
295 * vector_irq[] = -1 indicates that this specific vector is:
296 * - assigned for MSI (since MSI have no associated IRQ) or
297 * - assigned for legacy if less than 16, or
298 * - having no corresponding 1:1 vector-to-IOxAPIC IRQ mapping
299 * vector_irq[] = 0 indicates that this vector, previously
300 * assigned for MSI, is freed by hotplug removed operations.
301 * This vector will be reused for any subsequent hotplug added
303 * vector_irq[] > 0 indicates that this vector is assigned for
304 * IOxAPIC IRQs. This vector and its value provides a 1-to-1
305 * vector-to-IOxAPIC IRQ mapping.
307 for (vector
= FIRST_DEVICE_VECTOR
; vector
< NR_IRQS
; vector
++) {
308 if (vector_irq
[vector
] != 0)
310 free_vector
= vector
;
311 if (!msi_desc
[vector
])
317 spin_unlock_irqrestore(&msi_lock
, flags
);
320 vector_irq
[free_vector
] = -1;
321 nr_released_vectors
--;
322 spin_unlock_irqrestore(&msi_lock
, flags
);
323 if (msi_desc
[free_vector
] != NULL
) {
327 /* free all linked vectors before re-assign */
329 spin_lock_irqsave(&msi_lock
, flags
);
330 dev
= msi_desc
[free_vector
]->dev
;
331 tail
= msi_desc
[free_vector
]->link
.tail
;
332 spin_unlock_irqrestore(&msi_lock
, flags
);
333 msi_free_vector(dev
, tail
, 1);
334 } while (free_vector
!= tail
);
339 vector
= assign_irq_vector(AUTO_ASSIGN
);
340 last_alloc_vector
= vector
;
341 if (vector
== LAST_DEVICE_VECTOR
)
342 new_vector_avail
= 0;
344 spin_unlock_irqrestore(&msi_lock
, flags
);
348 static int get_new_vector(void)
350 int vector
= assign_msi_vector();
353 set_intr_gate(vector
, interrupt
[vector
]);
358 static int msi_init(void)
360 static int status
= -ENOMEM
;
367 printk(KERN_WARNING
"PCI: MSI quirk detected. MSI disabled.\n");
372 status
= msi_cache_init();
375 printk(KERN_WARNING
"PCI: MSI cache init failed\n");
378 last_alloc_vector
= assign_irq_vector(AUTO_ASSIGN
);
379 if (last_alloc_vector
< 0) {
381 printk(KERN_WARNING
"PCI: No interrupt vectors available for MSI\n");
385 vector_irq
[last_alloc_vector
] = 0;
386 nr_released_vectors
++;
391 static int get_msi_vector(struct pci_dev
*dev
)
393 return get_new_vector();
396 static struct msi_desc
* alloc_msi_entry(void)
398 struct msi_desc
*entry
;
400 entry
= kmem_cache_alloc(msi_cachep
, SLAB_KERNEL
);
404 memset(entry
, 0, sizeof(struct msi_desc
));
405 entry
->link
.tail
= entry
->link
.head
= 0; /* single message */
411 static void attach_msi_entry(struct msi_desc
*entry
, int vector
)
415 spin_lock_irqsave(&msi_lock
, flags
);
416 msi_desc
[vector
] = entry
;
417 spin_unlock_irqrestore(&msi_lock
, flags
);
420 static void irq_handler_init(int cap_id
, int pos
, int mask
)
424 spin_lock_irqsave(&irq_desc
[pos
].lock
, flags
);
425 if (cap_id
== PCI_CAP_ID_MSIX
)
426 irq_desc
[pos
].handler
= &msix_irq_type
;
429 irq_desc
[pos
].handler
= &msi_irq_wo_maskbit_type
;
431 irq_desc
[pos
].handler
= &msi_irq_w_maskbit_type
;
433 spin_unlock_irqrestore(&irq_desc
[pos
].lock
, flags
);
436 static void enable_msi_mode(struct pci_dev
*dev
, int pos
, int type
)
440 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
441 if (type
== PCI_CAP_ID_MSI
) {
442 /* Set enabled bits to single MSI & enable MSI_enable bit */
443 msi_enable(control
, 1);
444 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
446 msix_enable(control
);
447 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
449 if (pci_find_capability(dev
, PCI_CAP_ID_EXP
)) {
450 /* PCI Express Endpoint device detected */
451 pci_intx(dev
, 0); /* disable intx */
455 void disable_msi_mode(struct pci_dev
*dev
, int pos
, int type
)
459 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
460 if (type
== PCI_CAP_ID_MSI
) {
461 /* Set enabled bits to single MSI & enable MSI_enable bit */
462 msi_disable(control
);
463 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
465 msix_disable(control
);
466 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
468 if (pci_find_capability(dev
, PCI_CAP_ID_EXP
)) {
469 /* PCI Express Endpoint device detected */
470 pci_intx(dev
, 1); /* enable intx */
474 static int msi_lookup_vector(struct pci_dev
*dev
, int type
)
479 spin_lock_irqsave(&msi_lock
, flags
);
480 for (vector
= FIRST_DEVICE_VECTOR
; vector
< NR_IRQS
; vector
++) {
481 if (!msi_desc
[vector
] || msi_desc
[vector
]->dev
!= dev
||
482 msi_desc
[vector
]->msi_attrib
.type
!= type
||
483 msi_desc
[vector
]->msi_attrib
.default_vector
!= dev
->irq
)
485 spin_unlock_irqrestore(&msi_lock
, flags
);
486 /* This pre-assigned MSI vector for this device
487 already exits. Override dev->irq with this vector */
491 spin_unlock_irqrestore(&msi_lock
, flags
);
496 void pci_scan_msi_device(struct pci_dev
*dev
)
501 if (pci_find_capability(dev
, PCI_CAP_ID_MSIX
) > 0)
503 else if (pci_find_capability(dev
, PCI_CAP_ID_MSI
) > 0)
504 nr_reserved_vectors
++;
508 * msi_capability_init - configure device's MSI capability structure
509 * @dev: pointer to the pci_dev data structure of MSI device function
511 * Setup the MSI capability structure of device function with a single
512 * MSI vector, regardless of device function is capable of handling
513 * multiple messages. A return of zero indicates the successful setup
514 * of an entry zero with the new MSI vector or non-zero for otherwise.
516 static int msi_capability_init(struct pci_dev
*dev
)
518 struct msi_desc
*entry
;
519 struct msg_address address
;
520 struct msg_data data
;
524 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
525 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
526 /* MSI Entry Initialization */
527 entry
= alloc_msi_entry();
531 vector
= get_msi_vector(dev
);
533 kmem_cache_free(msi_cachep
, entry
);
536 entry
->link
.head
= vector
;
537 entry
->link
.tail
= vector
;
538 entry
->msi_attrib
.type
= PCI_CAP_ID_MSI
;
539 entry
->msi_attrib
.state
= 0; /* Mark it not active */
540 entry
->msi_attrib
.entry_nr
= 0;
541 entry
->msi_attrib
.maskbit
= is_mask_bit_support(control
);
542 entry
->msi_attrib
.default_vector
= dev
->irq
; /* Save IOAPIC IRQ */
545 if (is_mask_bit_support(control
)) {
546 entry
->mask_base
= (void __iomem
*)(long)msi_mask_bits_reg(pos
,
547 is_64bit_address(control
));
549 /* Replace with MSI handler */
550 irq_handler_init(PCI_CAP_ID_MSI
, vector
, entry
->msi_attrib
.maskbit
);
551 /* Configure MSI capability structure */
552 msi_address_init(&address
);
553 msi_data_init(&data
, vector
);
554 entry
->msi_attrib
.current_cpu
= ((address
.lo_address
.u
.dest_id
>>
555 MSI_TARGET_CPU_SHIFT
) & MSI_TARGET_CPU_MASK
);
556 pci_write_config_dword(dev
, msi_lower_address_reg(pos
),
557 address
.lo_address
.value
);
558 if (is_64bit_address(control
)) {
559 pci_write_config_dword(dev
,
560 msi_upper_address_reg(pos
), address
.hi_address
);
561 pci_write_config_word(dev
,
562 msi_data_reg(pos
, 1), *((u32
*)&data
));
564 pci_write_config_word(dev
,
565 msi_data_reg(pos
, 0), *((u32
*)&data
));
566 if (entry
->msi_attrib
.maskbit
) {
567 unsigned int maskbits
, temp
;
568 /* All MSIs are unmasked by default, Mask them all */
569 pci_read_config_dword(dev
,
570 msi_mask_bits_reg(pos
, is_64bit_address(control
)),
572 temp
= (1 << multi_msi_capable(control
));
573 temp
= ((temp
- 1) & ~temp
);
575 pci_write_config_dword(dev
,
576 msi_mask_bits_reg(pos
, is_64bit_address(control
)),
579 attach_msi_entry(entry
, vector
);
580 /* Set MSI enabled bits */
581 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
587 * msix_capability_init - configure device's MSI-X capability
588 * @dev: pointer to the pci_dev data structure of MSI-X device function
589 * @entries: pointer to an array of struct msix_entry entries
590 * @nvec: number of @entries
592 * Setup the MSI-X capability structure of device function with a
593 * single MSI-X vector. A return of zero indicates the successful setup of
594 * requested MSI-X entries with allocated vectors or non-zero for otherwise.
596 static int msix_capability_init(struct pci_dev
*dev
,
597 struct msix_entry
*entries
, int nvec
)
599 struct msi_desc
*head
= NULL
, *tail
= NULL
, *entry
= NULL
;
600 struct msg_address address
;
601 struct msg_data data
;
602 int vector
, pos
, i
, j
, nr_entries
, temp
= 0;
603 u32 phys_addr
, table_offset
;
608 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
609 /* Request & Map MSI-X table region */
610 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
611 nr_entries
= multi_msix_capable(control
);
612 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
614 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
615 phys_addr
= pci_resource_start (dev
, bir
);
616 phys_addr
+= (u32
)(table_offset
& ~PCI_MSIX_FLAGS_BIRMASK
);
617 base
= ioremap_nocache(phys_addr
, nr_entries
* PCI_MSIX_ENTRY_SIZE
);
621 /* MSI-X Table Initialization */
622 for (i
= 0; i
< nvec
; i
++) {
623 entry
= alloc_msi_entry();
626 vector
= get_msi_vector(dev
);
630 j
= entries
[i
].entry
;
631 entries
[i
].vector
= vector
;
632 entry
->msi_attrib
.type
= PCI_CAP_ID_MSIX
;
633 entry
->msi_attrib
.state
= 0; /* Mark it not active */
634 entry
->msi_attrib
.entry_nr
= j
;
635 entry
->msi_attrib
.maskbit
= 1;
636 entry
->msi_attrib
.default_vector
= dev
->irq
;
638 entry
->mask_base
= base
;
640 entry
->link
.head
= vector
;
641 entry
->link
.tail
= vector
;
644 entry
->link
.head
= temp
;
645 entry
->link
.tail
= tail
->link
.tail
;
646 tail
->link
.tail
= vector
;
647 head
->link
.head
= vector
;
651 /* Replace with MSI-X handler */
652 irq_handler_init(PCI_CAP_ID_MSIX
, vector
, 1);
653 /* Configure MSI-X capability structure */
654 msi_address_init(&address
);
655 msi_data_init(&data
, vector
);
656 entry
->msi_attrib
.current_cpu
=
657 ((address
.lo_address
.u
.dest_id
>>
658 MSI_TARGET_CPU_SHIFT
) & MSI_TARGET_CPU_MASK
);
659 writel(address
.lo_address
.value
,
660 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
661 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
662 writel(address
.hi_address
,
663 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
664 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
666 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
667 PCI_MSIX_ENTRY_DATA_OFFSET
);
668 attach_msi_entry(entry
, vector
);
672 for (; i
>= 0; i
--) {
673 vector
= (entries
+ i
)->vector
;
674 msi_free_vector(dev
, vector
, 0);
675 (entries
+ i
)->vector
= 0;
679 /* Set MSI-X enabled bits */
680 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
686 * pci_enable_msi - configure device's MSI capability structure
687 * @dev: pointer to the pci_dev data structure of MSI device function
689 * Setup the MSI capability structure of device function with
690 * a single MSI vector upon its software driver call to request for
691 * MSI mode enabled on its hardware device function. A return of zero
692 * indicates the successful setup of an entry zero with the new MSI
693 * vector or non-zero for otherwise.
695 int pci_enable_msi(struct pci_dev
* dev
)
697 int pos
, temp
, status
= -EINVAL
;
700 if (!pci_msi_enable
|| !dev
)
712 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
716 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
717 if (control
& PCI_MSI_FLAGS_ENABLE
)
718 return 0; /* Already in MSI mode */
720 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
724 spin_lock_irqsave(&msi_lock
, flags
);
725 if (!vector_irq
[dev
->irq
]) {
726 msi_desc
[dev
->irq
]->msi_attrib
.state
= 0;
727 vector_irq
[dev
->irq
] = -1;
728 nr_released_vectors
--;
729 spin_unlock_irqrestore(&msi_lock
, flags
);
730 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
733 spin_unlock_irqrestore(&msi_lock
, flags
);
736 /* Check whether driver already requested for MSI-X vectors */
737 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
738 if (pos
> 0 && !msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
739 printk(KERN_INFO
"PCI: %s: Can't enable MSI. "
740 "Device already has MSI-X vectors assigned\n",
745 status
= msi_capability_init(dev
);
748 nr_reserved_vectors
--; /* Only MSI capable */
749 else if (nr_msix_devices
> 0)
750 nr_msix_devices
--; /* Both MSI and MSI-X capable,
751 but choose enabling MSI */
757 void pci_disable_msi(struct pci_dev
* dev
)
759 struct msi_desc
*entry
;
760 int pos
, default_vector
;
766 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
770 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
771 if (!(control
& PCI_MSI_FLAGS_ENABLE
))
774 spin_lock_irqsave(&msi_lock
, flags
);
775 entry
= msi_desc
[dev
->irq
];
776 if (!entry
|| !entry
->dev
|| entry
->msi_attrib
.type
!= PCI_CAP_ID_MSI
) {
777 spin_unlock_irqrestore(&msi_lock
, flags
);
780 if (entry
->msi_attrib
.state
) {
781 spin_unlock_irqrestore(&msi_lock
, flags
);
782 printk(KERN_WARNING
"PCI: %s: pci_disable_msi() called without "
783 "free_irq() on MSI vector %d\n",
784 pci_name(dev
), dev
->irq
);
785 BUG_ON(entry
->msi_attrib
.state
> 0);
787 vector_irq
[dev
->irq
] = 0; /* free it */
788 nr_released_vectors
++;
789 default_vector
= entry
->msi_attrib
.default_vector
;
790 spin_unlock_irqrestore(&msi_lock
, flags
);
791 /* Restore dev->irq to its default pin-assertion vector */
792 dev
->irq
= default_vector
;
793 disable_msi_mode(dev
, pci_find_capability(dev
, PCI_CAP_ID_MSI
),
798 static int msi_free_vector(struct pci_dev
* dev
, int vector
, int reassign
)
800 struct msi_desc
*entry
;
801 int head
, entry_nr
, type
;
805 spin_lock_irqsave(&msi_lock
, flags
);
806 entry
= msi_desc
[vector
];
807 if (!entry
|| entry
->dev
!= dev
) {
808 spin_unlock_irqrestore(&msi_lock
, flags
);
811 type
= entry
->msi_attrib
.type
;
812 entry_nr
= entry
->msi_attrib
.entry_nr
;
813 head
= entry
->link
.head
;
814 base
= entry
->mask_base
;
815 msi_desc
[entry
->link
.head
]->link
.tail
= entry
->link
.tail
;
816 msi_desc
[entry
->link
.tail
]->link
.head
= entry
->link
.head
;
819 vector_irq
[vector
] = 0;
820 nr_released_vectors
++;
822 msi_desc
[vector
] = NULL
;
823 spin_unlock_irqrestore(&msi_lock
, flags
);
825 kmem_cache_free(msi_cachep
, entry
);
827 if (type
== PCI_CAP_ID_MSIX
) {
830 entry_nr
* PCI_MSIX_ENTRY_SIZE
+
831 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET
);
833 if (head
== vector
) {
835 * Detect last MSI-X vector to be released.
836 * Release the MSI-X memory-mapped table.
839 u32 phys_addr
, table_offset
;
843 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
844 pci_read_config_word(dev
, msi_control_reg(pos
),
846 nr_entries
= multi_msix_capable(control
);
847 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
849 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
850 phys_addr
= pci_resource_start (dev
, bir
);
851 phys_addr
+= (u32
)(table_offset
&
852 ~PCI_MSIX_FLAGS_BIRMASK
);
860 static int reroute_msix_table(int head
, struct msix_entry
*entries
, int *nvec
)
862 int vector
= head
, tail
= 0;
863 int i
, j
= 0, nr_entries
= 0;
867 spin_lock_irqsave(&msi_lock
, flags
);
868 while (head
!= tail
) {
870 tail
= msi_desc
[vector
]->link
.tail
;
871 if (entries
[0].entry
== msi_desc
[vector
]->msi_attrib
.entry_nr
)
875 if (*nvec
> nr_entries
) {
876 spin_unlock_irqrestore(&msi_lock
, flags
);
880 vector
= ((j
> 0) ? j
: head
);
881 for (i
= 0; i
< *nvec
; i
++) {
882 j
= msi_desc
[vector
]->msi_attrib
.entry_nr
;
883 msi_desc
[vector
]->msi_attrib
.state
= 0; /* Mark it not active */
884 vector_irq
[vector
] = -1; /* Mark it busy */
885 nr_released_vectors
--;
886 entries
[i
].vector
= vector
;
887 if (j
!= (entries
+ i
)->entry
) {
888 base
= msi_desc
[vector
]->mask_base
;
889 msi_desc
[vector
]->msi_attrib
.entry_nr
=
890 (entries
+ i
)->entry
;
891 writel( readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
892 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
), base
+
893 (entries
+ i
)->entry
* PCI_MSIX_ENTRY_SIZE
+
894 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
895 writel( readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
896 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
), base
+
897 (entries
+ i
)->entry
* PCI_MSIX_ENTRY_SIZE
+
898 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
899 writel( (readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
900 PCI_MSIX_ENTRY_DATA_OFFSET
) & 0xff00) | vector
,
901 base
+ (entries
+i
)->entry
*PCI_MSIX_ENTRY_SIZE
+
902 PCI_MSIX_ENTRY_DATA_OFFSET
);
904 vector
= msi_desc
[vector
]->link
.tail
;
906 spin_unlock_irqrestore(&msi_lock
, flags
);
912 * pci_enable_msix - configure device's MSI-X capability structure
913 * @dev: pointer to the pci_dev data structure of MSI-X device function
914 * @entries: pointer to an array of MSI-X entries
915 * @nvec: number of MSI-X vectors requested for allocation by device driver
917 * Setup the MSI-X capability structure of device function with the number
918 * of requested vectors upon its software driver call to request for
919 * MSI-X mode enabled on its hardware device function. A return of zero
920 * indicates the successful configuration of MSI-X capability structure
921 * with new allocated MSI-X vectors. A return of < 0 indicates a failure.
922 * Or a return of > 0 indicates that driver request is exceeding the number
923 * of vectors available. Driver should use the returned value to re-send
926 int pci_enable_msix(struct pci_dev
* dev
, struct msix_entry
*entries
, int nvec
)
928 int status
, pos
, nr_entries
, free_vectors
;
933 if (!pci_msi_enable
|| !dev
|| !entries
)
940 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
944 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
945 if (control
& PCI_MSIX_FLAGS_ENABLE
)
946 return -EINVAL
; /* Already in MSI-X mode */
948 nr_entries
= multi_msix_capable(control
);
949 if (nvec
> nr_entries
)
952 /* Check for any invalid entries */
953 for (i
= 0; i
< nvec
; i
++) {
954 if (entries
[i
].entry
>= nr_entries
)
955 return -EINVAL
; /* invalid entry */
956 for (j
= i
+ 1; j
< nvec
; j
++) {
957 if (entries
[i
].entry
== entries
[j
].entry
)
958 return -EINVAL
; /* duplicate entry */
962 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
965 /* Reroute MSI-X table */
966 if (reroute_msix_table(dev
->irq
, entries
, &nr_entries
)) {
967 /* #requested > #previous-assigned */
972 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
975 /* Check whether driver already requested for MSI vector */
976 if (pci_find_capability(dev
, PCI_CAP_ID_MSI
) > 0 &&
977 !msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
978 printk(KERN_INFO
"PCI: %s: Can't enable MSI-X. "
979 "Device already has an MSI vector assigned\n",
985 spin_lock_irqsave(&msi_lock
, flags
);
987 * msi_lock is provided to ensure that enough vectors resources are
988 * available before granting.
990 free_vectors
= pci_vector_resources(last_alloc_vector
,
991 nr_released_vectors
);
992 /* Ensure that each MSI/MSI-X device has one vector reserved by
993 default to avoid any MSI-X driver to take all available
995 free_vectors
-= nr_reserved_vectors
;
996 /* Find the average of free vectors among MSI-X devices */
997 if (nr_msix_devices
> 0)
998 free_vectors
/= nr_msix_devices
;
999 spin_unlock_irqrestore(&msi_lock
, flags
);
1001 if (nvec
> free_vectors
) {
1002 if (free_vectors
> 0)
1003 return free_vectors
;
1008 status
= msix_capability_init(dev
, entries
, nvec
);
1009 if (!status
&& nr_msix_devices
> 0)
1015 void pci_disable_msix(struct pci_dev
* dev
)
1023 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1027 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
1028 if (!(control
& PCI_MSIX_FLAGS_ENABLE
))
1032 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1033 int state
, vector
, head
, tail
= 0, warning
= 0;
1034 unsigned long flags
;
1036 vector
= head
= dev
->irq
;
1037 spin_lock_irqsave(&msi_lock
, flags
);
1038 while (head
!= tail
) {
1039 state
= msi_desc
[vector
]->msi_attrib
.state
;
1043 vector_irq
[vector
] = 0; /* free it */
1044 nr_released_vectors
++;
1046 tail
= msi_desc
[vector
]->link
.tail
;
1049 spin_unlock_irqrestore(&msi_lock
, flags
);
1052 printk(KERN_WARNING
"PCI: %s: pci_disable_msix() called without "
1053 "free_irq() on all MSI-X vectors\n",
1055 BUG_ON(warning
> 0);
1058 disable_msi_mode(dev
,
1059 pci_find_capability(dev
, PCI_CAP_ID_MSIX
),
1067 * msi_remove_pci_irq_vectors - reclaim MSI(X) vectors to unused state
1068 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1070 * Being called during hotplug remove, from which the device function
1071 * is hot-removed. All previous assigned MSI/MSI-X vectors, if
1072 * allocated for this device function, are reclaimed to unused state,
1073 * which may be used later on.
1075 void msi_remove_pci_irq_vectors(struct pci_dev
* dev
)
1077 int state
, pos
, temp
;
1078 unsigned long flags
;
1080 if (!pci_msi_enable
|| !dev
)
1083 temp
= dev
->irq
; /* Save IOAPIC IRQ */
1084 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
1085 if (pos
> 0 && !msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
1086 spin_lock_irqsave(&msi_lock
, flags
);
1087 state
= msi_desc
[dev
->irq
]->msi_attrib
.state
;
1088 spin_unlock_irqrestore(&msi_lock
, flags
);
1090 printk(KERN_WARNING
"PCI: %s: msi_remove_pci_irq_vectors() "
1091 "called without free_irq() on MSI vector %d\n",
1092 pci_name(dev
), dev
->irq
);
1094 } else /* Release MSI vector assigned to this device */
1095 msi_free_vector(dev
, dev
->irq
, 0);
1096 dev
->irq
= temp
; /* Restore IOAPIC IRQ */
1098 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1099 if (pos
> 0 && !msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1100 int vector
, head
, tail
= 0, warning
= 0;
1101 void __iomem
*base
= NULL
;
1103 vector
= head
= dev
->irq
;
1104 while (head
!= tail
) {
1105 spin_lock_irqsave(&msi_lock
, flags
);
1106 state
= msi_desc
[vector
]->msi_attrib
.state
;
1107 tail
= msi_desc
[vector
]->link
.tail
;
1108 base
= msi_desc
[vector
]->mask_base
;
1109 spin_unlock_irqrestore(&msi_lock
, flags
);
1112 else if (vector
!= head
) /* Release MSI-X vector */
1113 msi_free_vector(dev
, vector
, 0);
1116 msi_free_vector(dev
, vector
, 0);
1118 /* Force to release the MSI-X memory-mapped table */
1119 u32 phys_addr
, table_offset
;
1123 pci_read_config_word(dev
, msi_control_reg(pos
),
1125 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
1127 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
1128 phys_addr
= pci_resource_start (dev
, bir
);
1129 phys_addr
+= (u32
)(table_offset
&
1130 ~PCI_MSIX_FLAGS_BIRMASK
);
1132 printk(KERN_WARNING
"PCI: %s: msi_remove_pci_irq_vectors() "
1133 "called without free_irq() on all MSI-X vectors\n",
1135 BUG_ON(warning
> 0);
1137 dev
->irq
= temp
; /* Restore IOAPIC IRQ */
1141 EXPORT_SYMBOL(pci_enable_msi
);
1142 EXPORT_SYMBOL(pci_disable_msi
);
1143 EXPORT_SYMBOL(pci_enable_msix
);
1144 EXPORT_SYMBOL(pci_disable_msix
);