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1 /*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/pci.h>
21 #include <linux/stat.h>
22 #include <linux/export.h>
23 #include <linux/topology.h>
24 #include <linux/mm.h>
25 #include <linux/fs.h>
26 #include <linux/capability.h>
27 #include <linux/security.h>
28 #include <linux/pci-aspm.h>
29 #include <linux/slab.h>
30 #include <linux/vgaarb.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/of.h>
33 #include "pci.h"
34
35 static int sysfs_initialized; /* = 0 */
36
37 /* show configuration fields */
38 #define pci_config_attr(field, format_string) \
39 static ssize_t \
40 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
41 { \
42 struct pci_dev *pdev; \
43 \
44 pdev = to_pci_dev(dev); \
45 return sprintf(buf, format_string, pdev->field); \
46 } \
47 static DEVICE_ATTR_RO(field)
48
49 pci_config_attr(vendor, "0x%04x\n");
50 pci_config_attr(device, "0x%04x\n");
51 pci_config_attr(subsystem_vendor, "0x%04x\n");
52 pci_config_attr(subsystem_device, "0x%04x\n");
53 pci_config_attr(revision, "0x%02x\n");
54 pci_config_attr(class, "0x%06x\n");
55 pci_config_attr(irq, "%u\n");
56
57 static ssize_t broken_parity_status_show(struct device *dev,
58 struct device_attribute *attr,
59 char *buf)
60 {
61 struct pci_dev *pdev = to_pci_dev(dev);
62 return sprintf(buf, "%u\n", pdev->broken_parity_status);
63 }
64
65 static ssize_t broken_parity_status_store(struct device *dev,
66 struct device_attribute *attr,
67 const char *buf, size_t count)
68 {
69 struct pci_dev *pdev = to_pci_dev(dev);
70 unsigned long val;
71
72 if (kstrtoul(buf, 0, &val) < 0)
73 return -EINVAL;
74
75 pdev->broken_parity_status = !!val;
76
77 return count;
78 }
79 static DEVICE_ATTR_RW(broken_parity_status);
80
81 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
82 struct device_attribute *attr, char *buf)
83 {
84 const struct cpumask *mask;
85
86 #ifdef CONFIG_NUMA
87 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
88 cpumask_of_node(dev_to_node(dev));
89 #else
90 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
91 #endif
92 return cpumap_print_to_pagebuf(list, buf, mask);
93 }
94
95 static ssize_t local_cpus_show(struct device *dev,
96 struct device_attribute *attr, char *buf)
97 {
98 return pci_dev_show_local_cpu(dev, false, attr, buf);
99 }
100 static DEVICE_ATTR_RO(local_cpus);
101
102 static ssize_t local_cpulist_show(struct device *dev,
103 struct device_attribute *attr, char *buf)
104 {
105 return pci_dev_show_local_cpu(dev, true, attr, buf);
106 }
107 static DEVICE_ATTR_RO(local_cpulist);
108
109 /*
110 * PCI Bus Class Devices
111 */
112 static ssize_t cpuaffinity_show(struct device *dev,
113 struct device_attribute *attr, char *buf)
114 {
115 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
116
117 return cpumap_print_to_pagebuf(false, buf, cpumask);
118 }
119 static DEVICE_ATTR_RO(cpuaffinity);
120
121 static ssize_t cpulistaffinity_show(struct device *dev,
122 struct device_attribute *attr, char *buf)
123 {
124 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
125
126 return cpumap_print_to_pagebuf(true, buf, cpumask);
127 }
128 static DEVICE_ATTR_RO(cpulistaffinity);
129
130 /* show resources */
131 static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
132 char *buf)
133 {
134 struct pci_dev *pci_dev = to_pci_dev(dev);
135 char *str = buf;
136 int i;
137 int max;
138 resource_size_t start, end;
139
140 if (pci_dev->subordinate)
141 max = DEVICE_COUNT_RESOURCE;
142 else
143 max = PCI_BRIDGE_RESOURCES;
144
145 for (i = 0; i < max; i++) {
146 struct resource *res = &pci_dev->resource[i];
147 pci_resource_to_user(pci_dev, i, res, &start, &end);
148 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
149 (unsigned long long)start,
150 (unsigned long long)end,
151 (unsigned long long)res->flags);
152 }
153 return (str - buf);
154 }
155 static DEVICE_ATTR_RO(resource);
156
157 static ssize_t max_link_speed_show(struct device *dev,
158 struct device_attribute *attr, char *buf)
159 {
160 struct pci_dev *pci_dev = to_pci_dev(dev);
161 u32 linkcap;
162 int err;
163 const char *speed;
164
165 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
166 if (err)
167 return -EINVAL;
168
169 switch (linkcap & PCI_EXP_LNKCAP_SLS) {
170 case PCI_EXP_LNKCAP_SLS_8_0GB:
171 speed = "8 GT/s";
172 break;
173 case PCI_EXP_LNKCAP_SLS_5_0GB:
174 speed = "5 GT/s";
175 break;
176 case PCI_EXP_LNKCAP_SLS_2_5GB:
177 speed = "2.5 GT/s";
178 break;
179 default:
180 speed = "Unknown speed";
181 }
182
183 return sprintf(buf, "%s\n", speed);
184 }
185 static DEVICE_ATTR_RO(max_link_speed);
186
187 static ssize_t max_link_width_show(struct device *dev,
188 struct device_attribute *attr, char *buf)
189 {
190 struct pci_dev *pci_dev = to_pci_dev(dev);
191 u32 linkcap;
192 int err;
193
194 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
195 if (err)
196 return -EINVAL;
197
198 return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4);
199 }
200 static DEVICE_ATTR_RO(max_link_width);
201
202 static ssize_t current_link_speed_show(struct device *dev,
203 struct device_attribute *attr, char *buf)
204 {
205 struct pci_dev *pci_dev = to_pci_dev(dev);
206 u16 linkstat;
207 int err;
208 const char *speed;
209
210 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
211 if (err)
212 return -EINVAL;
213
214 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
215 case PCI_EXP_LNKSTA_CLS_8_0GB:
216 speed = "8 GT/s";
217 break;
218 case PCI_EXP_LNKSTA_CLS_5_0GB:
219 speed = "5 GT/s";
220 break;
221 case PCI_EXP_LNKSTA_CLS_2_5GB:
222 speed = "2.5 GT/s";
223 break;
224 default:
225 speed = "Unknown speed";
226 }
227
228 return sprintf(buf, "%s\n", speed);
229 }
230 static DEVICE_ATTR_RO(current_link_speed);
231
232 static ssize_t current_link_width_show(struct device *dev,
233 struct device_attribute *attr, char *buf)
234 {
235 struct pci_dev *pci_dev = to_pci_dev(dev);
236 u16 linkstat;
237 int err;
238
239 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
240 if (err)
241 return -EINVAL;
242
243 return sprintf(buf, "%u\n",
244 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
245 }
246 static DEVICE_ATTR_RO(current_link_width);
247
248 static ssize_t secondary_bus_number_show(struct device *dev,
249 struct device_attribute *attr,
250 char *buf)
251 {
252 struct pci_dev *pci_dev = to_pci_dev(dev);
253 u8 sec_bus;
254 int err;
255
256 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
257 if (err)
258 return -EINVAL;
259
260 return sprintf(buf, "%u\n", sec_bus);
261 }
262 static DEVICE_ATTR_RO(secondary_bus_number);
263
264 static ssize_t subordinate_bus_number_show(struct device *dev,
265 struct device_attribute *attr,
266 char *buf)
267 {
268 struct pci_dev *pci_dev = to_pci_dev(dev);
269 u8 sub_bus;
270 int err;
271
272 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
273 if (err)
274 return -EINVAL;
275
276 return sprintf(buf, "%u\n", sub_bus);
277 }
278 static DEVICE_ATTR_RO(subordinate_bus_number);
279
280 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
281 char *buf)
282 {
283 struct pci_dev *pci_dev = to_pci_dev(dev);
284
285 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
286 pci_dev->vendor, pci_dev->device,
287 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
288 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
289 (u8)(pci_dev->class));
290 }
291 static DEVICE_ATTR_RO(modalias);
292
293 static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
294 const char *buf, size_t count)
295 {
296 struct pci_dev *pdev = to_pci_dev(dev);
297 unsigned long val;
298 ssize_t result = kstrtoul(buf, 0, &val);
299
300 if (result < 0)
301 return result;
302
303 /* this can crash the machine when done on the "wrong" device */
304 if (!capable(CAP_SYS_ADMIN))
305 return -EPERM;
306
307 if (!val) {
308 if (pci_is_enabled(pdev))
309 pci_disable_device(pdev);
310 else
311 result = -EIO;
312 } else
313 result = pci_enable_device(pdev);
314
315 return result < 0 ? result : count;
316 }
317
318 static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
319 char *buf)
320 {
321 struct pci_dev *pdev;
322
323 pdev = to_pci_dev(dev);
324 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
325 }
326 static DEVICE_ATTR_RW(enable);
327
328 #ifdef CONFIG_NUMA
329 static ssize_t numa_node_store(struct device *dev,
330 struct device_attribute *attr, const char *buf,
331 size_t count)
332 {
333 struct pci_dev *pdev = to_pci_dev(dev);
334 int node, ret;
335
336 if (!capable(CAP_SYS_ADMIN))
337 return -EPERM;
338
339 ret = kstrtoint(buf, 0, &node);
340 if (ret)
341 return ret;
342
343 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
344 return -EINVAL;
345
346 if (node != NUMA_NO_NODE && !node_online(node))
347 return -EINVAL;
348
349 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
350 dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
351 node);
352
353 dev->numa_node = node;
354 return count;
355 }
356
357 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
358 char *buf)
359 {
360 return sprintf(buf, "%d\n", dev->numa_node);
361 }
362 static DEVICE_ATTR_RW(numa_node);
363 #endif
364
365 static ssize_t dma_mask_bits_show(struct device *dev,
366 struct device_attribute *attr, char *buf)
367 {
368 struct pci_dev *pdev = to_pci_dev(dev);
369
370 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
371 }
372 static DEVICE_ATTR_RO(dma_mask_bits);
373
374 static ssize_t consistent_dma_mask_bits_show(struct device *dev,
375 struct device_attribute *attr,
376 char *buf)
377 {
378 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
379 }
380 static DEVICE_ATTR_RO(consistent_dma_mask_bits);
381
382 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
383 char *buf)
384 {
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct pci_bus *subordinate = pdev->subordinate;
387
388 return sprintf(buf, "%u\n", subordinate ?
389 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
390 : !pdev->no_msi);
391 }
392
393 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
394 const char *buf, size_t count)
395 {
396 struct pci_dev *pdev = to_pci_dev(dev);
397 struct pci_bus *subordinate = pdev->subordinate;
398 unsigned long val;
399
400 if (kstrtoul(buf, 0, &val) < 0)
401 return -EINVAL;
402
403 if (!capable(CAP_SYS_ADMIN))
404 return -EPERM;
405
406 /*
407 * "no_msi" and "bus_flags" only affect what happens when a driver
408 * requests MSI or MSI-X. They don't affect any drivers that have
409 * already requested MSI or MSI-X.
410 */
411 if (!subordinate) {
412 pdev->no_msi = !val;
413 dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
414 val ? "allowed" : "disallowed");
415 return count;
416 }
417
418 if (val)
419 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
420 else
421 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
422
423 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
424 val ? "allowed" : "disallowed");
425 return count;
426 }
427 static DEVICE_ATTR_RW(msi_bus);
428
429 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
430 size_t count)
431 {
432 unsigned long val;
433 struct pci_bus *b = NULL;
434
435 if (kstrtoul(buf, 0, &val) < 0)
436 return -EINVAL;
437
438 if (val) {
439 pci_lock_rescan_remove();
440 while ((b = pci_find_next_bus(b)) != NULL)
441 pci_rescan_bus(b);
442 pci_unlock_rescan_remove();
443 }
444 return count;
445 }
446 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
447
448 static struct attribute *pci_bus_attrs[] = {
449 &bus_attr_rescan.attr,
450 NULL,
451 };
452
453 static const struct attribute_group pci_bus_group = {
454 .attrs = pci_bus_attrs,
455 };
456
457 const struct attribute_group *pci_bus_groups[] = {
458 &pci_bus_group,
459 NULL,
460 };
461
462 static ssize_t dev_rescan_store(struct device *dev,
463 struct device_attribute *attr, const char *buf,
464 size_t count)
465 {
466 unsigned long val;
467 struct pci_dev *pdev = to_pci_dev(dev);
468
469 if (kstrtoul(buf, 0, &val) < 0)
470 return -EINVAL;
471
472 if (val) {
473 pci_lock_rescan_remove();
474 pci_rescan_bus(pdev->bus);
475 pci_unlock_rescan_remove();
476 }
477 return count;
478 }
479 static struct device_attribute dev_rescan_attr = __ATTR(rescan,
480 (S_IWUSR|S_IWGRP),
481 NULL, dev_rescan_store);
482
483 static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
484 const char *buf, size_t count)
485 {
486 unsigned long val;
487
488 if (kstrtoul(buf, 0, &val) < 0)
489 return -EINVAL;
490
491 if (val && device_remove_file_self(dev, attr))
492 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
493 return count;
494 }
495 static struct device_attribute dev_remove_attr = __ATTR(remove,
496 (S_IWUSR|S_IWGRP),
497 NULL, remove_store);
498
499 static ssize_t dev_bus_rescan_store(struct device *dev,
500 struct device_attribute *attr,
501 const char *buf, size_t count)
502 {
503 unsigned long val;
504 struct pci_bus *bus = to_pci_bus(dev);
505
506 if (kstrtoul(buf, 0, &val) < 0)
507 return -EINVAL;
508
509 if (val) {
510 pci_lock_rescan_remove();
511 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
512 pci_rescan_bus_bridge_resize(bus->self);
513 else
514 pci_rescan_bus(bus);
515 pci_unlock_rescan_remove();
516 }
517 return count;
518 }
519 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
520
521 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
522 static ssize_t d3cold_allowed_store(struct device *dev,
523 struct device_attribute *attr,
524 const char *buf, size_t count)
525 {
526 struct pci_dev *pdev = to_pci_dev(dev);
527 unsigned long val;
528
529 if (kstrtoul(buf, 0, &val) < 0)
530 return -EINVAL;
531
532 pdev->d3cold_allowed = !!val;
533 if (pdev->d3cold_allowed)
534 pci_d3cold_enable(pdev);
535 else
536 pci_d3cold_disable(pdev);
537
538 pm_runtime_resume(dev);
539
540 return count;
541 }
542
543 static ssize_t d3cold_allowed_show(struct device *dev,
544 struct device_attribute *attr, char *buf)
545 {
546 struct pci_dev *pdev = to_pci_dev(dev);
547 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
548 }
549 static DEVICE_ATTR_RW(d3cold_allowed);
550 #endif
551
552 #ifdef CONFIG_OF
553 static ssize_t devspec_show(struct device *dev,
554 struct device_attribute *attr, char *buf)
555 {
556 struct pci_dev *pdev = to_pci_dev(dev);
557 struct device_node *np = pci_device_to_OF_node(pdev);
558
559 if (np == NULL || np->full_name == NULL)
560 return 0;
561 return sprintf(buf, "%s", np->full_name);
562 }
563 static DEVICE_ATTR_RO(devspec);
564 #endif
565
566 #ifdef CONFIG_PCI_IOV
567 static ssize_t sriov_totalvfs_show(struct device *dev,
568 struct device_attribute *attr,
569 char *buf)
570 {
571 struct pci_dev *pdev = to_pci_dev(dev);
572
573 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
574 }
575
576
577 static ssize_t sriov_numvfs_show(struct device *dev,
578 struct device_attribute *attr,
579 char *buf)
580 {
581 struct pci_dev *pdev = to_pci_dev(dev);
582
583 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
584 }
585
586 /*
587 * num_vfs > 0; number of VFs to enable
588 * num_vfs = 0; disable all VFs
589 *
590 * Note: SRIOV spec doesn't allow partial VF
591 * disable, so it's all or none.
592 */
593 static ssize_t sriov_numvfs_store(struct device *dev,
594 struct device_attribute *attr,
595 const char *buf, size_t count)
596 {
597 struct pci_dev *pdev = to_pci_dev(dev);
598 int ret;
599 u16 num_vfs;
600
601 ret = kstrtou16(buf, 0, &num_vfs);
602 if (ret < 0)
603 return ret;
604
605 if (num_vfs > pci_sriov_get_totalvfs(pdev))
606 return -ERANGE;
607
608 device_lock(&pdev->dev);
609
610 if (num_vfs == pdev->sriov->num_VFs)
611 goto exit;
612
613 /* is PF driver loaded w/callback */
614 if (!pdev->driver || !pdev->driver->sriov_configure) {
615 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
616 ret = -ENOENT;
617 goto exit;
618 }
619
620 if (num_vfs == 0) {
621 /* disable VFs */
622 ret = pdev->driver->sriov_configure(pdev, 0);
623 goto exit;
624 }
625
626 /* enable VFs */
627 if (pdev->sriov->num_VFs) {
628 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
629 pdev->sriov->num_VFs, num_vfs);
630 ret = -EBUSY;
631 goto exit;
632 }
633
634 ret = pdev->driver->sriov_configure(pdev, num_vfs);
635 if (ret < 0)
636 goto exit;
637
638 if (ret != num_vfs)
639 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
640 num_vfs, ret);
641
642 exit:
643 device_unlock(&pdev->dev);
644
645 if (ret < 0)
646 return ret;
647
648 return count;
649 }
650
651 static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
652 struct device_attribute *attr,
653 char *buf)
654 {
655 struct pci_dev *pdev = to_pci_dev(dev);
656
657 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
658 }
659
660 static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
661 struct device_attribute *attr,
662 const char *buf, size_t count)
663 {
664 struct pci_dev *pdev = to_pci_dev(dev);
665 bool drivers_autoprobe;
666
667 if (kstrtobool(buf, &drivers_autoprobe) < 0)
668 return -EINVAL;
669
670 pdev->sriov->drivers_autoprobe = drivers_autoprobe;
671
672 return count;
673 }
674
675 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
676 static struct device_attribute sriov_numvfs_attr =
677 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
678 sriov_numvfs_show, sriov_numvfs_store);
679 static struct device_attribute sriov_drivers_autoprobe_attr =
680 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
681 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
682 #endif /* CONFIG_PCI_IOV */
683
684 static ssize_t driver_override_store(struct device *dev,
685 struct device_attribute *attr,
686 const char *buf, size_t count)
687 {
688 struct pci_dev *pdev = to_pci_dev(dev);
689 char *driver_override, *old = pdev->driver_override, *cp;
690
691 /* We need to keep extra room for a newline */
692 if (count >= (PAGE_SIZE - 1))
693 return -EINVAL;
694
695 driver_override = kstrndup(buf, count, GFP_KERNEL);
696 if (!driver_override)
697 return -ENOMEM;
698
699 cp = strchr(driver_override, '\n');
700 if (cp)
701 *cp = '\0';
702
703 if (strlen(driver_override)) {
704 pdev->driver_override = driver_override;
705 } else {
706 kfree(driver_override);
707 pdev->driver_override = NULL;
708 }
709
710 kfree(old);
711
712 return count;
713 }
714
715 static ssize_t driver_override_show(struct device *dev,
716 struct device_attribute *attr, char *buf)
717 {
718 struct pci_dev *pdev = to_pci_dev(dev);
719
720 return snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
721 }
722 static DEVICE_ATTR_RW(driver_override);
723
724 static struct attribute *pci_dev_attrs[] = {
725 &dev_attr_resource.attr,
726 &dev_attr_vendor.attr,
727 &dev_attr_device.attr,
728 &dev_attr_subsystem_vendor.attr,
729 &dev_attr_subsystem_device.attr,
730 &dev_attr_revision.attr,
731 &dev_attr_class.attr,
732 &dev_attr_irq.attr,
733 &dev_attr_local_cpus.attr,
734 &dev_attr_local_cpulist.attr,
735 &dev_attr_modalias.attr,
736 #ifdef CONFIG_NUMA
737 &dev_attr_numa_node.attr,
738 #endif
739 &dev_attr_dma_mask_bits.attr,
740 &dev_attr_consistent_dma_mask_bits.attr,
741 &dev_attr_enable.attr,
742 &dev_attr_broken_parity_status.attr,
743 &dev_attr_msi_bus.attr,
744 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
745 &dev_attr_d3cold_allowed.attr,
746 #endif
747 #ifdef CONFIG_OF
748 &dev_attr_devspec.attr,
749 #endif
750 &dev_attr_driver_override.attr,
751 NULL,
752 };
753
754 static struct attribute *pci_bridge_attrs[] = {
755 &dev_attr_subordinate_bus_number.attr,
756 &dev_attr_secondary_bus_number.attr,
757 NULL,
758 };
759
760 static struct attribute *pcie_dev_attrs[] = {
761 &dev_attr_current_link_speed.attr,
762 &dev_attr_current_link_width.attr,
763 &dev_attr_max_link_width.attr,
764 &dev_attr_max_link_speed.attr,
765 NULL,
766 };
767
768 static struct attribute *pcibus_attrs[] = {
769 &dev_attr_rescan.attr,
770 &dev_attr_cpuaffinity.attr,
771 &dev_attr_cpulistaffinity.attr,
772 NULL,
773 };
774
775 static const struct attribute_group pcibus_group = {
776 .attrs = pcibus_attrs,
777 };
778
779 const struct attribute_group *pcibus_groups[] = {
780 &pcibus_group,
781 NULL,
782 };
783
784 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
785 char *buf)
786 {
787 struct pci_dev *pdev = to_pci_dev(dev);
788 struct pci_dev *vga_dev = vga_default_device();
789
790 if (vga_dev)
791 return sprintf(buf, "%u\n", (pdev == vga_dev));
792
793 return sprintf(buf, "%u\n",
794 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
795 IORESOURCE_ROM_SHADOW));
796 }
797 static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
798
799 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
800 struct bin_attribute *bin_attr, char *buf,
801 loff_t off, size_t count)
802 {
803 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
804 unsigned int size = 64;
805 loff_t init_off = off;
806 u8 *data = (u8 *) buf;
807
808 /* Several chips lock up trying to read undefined config space */
809 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
810 size = dev->cfg_size;
811 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
812 size = 128;
813
814 if (off > size)
815 return 0;
816 if (off + count > size) {
817 size -= off;
818 count = size;
819 } else {
820 size = count;
821 }
822
823 pci_config_pm_runtime_get(dev);
824
825 if ((off & 1) && size) {
826 u8 val;
827 pci_user_read_config_byte(dev, off, &val);
828 data[off - init_off] = val;
829 off++;
830 size--;
831 }
832
833 if ((off & 3) && size > 2) {
834 u16 val;
835 pci_user_read_config_word(dev, off, &val);
836 data[off - init_off] = val & 0xff;
837 data[off - init_off + 1] = (val >> 8) & 0xff;
838 off += 2;
839 size -= 2;
840 }
841
842 while (size > 3) {
843 u32 val;
844 pci_user_read_config_dword(dev, off, &val);
845 data[off - init_off] = val & 0xff;
846 data[off - init_off + 1] = (val >> 8) & 0xff;
847 data[off - init_off + 2] = (val >> 16) & 0xff;
848 data[off - init_off + 3] = (val >> 24) & 0xff;
849 off += 4;
850 size -= 4;
851 }
852
853 if (size >= 2) {
854 u16 val;
855 pci_user_read_config_word(dev, off, &val);
856 data[off - init_off] = val & 0xff;
857 data[off - init_off + 1] = (val >> 8) & 0xff;
858 off += 2;
859 size -= 2;
860 }
861
862 if (size > 0) {
863 u8 val;
864 pci_user_read_config_byte(dev, off, &val);
865 data[off - init_off] = val;
866 off++;
867 --size;
868 }
869
870 pci_config_pm_runtime_put(dev);
871
872 return count;
873 }
874
875 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
876 struct bin_attribute *bin_attr, char *buf,
877 loff_t off, size_t count)
878 {
879 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
880 unsigned int size = count;
881 loff_t init_off = off;
882 u8 *data = (u8 *) buf;
883
884 if (off > dev->cfg_size)
885 return 0;
886 if (off + count > dev->cfg_size) {
887 size = dev->cfg_size - off;
888 count = size;
889 }
890
891 pci_config_pm_runtime_get(dev);
892
893 if ((off & 1) && size) {
894 pci_user_write_config_byte(dev, off, data[off - init_off]);
895 off++;
896 size--;
897 }
898
899 if ((off & 3) && size > 2) {
900 u16 val = data[off - init_off];
901 val |= (u16) data[off - init_off + 1] << 8;
902 pci_user_write_config_word(dev, off, val);
903 off += 2;
904 size -= 2;
905 }
906
907 while (size > 3) {
908 u32 val = data[off - init_off];
909 val |= (u32) data[off - init_off + 1] << 8;
910 val |= (u32) data[off - init_off + 2] << 16;
911 val |= (u32) data[off - init_off + 3] << 24;
912 pci_user_write_config_dword(dev, off, val);
913 off += 4;
914 size -= 4;
915 }
916
917 if (size >= 2) {
918 u16 val = data[off - init_off];
919 val |= (u16) data[off - init_off + 1] << 8;
920 pci_user_write_config_word(dev, off, val);
921 off += 2;
922 size -= 2;
923 }
924
925 if (size) {
926 pci_user_write_config_byte(dev, off, data[off - init_off]);
927 off++;
928 --size;
929 }
930
931 pci_config_pm_runtime_put(dev);
932
933 return count;
934 }
935
936 static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
937 struct bin_attribute *bin_attr, char *buf,
938 loff_t off, size_t count)
939 {
940 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
941
942 if (bin_attr->size > 0) {
943 if (off > bin_attr->size)
944 count = 0;
945 else if (count > bin_attr->size - off)
946 count = bin_attr->size - off;
947 }
948
949 return pci_read_vpd(dev, off, count, buf);
950 }
951
952 static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
953 struct bin_attribute *bin_attr, char *buf,
954 loff_t off, size_t count)
955 {
956 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
957
958 if (bin_attr->size > 0) {
959 if (off > bin_attr->size)
960 count = 0;
961 else if (count > bin_attr->size - off)
962 count = bin_attr->size - off;
963 }
964
965 return pci_write_vpd(dev, off, count, buf);
966 }
967
968 #ifdef HAVE_PCI_LEGACY
969 /**
970 * pci_read_legacy_io - read byte(s) from legacy I/O port space
971 * @filp: open sysfs file
972 * @kobj: kobject corresponding to file to read from
973 * @bin_attr: struct bin_attribute for this file
974 * @buf: buffer to store results
975 * @off: offset into legacy I/O port space
976 * @count: number of bytes to read
977 *
978 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
979 * callback routine (pci_legacy_read).
980 */
981 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
982 struct bin_attribute *bin_attr, char *buf,
983 loff_t off, size_t count)
984 {
985 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
986
987 /* Only support 1, 2 or 4 byte accesses */
988 if (count != 1 && count != 2 && count != 4)
989 return -EINVAL;
990
991 return pci_legacy_read(bus, off, (u32 *)buf, count);
992 }
993
994 /**
995 * pci_write_legacy_io - write byte(s) to legacy I/O port space
996 * @filp: open sysfs file
997 * @kobj: kobject corresponding to file to read from
998 * @bin_attr: struct bin_attribute for this file
999 * @buf: buffer containing value to be written
1000 * @off: offset into legacy I/O port space
1001 * @count: number of bytes to write
1002 *
1003 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
1004 * callback routine (pci_legacy_write).
1005 */
1006 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
1007 struct bin_attribute *bin_attr, char *buf,
1008 loff_t off, size_t count)
1009 {
1010 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1011
1012 /* Only support 1, 2 or 4 byte accesses */
1013 if (count != 1 && count != 2 && count != 4)
1014 return -EINVAL;
1015
1016 return pci_legacy_write(bus, off, *(u32 *)buf, count);
1017 }
1018
1019 /**
1020 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
1021 * @filp: open sysfs file
1022 * @kobj: kobject corresponding to device to be mapped
1023 * @attr: struct bin_attribute for this file
1024 * @vma: struct vm_area_struct passed to mmap
1025 *
1026 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1027 * legacy memory space (first meg of bus space) into application virtual
1028 * memory space.
1029 */
1030 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
1031 struct bin_attribute *attr,
1032 struct vm_area_struct *vma)
1033 {
1034 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1035
1036 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
1037 }
1038
1039 /**
1040 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
1041 * @filp: open sysfs file
1042 * @kobj: kobject corresponding to device to be mapped
1043 * @attr: struct bin_attribute for this file
1044 * @vma: struct vm_area_struct passed to mmap
1045 *
1046 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
1047 * legacy IO space (first meg of bus space) into application virtual
1048 * memory space. Returns -ENOSYS if the operation isn't supported
1049 */
1050 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
1051 struct bin_attribute *attr,
1052 struct vm_area_struct *vma)
1053 {
1054 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1055
1056 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
1057 }
1058
1059 /**
1060 * pci_adjust_legacy_attr - adjustment of legacy file attributes
1061 * @b: bus to create files under
1062 * @mmap_type: I/O port or memory
1063 *
1064 * Stub implementation. Can be overridden by arch if necessary.
1065 */
1066 void __weak pci_adjust_legacy_attr(struct pci_bus *b,
1067 enum pci_mmap_state mmap_type)
1068 {
1069 }
1070
1071 /**
1072 * pci_create_legacy_files - create legacy I/O port and memory files
1073 * @b: bus to create files under
1074 *
1075 * Some platforms allow access to legacy I/O port and ISA memory space on
1076 * a per-bus basis. This routine creates the files and ties them into
1077 * their associated read, write and mmap files from pci-sysfs.c
1078 *
1079 * On error unwind, but don't propagate the error to the caller
1080 * as it is ok to set up the PCI bus without these files.
1081 */
1082 void pci_create_legacy_files(struct pci_bus *b)
1083 {
1084 int error;
1085
1086 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
1087 GFP_ATOMIC);
1088 if (!b->legacy_io)
1089 goto kzalloc_err;
1090
1091 sysfs_bin_attr_init(b->legacy_io);
1092 b->legacy_io->attr.name = "legacy_io";
1093 b->legacy_io->size = 0xffff;
1094 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
1095 b->legacy_io->read = pci_read_legacy_io;
1096 b->legacy_io->write = pci_write_legacy_io;
1097 b->legacy_io->mmap = pci_mmap_legacy_io;
1098 pci_adjust_legacy_attr(b, pci_mmap_io);
1099 error = device_create_bin_file(&b->dev, b->legacy_io);
1100 if (error)
1101 goto legacy_io_err;
1102
1103 /* Allocated above after the legacy_io struct */
1104 b->legacy_mem = b->legacy_io + 1;
1105 sysfs_bin_attr_init(b->legacy_mem);
1106 b->legacy_mem->attr.name = "legacy_mem";
1107 b->legacy_mem->size = 1024*1024;
1108 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
1109 b->legacy_mem->mmap = pci_mmap_legacy_mem;
1110 pci_adjust_legacy_attr(b, pci_mmap_mem);
1111 error = device_create_bin_file(&b->dev, b->legacy_mem);
1112 if (error)
1113 goto legacy_mem_err;
1114
1115 return;
1116
1117 legacy_mem_err:
1118 device_remove_bin_file(&b->dev, b->legacy_io);
1119 legacy_io_err:
1120 kfree(b->legacy_io);
1121 b->legacy_io = NULL;
1122 kzalloc_err:
1123 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
1124 return;
1125 }
1126
1127 void pci_remove_legacy_files(struct pci_bus *b)
1128 {
1129 if (b->legacy_io) {
1130 device_remove_bin_file(&b->dev, b->legacy_io);
1131 device_remove_bin_file(&b->dev, b->legacy_mem);
1132 kfree(b->legacy_io); /* both are allocated here */
1133 }
1134 }
1135 #endif /* HAVE_PCI_LEGACY */
1136
1137 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1138
1139 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1140 enum pci_mmap_api mmap_api)
1141 {
1142 unsigned long nr, start, size;
1143 resource_size_t pci_start = 0, pci_end;
1144
1145 if (pci_resource_len(pdev, resno) == 0)
1146 return 0;
1147 nr = vma_pages(vma);
1148 start = vma->vm_pgoff;
1149 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
1150 if (mmap_api == PCI_MMAP_PROCFS) {
1151 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1152 &pci_start, &pci_end);
1153 pci_start >>= PAGE_SHIFT;
1154 }
1155 if (start >= pci_start && start < pci_start + size &&
1156 start + nr <= pci_start + size)
1157 return 1;
1158 return 0;
1159 }
1160
1161 /**
1162 * pci_mmap_resource - map a PCI resource into user memory space
1163 * @kobj: kobject for mapping
1164 * @attr: struct bin_attribute for the file being mapped
1165 * @vma: struct vm_area_struct passed into the mmap
1166 * @write_combine: 1 for write_combine mapping
1167 *
1168 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1169 */
1170 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1171 struct vm_area_struct *vma, int write_combine)
1172 {
1173 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1174 int bar = (unsigned long)attr->private;
1175 enum pci_mmap_state mmap_type;
1176 struct resource *res = &pdev->resource[bar];
1177
1178 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1179 return -EINVAL;
1180
1181 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) {
1182 WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
1183 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
1184 pci_name(pdev), bar,
1185 (u64)pci_resource_start(pdev, bar),
1186 (u64)pci_resource_len(pdev, bar));
1187 return -EINVAL;
1188 }
1189 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1190
1191 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1192 }
1193
1194 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1195 struct bin_attribute *attr,
1196 struct vm_area_struct *vma)
1197 {
1198 return pci_mmap_resource(kobj, attr, vma, 0);
1199 }
1200
1201 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1202 struct bin_attribute *attr,
1203 struct vm_area_struct *vma)
1204 {
1205 return pci_mmap_resource(kobj, attr, vma, 1);
1206 }
1207
1208 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1209 struct bin_attribute *attr, char *buf,
1210 loff_t off, size_t count, bool write)
1211 {
1212 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1213 int bar = (unsigned long)attr->private;
1214 struct resource *res;
1215 unsigned long port = off;
1216
1217 res = &pdev->resource[bar];
1218
1219 port += pci_resource_start(pdev, bar);
1220
1221 if (port > pci_resource_end(pdev, bar))
1222 return 0;
1223
1224 if (port + count - 1 > pci_resource_end(pdev, bar))
1225 return -EINVAL;
1226
1227 switch (count) {
1228 case 1:
1229 if (write)
1230 outb(*(u8 *)buf, port);
1231 else
1232 *(u8 *)buf = inb(port);
1233 return 1;
1234 case 2:
1235 if (write)
1236 outw(*(u16 *)buf, port);
1237 else
1238 *(u16 *)buf = inw(port);
1239 return 2;
1240 case 4:
1241 if (write)
1242 outl(*(u32 *)buf, port);
1243 else
1244 *(u32 *)buf = inl(port);
1245 return 4;
1246 }
1247 return -EINVAL;
1248 }
1249
1250 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1251 struct bin_attribute *attr, char *buf,
1252 loff_t off, size_t count)
1253 {
1254 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1255 }
1256
1257 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1258 struct bin_attribute *attr, char *buf,
1259 loff_t off, size_t count)
1260 {
1261 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1262 }
1263
1264 /**
1265 * pci_remove_resource_files - cleanup resource files
1266 * @pdev: dev to cleanup
1267 *
1268 * If we created resource files for @pdev, remove them from sysfs and
1269 * free their resources.
1270 */
1271 static void pci_remove_resource_files(struct pci_dev *pdev)
1272 {
1273 int i;
1274
1275 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1276 struct bin_attribute *res_attr;
1277
1278 res_attr = pdev->res_attr[i];
1279 if (res_attr) {
1280 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1281 kfree(res_attr);
1282 }
1283
1284 res_attr = pdev->res_attr_wc[i];
1285 if (res_attr) {
1286 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1287 kfree(res_attr);
1288 }
1289 }
1290 }
1291
1292 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1293 {
1294 /* allocate attribute structure, piggyback attribute name */
1295 int name_len = write_combine ? 13 : 10;
1296 struct bin_attribute *res_attr;
1297 char *res_attr_name;
1298 int retval;
1299
1300 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1301 if (!res_attr)
1302 return -ENOMEM;
1303
1304 res_attr_name = (char *)(res_attr + 1);
1305
1306 sysfs_bin_attr_init(res_attr);
1307 if (write_combine) {
1308 pdev->res_attr_wc[num] = res_attr;
1309 sprintf(res_attr_name, "resource%d_wc", num);
1310 res_attr->mmap = pci_mmap_resource_wc;
1311 } else {
1312 pdev->res_attr[num] = res_attr;
1313 sprintf(res_attr_name, "resource%d", num);
1314 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1315 res_attr->read = pci_read_resource_io;
1316 res_attr->write = pci_write_resource_io;
1317 if (arch_can_pci_mmap_io())
1318 res_attr->mmap = pci_mmap_resource_uc;
1319 } else {
1320 res_attr->mmap = pci_mmap_resource_uc;
1321 }
1322 }
1323 res_attr->attr.name = res_attr_name;
1324 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1325 res_attr->size = pci_resource_len(pdev, num);
1326 res_attr->private = (void *)(unsigned long)num;
1327 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1328 if (retval)
1329 kfree(res_attr);
1330
1331 return retval;
1332 }
1333
1334 /**
1335 * pci_create_resource_files - create resource files in sysfs for @dev
1336 * @pdev: dev in question
1337 *
1338 * Walk the resources in @pdev creating files for each resource available.
1339 */
1340 static int pci_create_resource_files(struct pci_dev *pdev)
1341 {
1342 int i;
1343 int retval;
1344
1345 /* Expose the PCI resources from this device as files */
1346 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1347
1348 /* skip empty resources */
1349 if (!pci_resource_len(pdev, i))
1350 continue;
1351
1352 retval = pci_create_attr(pdev, i, 0);
1353 /* for prefetchable resources, create a WC mappable file */
1354 if (!retval && arch_can_pci_mmap_wc() &&
1355 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1356 retval = pci_create_attr(pdev, i, 1);
1357 if (retval) {
1358 pci_remove_resource_files(pdev);
1359 return retval;
1360 }
1361 }
1362 return 0;
1363 }
1364 #else /* !HAVE_PCI_MMAP */
1365 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1366 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1367 #endif /* HAVE_PCI_MMAP */
1368
1369 /**
1370 * pci_write_rom - used to enable access to the PCI ROM display
1371 * @filp: sysfs file
1372 * @kobj: kernel object handle
1373 * @bin_attr: struct bin_attribute for this file
1374 * @buf: user input
1375 * @off: file offset
1376 * @count: number of byte in input
1377 *
1378 * writing anything except 0 enables it
1379 */
1380 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1381 struct bin_attribute *bin_attr, char *buf,
1382 loff_t off, size_t count)
1383 {
1384 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1385
1386 if ((off == 0) && (*buf == '0') && (count == 2))
1387 pdev->rom_attr_enabled = 0;
1388 else
1389 pdev->rom_attr_enabled = 1;
1390
1391 return count;
1392 }
1393
1394 /**
1395 * pci_read_rom - read a PCI ROM
1396 * @filp: sysfs file
1397 * @kobj: kernel object handle
1398 * @bin_attr: struct bin_attribute for this file
1399 * @buf: where to put the data we read from the ROM
1400 * @off: file offset
1401 * @count: number of bytes to read
1402 *
1403 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1404 * device corresponding to @kobj.
1405 */
1406 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1407 struct bin_attribute *bin_attr, char *buf,
1408 loff_t off, size_t count)
1409 {
1410 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1411 void __iomem *rom;
1412 size_t size;
1413
1414 if (!pdev->rom_attr_enabled)
1415 return -EINVAL;
1416
1417 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1418 if (!rom || !size)
1419 return -EIO;
1420
1421 if (off >= size)
1422 count = 0;
1423 else {
1424 if (off + count > size)
1425 count = size - off;
1426
1427 memcpy_fromio(buf, rom + off, count);
1428 }
1429 pci_unmap_rom(pdev, rom);
1430
1431 return count;
1432 }
1433
1434 static struct bin_attribute pci_config_attr = {
1435 .attr = {
1436 .name = "config",
1437 .mode = S_IRUGO | S_IWUSR,
1438 },
1439 .size = PCI_CFG_SPACE_SIZE,
1440 .read = pci_read_config,
1441 .write = pci_write_config,
1442 };
1443
1444 static struct bin_attribute pcie_config_attr = {
1445 .attr = {
1446 .name = "config",
1447 .mode = S_IRUGO | S_IWUSR,
1448 },
1449 .size = PCI_CFG_SPACE_EXP_SIZE,
1450 .read = pci_read_config,
1451 .write = pci_write_config,
1452 };
1453
1454 static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1455 const char *buf, size_t count)
1456 {
1457 struct pci_dev *pdev = to_pci_dev(dev);
1458 unsigned long val;
1459 ssize_t result = kstrtoul(buf, 0, &val);
1460
1461 if (result < 0)
1462 return result;
1463
1464 if (val != 1)
1465 return -EINVAL;
1466
1467 result = pci_reset_function(pdev);
1468 if (result < 0)
1469 return result;
1470
1471 return count;
1472 }
1473
1474 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1475
1476 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1477 {
1478 int retval;
1479 struct bin_attribute *attr;
1480
1481 /* If the device has VPD, try to expose it in sysfs. */
1482 if (dev->vpd) {
1483 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1484 if (!attr)
1485 return -ENOMEM;
1486
1487 sysfs_bin_attr_init(attr);
1488 attr->size = 0;
1489 attr->attr.name = "vpd";
1490 attr->attr.mode = S_IRUSR | S_IWUSR;
1491 attr->read = read_vpd_attr;
1492 attr->write = write_vpd_attr;
1493 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1494 if (retval) {
1495 kfree(attr);
1496 return retval;
1497 }
1498 dev->vpd->attr = attr;
1499 }
1500
1501 /* Active State Power Management */
1502 pcie_aspm_create_sysfs_dev_files(dev);
1503
1504 if (!pci_probe_reset_function(dev)) {
1505 retval = device_create_file(&dev->dev, &reset_attr);
1506 if (retval)
1507 goto error;
1508 dev->reset_fn = 1;
1509 }
1510 return 0;
1511
1512 error:
1513 pcie_aspm_remove_sysfs_dev_files(dev);
1514 if (dev->vpd && dev->vpd->attr) {
1515 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1516 kfree(dev->vpd->attr);
1517 }
1518
1519 return retval;
1520 }
1521
1522 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1523 {
1524 int retval;
1525 int rom_size;
1526 struct bin_attribute *attr;
1527
1528 if (!sysfs_initialized)
1529 return -EACCES;
1530
1531 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1532 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1533 else
1534 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1535 if (retval)
1536 goto err;
1537
1538 retval = pci_create_resource_files(pdev);
1539 if (retval)
1540 goto err_config_file;
1541
1542 /* If the device has a ROM, try to expose it in sysfs. */
1543 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1544 if (rom_size) {
1545 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1546 if (!attr) {
1547 retval = -ENOMEM;
1548 goto err_resource_files;
1549 }
1550 sysfs_bin_attr_init(attr);
1551 attr->size = rom_size;
1552 attr->attr.name = "rom";
1553 attr->attr.mode = S_IRUSR | S_IWUSR;
1554 attr->read = pci_read_rom;
1555 attr->write = pci_write_rom;
1556 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1557 if (retval) {
1558 kfree(attr);
1559 goto err_resource_files;
1560 }
1561 pdev->rom_attr = attr;
1562 }
1563
1564 /* add sysfs entries for various capabilities */
1565 retval = pci_create_capabilities_sysfs(pdev);
1566 if (retval)
1567 goto err_rom_file;
1568
1569 pci_create_firmware_label_files(pdev);
1570
1571 return 0;
1572
1573 err_rom_file:
1574 if (pdev->rom_attr) {
1575 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1576 kfree(pdev->rom_attr);
1577 pdev->rom_attr = NULL;
1578 }
1579 err_resource_files:
1580 pci_remove_resource_files(pdev);
1581 err_config_file:
1582 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1583 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1584 else
1585 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1586 err:
1587 return retval;
1588 }
1589
1590 static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1591 {
1592 if (dev->vpd && dev->vpd->attr) {
1593 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1594 kfree(dev->vpd->attr);
1595 }
1596
1597 pcie_aspm_remove_sysfs_dev_files(dev);
1598 if (dev->reset_fn) {
1599 device_remove_file(&dev->dev, &reset_attr);
1600 dev->reset_fn = 0;
1601 }
1602 }
1603
1604 /**
1605 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1606 * @pdev: device whose entries we should free
1607 *
1608 * Cleanup when @pdev is removed from sysfs.
1609 */
1610 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1611 {
1612 if (!sysfs_initialized)
1613 return;
1614
1615 pci_remove_capabilities_sysfs(pdev);
1616
1617 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1618 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1619 else
1620 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1621
1622 pci_remove_resource_files(pdev);
1623
1624 if (pdev->rom_attr) {
1625 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1626 kfree(pdev->rom_attr);
1627 pdev->rom_attr = NULL;
1628 }
1629
1630 pci_remove_firmware_label_files(pdev);
1631 }
1632
1633 static int __init pci_sysfs_init(void)
1634 {
1635 struct pci_dev *pdev = NULL;
1636 int retval;
1637
1638 sysfs_initialized = 1;
1639 for_each_pci_dev(pdev) {
1640 retval = pci_create_sysfs_dev_files(pdev);
1641 if (retval) {
1642 pci_dev_put(pdev);
1643 return retval;
1644 }
1645 }
1646
1647 return 0;
1648 }
1649 late_initcall(pci_sysfs_init);
1650
1651 static struct attribute *pci_dev_dev_attrs[] = {
1652 &vga_attr.attr,
1653 NULL,
1654 };
1655
1656 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1657 struct attribute *a, int n)
1658 {
1659 struct device *dev = kobj_to_dev(kobj);
1660 struct pci_dev *pdev = to_pci_dev(dev);
1661
1662 if (a == &vga_attr.attr)
1663 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1664 return 0;
1665
1666 return a->mode;
1667 }
1668
1669 static struct attribute *pci_dev_hp_attrs[] = {
1670 &dev_remove_attr.attr,
1671 &dev_rescan_attr.attr,
1672 NULL,
1673 };
1674
1675 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1676 struct attribute *a, int n)
1677 {
1678 struct device *dev = kobj_to_dev(kobj);
1679 struct pci_dev *pdev = to_pci_dev(dev);
1680
1681 if (pdev->is_virtfn)
1682 return 0;
1683
1684 return a->mode;
1685 }
1686
1687 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1688 struct attribute *a, int n)
1689 {
1690 struct device *dev = kobj_to_dev(kobj);
1691 struct pci_dev *pdev = to_pci_dev(dev);
1692
1693 if (pci_is_bridge(pdev))
1694 return a->mode;
1695
1696 return 0;
1697 }
1698
1699 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1700 struct attribute *a, int n)
1701 {
1702 struct device *dev = kobj_to_dev(kobj);
1703 struct pci_dev *pdev = to_pci_dev(dev);
1704
1705 if (pci_is_pcie(pdev))
1706 return a->mode;
1707
1708 return 0;
1709 }
1710
1711 static const struct attribute_group pci_dev_group = {
1712 .attrs = pci_dev_attrs,
1713 };
1714
1715 const struct attribute_group *pci_dev_groups[] = {
1716 &pci_dev_group,
1717 NULL,
1718 };
1719
1720 static const struct attribute_group pci_bridge_group = {
1721 .attrs = pci_bridge_attrs,
1722 };
1723
1724 const struct attribute_group *pci_bridge_groups[] = {
1725 &pci_bridge_group,
1726 NULL,
1727 };
1728
1729 static const struct attribute_group pcie_dev_group = {
1730 .attrs = pcie_dev_attrs,
1731 };
1732
1733 const struct attribute_group *pcie_dev_groups[] = {
1734 &pcie_dev_group,
1735 NULL,
1736 };
1737
1738 static struct attribute_group pci_dev_hp_attr_group = {
1739 .attrs = pci_dev_hp_attrs,
1740 .is_visible = pci_dev_hp_attrs_are_visible,
1741 };
1742
1743 #ifdef CONFIG_PCI_IOV
1744 static struct attribute *sriov_dev_attrs[] = {
1745 &sriov_totalvfs_attr.attr,
1746 &sriov_numvfs_attr.attr,
1747 &sriov_drivers_autoprobe_attr.attr,
1748 NULL,
1749 };
1750
1751 static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1752 struct attribute *a, int n)
1753 {
1754 struct device *dev = kobj_to_dev(kobj);
1755
1756 if (!dev_is_pf(dev))
1757 return 0;
1758
1759 return a->mode;
1760 }
1761
1762 static struct attribute_group sriov_dev_attr_group = {
1763 .attrs = sriov_dev_attrs,
1764 .is_visible = sriov_attrs_are_visible,
1765 };
1766 #endif /* CONFIG_PCI_IOV */
1767
1768 static struct attribute_group pci_dev_attr_group = {
1769 .attrs = pci_dev_dev_attrs,
1770 .is_visible = pci_dev_attrs_are_visible,
1771 };
1772
1773 static struct attribute_group pci_bridge_attr_group = {
1774 .attrs = pci_bridge_attrs,
1775 .is_visible = pci_bridge_attrs_are_visible,
1776 };
1777
1778 static struct attribute_group pcie_dev_attr_group = {
1779 .attrs = pcie_dev_attrs,
1780 .is_visible = pcie_dev_attrs_are_visible,
1781 };
1782
1783 static const struct attribute_group *pci_dev_attr_groups[] = {
1784 &pci_dev_attr_group,
1785 &pci_dev_hp_attr_group,
1786 #ifdef CONFIG_PCI_IOV
1787 &sriov_dev_attr_group,
1788 #endif
1789 &pci_bridge_attr_group,
1790 &pcie_dev_attr_group,
1791 NULL,
1792 };
1793
1794 struct device_type pci_dev_type = {
1795 .groups = pci_dev_attr_groups,
1796 };