drivers/pci/pcie/pcie-dpc.c

   1 /*
   2  * PCI Express Downstream Port Containment services driver
   3  * Author: Keith Busch <keith.busch@intel.com>
   4  *
   5  * Copyright (C) 2016 Intel Corp.
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/init.h>
  15 #include <linux/pci.h>
  16 #include <linux/pcieport_if.h>
  17 #include "../pci.h"
  18 #include "aer/aerdrv.h"
  19
  20 struct rp_pio_header_log_regs {
  21         u32 dw0;
  22         u32 dw1;
  23         u32 dw2;
  24         u32 dw3;
  25 };
  26
  27 struct dpc_rp_pio_regs {
  28         u32 status;
  29         u32 mask;
  30         u32 severity;
  31         u32 syserror;
  32         u32 exception;
  33
  34         struct rp_pio_header_log_regs header_log;
  35         u32 impspec_log;
  36         u32 tlp_prefix_log[4];
  37         u32 log_size;
  38         u16 first_error;
  39 };
  40
  41 struct dpc_dev {
  42         struct pcie_device      *dev;
  43         struct work_struct      work;
  44         int                     cap_pos;
  45         bool                    rp;
  46         u32                     rp_pio_status;
  47 };
  48
  49 static const char * const rp_pio_error_string[] = {
  50         "Configuration Request received UR Completion",  /* Bit Position 0  */
  51         "Configuration Request received CA Completion",  /* Bit Position 1  */
  52         "Configuration Request Completion Timeout",      /* Bit Position 2  */
  53         NULL,
  54         NULL,
  55         NULL,
  56         NULL,
  57         NULL,
  58         "I/O Request received UR Completion",            /* Bit Position 8  */
  59         "I/O Request received CA Completion",            /* Bit Position 9  */
  60         "I/O Request Completion Timeout",                /* Bit Position 10 */
  61         NULL,
  62         NULL,
  63         NULL,
  64         NULL,
  65         NULL,
  66         "Memory Request received UR Completion",         /* Bit Position 16 */
  67         "Memory Request received CA Completion",         /* Bit Position 17 */
  68         "Memory Request Completion Timeout",             /* Bit Position 18 */
  69 };
  70
  71 static int dpc_wait_rp_inactive(struct dpc_dev *dpc)
  72 {
  73         unsigned long timeout = jiffies + HZ;
  74         struct pci_dev *pdev = dpc->dev->port;
  75         struct device *dev = &dpc->dev->device;
  76         u16 status;
  77
  78         pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
  79         while (status & PCI_EXP_DPC_RP_BUSY &&
  80                                         !time_after(jiffies, timeout)) {
  81                 msleep(10);
  82                 pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
  83         }
  84         if (status & PCI_EXP_DPC_RP_BUSY) {
  85                 dev_warn(dev, "DPC root port still busy\n");
  86                 return -EBUSY;
  87         }
  88         return 0;
  89 }
  90
  91 static void dpc_wait_link_inactive(struct dpc_dev *dpc)
  92 {
  93         unsigned long timeout = jiffies + HZ;
  94         struct pci_dev *pdev = dpc->dev->port;
  95         struct device *dev = &dpc->dev->device;
  96         u16 lnk_status;
  97
  98         pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
  99         while (lnk_status & PCI_EXP_LNKSTA_DLLLA &&
 100                                         !time_after(jiffies, timeout)) {
 101                 msleep(10);
 102                 pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
 103         }
 104         if (lnk_status & PCI_EXP_LNKSTA_DLLLA)
 105                 dev_warn(dev, "Link state not disabled for DPC event\n");
 106 }
 107
 108 static void interrupt_event_handler(struct work_struct *work)
 109 {
 110         struct dpc_dev *dpc = container_of(work, struct dpc_dev, work);
 111         struct pci_dev *dev, *temp, *pdev = dpc->dev->port;
 112         struct pci_bus *parent = pdev->subordinate;
 113
 114         pci_lock_rescan_remove();
 115         list_for_each_entry_safe_reverse(dev, temp, &parent->devices,
 116                                          bus_list) {
 117                 pci_dev_get(dev);
 118                 pci_dev_set_disconnected(dev, NULL);
 119                 if (pci_has_subordinate(dev))
 120                         pci_walk_bus(dev->subordinate,
 121                                      pci_dev_set_disconnected, NULL);
 122                 pci_stop_and_remove_bus_device(dev);
 123                 pci_dev_put(dev);
 124         }
 125         pci_unlock_rescan_remove();
 126
 127         dpc_wait_link_inactive(dpc);
 128         if (dpc->rp && dpc_wait_rp_inactive(dpc))
 129                 return;
 130         if (dpc->rp && dpc->rp_pio_status) {
 131                 pci_write_config_dword(pdev,
 132                                       dpc->cap_pos + PCI_EXP_DPC_RP_PIO_STATUS,
 133                                       dpc->rp_pio_status);
 134                 dpc->rp_pio_status = 0;
 135         }
 136
 137         pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS,
 138                 PCI_EXP_DPC_STATUS_TRIGGER | PCI_EXP_DPC_STATUS_INTERRUPT);
 139 }
 140
 141 static void dpc_rp_pio_print_tlp_header(struct device *dev,
 142                                         struct rp_pio_header_log_regs *t)
 143 {
 144         dev_err(dev, "TLP Header: %#010x %#010x %#010x %#010x\n",
 145                 t->dw0, t->dw1, t->dw2, t->dw3);
 146 }
 147
 148 static void dpc_rp_pio_print_error(struct dpc_dev *dpc,
 149                                    struct dpc_rp_pio_regs *rp_pio)
 150 {
 151         struct device *dev = &dpc->dev->device;
 152         int i;
 153         u32 status;
 154
 155         dev_err(dev, "rp_pio_status: %#010x, rp_pio_mask: %#010x\n",
 156                 rp_pio->status, rp_pio->mask);
 157
 158         dev_err(dev, "RP PIO severity=%#010x, syserror=%#010x, exception=%#010x\n",
 159                 rp_pio->severity, rp_pio->syserror, rp_pio->exception);
 160
 161         status = (rp_pio->status & ~rp_pio->mask);
 162
 163         for (i = 0; i < ARRAY_SIZE(rp_pio_error_string); i++) {
 164                 if (!(status & (1 << i)))
 165                         continue;
 166
 167                 dev_err(dev, "[%2d] %s%s\n", i, rp_pio_error_string[i],
 168                         rp_pio->first_error == i ? " (First)" : "");
 169         }
 170
 171         dpc_rp_pio_print_tlp_header(dev, &rp_pio->header_log);
 172         if (rp_pio->log_size == 4)
 173                 return;
 174         dev_err(dev, "RP PIO ImpSpec Log %#010x\n", rp_pio->impspec_log);
 175
 176         for (i = 0; i < rp_pio->log_size - 5; i++)
 177                 dev_err(dev, "TLP Prefix Header: dw%d, %#010x\n", i,
 178                         rp_pio->tlp_prefix_log[i]);
 179 }
 180
 181 static void dpc_rp_pio_get_info(struct dpc_dev *dpc,
 182                                 struct dpc_rp_pio_regs *rp_pio)
 183 {
 184         struct pci_dev *pdev = dpc->dev->port;
 185         struct device *dev = &dpc->dev->device;
 186         int i;
 187         u16 cap;
 188         u16 status;
 189
 190         pci_read_config_dword(pdev, dpc->cap_pos + PCI_EXP_DPC_RP_PIO_STATUS,
 191                               &rp_pio->status);
 192         pci_read_config_dword(pdev, dpc->cap_pos + PCI_EXP_DPC_RP_PIO_MASK,
 193                               &rp_pio->mask);
 194
 195         pci_read_config_dword(pdev, dpc->cap_pos + PCI_EXP_DPC_RP_PIO_SEVERITY,
 196                               &rp_pio->severity);
 197         pci_read_config_dword(pdev, dpc->cap_pos + PCI_EXP_DPC_RP_PIO_SYSERROR,
 198                               &rp_pio->syserror);
 199         pci_read_config_dword(pdev, dpc->cap_pos + PCI_EXP_DPC_RP_PIO_EXCEPTION,
 200                               &rp_pio->exception);
 201
 202         /* Get First Error Pointer */
 203         pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
 204         rp_pio->first_error = (status & 0x1f00) >> 8;
 205
 206         pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);
 207         rp_pio->log_size = (cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8;
 208         if (rp_pio->log_size < 4 || rp_pio->log_size > 9) {
 209                 dev_err(dev, "RP PIO log size %u is invalid\n",
 210                         rp_pio->log_size);
 211                 return;
 212         }
 213
 214         pci_read_config_dword(pdev,
 215                               dpc->cap_pos + PCI_EXP_DPC_RP_PIO_HEADER_LOG,
 216                               &rp_pio->header_log.dw0);
 217         pci_read_config_dword(pdev,
 218                               dpc->cap_pos + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 4,
 219                               &rp_pio->header_log.dw1);
 220         pci_read_config_dword(pdev,
 221                               dpc->cap_pos + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 8,
 222                               &rp_pio->header_log.dw2);
 223         pci_read_config_dword(pdev,
 224                               dpc->cap_pos + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 12,
 225                               &rp_pio->header_log.dw3);
 226         if (rp_pio->log_size == 4)
 227                 return;
 228
 229         pci_read_config_dword(pdev,
 230                               dpc->cap_pos + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG,
 231                               &rp_pio->impspec_log);
 232         for (i = 0; i < rp_pio->log_size - 5; i++)
 233                 pci_read_config_dword(pdev,
 234                         dpc->cap_pos + PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG,
 235                         &rp_pio->tlp_prefix_log[i]);
 236 }
 237
 238 static void dpc_process_rp_pio_error(struct dpc_dev *dpc)
 239 {
 240         struct dpc_rp_pio_regs rp_pio_regs;
 241
 242         dpc_rp_pio_get_info(dpc, &rp_pio_regs);
 243         dpc_rp_pio_print_error(dpc, &rp_pio_regs);
 244
 245         dpc->rp_pio_status = rp_pio_regs.status;
 246 }
 247
 248 static irqreturn_t dpc_irq(int irq, void *context)
 249 {
 250         struct dpc_dev *dpc = (struct dpc_dev *)context;
 251         struct pci_dev *pdev = dpc->dev->port;
 252         struct device *dev = &dpc->dev->device;
 253         u16 status, source;
 254
 255         pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
 256         pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_SOURCE_ID,
 257                              &source);
 258         if (!status || status == (u16)(~0))
 259                 return IRQ_NONE;
 260
 261         dev_info(dev, "DPC containment event, status:%#06x source:%#06x\n",
 262                 status, source);
 263
 264         if (status & PCI_EXP_DPC_STATUS_TRIGGER) {
 265                 u16 reason = (status >> 1) & 0x3;
 266                 u16 ext_reason = (status >> 5) & 0x3;
 267
 268                 dev_warn(dev, "DPC %s detected, remove downstream devices\n",
 269                          (reason == 0) ? "unmasked uncorrectable error" :
 270                          (reason == 1) ? "ERR_NONFATAL" :
 271                          (reason == 2) ? "ERR_FATAL" :
 272                          (ext_reason == 0) ? "RP PIO error" :
 273                          (ext_reason == 1) ? "software trigger" :
 274                                              "reserved error");
 275                 /* show RP PIO error detail information */
 276                 if (reason == 3 && ext_reason == 0)
 277                         dpc_process_rp_pio_error(dpc);
 278
 279                 schedule_work(&dpc->work);
 280         }
 281         return IRQ_HANDLED;
 282 }
 283
 284 #define FLAG(x, y) (((x) & (y)) ? '+' : '-')
 285 static int dpc_probe(struct pcie_device *dev)
 286 {
 287         struct dpc_dev *dpc;
 288         struct pci_dev *pdev = dev->port;
 289         struct device *device = &dev->device;
 290         int status;
 291         u16 ctl, cap;
 292
 293         if (pcie_aer_get_firmware_first(pdev))
 294                 return -ENOTSUPP;
 295
 296         dpc = devm_kzalloc(device, sizeof(*dpc), GFP_KERNEL);
 297         if (!dpc)
 298                 return -ENOMEM;
 299
 300         dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
 301         dpc->dev = dev;
 302         INIT_WORK(&dpc->work, interrupt_event_handler);
 303         set_service_data(dev, dpc);
 304
 305         status = devm_request_irq(device, dev->irq, dpc_irq, IRQF_SHARED,
 306                                   "pcie-dpc", dpc);
 307         if (status) {
 308                 dev_warn(device, "request IRQ%d failed: %d\n", dev->irq,
 309                          status);
 310                 return status;
 311         }
 312
 313         pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);
 314         pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
 315
 316         dpc->rp = (cap & PCI_EXP_DPC_CAP_RP_EXT);
 317
 318         ctl = (ctl & 0xfff4) | PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN;
 319         pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
 320
 321         dev_info(device, "DPC error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n",
 322                 cap & 0xf, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),
 323                 FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),
 324                 FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), (cap >> 8) & 0xf,
 325                 FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE));
 326         return status;
 327 }
 328
 329 static void dpc_remove(struct pcie_device *dev)
 330 {
 331         struct dpc_dev *dpc = get_service_data(dev);
 332         struct pci_dev *pdev = dev->port;
 333         u16 ctl;
 334
 335         pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
 336         ctl &= ~(PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN);
 337         pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
 338 }
 339
 340 static struct pcie_port_service_driver dpcdriver = {
 341         .name           = "dpc",
 342         .port_type      = PCIE_ANY_PORT,
 343         .service        = PCIE_PORT_SERVICE_DPC,
 344         .probe          = dpc_probe,
 345         .remove         = dpc_remove,
 346 };
 347
 348 static int __init dpc_service_init(void)
 349 {
 350         return pcie_port_service_register(&dpcdriver);
 351 }
 352 device_initcall(dpc_service_init);