drivers/pci/proc.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *      Procfs interface for the PCI bus.
   4  *
   5  *      Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
   6  */
   7
   8 #include <linux/init.h>
   9 #include <linux/pci.h>
  10 #include <linux/slab.h>
  11 #include <linux/module.h>
  12 #include <linux/proc_fs.h>
  13 #include <linux/seq_file.h>
  14 #include <linux/capability.h>
  15 #include <linux/uaccess.h>
  16 #include <asm/byteorder.h>
  17 #include "pci.h"
  18
  19 static int proc_initialized;    /* = 0 */
  20
  21 static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
  22 {
  23         struct pci_dev *dev = PDE_DATA(file_inode(file));
  24         return fixed_size_llseek(file, off, whence, dev->cfg_size);
  25 }
  26
  27 static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
  28                                  size_t nbytes, loff_t *ppos)
  29 {
  30         struct pci_dev *dev = PDE_DATA(file_inode(file));
  31         unsigned int pos = *ppos;
  32         unsigned int cnt, size;
  33
  34         /*
  35          * Normal users can read only the standardized portion of the
  36          * configuration space as several chips lock up when trying to read
  37          * undefined locations (think of Intel PIIX4 as a typical example).
  38          */
  39
  40         if (capable(CAP_SYS_ADMIN))
  41                 size = dev->cfg_size;
  42         else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  43                 size = 128;
  44         else
  45                 size = 64;
  46
  47         if (pos >= size)
  48                 return 0;
  49         if (nbytes >= size)
  50                 nbytes = size;
  51         if (pos + nbytes > size)
  52                 nbytes = size - pos;
  53         cnt = nbytes;
  54
  55         if (!access_ok(VERIFY_WRITE, buf, cnt))
  56                 return -EINVAL;
  57
  58         pci_config_pm_runtime_get(dev);
  59
  60         if ((pos & 1) && cnt) {
  61                 unsigned char val;
  62                 pci_user_read_config_byte(dev, pos, &val);
  63                 __put_user(val, buf);
  64                 buf++;
  65                 pos++;
  66                 cnt--;
  67         }
  68
  69         if ((pos & 3) && cnt > 2) {
  70                 unsigned short val;
  71                 pci_user_read_config_word(dev, pos, &val);
  72                 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
  73                 buf += 2;
  74                 pos += 2;
  75                 cnt -= 2;
  76         }
  77
  78         while (cnt >= 4) {
  79                 unsigned int val;
  80                 pci_user_read_config_dword(dev, pos, &val);
  81                 __put_user(cpu_to_le32(val), (__le32 __user *) buf);
  82                 buf += 4;
  83                 pos += 4;
  84                 cnt -= 4;
  85         }
  86
  87         if (cnt >= 2) {
  88                 unsigned short val;
  89                 pci_user_read_config_word(dev, pos, &val);
  90                 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
  91                 buf += 2;
  92                 pos += 2;
  93                 cnt -= 2;
  94         }
  95
  96         if (cnt) {
  97                 unsigned char val;
  98                 pci_user_read_config_byte(dev, pos, &val);
  99                 __put_user(val, buf);
 100                 buf++;
 101                 pos++;
 102                 cnt--;
 103         }
 104
 105         pci_config_pm_runtime_put(dev);
 106
 107         *ppos = pos;
 108         return nbytes;
 109 }
 110
 111 static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
 112                                   size_t nbytes, loff_t *ppos)
 113 {
 114         struct inode *ino = file_inode(file);
 115         struct pci_dev *dev = PDE_DATA(ino);
 116         int pos = *ppos;
 117         int size = dev->cfg_size;
 118         int cnt;
 119
 120         if (kernel_is_locked_down("Direct PCI access"))
 121                 return -EPERM;
 122
 123         if (pos >= size)
 124                 return 0;
 125         if (nbytes >= size)
 126                 nbytes = size;
 127         if (pos + nbytes > size)
 128                 nbytes = size - pos;
 129         cnt = nbytes;
 130
 131         if (!access_ok(VERIFY_READ, buf, cnt))
 132                 return -EINVAL;
 133
 134         pci_config_pm_runtime_get(dev);
 135
 136         if ((pos & 1) && cnt) {
 137                 unsigned char val;
 138                 __get_user(val, buf);
 139                 pci_user_write_config_byte(dev, pos, val);
 140                 buf++;
 141                 pos++;
 142                 cnt--;
 143         }
 144
 145         if ((pos & 3) && cnt > 2) {
 146                 __le16 val;
 147                 __get_user(val, (__le16 __user *) buf);
 148                 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
 149                 buf += 2;
 150                 pos += 2;
 151                 cnt -= 2;
 152         }
 153
 154         while (cnt >= 4) {
 155                 __le32 val;
 156                 __get_user(val, (__le32 __user *) buf);
 157                 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
 158                 buf += 4;
 159                 pos += 4;
 160                 cnt -= 4;
 161         }
 162
 163         if (cnt >= 2) {
 164                 __le16 val;
 165                 __get_user(val, (__le16 __user *) buf);
 166                 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
 167                 buf += 2;
 168                 pos += 2;
 169                 cnt -= 2;
 170         }
 171
 172         if (cnt) {
 173                 unsigned char val;
 174                 __get_user(val, buf);
 175                 pci_user_write_config_byte(dev, pos, val);
 176                 buf++;
 177                 pos++;
 178                 cnt--;
 179         }
 180
 181         pci_config_pm_runtime_put(dev);
 182
 183         *ppos = pos;
 184         i_size_write(ino, dev->cfg_size);
 185         return nbytes;
 186 }
 187
 188 struct pci_filp_private {
 189         enum pci_mmap_state mmap_state;
 190         int write_combine;
 191 };
 192
 193 static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
 194                                unsigned long arg)
 195 {
 196         struct pci_dev *dev = PDE_DATA(file_inode(file));
 197 #ifdef HAVE_PCI_MMAP
 198         struct pci_filp_private *fpriv = file->private_data;
 199 #endif /* HAVE_PCI_MMAP */
 200         int ret = 0;
 201
 202         if (kernel_is_locked_down("Direct PCI access"))
 203                 return -EPERM;
 204
 205         switch (cmd) {
 206         case PCIIOC_CONTROLLER:
 207                 ret = pci_domain_nr(dev->bus);
 208                 break;
 209
 210 #ifdef HAVE_PCI_MMAP
 211         case PCIIOC_MMAP_IS_IO:
 212                 if (!arch_can_pci_mmap_io())
 213                         return -EINVAL;
 214                 fpriv->mmap_state = pci_mmap_io;
 215                 break;
 216
 217         case PCIIOC_MMAP_IS_MEM:
 218                 fpriv->mmap_state = pci_mmap_mem;
 219                 break;
 220
 221         case PCIIOC_WRITE_COMBINE:
 222                 if (arch_can_pci_mmap_wc()) {
 223                         if (arg)
 224                                 fpriv->write_combine = 1;
 225                         else
 226                                 fpriv->write_combine = 0;
 227                         break;
 228                 }
 229                 /* If arch decided it can't, fall through... */
 230 #endif /* HAVE_PCI_MMAP */
 231         default:
 232                 ret = -EINVAL;
 233                 break;
 234         }
 235
 236         return ret;
 237 }
 238
 239 #ifdef HAVE_PCI_MMAP
 240 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
 241 {
 242         struct pci_dev *dev = PDE_DATA(file_inode(file));
 243         struct pci_filp_private *fpriv = file->private_data;
 244         int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
 245
 246         if (!capable(CAP_SYS_RAWIO) ||
 247             kernel_is_locked_down("Direct PCI access"))
 248                 return -EPERM;
 249
 250         if (fpriv->mmap_state == pci_mmap_io) {
 251                 if (!arch_can_pci_mmap_io())
 252                         return -EINVAL;
 253                 res_bit = IORESOURCE_IO;
 254         }
 255
 256         /* Make sure the caller is mapping a real resource for this device */
 257         for (i = 0; i < PCI_ROM_RESOURCE; i++) {
 258                 if (dev->resource[i].flags & res_bit &&
 259                     pci_mmap_fits(dev, i, vma,  PCI_MMAP_PROCFS))
 260                         break;
 261         }
 262
 263         if (i >= PCI_ROM_RESOURCE)
 264                 return -ENODEV;
 265
 266         if (fpriv->mmap_state == pci_mmap_mem &&
 267             fpriv->write_combine) {
 268                 if (dev->resource[i].flags & IORESOURCE_PREFETCH)
 269                         write_combine = 1;
 270                 else
 271                         return -EINVAL;
 272         }
 273         ret = pci_mmap_page_range(dev, i, vma,
 274                                   fpriv->mmap_state, write_combine);
 275         if (ret < 0)
 276                 return ret;
 277
 278         return 0;
 279 }
 280
 281 static int proc_bus_pci_open(struct inode *inode, struct file *file)
 282 {
 283         struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
 284
 285         if (!fpriv)
 286                 return -ENOMEM;
 287
 288         fpriv->mmap_state = pci_mmap_io;
 289         fpriv->write_combine = 0;
 290
 291         file->private_data = fpriv;
 292
 293         return 0;
 294 }
 295
 296 static int proc_bus_pci_release(struct inode *inode, struct file *file)
 297 {
 298         kfree(file->private_data);
 299         file->private_data = NULL;
 300
 301         return 0;
 302 }
 303 #endif /* HAVE_PCI_MMAP */
 304
 305 static const struct file_operations proc_bus_pci_operations = {
 306         .owner          = THIS_MODULE,
 307         .llseek         = proc_bus_pci_lseek,
 308         .read           = proc_bus_pci_read,
 309         .write          = proc_bus_pci_write,
 310         .unlocked_ioctl = proc_bus_pci_ioctl,
 311         .compat_ioctl   = proc_bus_pci_ioctl,
 312 #ifdef HAVE_PCI_MMAP
 313         .open           = proc_bus_pci_open,
 314         .release        = proc_bus_pci_release,
 315         .mmap           = proc_bus_pci_mmap,
 316 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
 317         .get_unmapped_area = get_pci_unmapped_area,
 318 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
 319 #endif /* HAVE_PCI_MMAP */
 320 };
 321
 322 /* iterator */
 323 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
 324 {
 325         struct pci_dev *dev = NULL;
 326         loff_t n = *pos;
 327
 328         for_each_pci_dev(dev) {
 329                 if (!n--)
 330                         break;
 331         }
 332         return dev;
 333 }
 334
 335 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
 336 {
 337         struct pci_dev *dev = v;
 338
 339         (*pos)++;
 340         dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
 341         return dev;
 342 }
 343
 344 static void pci_seq_stop(struct seq_file *m, void *v)
 345 {
 346         if (v) {
 347                 struct pci_dev *dev = v;
 348                 pci_dev_put(dev);
 349         }
 350 }
 351
 352 static int show_device(struct seq_file *m, void *v)
 353 {
 354         const struct pci_dev *dev = v;
 355         const struct pci_driver *drv;
 356         int i;
 357
 358         if (dev == NULL)
 359                 return 0;
 360
 361         drv = pci_dev_driver(dev);
 362         seq_printf(m, "%02x%02x\t%04x%04x\t%x",
 363                         dev->bus->number,
 364                         dev->devfn,
 365                         dev->vendor,
 366                         dev->device,
 367                         dev->irq);
 368
 369         /* only print standard and ROM resources to preserve compatibility */
 370         for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
 371                 resource_size_t start, end;
 372                 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
 373                 seq_printf(m, "\t%16llx",
 374                         (unsigned long long)(start |
 375                         (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
 376         }
 377         for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
 378                 resource_size_t start, end;
 379                 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
 380                 seq_printf(m, "\t%16llx",
 381                         dev->resource[i].start < dev->resource[i].end ?
 382                         (unsigned long long)(end - start) + 1 : 0);
 383         }
 384         seq_putc(m, '\t');
 385         if (drv)
 386                 seq_printf(m, "%s", drv->name);
 387         seq_putc(m, '\n');
 388         return 0;
 389 }
 390
 391 static const struct seq_operations proc_bus_pci_devices_op = {
 392         .start  = pci_seq_start,
 393         .next   = pci_seq_next,
 394         .stop   = pci_seq_stop,
 395         .show   = show_device
 396 };
 397
 398 static struct proc_dir_entry *proc_bus_pci_dir;
 399
 400 int pci_proc_attach_device(struct pci_dev *dev)
 401 {
 402         struct pci_bus *bus = dev->bus;
 403         struct proc_dir_entry *e;
 404         char name[16];
 405
 406         if (!proc_initialized)
 407                 return -EACCES;
 408
 409         if (!bus->procdir) {
 410                 if (pci_proc_domain(bus)) {
 411                         sprintf(name, "%04x:%02x", pci_domain_nr(bus),
 412                                         bus->number);
 413                 } else {
 414                         sprintf(name, "%02x", bus->number);
 415                 }
 416                 bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
 417                 if (!bus->procdir)
 418                         return -ENOMEM;
 419         }
 420
 421         sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
 422         e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
 423                              &proc_bus_pci_operations, dev);
 424         if (!e)
 425                 return -ENOMEM;
 426         proc_set_size(e, dev->cfg_size);
 427         dev->procent = e;
 428
 429         return 0;
 430 }
 431
 432 int pci_proc_detach_device(struct pci_dev *dev)
 433 {
 434         proc_remove(dev->procent);
 435         dev->procent = NULL;
 436         return 0;
 437 }
 438
 439 int pci_proc_detach_bus(struct pci_bus *bus)
 440 {
 441         proc_remove(bus->procdir);
 442         return 0;
 443 }
 444
 445 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
 446 {
 447         return seq_open(file, &proc_bus_pci_devices_op);
 448 }
 449
 450 static const struct file_operations proc_bus_pci_dev_operations = {
 451         .owner          = THIS_MODULE,
 452         .open           = proc_bus_pci_dev_open,
 453         .read           = seq_read,
 454         .llseek         = seq_lseek,
 455         .release        = seq_release,
 456 };
 457
 458 static int __init pci_proc_init(void)
 459 {
 460         struct pci_dev *dev = NULL;
 461         proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
 462         proc_create("devices", 0, proc_bus_pci_dir,
 463                     &proc_bus_pci_dev_operations);
 464         proc_initialized = 1;
 465         for_each_pci_dev(dev)
 466                 pci_proc_attach_device(dev);
 467
 468         return 0;
 469 }
 470 device_initcall(pci_proc_init);