2 * drivers/pci/setup-res.c
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
9 * Support routines for initializing a PCI subsystem.
12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
15 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/export.h>
22 #include <linux/pci.h>
23 #include <linux/errno.h>
24 #include <linux/ioport.h>
25 #include <linux/cache.h>
26 #include <linux/slab.h>
30 void pci_update_resource(struct pci_dev
*dev
, int resno
)
32 struct pci_bus_region region
;
35 enum pci_bar_type type
;
36 struct resource
*res
= dev
->resource
+ resno
;
39 * Ignore resources for unimplemented BARs and unused resource slots
46 * Ignore non-moveable resources. This might be legacy resources for
47 * which no functional BAR register exists or another important
48 * system resource we shouldn't move around.
50 if (res
->flags
& IORESOURCE_PCI_FIXED
)
53 pcibios_resource_to_bus(dev
, ®ion
, res
);
55 new = region
.start
| (res
->flags
& PCI_REGION_FLAG_MASK
);
56 if (res
->flags
& IORESOURCE_IO
)
57 mask
= (u32
)PCI_BASE_ADDRESS_IO_MASK
;
59 mask
= (u32
)PCI_BASE_ADDRESS_MEM_MASK
;
61 reg
= pci_resource_bar(dev
, resno
, &type
);
64 if (type
!= pci_bar_unknown
) {
65 if (!(res
->flags
& IORESOURCE_ROM_ENABLE
))
67 new |= PCI_ROM_ADDRESS_ENABLE
;
70 pci_write_config_dword(dev
, reg
, new);
71 pci_read_config_dword(dev
, reg
, &check
);
73 if ((new ^ check
) & mask
) {
74 dev_err(&dev
->dev
, "BAR %d: error updating (%#08x != %#08x)\n",
78 if (res
->flags
& IORESOURCE_MEM_64
) {
79 new = region
.start
>> 16 >> 16;
80 pci_write_config_dword(dev
, reg
+ 4, new);
81 pci_read_config_dword(dev
, reg
+ 4, &check
);
83 dev_err(&dev
->dev
, "BAR %d: error updating "
84 "(high %#08x != %#08x)\n", resno
, new, check
);
87 res
->flags
&= ~IORESOURCE_UNSET
;
88 dev_dbg(&dev
->dev
, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
89 resno
, res
, (unsigned long long)region
.start
,
90 (unsigned long long)region
.end
);
93 int pci_claim_resource(struct pci_dev
*dev
, int resource
)
95 struct resource
*res
= &dev
->resource
[resource
];
96 struct resource
*root
, *conflict
;
98 root
= pci_find_parent_resource(dev
, res
);
100 dev_info(&dev
->dev
, "no compatible bridge window for %pR\n",
105 conflict
= request_resource_conflict(root
, res
);
108 "address space collision: %pR conflicts with %s %pR\n",
109 res
, conflict
->name
, conflict
);
115 EXPORT_SYMBOL(pci_claim_resource
);
117 #ifdef CONFIG_PCI_QUIRKS
118 void pci_disable_bridge_window(struct pci_dev
*dev
)
120 dev_info(&dev
->dev
, "disabling bridge mem windows\n");
122 /* MMIO Base/Limit */
123 pci_write_config_dword(dev
, PCI_MEMORY_BASE
, 0x0000fff0);
125 /* Prefetchable MMIO Base/Limit */
126 pci_write_config_dword(dev
, PCI_PREF_LIMIT_UPPER32
, 0);
127 pci_write_config_dword(dev
, PCI_PREF_MEMORY_BASE
, 0x0000fff0);
128 pci_write_config_dword(dev
, PCI_PREF_BASE_UPPER32
, 0xffffffff);
130 #endif /* CONFIG_PCI_QUIRKS */
134 static int __pci_assign_resource(struct pci_bus
*bus
, struct pci_dev
*dev
,
135 int resno
, resource_size_t size
, resource_size_t align
)
137 struct resource
*res
= dev
->resource
+ resno
;
141 min
= (res
->flags
& IORESOURCE_IO
) ? PCIBIOS_MIN_IO
: PCIBIOS_MIN_MEM
;
143 /* First, try exact prefetching match.. */
144 ret
= pci_bus_alloc_resource(bus
, res
, size
, align
, min
,
146 pcibios_align_resource
, dev
);
148 if (ret
< 0 && (res
->flags
& IORESOURCE_PREFETCH
)) {
152 * But a prefetching area can handle a non-prefetching
153 * window (it will just not perform as well).
155 ret
= pci_bus_alloc_resource(bus
, res
, size
, align
, min
, 0,
156 pcibios_align_resource
, dev
);
161 static int pci_revert_fw_address(struct resource
*res
, struct pci_dev
*dev
,
162 int resno
, resource_size_t size
)
164 struct resource
*root
, *conflict
;
165 resource_size_t start
, end
;
170 res
->start
= dev
->fw_addr
[resno
];
171 res
->end
= res
->start
+ size
- 1;
173 root
= pci_find_parent_resource(dev
, res
);
175 if (res
->flags
& IORESOURCE_IO
)
176 root
= &ioport_resource
;
178 root
= &iomem_resource
;
181 dev_info(&dev
->dev
, "BAR %d: trying firmware assignment %pR\n",
183 conflict
= request_resource_conflict(root
, res
);
186 "BAR %d: %pR conflicts with %s %pR\n", resno
,
187 res
, conflict
->name
, conflict
);
195 static int _pci_assign_resource(struct pci_dev
*dev
, int resno
, int size
, resource_size_t min_align
)
197 struct resource
*res
= dev
->resource
+ resno
;
203 while ((ret
= __pci_assign_resource(bus
, dev
, resno
, size
, min_align
))) {
204 if (!bus
->parent
|| !bus
->self
->transparent
)
210 if (res
->flags
& IORESOURCE_MEM
)
211 if (res
->flags
& IORESOURCE_PREFETCH
)
215 else if (res
->flags
& IORESOURCE_IO
)
220 "BAR %d: can't assign %s (size %#llx)\n",
221 resno
, type
, (unsigned long long) resource_size(res
));
227 int pci_reassign_resource(struct pci_dev
*dev
, int resno
, resource_size_t addsize
,
228 resource_size_t min_align
)
230 struct resource
*res
= dev
->resource
+ resno
;
231 resource_size_t new_size
;
235 dev_info(&dev
->dev
, "BAR %d: can't reassign an unassigned resouce %pR "
240 new_size
= resource_size(res
) + addsize
+ min_align
;
241 ret
= _pci_assign_resource(dev
, resno
, new_size
, min_align
);
243 res
->flags
&= ~IORESOURCE_STARTALIGN
;
244 dev_info(&dev
->dev
, "BAR %d: assigned %pR\n", resno
, res
);
245 if (resno
< PCI_BRIDGE_RESOURCES
)
246 pci_update_resource(dev
, resno
);
251 int pci_assign_resource(struct pci_dev
*dev
, int resno
)
253 struct resource
*res
= dev
->resource
+ resno
;
254 resource_size_t align
, size
;
258 align
= pci_resource_alignment(dev
, res
);
260 dev_info(&dev
->dev
, "BAR %d: can't assign %pR "
261 "(bogus alignment)\n", resno
, res
);
266 size
= resource_size(res
);
267 ret
= _pci_assign_resource(dev
, resno
, size
, align
);
270 * If we failed to assign anything, let's try the address
271 * where firmware left it. That at least has a chance of
272 * working, which is better than just leaving it disabled.
274 if (ret
< 0 && dev
->fw_addr
[resno
])
275 ret
= pci_revert_fw_address(res
, dev
, resno
, size
);
278 res
->flags
&= ~IORESOURCE_STARTALIGN
;
279 dev_info(&dev
->dev
, "BAR %d: assigned %pR\n", resno
, res
);
280 if (resno
< PCI_BRIDGE_RESOURCES
)
281 pci_update_resource(dev
, resno
);
287 /* Sort resources by alignment */
288 void pdev_sort_resources(struct pci_dev
*dev
, struct resource_list
*head
)
292 for (i
= 0; i
< PCI_NUM_RESOURCES
; i
++) {
294 struct resource_list
*list
, *tmp
;
295 resource_size_t r_align
;
297 r
= &dev
->resource
[i
];
299 if (r
->flags
& IORESOURCE_PCI_FIXED
)
302 if (!(r
->flags
) || r
->parent
)
305 r_align
= pci_resource_alignment(dev
, r
);
307 dev_warn(&dev
->dev
, "BAR %d: %pR has bogus alignment\n",
311 for (list
= head
; ; list
= list
->next
) {
312 resource_size_t align
= 0;
313 struct resource_list
*ln
= list
->next
;
316 align
= pci_resource_alignment(ln
->dev
, ln
->res
);
318 if (r_align
> align
) {
319 tmp
= kmalloc(sizeof(*tmp
), GFP_KERNEL
);
321 panic("pdev_sort_resources(): "
322 "kmalloc() failed!\n");
333 int pci_enable_resources(struct pci_dev
*dev
, int mask
)
339 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
342 for (i
= 0; i
< PCI_NUM_RESOURCES
; i
++) {
343 if (!(mask
& (1 << i
)))
346 r
= &dev
->resource
[i
];
348 if (!(r
->flags
& (IORESOURCE_IO
| IORESOURCE_MEM
)))
350 if ((i
== PCI_ROM_RESOURCE
) &&
351 (!(r
->flags
& IORESOURCE_ROM_ENABLE
)))
355 dev_err(&dev
->dev
, "device not available "
356 "(can't reserve %pR)\n", r
);
360 if (r
->flags
& IORESOURCE_IO
)
361 cmd
|= PCI_COMMAND_IO
;
362 if (r
->flags
& IORESOURCE_MEM
)
363 cmd
|= PCI_COMMAND_MEMORY
;
366 if (cmd
!= old_cmd
) {
367 dev_info(&dev
->dev
, "enabling device (%04x -> %04x)\n",
369 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);