drivers/pci/setup-res.c

   1 /*
   2  *      drivers/pci/setup-res.c
   3  *
   4  * Extruded from code written by
   5  *      Dave Rusling (david.rusling@reo.mts.dec.com)
   6  *      David Mosberger (davidm@cs.arizona.edu)
   7  *      David Miller (davem@redhat.com)
   8  *
   9  * Support routines for initializing a PCI subsystem.
  10  */
  11
  12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
  13
  14 /*
  15  * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
  16  *           Resource sorting
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/kernel.h>
  21 #include <linux/export.h>
  22 #include <linux/pci.h>
  23 #include <linux/errno.h>
  24 #include <linux/ioport.h>
  25 #include <linux/cache.h>
  26 #include <linux/slab.h>
  27 #include "pci.h"
  28
  29
  30 void pci_update_resource(struct pci_dev *dev, int resno)
  31 {
  32         struct pci_bus_region region;
  33         bool disable;
  34         u16 cmd;
  35         u32 new, check, mask;
  36         int reg;
  37         enum pci_bar_type type;
  38         struct resource *res = dev->resource + resno;
  39
  40         /*
  41          * Ignore resources for unimplemented BARs and unused resource slots
  42          * for 64 bit BARs.
  43          */
  44         if (!res->flags)
  45                 return;
  46
  47         if (res->flags & IORESOURCE_UNSET)
  48                 return;
  49
  50         /*
  51          * Ignore non-moveable resources.  This might be legacy resources for
  52          * which no functional BAR register exists or another important
  53          * system resource we shouldn't move around.
  54          */
  55         if (res->flags & IORESOURCE_PCI_FIXED)
  56                 return;
  57
  58         pcibios_resource_to_bus(dev->bus, &region, res);
  59
  60         new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
  61         if (res->flags & IORESOURCE_IO)
  62                 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
  63         else
  64                 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
  65
  66         reg = pci_resource_bar(dev, resno, &type);
  67         if (!reg)
  68                 return;
  69         if (type != pci_bar_unknown) {
  70                 if (!(res->flags & IORESOURCE_ROM_ENABLE))
  71                         return;
  72                 new |= PCI_ROM_ADDRESS_ENABLE;
  73         }
  74
  75         /*
  76          * We can't update a 64-bit BAR atomically, so when possible,
  77          * disable decoding so that a half-updated BAR won't conflict
  78          * with another device.
  79          */
  80         disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on;
  81         if (disable) {
  82                 pci_read_config_word(dev, PCI_COMMAND, &cmd);
  83                 pci_write_config_word(dev, PCI_COMMAND,
  84                                       cmd & ~PCI_COMMAND_MEMORY);
  85         }
  86
  87         pci_write_config_dword(dev, reg, new);
  88         pci_read_config_dword(dev, reg, &check);
  89
  90         if ((new ^ check) & mask) {
  91                 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
  92                         resno, new, check);
  93         }
  94
  95         if (res->flags & IORESOURCE_MEM_64) {
  96                 new = region.start >> 16 >> 16;
  97                 pci_write_config_dword(dev, reg + 4, new);
  98                 pci_read_config_dword(dev, reg + 4, &check);
  99                 if (check != new) {
 100                         dev_err(&dev->dev, "BAR %d: error updating "
 101                                "(high %#08x != %#08x)\n", resno, new, check);
 102                 }
 103         }
 104
 105         if (disable)
 106                 pci_write_config_word(dev, PCI_COMMAND, cmd);
 107 }
 108
 109 int pci_claim_resource(struct pci_dev *dev, int resource)
 110 {
 111         struct resource *res = &dev->resource[resource];
 112         struct resource *root, *conflict;
 113
 114         if (res->flags & IORESOURCE_UNSET) {
 115                 dev_info(&dev->dev, "can't claim BAR %d %pR: no address assigned\n",
 116                          resource, res);
 117                 return -EINVAL;
 118         }
 119
 120         root = pci_find_parent_resource(dev, res);
 121         if (!root) {
 122                 dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",
 123                          resource, res);
 124                 return -EINVAL;
 125         }
 126
 127         conflict = request_resource_conflict(root, res);
 128         if (conflict) {
 129                 dev_info(&dev->dev, "can't claim BAR %d %pR: address conflict with %s %pR\n",
 130                          resource, res, conflict->name, conflict);
 131                 return -EBUSY;
 132         }
 133
 134         return 0;
 135 }
 136 EXPORT_SYMBOL(pci_claim_resource);
 137
 138 void pci_disable_bridge_window(struct pci_dev *dev)
 139 {
 140         dev_info(&dev->dev, "disabling bridge mem windows\n");
 141
 142         /* MMIO Base/Limit */
 143         pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
 144
 145         /* Prefetchable MMIO Base/Limit */
 146         pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
 147         pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
 148         pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
 149 }
 150
 151 /*
 152  * Generic function that returns a value indicating that the device's
 153  * original BIOS BAR address was not saved and so is not available for
 154  * reinstatement.
 155  *
 156  * Can be over-ridden by architecture specific code that implements
 157  * reinstatement functionality rather than leaving it disabled when
 158  * normal allocation attempts fail.
 159  */
 160 resource_size_t __weak pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
 161 {
 162         return 0;
 163 }
 164
 165 static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
 166                 int resno, resource_size_t size)
 167 {
 168         struct resource *root, *conflict;
 169         resource_size_t fw_addr, start, end;
 170         int ret = 0;
 171
 172         fw_addr = pcibios_retrieve_fw_addr(dev, resno);
 173         if (!fw_addr)
 174                 return 1;
 175
 176         start = res->start;
 177         end = res->end;
 178         res->start = fw_addr;
 179         res->end = res->start + size - 1;
 180
 181         root = pci_find_parent_resource(dev, res);
 182         if (!root) {
 183                 if (res->flags & IORESOURCE_IO)
 184                         root = &ioport_resource;
 185                 else
 186                         root = &iomem_resource;
 187         }
 188
 189         dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
 190                  resno, res);
 191         conflict = request_resource_conflict(root, res);
 192         if (conflict) {
 193                 dev_info(&dev->dev,
 194                          "BAR %d: %pR conflicts with %s %pR\n", resno,
 195                          res, conflict->name, conflict);
 196                 res->start = start;
 197                 res->end = end;
 198                 ret = 1;
 199         }
 200         return ret;
 201 }
 202
 203 static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
 204                 int resno, resource_size_t size, resource_size_t align)
 205 {
 206         struct resource *res = dev->resource + resno;
 207         resource_size_t min;
 208         int ret;
 209
 210         min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
 211
 212         /* First, try exact prefetching match.. */
 213         ret = pci_bus_alloc_resource(bus, res, size, align, min,
 214                                      IORESOURCE_PREFETCH,
 215                                      pcibios_align_resource, dev);
 216
 217         if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
 218                 /*
 219                  * That failed.
 220                  *
 221                  * But a prefetching area can handle a non-prefetching
 222                  * window (it will just not perform as well).
 223                  */
 224                 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
 225                                              pcibios_align_resource, dev);
 226         }
 227         return ret;
 228 }
 229
 230 static int _pci_assign_resource(struct pci_dev *dev, int resno,
 231                                 resource_size_t size, resource_size_t min_align)
 232 {
 233         struct resource *res = dev->resource + resno;
 234         struct pci_bus *bus;
 235         int ret;
 236         char *type;
 237
 238         bus = dev->bus;
 239         while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
 240                 if (!bus->parent || !bus->self->transparent)
 241                         break;
 242                 bus = bus->parent;
 243         }
 244
 245         if (ret) {
 246                 if (res->flags & IORESOURCE_MEM)
 247                         if (res->flags & IORESOURCE_PREFETCH)
 248                                 type = "mem pref";
 249                         else
 250                                 type = "mem";
 251                 else if (res->flags & IORESOURCE_IO)
 252                         type = "io";
 253                 else
 254                         type = "unknown";
 255                 dev_info(&dev->dev,
 256                          "BAR %d: can't assign %s (size %#llx)\n",
 257                          resno, type, (unsigned long long) resource_size(res));
 258         }
 259
 260         return ret;
 261 }
 262
 263 int pci_assign_resource(struct pci_dev *dev, int resno)
 264 {
 265         struct resource *res = dev->resource + resno;
 266         resource_size_t align, size;
 267         int ret;
 268
 269         res->flags |= IORESOURCE_UNSET;
 270         align = pci_resource_alignment(dev, res);
 271         if (!align) {
 272                 dev_info(&dev->dev, "BAR %d: can't assign %pR "
 273                          "(bogus alignment)\n", resno, res);
 274                 return -EINVAL;
 275         }
 276
 277         size = resource_size(res);
 278         ret = _pci_assign_resource(dev, resno, size, align);
 279
 280         /*
 281          * If we failed to assign anything, let's try the address
 282          * where firmware left it.  That at least has a chance of
 283          * working, which is better than just leaving it disabled.
 284          */
 285         if (ret < 0)
 286                 ret = pci_revert_fw_address(res, dev, resno, size);
 287
 288         if (!ret) {
 289                 res->flags &= ~IORESOURCE_UNSET;
 290                 res->flags &= ~IORESOURCE_STARTALIGN;
 291                 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
 292                 if (resno < PCI_BRIDGE_RESOURCES)
 293                         pci_update_resource(dev, resno);
 294         }
 295         return ret;
 296 }
 297
 298 int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize,
 299                         resource_size_t min_align)
 300 {
 301         struct resource *res = dev->resource + resno;
 302         resource_size_t new_size;
 303         int ret;
 304
 305         res->flags |= IORESOURCE_UNSET;
 306         if (!res->parent) {
 307                 dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR "
 308                          "\n", resno, res);
 309                 return -EINVAL;
 310         }
 311
 312         /* already aligned with min_align */
 313         new_size = resource_size(res) + addsize;
 314         ret = _pci_assign_resource(dev, resno, new_size, min_align);
 315         if (!ret) {
 316                 res->flags &= ~IORESOURCE_UNSET;
 317                 res->flags &= ~IORESOURCE_STARTALIGN;
 318                 dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
 319                 if (resno < PCI_BRIDGE_RESOURCES)
 320                         pci_update_resource(dev, resno);
 321         }
 322         return ret;
 323 }
 324
 325 int pci_enable_resources(struct pci_dev *dev, int mask)
 326 {
 327         u16 cmd, old_cmd;
 328         int i;
 329         struct resource *r;
 330
 331         pci_read_config_word(dev, PCI_COMMAND, &cmd);
 332         old_cmd = cmd;
 333
 334         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 335                 if (!(mask & (1 << i)))
 336                         continue;
 337
 338                 r = &dev->resource[i];
 339
 340                 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
 341                         continue;
 342                 if ((i == PCI_ROM_RESOURCE) &&
 343                                 (!(r->flags & IORESOURCE_ROM_ENABLE)))
 344                         continue;
 345
 346                 if (r->flags & IORESOURCE_UNSET) {
 347                         dev_err(&dev->dev, "can't enable device: BAR %d %pR not assigned\n",
 348                                 i, r);
 349                         return -EINVAL;
 350                 }
 351
 352                 if (!r->parent) {
 353                         dev_err(&dev->dev, "can't enable device: BAR %d %pR not claimed\n",
 354                                 i, r);
 355                         return -EINVAL;
 356                 }
 357
 358                 if (r->flags & IORESOURCE_IO)
 359                         cmd |= PCI_COMMAND_IO;
 360                 if (r->flags & IORESOURCE_MEM)
 361                         cmd |= PCI_COMMAND_MEMORY;
 362         }
 363
 364         if (cmd != old_cmd) {
 365                 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
 366                          old_cmd, cmd);
 367                 pci_write_config_word(dev, PCI_COMMAND, cmd);
 368         }
 369         return 0;
 370 }