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1 /*
2 * omap_cf.c -- OMAP 16xx CompactFlash controller driver
3 *
4 * Copyright (c) 2005 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
15 #include <linux/errno.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
18 #include <linux/interrupt.h>
19 #include <linux/slab.h>
20
21 #include <pcmcia/ss.h>
22
23 #include <mach/hardware.h>
24 #include <asm/io.h>
25 #include <asm/sizes.h>
26
27 #include <mach/mux.h>
28 #include <mach/tc.h>
29
30
31 /* NOTE: don't expect this to support many I/O cards. The 16xx chips have
32 * hard-wired timings to support Compact Flash memory cards; they won't work
33 * with various other devices (like WLAN adapters) without some external
34 * logic to help out.
35 *
36 * NOTE: CF controller docs disagree with address space docs as to where
37 * CF_BASE really lives; this is a doc erratum.
38 */
39 #define CF_BASE 0xfffe2800
40
41 /* status; read after IRQ */
42 #define CF_STATUS (CF_BASE + 0x00)
43 # define CF_STATUS_BAD_READ (1 << 2)
44 # define CF_STATUS_BAD_WRITE (1 << 1)
45 # define CF_STATUS_CARD_DETECT (1 << 0)
46
47 /* which chipselect (CS0..CS3) is used for CF (active low) */
48 #define CF_CFG (CF_BASE + 0x02)
49
50 /* card reset */
51 #define CF_CONTROL (CF_BASE + 0x04)
52 # define CF_CONTROL_RESET (1 << 0)
53
54 #define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))
55
56 /*--------------------------------------------------------------------------*/
57
58 static const char driver_name[] = "omap_cf";
59
60 struct omap_cf_socket {
61 struct pcmcia_socket socket;
62
63 struct timer_list timer;
64 unsigned present:1;
65 unsigned active:1;
66
67 struct platform_device *pdev;
68 unsigned long phys_cf;
69 u_int irq;
70 struct resource iomem;
71 };
72
73 #define POLL_INTERVAL (2 * HZ)
74
75 /*--------------------------------------------------------------------------*/
76
77 static int omap_cf_ss_init(struct pcmcia_socket *s)
78 {
79 return 0;
80 }
81
82 /* the timer is primarily to kick this socket's pccardd */
83 static void omap_cf_timer(unsigned long _cf)
84 {
85 struct omap_cf_socket *cf = (void *) _cf;
86 unsigned present = omap_cf_present();
87
88 if (present != cf->present) {
89 cf->present = present;
90 pr_debug("%s: card %s\n", driver_name,
91 present ? "present" : "gone");
92 pcmcia_parse_events(&cf->socket, SS_DETECT);
93 }
94
95 if (cf->active)
96 mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
97 }
98
99 /* This irq handler prevents "irqNNN: nobody cared" messages as drivers
100 * claim the card's IRQ. It may also detect some card insertions, but
101 * not removals; it can't always eliminate timer irqs.
102 */
103 static irqreturn_t omap_cf_irq(int irq, void *_cf)
104 {
105 omap_cf_timer((unsigned long)_cf);
106 return IRQ_HANDLED;
107 }
108
109 static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
110 {
111 if (!sp)
112 return -EINVAL;
113
114 /* NOTE CF is always 3VCARD */
115 if (omap_cf_present()) {
116 struct omap_cf_socket *cf;
117
118 *sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
119 cf = container_of(s, struct omap_cf_socket, socket);
120 s->pcmcia_irq = 0;
121 s->pci_irq = cf->irq;
122 } else
123 *sp = 0;
124 return 0;
125 }
126
127 static int
128 omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
129 {
130 u16 control;
131
132 /* REVISIT some non-OSK boards may support power switching */
133 switch (s->Vcc) {
134 case 0:
135 case 33:
136 break;
137 default:
138 return -EINVAL;
139 }
140
141 control = omap_readw(CF_CONTROL);
142 if (s->flags & SS_RESET)
143 omap_writew(CF_CONTROL_RESET, CF_CONTROL);
144 else
145 omap_writew(0, CF_CONTROL);
146
147 pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
148 driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
149
150 return 0;
151 }
152
153 static int omap_cf_ss_suspend(struct pcmcia_socket *s)
154 {
155 pr_debug("%s: %s\n", driver_name, __func__);
156 return omap_cf_set_socket(s, &dead_socket);
157 }
158
159 /* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
160
161 static int
162 omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
163 {
164 struct omap_cf_socket *cf;
165
166 cf = container_of(s, struct omap_cf_socket, socket);
167 io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
168 io->start = cf->phys_cf + SZ_4K;
169 io->stop = io->start + SZ_2K - 1;
170 return 0;
171 }
172
173 static int
174 omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
175 {
176 struct omap_cf_socket *cf;
177
178 if (map->card_start)
179 return -EINVAL;
180 cf = container_of(s, struct omap_cf_socket, socket);
181 map->static_start = cf->phys_cf;
182 map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
183 if (map->flags & MAP_ATTRIB)
184 map->static_start += SZ_2K;
185 return 0;
186 }
187
188 static struct pccard_operations omap_cf_ops = {
189 .init = omap_cf_ss_init,
190 .suspend = omap_cf_ss_suspend,
191 .get_status = omap_cf_get_status,
192 .set_socket = omap_cf_set_socket,
193 .set_io_map = omap_cf_set_io_map,
194 .set_mem_map = omap_cf_set_mem_map,
195 };
196
197 /*--------------------------------------------------------------------------*/
198
199 /*
200 * NOTE: right now the only board-specific platform_data is
201 * "what chipselect is used". Boards could want more.
202 */
203
204 static int __init omap_cf_probe(struct platform_device *pdev)
205 {
206 unsigned seg;
207 struct omap_cf_socket *cf;
208 int irq;
209 int status;
210
211 seg = (int) pdev->dev.platform_data;
212 if (seg == 0 || seg > 3)
213 return -ENODEV;
214
215 /* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
216 irq = platform_get_irq(pdev, 0);
217 if (irq < 0)
218 return -EINVAL;
219
220 cf = kzalloc(sizeof *cf, GFP_KERNEL);
221 if (!cf)
222 return -ENOMEM;
223 setup_timer(&cf->timer, omap_cf_timer, (unsigned long)cf);
224
225 cf->pdev = pdev;
226 platform_set_drvdata(pdev, cf);
227
228 /* this primarily just shuts up irq handling noise */
229 status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
230 driver_name, cf);
231 if (status < 0)
232 goto fail0;
233 cf->irq = irq;
234 cf->socket.pci_irq = irq;
235
236 switch (seg) {
237 /* NOTE: CS0 could be configured too ... */
238 case 1:
239 cf->phys_cf = OMAP_CS1_PHYS;
240 break;
241 case 2:
242 cf->phys_cf = OMAP_CS2_PHYS;
243 break;
244 case 3:
245 cf->phys_cf = omap_cs3_phys();
246 break;
247 default:
248 goto fail1;
249 }
250 cf->iomem.start = cf->phys_cf;
251 cf->iomem.end = cf->iomem.end + SZ_8K - 1;
252 cf->iomem.flags = IORESOURCE_MEM;
253
254 /* pcmcia layer only remaps "real" memory */
255 cf->socket.io_offset = (unsigned long)
256 ioremap(cf->phys_cf + SZ_4K, SZ_2K);
257 if (!cf->socket.io_offset)
258 goto fail1;
259
260 if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
261 goto fail1;
262
263 /* NOTE: CF conflicts with MMC1 */
264 omap_cfg_reg(W11_1610_CF_CD1);
265 omap_cfg_reg(P11_1610_CF_CD2);
266 omap_cfg_reg(R11_1610_CF_IOIS16);
267 omap_cfg_reg(V10_1610_CF_IREQ);
268 omap_cfg_reg(W10_1610_CF_RESET);
269
270 omap_writew(~(1 << seg), CF_CFG);
271
272 pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
273
274 /* NOTE: better EMIFS setup might support more cards; but the
275 * TRM only shows how to affect regular flash signals, not their
276 * CF/PCMCIA variants...
277 */
278 pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
279 seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
280 omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
281 omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
282
283 /* CF uses armxor_ck, which is "always" available */
284
285 pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
286 omap_readw(CF_STATUS), omap_readw(CF_CFG),
287 omap_readw(CF_CONTROL),
288 omap_cf_present() ? "present" : "(not present)");
289
290 cf->socket.owner = THIS_MODULE;
291 cf->socket.dev.parent = &pdev->dev;
292 cf->socket.ops = &omap_cf_ops;
293 cf->socket.resource_ops = &pccard_static_ops;
294 cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
295 | SS_CAP_MEM_ALIGN;
296 cf->socket.map_size = SZ_2K;
297 cf->socket.io[0].res = &cf->iomem;
298
299 status = pcmcia_register_socket(&cf->socket);
300 if (status < 0)
301 goto fail2;
302
303 cf->active = 1;
304 mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
305 return 0;
306
307 fail2:
308 release_mem_region(cf->phys_cf, SZ_8K);
309 fail1:
310 if (cf->socket.io_offset)
311 iounmap((void __iomem *) cf->socket.io_offset);
312 free_irq(irq, cf);
313 fail0:
314 kfree(cf);
315 return status;
316 }
317
318 static int __exit omap_cf_remove(struct platform_device *pdev)
319 {
320 struct omap_cf_socket *cf = platform_get_drvdata(pdev);
321
322 cf->active = 0;
323 pcmcia_unregister_socket(&cf->socket);
324 del_timer_sync(&cf->timer);
325 iounmap((void __iomem *) cf->socket.io_offset);
326 release_mem_region(cf->phys_cf, SZ_8K);
327 free_irq(cf->irq, cf);
328 kfree(cf);
329 return 0;
330 }
331
332 static struct platform_driver omap_cf_driver = {
333 .driver = {
334 .name = (char *) driver_name,
335 },
336 .remove = __exit_p(omap_cf_remove),
337 };
338
339 static int __init omap_cf_init(void)
340 {
341 if (cpu_is_omap16xx())
342 return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
343 return -ENODEV;
344 }
345
346 static void __exit omap_cf_exit(void)
347 {
348 if (cpu_is_omap16xx())
349 platform_driver_unregister(&omap_cf_driver);
350 }
351
352 module_init(omap_cf_init);
353 module_exit(omap_cf_exit);
354
355 MODULE_DESCRIPTION("OMAP CF Driver");
356 MODULE_LICENSE("GPL");
357 MODULE_ALIAS("platform:omap_cf");