drivers/pcmcia/sa11xx_base.c

   1 /*======================================================================
   2
   3     Device driver for the PCMCIA control functionality of StrongARM
   4     SA-1100 microprocessors.
   5
   6     The contents of this file are subject to the Mozilla Public
   7     License Version 1.1 (the "License"); you may not use this file
   8     except in compliance with the License. You may obtain a copy of
   9     the License at http://www.mozilla.org/MPL/
  10
  11     Software distributed under the License is distributed on an "AS
  12     IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
  13     implied. See the License for the specific language governing
  14     rights and limitations under the License.
  15
  16     The initial developer of the original code is John G. Dorsey
  17     <john+@cs.cmu.edu>.  Portions created by John G. Dorsey are
  18     Copyright (C) 1999 John G. Dorsey.  All Rights Reserved.
  19
  20     Alternatively, the contents of this file may be used under the
  21     terms of the GNU Public License version 2 (the "GPL"), in which
  22     case the provisions of the GPL are applicable instead of the
  23     above.  If you wish to allow the use of your version of this file
  24     only under the terms of the GPL and not to allow others to use
  25     your version of this file under the MPL, indicate your decision
  26     by deleting the provisions above and replace them with the notice
  27     and other provisions required by the GPL.  If you do not delete
  28     the provisions above, a recipient may use your version of this
  29     file under either the MPL or the GPL.
  30
  31 ======================================================================*/
  32
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/cpufreq.h>
  36 #include <linux/ioport.h>
  37 #include <linux/kernel.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/io.h>
  40 #include <linux/slab.h>
  41
  42 #include <mach/hardware.h>
  43 #include <asm/irq.h>
  44
  45 #include "soc_common.h"
  46 #include "sa11xx_base.h"
  47
  48
  49 /*
  50  * sa1100_pcmcia_default_mecr_timing
  51  * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  52  *
  53  * Calculate MECR clock wait states for given CPU clock
  54  * speed and command wait state. This function can be over-
  55  * written by a board specific version.
  56  *
  57  * The default is to simply calculate the BS values as specified in
  58  * the INTEL SA1100 development manual
  59  * "Expansion Memory (PCMCIA) Configuration Register (MECR)"
  60  * that's section 10.2.5 in _my_ version of the manual ;)
  61  */
  62 static unsigned int
  63 sa1100_pcmcia_default_mecr_timing(struct soc_pcmcia_socket *skt,
  64                                   unsigned int cpu_speed,
  65                                   unsigned int cmd_time)
  66 {
  67         return sa1100_pcmcia_mecr_bs(cmd_time, cpu_speed);
  68 }
  69
  70 /* sa1100_pcmcia_set_mecr()
  71  * ^^^^^^^^^^^^^^^^^^^^^^^^
  72  *
  73  * set MECR value for socket <sock> based on this sockets
  74  * io, mem and attribute space access speed.
  75  * Call board specific BS value calculation to allow boards
  76  * to tweak the BS values.
  77  */
  78 static int
  79 sa1100_pcmcia_set_mecr(struct soc_pcmcia_socket *skt, unsigned int cpu_clock)
  80 {
  81         struct soc_pcmcia_timing timing;
  82         u32 mecr, old_mecr;
  83         unsigned long flags;
  84         unsigned int bs_io, bs_mem, bs_attr;
  85
  86         soc_common_pcmcia_get_timing(skt, &timing);
  87
  88         bs_io = skt->ops->get_timing(skt, cpu_clock, timing.io);
  89         bs_mem = skt->ops->get_timing(skt, cpu_clock, timing.mem);
  90         bs_attr = skt->ops->get_timing(skt, cpu_clock, timing.attr);
  91
  92         local_irq_save(flags);
  93
  94         old_mecr = mecr = MECR;
  95         MECR_FAST_SET(mecr, skt->nr, 0);
  96         MECR_BSIO_SET(mecr, skt->nr, bs_io);
  97         MECR_BSA_SET(mecr, skt->nr, bs_attr);
  98         MECR_BSM_SET(mecr, skt->nr, bs_mem);
  99         if (old_mecr != mecr)
 100                 MECR = mecr;
 101
 102         local_irq_restore(flags);
 103
 104         debug(skt, 2, "FAST %X  BSM %X  BSA %X  BSIO %X\n",
 105               MECR_FAST_GET(mecr, skt->nr),
 106               MECR_BSM_GET(mecr, skt->nr), MECR_BSA_GET(mecr, skt->nr),
 107               MECR_BSIO_GET(mecr, skt->nr));
 108
 109         return 0;
 110 }
 111
 112 #ifdef CONFIG_CPU_FREQ
 113 static int
 114 sa1100_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
 115                                unsigned long val,
 116                                struct cpufreq_freqs *freqs)
 117 {
 118         switch (val) {
 119         case CPUFREQ_PRECHANGE:
 120                 if (freqs->new > freqs->old)
 121                         sa1100_pcmcia_set_mecr(skt, freqs->new);
 122                 break;
 123
 124         case CPUFREQ_POSTCHANGE:
 125                 if (freqs->new < freqs->old)
 126                         sa1100_pcmcia_set_mecr(skt, freqs->new);
 127                 break;
 128         }
 129
 130         return 0;
 131 }
 132
 133 #endif
 134
 135 static int
 136 sa1100_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
 137 {
 138         return sa1100_pcmcia_set_mecr(skt, cpufreq_get(0));
 139 }
 140
 141 static int
 142 sa1100_pcmcia_show_timing(struct soc_pcmcia_socket *skt, char *buf)
 143 {
 144         struct soc_pcmcia_timing timing;
 145         unsigned int clock = cpufreq_get(0);
 146         unsigned long mecr = MECR;
 147         char *p = buf;
 148
 149         soc_common_pcmcia_get_timing(skt, &timing);
 150
 151         p+=sprintf(p, "I/O      : %u (%u)\n", timing.io,
 152                    sa1100_pcmcia_cmd_time(clock, MECR_BSIO_GET(mecr, skt->nr)));
 153
 154         p+=sprintf(p, "attribute: %u (%u)\n", timing.attr,
 155                    sa1100_pcmcia_cmd_time(clock, MECR_BSA_GET(mecr, skt->nr)));
 156
 157         p+=sprintf(p, "common   : %u (%u)\n", timing.mem,
 158                    sa1100_pcmcia_cmd_time(clock, MECR_BSM_GET(mecr, skt->nr)));
 159
 160         return p - buf;
 161 }
 162
 163 static const char *skt_names[] = {
 164         "PCMCIA socket 0",
 165         "PCMCIA socket 1",
 166 };
 167
 168 #define SKT_DEV_INFO_SIZE(n) \
 169         (sizeof(struct skt_dev_info) + (n)*sizeof(struct soc_pcmcia_socket))
 170
 171 int sa11xx_drv_pcmcia_add_one(struct soc_pcmcia_socket *skt)
 172 {
 173         skt->res_skt.start = _PCMCIA(skt->nr);
 174         skt->res_skt.end = _PCMCIA(skt->nr) + PCMCIASp - 1;
 175         skt->res_skt.name = skt_names[skt->nr];
 176         skt->res_skt.flags = IORESOURCE_MEM;
 177
 178         skt->res_io.start = _PCMCIAIO(skt->nr);
 179         skt->res_io.end = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1;
 180         skt->res_io.name = "io";
 181         skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
 182
 183         skt->res_mem.start = _PCMCIAMem(skt->nr);
 184         skt->res_mem.end = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1;
 185         skt->res_mem.name = "memory";
 186         skt->res_mem.flags = IORESOURCE_MEM;
 187
 188         skt->res_attr.start = _PCMCIAAttr(skt->nr);
 189         skt->res_attr.end = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1;
 190         skt->res_attr.name = "attribute";
 191         skt->res_attr.flags = IORESOURCE_MEM;
 192
 193         return soc_pcmcia_add_one(skt);
 194 }
 195 EXPORT_SYMBOL(sa11xx_drv_pcmcia_add_one);
 196
 197 void sa11xx_drv_pcmcia_ops(struct pcmcia_low_level *ops)
 198 {
 199         /*
 200          * set default MECR calculation if the board specific
 201          * code did not specify one...
 202          */
 203         if (!ops->get_timing)
 204                 ops->get_timing = sa1100_pcmcia_default_mecr_timing;
 205
 206         /* Provide our SA11x0 specific timing routines. */
 207         ops->set_timing  = sa1100_pcmcia_set_timing;
 208         ops->show_timing = sa1100_pcmcia_show_timing;
 209 #ifdef CONFIG_CPU_FREQ
 210         ops->frequency_change = sa1100_pcmcia_frequency_change;
 211 #endif
 212 }
 213 EXPORT_SYMBOL(sa11xx_drv_pcmcia_ops);
 214
 215 int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
 216                             int first, int nr)
 217 {
 218         struct skt_dev_info *sinfo;
 219         struct soc_pcmcia_socket *skt;
 220         int i, ret = 0;
 221
 222         sa11xx_drv_pcmcia_ops(ops);
 223
 224         sinfo = kzalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
 225         if (!sinfo)
 226                 return -ENOMEM;
 227
 228         sinfo->nskt = nr;
 229
 230         /* Initialize processor specific parameters */
 231         for (i = 0; i < nr; i++) {
 232                 skt = &sinfo->skt[i];
 233
 234                 skt->nr = first + i;
 235                 soc_pcmcia_init_one(skt, ops, dev);
 236
 237                 ret = sa11xx_drv_pcmcia_add_one(skt);
 238                 if (ret)
 239                         break;
 240         }
 241
 242         if (ret) {
 243                 while (--i >= 0)
 244                         soc_pcmcia_remove_one(&sinfo->skt[i]);
 245                 kfree(sinfo);
 246         } else {
 247                 dev_set_drvdata(dev, sinfo);
 248         }
 249
 250         return ret;
 251 }
 252 EXPORT_SYMBOL(sa11xx_drv_pcmcia_probe);
 253
 254 static int __init sa11xx_pcmcia_init(void)
 255 {
 256         return 0;
 257 }
 258 fs_initcall(sa11xx_pcmcia_init);
 259
 260 static void __exit sa11xx_pcmcia_exit(void) {}
 261
 262 module_exit(sa11xx_pcmcia_exit);
 263
 264 MODULE_AUTHOR("John Dorsey <john+@cs.cmu.edu>");
 265 MODULE_DESCRIPTION("Linux PCMCIA Card Services: SA-11xx core socket driver");
 266 MODULE_LICENSE("Dual MPL/GPL");