drivers/phy/phy-qcom-ufs-qmp-14nm.c

   1 /*
   2  * Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  */
  14
  15 #include "phy-qcom-ufs-qmp-14nm.h"
  16
  17 #define UFS_PHY_NAME "ufs_phy_qmp_14nm"
  18 #define UFS_PHY_VDDA_PHY_UV     (925000)
  19
  20 static
  21 int ufs_qcom_phy_qmp_14nm_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
  22                                         bool is_rate_B)
  23 {
  24         int tbl_size_A = ARRAY_SIZE(phy_cal_table_rate_A);
  25         int tbl_size_B = ARRAY_SIZE(phy_cal_table_rate_B);
  26         int err;
  27
  28         err = ufs_qcom_phy_calibrate(ufs_qcom_phy, phy_cal_table_rate_A,
  29                 tbl_size_A, phy_cal_table_rate_B, tbl_size_B, is_rate_B);
  30
  31         if (err)
  32                 dev_err(ufs_qcom_phy->dev,
  33                         "%s: ufs_qcom_phy_calibrate() failed %d\n",
  34                         __func__, err);
  35         return err;
  36 }
  37
  38 static
  39 void ufs_qcom_phy_qmp_14nm_advertise_quirks(struct ufs_qcom_phy *phy_common)
  40 {
  41         phy_common->quirks =
  42                 UFS_QCOM_PHY_QUIRK_HIBERN8_EXIT_AFTER_PHY_PWR_COLLAPSE;
  43 }
  44
  45 static int ufs_qcom_phy_qmp_14nm_init(struct phy *generic_phy)
  46 {
  47         return 0;
  48 }
  49
  50 static int ufs_qcom_phy_qmp_14nm_exit(struct phy *generic_phy)
  51 {
  52         return 0;
  53 }
  54
  55 static
  56 void ufs_qcom_phy_qmp_14nm_power_control(struct ufs_qcom_phy *phy, bool val)
  57 {
  58         writel_relaxed(val ? 0x1 : 0x0, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL);
  59         /*
  60          * Before any transactions involving PHY, ensure PHY knows
  61          * that it's analog rail is powered ON (or OFF).
  62          */
  63         mb();
  64 }
  65
  66 static inline
  67 void ufs_qcom_phy_qmp_14nm_set_tx_lane_enable(struct ufs_qcom_phy *phy, u32 val)
  68 {
  69         /*
  70          * 14nm PHY does not have TX_LANE_ENABLE register.
  71          * Implement this function so as not to propagate error to caller.
  72          */
  73 }
  74
  75 static inline void ufs_qcom_phy_qmp_14nm_start_serdes(struct ufs_qcom_phy *phy)
  76 {
  77         u32 tmp;
  78
  79         tmp = readl_relaxed(phy->mmio + UFS_PHY_PHY_START);
  80         tmp &= ~MASK_SERDES_START;
  81         tmp |= (1 << OFFSET_SERDES_START);
  82         writel_relaxed(tmp, phy->mmio + UFS_PHY_PHY_START);
  83         /* Ensure register value is committed */
  84         mb();
  85 }
  86
  87 static int ufs_qcom_phy_qmp_14nm_is_pcs_ready(struct ufs_qcom_phy *phy_common)
  88 {
  89         int err = 0;
  90         u32 val;
  91
  92         err = readl_poll_timeout(phy_common->mmio + UFS_PHY_PCS_READY_STATUS,
  93                 val, (val & MASK_PCS_READY), 10, 1000000);
  94         if (err)
  95                 dev_err(phy_common->dev, "%s: poll for pcs failed err = %d\n",
  96                         __func__, err);
  97         return err;
  98 }
  99
 100 static const struct phy_ops ufs_qcom_phy_qmp_14nm_phy_ops = {
 101         .init           = ufs_qcom_phy_qmp_14nm_init,
 102         .exit           = ufs_qcom_phy_qmp_14nm_exit,
 103         .power_on       = ufs_qcom_phy_power_on,
 104         .power_off      = ufs_qcom_phy_power_off,
 105         .owner          = THIS_MODULE,
 106 };
 107
 108 static struct ufs_qcom_phy_specific_ops phy_14nm_ops = {
 109         .calibrate_phy          = ufs_qcom_phy_qmp_14nm_phy_calibrate,
 110         .start_serdes           = ufs_qcom_phy_qmp_14nm_start_serdes,
 111         .is_physical_coding_sublayer_ready = ufs_qcom_phy_qmp_14nm_is_pcs_ready,
 112         .set_tx_lane_enable     = ufs_qcom_phy_qmp_14nm_set_tx_lane_enable,
 113         .power_control          = ufs_qcom_phy_qmp_14nm_power_control,
 114 };
 115
 116 static int ufs_qcom_phy_qmp_14nm_probe(struct platform_device *pdev)
 117 {
 118         struct device *dev = &pdev->dev;
 119         struct phy *generic_phy;
 120         struct ufs_qcom_phy_qmp_14nm *phy;
 121         struct ufs_qcom_phy *phy_common;
 122         int err = 0;
 123
 124         phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
 125         if (!phy) {
 126                 err = -ENOMEM;
 127                 goto out;
 128         }
 129         phy_common = &phy->common_cfg;
 130
 131         generic_phy = ufs_qcom_phy_generic_probe(pdev, phy_common,
 132                                 &ufs_qcom_phy_qmp_14nm_phy_ops, &phy_14nm_ops);
 133
 134         if (!generic_phy) {
 135                 dev_err(dev, "%s: ufs_qcom_phy_generic_probe() failed\n",
 136                         __func__);
 137                 err = -EIO;
 138                 goto out;
 139         }
 140
 141         err = ufs_qcom_phy_init_clks(phy_common);
 142         if (err) {
 143                 dev_err(phy_common->dev,
 144                         "%s: ufs_qcom_phy_init_clks() failed %d\n",
 145                         __func__, err);
 146                 goto out;
 147         }
 148
 149         err = ufs_qcom_phy_init_vregulators(phy_common);
 150         if (err) {
 151                 dev_err(phy_common->dev,
 152                         "%s: ufs_qcom_phy_init_vregulators() failed %d\n",
 153                         __func__, err);
 154                 goto out;
 155         }
 156         phy_common->vdda_phy.max_uV = UFS_PHY_VDDA_PHY_UV;
 157         phy_common->vdda_phy.min_uV = UFS_PHY_VDDA_PHY_UV;
 158
 159         ufs_qcom_phy_qmp_14nm_advertise_quirks(phy_common);
 160
 161         phy_set_drvdata(generic_phy, phy);
 162
 163         strlcpy(phy_common->name, UFS_PHY_NAME, sizeof(phy_common->name));
 164
 165 out:
 166         return err;
 167 }
 168
 169 static const struct of_device_id ufs_qcom_phy_qmp_14nm_of_match[] = {
 170         {.compatible = "qcom,ufs-phy-qmp-14nm"},
 171         {.compatible = "qcom,msm8996-ufs-phy-qmp-14nm"},
 172         {},
 173 };
 174 MODULE_DEVICE_TABLE(of, ufs_qcom_phy_qmp_14nm_of_match);
 175
 176 static struct platform_driver ufs_qcom_phy_qmp_14nm_driver = {
 177         .probe = ufs_qcom_phy_qmp_14nm_probe,
 178         .driver = {
 179                 .of_match_table = ufs_qcom_phy_qmp_14nm_of_match,
 180                 .name = "ufs_qcom_phy_qmp_14nm",
 181         },
 182 };
 183
 184 module_platform_driver(ufs_qcom_phy_qmp_14nm_driver);
 185
 186 MODULE_DESCRIPTION("Universal Flash Storage (UFS) QCOM PHY QMP 14nm");
 187 MODULE_LICENSE("GPL v2");