drivers/pinctrl/intel/Kconfig

   1 #
   2 # Intel pin control drivers
   3 #
   4
   5 config PINCTRL_BAYTRAIL
   6         bool "Intel Baytrail GPIO pin control"
   7         depends on GPIOLIB && ACPI
   8         select GPIOLIB_IRQCHIP
   9         select PINMUX
  10         select PINCONF
  11         select GENERIC_PINCONF
  12         help
  13           driver for memory mapped GPIO functionality on Intel Baytrail
  14           platforms. Supports 3 banks with 102, 28 and 44 gpios.
  15           Most pins are usually muxed to some other functionality by firmware,
  16           so only a small amount is available for gpio use.
  17
  18           Requires ACPI device enumeration code to set up a platform device.
  19
  20 config PINCTRL_CHERRYVIEW
  21         tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
  22         depends on ACPI
  23         select PINMUX
  24         select PINCONF
  25         select GENERIC_PINCONF
  26         select GPIOLIB
  27         select GPIOLIB_IRQCHIP
  28         help
  29           Cherryview/Braswell pinctrl driver provides an interface that
  30           allows configuring of SoC pins and using them as GPIOs.
  31
  32 config PINCTRL_INTEL
  33         tristate
  34         select PINMUX
  35         select PINCONF
  36         select GENERIC_PINCONF
  37         select GPIOLIB
  38         select GPIOLIB_IRQCHIP
  39
  40 config PINCTRL_BROXTON
  41         tristate "Intel Broxton pinctrl and GPIO driver"
  42         depends on ACPI
  43         select PINCTRL_INTEL
  44         help
  45           Broxton pinctrl driver provides an interface that allows
  46           configuring of SoC pins and using them as GPIOs.
  47
  48 config PINCTRL_SUNRISEPOINT
  49         tristate "Intel Sunrisepoint pinctrl and GPIO driver"
  50         depends on ACPI
  51         select PINCTRL_INTEL
  52         help
  53           Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
  54           provides an interface that allows configuring of PCH pins and
  55           using them as GPIOs.