2 * Copyright (C) ST-Ericsson SA 2013
4 * Author: Patrice Chotard <patrice.chotard@st.com>
5 * License terms: GNU General Public License (GPL) version 2
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/slab.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/err.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio.h>
21 #include <linux/irq.h>
22 #include <linux/irqdomain.h>
23 #include <linux/interrupt.h>
24 #include <linux/bitops.h>
25 #include <linux/mfd/abx500.h>
26 #include <linux/mfd/abx500/ab8500.h>
27 #include <linux/mfd/abx500/ab8500-gpio.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/pinctrl/consumer.h>
30 #include <linux/pinctrl/pinmux.h>
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinconf-generic.h>
33 #include <linux/pinctrl/machine.h>
35 #include "pinctrl-abx500.h"
40 * The AB9540 and AB8540 GPIO support are extended versions
41 * of the AB8500 GPIO support.
42 * The AB9540 supports an additional (7th) register so that
43 * more GPIO may be configured and used.
44 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
45 * internal pull-up and pull-down capabilities.
49 * GPIO registers offset
52 #define AB8500_GPIO_SEL1_REG 0x00
53 #define AB8500_GPIO_SEL2_REG 0x01
54 #define AB8500_GPIO_SEL3_REG 0x02
55 #define AB8500_GPIO_SEL4_REG 0x03
56 #define AB8500_GPIO_SEL5_REG 0x04
57 #define AB8500_GPIO_SEL6_REG 0x05
58 #define AB9540_GPIO_SEL7_REG 0x06
60 #define AB8500_GPIO_DIR1_REG 0x10
61 #define AB8500_GPIO_DIR2_REG 0x11
62 #define AB8500_GPIO_DIR3_REG 0x12
63 #define AB8500_GPIO_DIR4_REG 0x13
64 #define AB8500_GPIO_DIR5_REG 0x14
65 #define AB8500_GPIO_DIR6_REG 0x15
66 #define AB9540_GPIO_DIR7_REG 0x16
68 #define AB8500_GPIO_OUT1_REG 0x20
69 #define AB8500_GPIO_OUT2_REG 0x21
70 #define AB8500_GPIO_OUT3_REG 0x22
71 #define AB8500_GPIO_OUT4_REG 0x23
72 #define AB8500_GPIO_OUT5_REG 0x24
73 #define AB8500_GPIO_OUT6_REG 0x25
74 #define AB9540_GPIO_OUT7_REG 0x26
76 #define AB8500_GPIO_PUD1_REG 0x30
77 #define AB8500_GPIO_PUD2_REG 0x31
78 #define AB8500_GPIO_PUD3_REG 0x32
79 #define AB8500_GPIO_PUD4_REG 0x33
80 #define AB8500_GPIO_PUD5_REG 0x34
81 #define AB8500_GPIO_PUD6_REG 0x35
82 #define AB9540_GPIO_PUD7_REG 0x36
84 #define AB8500_GPIO_IN1_REG 0x40
85 #define AB8500_GPIO_IN2_REG 0x41
86 #define AB8500_GPIO_IN3_REG 0x42
87 #define AB8500_GPIO_IN4_REG 0x43
88 #define AB8500_GPIO_IN5_REG 0x44
89 #define AB8500_GPIO_IN6_REG 0x45
90 #define AB9540_GPIO_IN7_REG 0x46
91 #define AB8540_GPIO_VINSEL_REG 0x47
92 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48
93 #define AB8500_GPIO_ALTFUN_REG 0x50
94 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
95 #define AB8540_GPIO_VINSEL_MASK 0x03
96 #define AB8540_GPIOX_VBAT_START 51
97 #define AB8540_GPIOX_VBAT_END 54
99 struct abx500_pinctrl
{
101 struct pinctrl_dev
*pctldev
;
102 struct abx500_pinctrl_soc_data
*soc
;
103 struct gpio_chip chip
;
104 struct ab8500
*parent
;
105 struct abx500_gpio_irq_cluster
*irq_cluster
;
106 int irq_cluster_size
;
110 * to_abx500_pinctrl() - get the pointer to abx500_pinctrl
111 * @chip: Member of the structure abx500_pinctrl
113 static inline struct abx500_pinctrl
*to_abx500_pinctrl(struct gpio_chip
*chip
)
115 return container_of(chip
, struct abx500_pinctrl
, chip
);
118 static int abx500_gpio_get_bit(struct gpio_chip
*chip
, u8 reg
,
119 unsigned offset
, bool *bit
)
121 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
127 ret
= abx500_get_register_interruptible(pct
->dev
,
128 AB8500_MISC
, reg
, &val
);
130 *bit
= !!(val
& BIT(pos
));
134 "%s read reg =%x, offset=%x failed\n",
135 __func__
, reg
, offset
);
140 static int abx500_gpio_set_bits(struct gpio_chip
*chip
, u8 reg
,
141 unsigned offset
, int val
)
143 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
148 ret
= abx500_mask_and_set_register_interruptible(pct
->dev
,
149 AB8500_MISC
, reg
, BIT(pos
), val
<< pos
);
151 dev_err(pct
->dev
, "%s write failed\n", __func__
);
157 * abx500_gpio_get() - Get the particular GPIO value
159 * @offset: GPIO number to read
161 static int abx500_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
163 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
167 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_IN1_REG
,
170 dev_err(pct
->dev
, "%s failed\n", __func__
);
177 static void abx500_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int val
)
179 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
182 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_OUT1_REG
, offset
, val
);
184 dev_err(pct
->dev
, "%s write failed\n", __func__
);
187 static int abx500_get_pull_updown(struct abx500_pinctrl
*pct
, int offset
,
188 enum abx500_gpio_pull_updown
*pull_updown
)
193 struct pullud
*pullud
;
195 if (!pct
->soc
->pullud
) {
196 dev_err(pct
->dev
, "%s AB chip doesn't support pull up/down feature",
202 pullud
= pct
->soc
->pullud
;
204 if ((offset
< pullud
->first_pin
)
205 || (offset
> pullud
->last_pin
)) {
210 ret
= abx500_get_register_interruptible(pct
->dev
,
211 AB8500_MISC
, AB8540_GPIO_PULL_UPDOWN_REG
, &val
);
213 pos
= (offset
- pullud
->first_pin
) << 1;
214 *pull_updown
= (val
>> pos
) & AB8540_GPIO_PULL_UPDOWN_MASK
;
218 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
223 static int abx500_set_pull_updown(struct abx500_pinctrl
*pct
,
224 int offset
, enum abx500_gpio_pull_updown val
)
228 struct pullud
*pullud
;
230 if (!pct
->soc
->pullud
) {
231 dev_err(pct
->dev
, "%s AB chip doesn't support pull up/down feature",
237 pullud
= pct
->soc
->pullud
;
239 if ((offset
< pullud
->first_pin
)
240 || (offset
> pullud
->last_pin
)) {
244 pos
= (offset
- pullud
->first_pin
) << 1;
246 ret
= abx500_mask_and_set_register_interruptible(pct
->dev
,
247 AB8500_MISC
, AB8540_GPIO_PULL_UPDOWN_REG
,
248 AB8540_GPIO_PULL_UPDOWN_MASK
<< pos
, val
<< pos
);
252 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
257 static int abx500_gpio_direction_output(struct gpio_chip
*chip
,
261 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
262 struct pullud
*pullud
= pct
->soc
->pullud
;
266 /* set direction as output */
267 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_DIR1_REG
, offset
, 1);
271 /* disable pull down */
272 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_PUD1_REG
, offset
, 1);
276 /* if supported, disable both pull down and pull up */
278 if (pullud
&& gpio
>= pullud
->first_pin
&& gpio
<= pullud
->last_pin
) {
279 ret
= abx500_set_pull_updown(pct
,
281 ABX500_GPIO_PULL_NONE
);
286 /* set the output as 1 or 0 */
287 return abx500_gpio_set_bits(chip
, AB8500_GPIO_OUT1_REG
, offset
, val
);
290 static int abx500_gpio_direction_input(struct gpio_chip
*chip
, unsigned offset
)
292 /* set the register as input */
293 return abx500_gpio_set_bits(chip
, AB8500_GPIO_DIR1_REG
, offset
, 0);
296 static int abx500_gpio_to_irq(struct gpio_chip
*chip
, unsigned offset
)
298 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
299 /* The AB8500 GPIO numbers are off by one */
300 int gpio
= offset
+ 1;
304 for (i
= 0; i
< pct
->irq_cluster_size
; i
++) {
305 struct abx500_gpio_irq_cluster
*cluster
=
306 &pct
->irq_cluster
[i
];
308 if (gpio
>= cluster
->start
&& gpio
<= cluster
->end
) {
310 * The ABx500 GPIO's associated IRQs are clustered together
311 * throughout the interrupt numbers at irregular intervals.
312 * To solve this quandry, we have placed the read-in values
313 * into the cluster information table.
315 hwirq
= gpio
- cluster
->start
+ cluster
->to_irq
;
316 return irq_create_mapping(pct
->parent
->domain
, hwirq
);
323 static int abx500_set_mode(struct pinctrl_dev
*pctldev
, struct gpio_chip
*chip
,
324 unsigned gpio
, int alt_setting
)
326 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
327 struct alternate_functions af
= pct
->soc
->alternate_functions
[gpio
];
332 const char *modes
[] = {
333 [ABX500_DEFAULT
] = "default",
334 [ABX500_ALT_A
] = "altA",
335 [ABX500_ALT_B
] = "altB",
336 [ABX500_ALT_C
] = "altC",
340 if (((alt_setting
== ABX500_ALT_A
) && (af
.gpiosel_bit
== UNUSED
)) ||
341 ((alt_setting
== ABX500_ALT_B
) && (af
.alt_bit1
== UNUSED
)) ||
342 ((alt_setting
== ABX500_ALT_C
) && (af
.alt_bit2
== UNUSED
))) {
343 dev_dbg(pct
->dev
, "pin %d doesn't support %s mode\n", gpio
,
348 /* on ABx5xx, there is no GPIO0, so adjust the offset */
351 switch (alt_setting
) {
354 * for ABx5xx family, default mode is always selected by
355 * writing 0 to GPIOSELx register, except for pins which
356 * support at least ALT_B mode, default mode is selected
357 * by writing 1 to GPIOSELx register
360 if (af
.alt_bit1
!= UNUSED
)
363 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
369 * for ABx5xx family, alt_a mode is always selected by
370 * writing 1 to GPIOSELx register, except for pins which
371 * support at least ALT_B mode, alt_a mode is selected
372 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
375 if (af
.alt_bit1
!= UNUSED
) {
376 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
378 ret
= abx500_gpio_set_bits(chip
,
379 AB8500_GPIO_ALTFUN_REG
,
381 !!(af
.alta_val
&& BIT(0)));
382 if (af
.alt_bit2
!= UNUSED
)
383 ret
= abx500_gpio_set_bits(chip
,
384 AB8500_GPIO_ALTFUN_REG
,
386 !!(af
.alta_val
&& BIT(1)));
388 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
393 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
395 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
396 af
.alt_bit1
, !!(af
.altb_val
&& BIT(0)));
397 if (af
.alt_bit2
!= UNUSED
)
398 ret
= abx500_gpio_set_bits(chip
,
399 AB8500_GPIO_ALTFUN_REG
,
401 !!(af
.altb_val
&& BIT(1)));
405 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
407 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
408 af
.alt_bit2
, !!(af
.altc_val
&& BIT(0)));
409 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
410 af
.alt_bit2
, !!(af
.altc_val
&& BIT(1)));
414 dev_dbg(pct
->dev
, "unknow alt_setting %d\n", alt_setting
);
422 static u8
abx500_get_mode(struct pinctrl_dev
*pctldev
, struct gpio_chip
*chip
,
429 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
430 struct alternate_functions af
= pct
->soc
->alternate_functions
[gpio
];
431 /* on ABx5xx, there is no GPIO0, so adjust the offset */
432 unsigned offset
= gpio
- 1;
435 * if gpiosel_bit is set to unused,
436 * it means no GPIO or special case
438 if (af
.gpiosel_bit
== UNUSED
)
439 return ABX500_DEFAULT
;
441 /* read GpioSelx register */
442 abx500_gpio_get_bit(chip
, AB8500_GPIO_SEL1_REG
+ (offset
/ 8),
443 af
.gpiosel_bit
, &bit_mode
);
447 if ((af
.alt_bit1
< UNUSED
) || (af
.alt_bit1
> 7) ||
448 (af
.alt_bit2
< UNUSED
) || (af
.alt_bit2
> 7)) {
450 "alt_bitX value not in correct range (-1 to 7)\n");
454 /* if alt_bit2 is used, alt_bit1 must be used too */
455 if ((af
.alt_bit2
!= UNUSED
) && (af
.alt_bit1
== UNUSED
)) {
457 "if alt_bit2 is used, alt_bit1 can't be unused\n");
461 /* check if pin use AlternateFunction register */
462 if ((af
.alt_bit1
== UNUSED
) && (af
.alt_bit2
== UNUSED
))
465 * if pin GPIOSEL bit is set and pin supports alternate function,
466 * it means DEFAULT mode
469 return ABX500_DEFAULT
;
472 * pin use the AlternatFunction register
473 * read alt_bit1 value
475 abx500_gpio_get_bit(chip
, AB8500_GPIO_ALTFUN_REG
,
476 af
.alt_bit1
, &alt_bit1
);
478 if (af
.alt_bit2
!= UNUSED
)
479 /* read alt_bit2 value */
480 abx500_gpio_get_bit(chip
, AB8500_GPIO_ALTFUN_REG
, af
.alt_bit2
,
485 mode
= (alt_bit2
<< 1) + alt_bit1
;
486 if (mode
== af
.alta_val
)
488 else if (mode
== af
.altb_val
)
494 #ifdef CONFIG_DEBUG_FS
496 #include <linux/seq_file.h>
498 static void abx500_gpio_dbg_show_one(struct seq_file
*s
,
499 struct pinctrl_dev
*pctldev
,
500 struct gpio_chip
*chip
,
501 unsigned offset
, unsigned gpio
)
503 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
504 struct pullud
*pullud
= pct
->soc
->pullud
;
505 const char *label
= gpiochip_is_requested(chip
, offset
- 1);
506 u8 gpio_offset
= offset
- 1;
510 enum abx500_gpio_pull_updown pud
= 0;
512 const char *modes
[] = {
513 [ABX500_DEFAULT
] = "default",
514 [ABX500_ALT_A
] = "altA",
515 [ABX500_ALT_B
] = "altB",
516 [ABX500_ALT_C
] = "altC",
519 const char *pull_up_down
[] = {
520 [ABX500_GPIO_PULL_DOWN
] = "pull down",
521 [ABX500_GPIO_PULL_NONE
] = "pull none",
522 [ABX500_GPIO_PULL_NONE
+ 1] = "pull none",
523 [ABX500_GPIO_PULL_UP
] = "pull up",
526 abx500_gpio_get_bit(chip
, AB8500_GPIO_DIR1_REG
, gpio_offset
, &is_out
);
528 seq_printf(s
, " gpio-%-3d (%-20.20s) %-3s",
529 gpio
, label
?: "(none)",
530 is_out
? "out" : "in ");
534 (offset
>= pullud
->first_pin
) &&
535 (offset
<= pullud
->last_pin
)) {
536 abx500_get_pull_updown(pct
, offset
, &pud
);
537 seq_printf(s
, " %-9s", pull_up_down
[pud
]);
539 abx500_gpio_get_bit(chip
, AB8500_GPIO_PUD1_REG
,
541 seq_printf(s
, " %-9s", pull_up_down
[pd
]);
544 seq_printf(s
, " %-9s", chip
->get(chip
, offset
) ? "hi" : "lo");
547 mode
= abx500_get_mode(pctldev
, chip
, offset
);
549 seq_printf(s
, " %s", (mode
< 0) ? "unknown" : modes
[mode
]);
552 static void abx500_gpio_dbg_show(struct seq_file
*s
, struct gpio_chip
*chip
)
555 unsigned gpio
= chip
->base
;
556 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
557 struct pinctrl_dev
*pctldev
= pct
->pctldev
;
559 for (i
= 0; i
< chip
->ngpio
; i
++, gpio
++) {
560 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
561 abx500_gpio_dbg_show_one(s
, pctldev
, chip
, i
+ 1, gpio
);
567 static inline void abx500_gpio_dbg_show_one(struct seq_file
*s
,
568 struct pinctrl_dev
*pctldev
,
569 struct gpio_chip
*chip
,
570 unsigned offset
, unsigned gpio
)
573 #define abx500_gpio_dbg_show NULL
576 static int abx500_gpio_request(struct gpio_chip
*chip
, unsigned offset
)
578 int gpio
= chip
->base
+ offset
;
580 return pinctrl_request_gpio(gpio
);
583 static void abx500_gpio_free(struct gpio_chip
*chip
, unsigned offset
)
585 int gpio
= chip
->base
+ offset
;
587 pinctrl_free_gpio(gpio
);
590 static struct gpio_chip abx500gpio_chip
= {
591 .label
= "abx500-gpio",
592 .owner
= THIS_MODULE
,
593 .request
= abx500_gpio_request
,
594 .free
= abx500_gpio_free
,
595 .direction_input
= abx500_gpio_direction_input
,
596 .get
= abx500_gpio_get
,
597 .direction_output
= abx500_gpio_direction_output
,
598 .set
= abx500_gpio_set
,
599 .to_irq
= abx500_gpio_to_irq
,
600 .dbg_show
= abx500_gpio_dbg_show
,
603 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev
*pctldev
)
605 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
607 return pct
->soc
->nfunctions
;
610 static const char *abx500_pmx_get_func_name(struct pinctrl_dev
*pctldev
,
613 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
615 return pct
->soc
->functions
[function
].name
;
618 static int abx500_pmx_get_func_groups(struct pinctrl_dev
*pctldev
,
620 const char * const **groups
,
621 unsigned * const num_groups
)
623 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
625 *groups
= pct
->soc
->functions
[function
].groups
;
626 *num_groups
= pct
->soc
->functions
[function
].ngroups
;
631 static int abx500_pmx_enable(struct pinctrl_dev
*pctldev
, unsigned function
,
634 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
635 struct gpio_chip
*chip
= &pct
->chip
;
636 const struct abx500_pingroup
*g
;
640 g
= &pct
->soc
->groups
[group
];
641 if (g
->altsetting
< 0)
644 dev_dbg(pct
->dev
, "enable group %s, %u pins\n", g
->name
, g
->npins
);
646 for (i
= 0; i
< g
->npins
; i
++) {
647 dev_dbg(pct
->dev
, "setting pin %d to altsetting %d\n",
648 g
->pins
[i
], g
->altsetting
);
650 ret
= abx500_set_mode(pctldev
, chip
, g
->pins
[i
], g
->altsetting
);
656 static void abx500_pmx_disable(struct pinctrl_dev
*pctldev
,
657 unsigned function
, unsigned group
)
659 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
660 const struct abx500_pingroup
*g
;
662 g
= &pct
->soc
->groups
[group
];
663 if (g
->altsetting
< 0)
666 /* FIXME: poke out the mux, set the pin to some default state? */
667 dev_dbg(pct
->dev
, "disable group %s, %u pins\n", g
->name
, g
->npins
);
670 static int abx500_gpio_request_enable(struct pinctrl_dev
*pctldev
,
671 struct pinctrl_gpio_range
*range
,
674 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
675 const struct abx500_pinrange
*p
;
680 * Different ranges have different ways to enable GPIO function on a
681 * pin, so refer back to our local range type, where we handily define
682 * what altfunc enables GPIO for a certain pin.
684 for (i
= 0; i
< pct
->soc
->gpio_num_ranges
; i
++) {
685 p
= &pct
->soc
->gpio_ranges
[i
];
686 if ((offset
>= p
->offset
) &&
687 (offset
< (p
->offset
+ p
->npins
)))
691 if (i
== pct
->soc
->gpio_num_ranges
) {
692 dev_err(pct
->dev
, "%s failed to locate range\n", __func__
);
696 dev_dbg(pct
->dev
, "enable GPIO by altfunc %d at gpio %d\n",
699 ret
= abx500_set_mode(pct
->pctldev
, &pct
->chip
,
702 dev_err(pct
->dev
, "%s setting altfunc failed\n", __func__
);
709 static void abx500_gpio_disable_free(struct pinctrl_dev
*pctldev
,
710 struct pinctrl_gpio_range
*range
,
715 static const struct pinmux_ops abx500_pinmux_ops
= {
716 .get_functions_count
= abx500_pmx_get_funcs_cnt
,
717 .get_function_name
= abx500_pmx_get_func_name
,
718 .get_function_groups
= abx500_pmx_get_func_groups
,
719 .enable
= abx500_pmx_enable
,
720 .disable
= abx500_pmx_disable
,
721 .gpio_request_enable
= abx500_gpio_request_enable
,
722 .gpio_disable_free
= abx500_gpio_disable_free
,
725 static int abx500_get_groups_cnt(struct pinctrl_dev
*pctldev
)
727 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
729 return pct
->soc
->ngroups
;
732 static const char *abx500_get_group_name(struct pinctrl_dev
*pctldev
,
735 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
737 return pct
->soc
->groups
[selector
].name
;
740 static int abx500_get_group_pins(struct pinctrl_dev
*pctldev
,
742 const unsigned **pins
,
745 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
747 *pins
= pct
->soc
->groups
[selector
].pins
;
748 *num_pins
= pct
->soc
->groups
[selector
].npins
;
753 static void abx500_pin_dbg_show(struct pinctrl_dev
*pctldev
,
754 struct seq_file
*s
, unsigned offset
)
756 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
757 struct gpio_chip
*chip
= &pct
->chip
;
759 abx500_gpio_dbg_show_one(s
, pctldev
, chip
, offset
,
760 chip
->base
+ offset
- 1);
763 static void abx500_dt_free_map(struct pinctrl_dev
*pctldev
,
764 struct pinctrl_map
*map
, unsigned num_maps
)
768 for (i
= 0; i
< num_maps
; i
++)
769 if (map
[i
].type
== PIN_MAP_TYPE_CONFIGS_PIN
)
770 kfree(map
[i
].data
.configs
.configs
);
774 static int abx500_dt_reserve_map(struct pinctrl_map
**map
,
775 unsigned *reserved_maps
,
779 unsigned old_num
= *reserved_maps
;
780 unsigned new_num
= *num_maps
+ reserve
;
781 struct pinctrl_map
*new_map
;
783 if (old_num
>= new_num
)
786 new_map
= krealloc(*map
, sizeof(*new_map
) * new_num
, GFP_KERNEL
);
790 memset(new_map
+ old_num
, 0, (new_num
- old_num
) * sizeof(*new_map
));
793 *reserved_maps
= new_num
;
798 static int abx500_dt_add_map_mux(struct pinctrl_map
**map
,
799 unsigned *reserved_maps
,
800 unsigned *num_maps
, const char *group
,
801 const char *function
)
803 if (*num_maps
== *reserved_maps
)
806 (*map
)[*num_maps
].type
= PIN_MAP_TYPE_MUX_GROUP
;
807 (*map
)[*num_maps
].data
.mux
.group
= group
;
808 (*map
)[*num_maps
].data
.mux
.function
= function
;
814 static int abx500_dt_add_map_configs(struct pinctrl_map
**map
,
815 unsigned *reserved_maps
,
816 unsigned *num_maps
, const char *group
,
817 unsigned long *configs
, unsigned num_configs
)
819 unsigned long *dup_configs
;
821 if (*num_maps
== *reserved_maps
)
824 dup_configs
= kmemdup(configs
, num_configs
* sizeof(*dup_configs
),
829 (*map
)[*num_maps
].type
= PIN_MAP_TYPE_CONFIGS_PIN
;
831 (*map
)[*num_maps
].data
.configs
.group_or_pin
= group
;
832 (*map
)[*num_maps
].data
.configs
.configs
= dup_configs
;
833 (*map
)[*num_maps
].data
.configs
.num_configs
= num_configs
;
839 static const char *abx500_find_pin_name(struct pinctrl_dev
*pctldev
,
840 const char *pin_name
)
843 struct abx500_pinctrl
*npct
= pinctrl_dev_get_drvdata(pctldev
);
845 if (sscanf((char *)pin_name
, "GPIO%d", &pin_number
) == 1)
846 for (i
= 0; i
< npct
->soc
->npins
; i
++)
847 if (npct
->soc
->pins
[i
].number
== pin_number
)
848 return npct
->soc
->pins
[i
].name
;
852 static int abx500_dt_subnode_to_map(struct pinctrl_dev
*pctldev
,
853 struct device_node
*np
,
854 struct pinctrl_map
**map
,
855 unsigned *reserved_maps
,
859 const char *function
= NULL
;
860 unsigned long *configs
;
861 unsigned int nconfigs
= 0;
863 unsigned reserve
= 0;
864 struct property
*prop
;
865 const char *group
, *gpio_name
;
866 struct device_node
*np_config
;
868 ret
= of_property_read_string(np
, "ste,function", &function
);
872 ret
= pinconf_generic_parse_dt_config(np
, &configs
, &nconfigs
);
876 np_config
= of_parse_phandle(np
, "ste,config", 0);
878 ret
= pinconf_generic_parse_dt_config(np_config
, &configs
,
882 has_config
|= nconfigs
;
885 ret
= of_property_count_strings(np
, "ste,pins");
894 ret
= abx500_dt_reserve_map(map
, reserved_maps
, num_maps
, reserve
);
898 of_property_for_each_string(np
, "ste,pins", prop
, group
) {
900 ret
= abx500_dt_add_map_mux(map
, reserved_maps
,
901 num_maps
, group
, function
);
906 gpio_name
= abx500_find_pin_name(pctldev
, group
);
908 ret
= abx500_dt_add_map_configs(map
, reserved_maps
,
909 num_maps
, gpio_name
, configs
, 1);
919 static int abx500_dt_node_to_map(struct pinctrl_dev
*pctldev
,
920 struct device_node
*np_config
,
921 struct pinctrl_map
**map
, unsigned *num_maps
)
923 unsigned reserved_maps
;
924 struct device_node
*np
;
931 for_each_child_of_node(np_config
, np
) {
932 ret
= abx500_dt_subnode_to_map(pctldev
, np
, map
,
933 &reserved_maps
, num_maps
);
935 abx500_dt_free_map(pctldev
, *map
, *num_maps
);
943 static const struct pinctrl_ops abx500_pinctrl_ops
= {
944 .get_groups_count
= abx500_get_groups_cnt
,
945 .get_group_name
= abx500_get_group_name
,
946 .get_group_pins
= abx500_get_group_pins
,
947 .pin_dbg_show
= abx500_pin_dbg_show
,
948 .dt_node_to_map
= abx500_dt_node_to_map
,
949 .dt_free_map
= abx500_dt_free_map
,
952 static int abx500_pin_config_get(struct pinctrl_dev
*pctldev
,
954 unsigned long *config
)
959 static int abx500_pin_config_set(struct pinctrl_dev
*pctldev
,
961 unsigned long config
)
963 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
964 struct pullud
*pullud
= pct
->soc
->pullud
;
965 struct gpio_chip
*chip
= &pct
->chip
;
968 enum pin_config_param param
= pinconf_to_config_param(config
);
969 enum pin_config_param argument
= pinconf_to_config_argument(config
);
971 dev_dbg(chip
->dev
, "pin %d [%#lx]: %s %s\n",
972 pin
, config
, (param
== PIN_CONFIG_OUTPUT
) ? "output " : "input",
973 (param
== PIN_CONFIG_OUTPUT
) ? (argument
? "high" : "low") :
974 (argument
? "pull up" : "pull down"));
976 /* on ABx500, there is no GPIO0, so adjust the offset */
980 case PIN_CONFIG_BIAS_DISABLE
:
981 ret
= abx500_gpio_direction_input(chip
, offset
);
983 * Some chips only support pull down, while some actually
984 * support both pull up and pull down. Such chips have
985 * a "pullud" range specified for the pins that support
986 * both features. If the pin is not within that range, we
987 * fall back to the old bit set that only support pull down.
990 pin
>= pullud
->first_pin
&&
991 pin
<= pullud
->last_pin
)
992 ret
= abx500_set_pull_updown(pct
,
994 ABX500_GPIO_PULL_NONE
);
996 /* Chip only supports pull down */
997 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_PUD1_REG
,
998 offset
, ABX500_GPIO_PULL_NONE
);
1001 case PIN_CONFIG_BIAS_PULL_DOWN
:
1002 ret
= abx500_gpio_direction_input(chip
, offset
);
1004 * if argument = 1 set the pull down
1005 * else clear the pull down
1006 * Some chips only support pull down, while some actually
1007 * support both pull up and pull down. Such chips have
1008 * a "pullud" range specified for the pins that support
1009 * both features. If the pin is not within that range, we
1010 * fall back to the old bit set that only support pull down.
1013 pin
>= pullud
->first_pin
&&
1014 pin
<= pullud
->last_pin
)
1015 ret
= abx500_set_pull_updown(pct
,
1017 argument
? ABX500_GPIO_PULL_DOWN
: ABX500_GPIO_PULL_NONE
);
1019 /* Chip only supports pull down */
1020 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_PUD1_REG
,
1021 offset
, argument
? 0 : 1);
1024 case PIN_CONFIG_BIAS_PULL_UP
:
1025 ret
= abx500_gpio_direction_input(chip
, offset
);
1027 * if argument = 1 set the pull up
1028 * else clear the pull up
1030 ret
= abx500_gpio_direction_input(chip
, offset
);
1032 * Some chips only support pull down, while some actually
1033 * support both pull up and pull down. Such chips have
1034 * a "pullud" range specified for the pins that support
1035 * both features. If the pin is not within that range, do
1039 pin
>= pullud
->first_pin
&&
1040 pin
<= pullud
->last_pin
) {
1041 ret
= abx500_set_pull_updown(pct
,
1043 argument
? ABX500_GPIO_PULL_UP
: ABX500_GPIO_PULL_NONE
);
1047 case PIN_CONFIG_OUTPUT
:
1048 ret
= abx500_gpio_direction_output(chip
, offset
, argument
);
1053 dev_err(chip
->dev
, "illegal configuration requested\n");
1059 static const struct pinconf_ops abx500_pinconf_ops
= {
1060 .pin_config_get
= abx500_pin_config_get
,
1061 .pin_config_set
= abx500_pin_config_set
,
1064 static struct pinctrl_desc abx500_pinctrl_desc
= {
1065 .name
= "pinctrl-abx500",
1066 .pctlops
= &abx500_pinctrl_ops
,
1067 .pmxops
= &abx500_pinmux_ops
,
1068 .confops
= &abx500_pinconf_ops
,
1069 .owner
= THIS_MODULE
,
1072 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data
*soc
)
1074 unsigned int lowest
= 0;
1075 unsigned int highest
= 0;
1076 unsigned int npins
= 0;
1080 * Compute number of GPIOs from the last SoC gpio range descriptors
1081 * These ranges may include "holes" but the GPIO number space shall
1082 * still be homogeneous, so we need to detect and account for any
1083 * such holes so that these are included in the number of GPIO pins.
1085 for (i
= 0; i
< soc
->gpio_num_ranges
; i
++) {
1088 const struct abx500_pinrange
*p
;
1090 p
= &soc
->gpio_ranges
[i
];
1092 gend
= p
->offset
+ p
->npins
- 1;
1095 /* First iteration, set start values */
1099 if (gstart
< lowest
)
1105 /* this gives the absolute number of pins */
1106 npins
= highest
- lowest
+ 1;
1110 static const struct of_device_id abx500_gpio_match
[] = {
1111 { .compatible
= "stericsson,ab8500-gpio", .data
= (void *)PINCTRL_AB8500
, },
1112 { .compatible
= "stericsson,ab8505-gpio", .data
= (void *)PINCTRL_AB8505
, },
1113 { .compatible
= "stericsson,ab8540-gpio", .data
= (void *)PINCTRL_AB8540
, },
1114 { .compatible
= "stericsson,ab9540-gpio", .data
= (void *)PINCTRL_AB9540
, },
1118 static int abx500_gpio_probe(struct platform_device
*pdev
)
1120 struct ab8500_platform_data
*abx500_pdata
=
1121 dev_get_platdata(pdev
->dev
.parent
);
1122 struct abx500_gpio_platform_data
*pdata
= NULL
;
1123 struct device_node
*np
= pdev
->dev
.of_node
;
1124 struct abx500_pinctrl
*pct
;
1125 const struct platform_device_id
*platid
= platform_get_device_id(pdev
);
1126 unsigned int id
= -1;
1131 pdata
= abx500_pdata
->gpio
;
1133 if (!(pdata
|| np
)) {
1134 dev_err(&pdev
->dev
, "gpio dt and platform data missing\n");
1138 pct
= devm_kzalloc(&pdev
->dev
, sizeof(struct abx500_pinctrl
),
1142 "failed to allocate memory for pct\n");
1146 pct
->dev
= &pdev
->dev
;
1147 pct
->parent
= dev_get_drvdata(pdev
->dev
.parent
);
1148 pct
->chip
= abx500gpio_chip
;
1149 pct
->chip
.dev
= &pdev
->dev
;
1150 pct
->chip
.base
= (np
) ? -1 : pdata
->gpio_base
;
1153 id
= platid
->driver_data
;
1155 const struct of_device_id
*match
;
1157 match
= of_match_device(abx500_gpio_match
, &pdev
->dev
);
1159 id
= (unsigned long)match
->data
;
1162 /* Poke in other ASIC variants here */
1164 case PINCTRL_AB8500
:
1165 abx500_pinctrl_ab8500_init(&pct
->soc
);
1167 case PINCTRL_AB8540
:
1168 abx500_pinctrl_ab8540_init(&pct
->soc
);
1170 case PINCTRL_AB9540
:
1171 abx500_pinctrl_ab9540_init(&pct
->soc
);
1173 case PINCTRL_AB8505
:
1174 abx500_pinctrl_ab8505_init(&pct
->soc
);
1177 dev_err(&pdev
->dev
, "Unsupported pinctrl sub driver (%d)\n", id
);
1182 dev_err(&pdev
->dev
, "Invalid SOC data\n");
1186 pct
->chip
.ngpio
= abx500_get_gpio_num(pct
->soc
);
1187 pct
->irq_cluster
= pct
->soc
->gpio_irq_cluster
;
1188 pct
->irq_cluster_size
= pct
->soc
->ngpio_irq_cluster
;
1190 ret
= gpiochip_add(&pct
->chip
);
1192 dev_err(&pdev
->dev
, "unable to add gpiochip: %d\n", ret
);
1195 dev_info(&pdev
->dev
, "added gpiochip\n");
1197 abx500_pinctrl_desc
.pins
= pct
->soc
->pins
;
1198 abx500_pinctrl_desc
.npins
= pct
->soc
->npins
;
1199 pct
->pctldev
= pinctrl_register(&abx500_pinctrl_desc
, &pdev
->dev
, pct
);
1200 if (!pct
->pctldev
) {
1202 "could not register abx500 pinctrl driver\n");
1206 dev_info(&pdev
->dev
, "registered pin controller\n");
1208 /* We will handle a range of GPIO pins */
1209 for (i
= 0; i
< pct
->soc
->gpio_num_ranges
; i
++) {
1210 const struct abx500_pinrange
*p
= &pct
->soc
->gpio_ranges
[i
];
1212 ret
= gpiochip_add_pin_range(&pct
->chip
,
1213 dev_name(&pdev
->dev
),
1214 p
->offset
- 1, p
->offset
, p
->npins
);
1219 platform_set_drvdata(pdev
, pct
);
1220 dev_info(&pdev
->dev
, "initialized abx500 pinctrl driver\n");
1225 err
= gpiochip_remove(&pct
->chip
);
1227 dev_info(&pdev
->dev
, "failed to remove gpiochip\n");
1233 * abx500_gpio_remove() - remove Ab8500-gpio driver
1234 * @pdev: Platform device registered
1236 static int abx500_gpio_remove(struct platform_device
*pdev
)
1238 struct abx500_pinctrl
*pct
= platform_get_drvdata(pdev
);
1241 ret
= gpiochip_remove(&pct
->chip
);
1243 dev_err(pct
->dev
, "unable to remove gpiochip: %d\n",
1251 static const struct platform_device_id abx500_pinctrl_id
[] = {
1252 { "pinctrl-ab8500", PINCTRL_AB8500
},
1253 { "pinctrl-ab8540", PINCTRL_AB8540
},
1254 { "pinctrl-ab9540", PINCTRL_AB9540
},
1255 { "pinctrl-ab8505", PINCTRL_AB8505
},
1259 static struct platform_driver abx500_gpio_driver
= {
1261 .name
= "abx500-gpio",
1262 .owner
= THIS_MODULE
,
1263 .of_match_table
= abx500_gpio_match
,
1265 .probe
= abx500_gpio_probe
,
1266 .remove
= abx500_gpio_remove
,
1267 .id_table
= abx500_pinctrl_id
,
1270 static int __init
abx500_gpio_init(void)
1272 return platform_driver_register(&abx500_gpio_driver
);
1274 core_initcall(abx500_gpio_init
);
1276 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>");
1277 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO");
1278 MODULE_ALIAS("platform:abx500-gpio");
1279 MODULE_LICENSE("GPL v2");