1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Conexant Digicolor General Purpose Pin Mapping
5 * Author: Baruch Siach <baruch@tkos.co.il>
7 * Copyright (C) 2015 Paradox Innovation Ltd.
10 * - GPIO interrupt support
11 * - Pin pad configuration (pull up/down, strength)
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
17 #include <linux/of_device.h>
19 #include <linux/gpio/driver.h>
20 #include <linux/spinlock.h>
21 #include <linux/pinctrl/machine.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/pinconf-generic.h>
24 #include <linux/pinctrl/pinctrl.h>
25 #include <linux/pinctrl/pinmux.h>
26 #include "pinctrl-utils.h"
28 #define DRIVER_NAME "pinctrl-digicolor"
30 #define GP_CLIENTSEL(clct) ((clct)*8 + 0x20)
31 #define GP_DRIVE0(clct) (GP_CLIENTSEL(clct) + 2)
32 #define GP_OUTPUT0(clct) (GP_CLIENTSEL(clct) + 3)
33 #define GP_INPUT(clct) (GP_CLIENTSEL(clct) + 6)
35 #define PIN_COLLECTIONS ('R' - 'A' + 1)
36 #define PINS_PER_COLLECTION 8
37 #define PINS_COUNT (PIN_COLLECTIONS * PINS_PER_COLLECTION)
42 struct pinctrl_dev
*pctl
;
44 struct pinctrl_desc
*desc
;
45 const char *pin_names
[PINS_COUNT
];
47 struct gpio_chip chip
;
51 static int dc_get_groups_count(struct pinctrl_dev
*pctldev
)
56 static const char *dc_get_group_name(struct pinctrl_dev
*pctldev
,
59 struct dc_pinmap
*pmap
= pinctrl_dev_get_drvdata(pctldev
);
61 /* Exactly one group per pin */
62 return pmap
->desc
->pins
[selector
].name
;
65 static int dc_get_group_pins(struct pinctrl_dev
*pctldev
, unsigned selector
,
66 const unsigned **pins
,
69 struct dc_pinmap
*pmap
= pinctrl_dev_get_drvdata(pctldev
);
71 *pins
= &pmap
->desc
->pins
[selector
].number
;
77 static const struct pinctrl_ops dc_pinctrl_ops
= {
78 .get_groups_count
= dc_get_groups_count
,
79 .get_group_name
= dc_get_group_name
,
80 .get_group_pins
= dc_get_group_pins
,
81 .dt_node_to_map
= pinconf_generic_dt_node_to_map_pin
,
82 .dt_free_map
= pinctrl_utils_free_map
,
85 static const char *const dc_functions
[] = {
92 static int dc_get_functions_count(struct pinctrl_dev
*pctldev
)
94 return ARRAY_SIZE(dc_functions
);
97 static const char *dc_get_fname(struct pinctrl_dev
*pctldev
, unsigned selector
)
99 return dc_functions
[selector
];
102 static int dc_get_groups(struct pinctrl_dev
*pctldev
, unsigned selector
,
103 const char * const **groups
,
104 unsigned * const num_groups
)
106 struct dc_pinmap
*pmap
= pinctrl_dev_get_drvdata(pctldev
);
108 *groups
= pmap
->pin_names
;
109 *num_groups
= PINS_COUNT
;
114 static void dc_client_sel(int pin_num
, int *reg
, int *bit
)
116 *bit
= (pin_num
% PINS_PER_COLLECTION
) * 2;
117 *reg
= GP_CLIENTSEL(pin_num
/PINS_PER_COLLECTION
);
119 if (*bit
>= PINS_PER_COLLECTION
) {
120 *bit
-= PINS_PER_COLLECTION
;
125 static int dc_set_mux(struct pinctrl_dev
*pctldev
, unsigned selector
,
128 struct dc_pinmap
*pmap
= pinctrl_dev_get_drvdata(pctldev
);
129 int bit_off
, reg_off
;
132 dc_client_sel(group
, ®_off
, &bit_off
);
134 reg
= readb_relaxed(pmap
->regs
+ reg_off
);
135 reg
&= ~(3 << bit_off
);
136 reg
|= (selector
<< bit_off
);
137 writeb_relaxed(reg
, pmap
->regs
+ reg_off
);
142 static int dc_pmx_request_gpio(struct pinctrl_dev
*pcdev
,
143 struct pinctrl_gpio_range
*range
,
146 struct dc_pinmap
*pmap
= pinctrl_dev_get_drvdata(pcdev
);
147 int bit_off
, reg_off
;
150 dc_client_sel(offset
, ®_off
, &bit_off
);
152 reg
= readb_relaxed(pmap
->regs
+ reg_off
);
153 if ((reg
& (3 << bit_off
)) != 0)
159 static const struct pinmux_ops dc_pmxops
= {
160 .get_functions_count
= dc_get_functions_count
,
161 .get_function_name
= dc_get_fname
,
162 .get_function_groups
= dc_get_groups
,
163 .set_mux
= dc_set_mux
,
164 .gpio_request_enable
= dc_pmx_request_gpio
,
167 static int dc_gpio_direction_input(struct gpio_chip
*chip
, unsigned gpio
)
169 struct dc_pinmap
*pmap
= gpiochip_get_data(chip
);
170 int reg_off
= GP_DRIVE0(gpio
/PINS_PER_COLLECTION
);
171 int bit_off
= gpio
% PINS_PER_COLLECTION
;
175 spin_lock_irqsave(&pmap
->lock
, flags
);
176 drive
= readb_relaxed(pmap
->regs
+ reg_off
);
177 drive
&= ~BIT(bit_off
);
178 writeb_relaxed(drive
, pmap
->regs
+ reg_off
);
179 spin_unlock_irqrestore(&pmap
->lock
, flags
);
184 static void dc_gpio_set(struct gpio_chip
*chip
, unsigned gpio
, int value
);
186 static int dc_gpio_direction_output(struct gpio_chip
*chip
, unsigned gpio
,
189 struct dc_pinmap
*pmap
= gpiochip_get_data(chip
);
190 int reg_off
= GP_DRIVE0(gpio
/PINS_PER_COLLECTION
);
191 int bit_off
= gpio
% PINS_PER_COLLECTION
;
195 dc_gpio_set(chip
, gpio
, value
);
197 spin_lock_irqsave(&pmap
->lock
, flags
);
198 drive
= readb_relaxed(pmap
->regs
+ reg_off
);
199 drive
|= BIT(bit_off
);
200 writeb_relaxed(drive
, pmap
->regs
+ reg_off
);
201 spin_unlock_irqrestore(&pmap
->lock
, flags
);
206 static int dc_gpio_get(struct gpio_chip
*chip
, unsigned gpio
)
208 struct dc_pinmap
*pmap
= gpiochip_get_data(chip
);
209 int reg_off
= GP_INPUT(gpio
/PINS_PER_COLLECTION
);
210 int bit_off
= gpio
% PINS_PER_COLLECTION
;
213 input
= readb_relaxed(pmap
->regs
+ reg_off
);
215 return !!(input
& BIT(bit_off
));
218 static void dc_gpio_set(struct gpio_chip
*chip
, unsigned gpio
, int value
)
220 struct dc_pinmap
*pmap
= gpiochip_get_data(chip
);
221 int reg_off
= GP_OUTPUT0(gpio
/PINS_PER_COLLECTION
);
222 int bit_off
= gpio
% PINS_PER_COLLECTION
;
226 spin_lock_irqsave(&pmap
->lock
, flags
);
227 output
= readb_relaxed(pmap
->regs
+ reg_off
);
229 output
|= BIT(bit_off
);
231 output
&= ~BIT(bit_off
);
232 writeb_relaxed(output
, pmap
->regs
+ reg_off
);
233 spin_unlock_irqrestore(&pmap
->lock
, flags
);
236 static int dc_gpiochip_add(struct dc_pinmap
*pmap
, struct device_node
*np
)
238 struct gpio_chip
*chip
= &pmap
->chip
;
241 chip
->label
= DRIVER_NAME
;
242 chip
->parent
= pmap
->dev
;
243 chip
->request
= gpiochip_generic_request
;
244 chip
->free
= gpiochip_generic_free
;
245 chip
->direction_input
= dc_gpio_direction_input
;
246 chip
->direction_output
= dc_gpio_direction_output
;
247 chip
->get
= dc_gpio_get
;
248 chip
->set
= dc_gpio_set
;
250 chip
->ngpio
= PINS_COUNT
;
252 chip
->of_gpio_n_cells
= 2;
254 spin_lock_init(&pmap
->lock
);
256 ret
= gpiochip_add_data(chip
, pmap
);
260 ret
= gpiochip_add_pin_range(chip
, dev_name(pmap
->dev
), 0, 0,
263 gpiochip_remove(chip
);
270 static int dc_pinctrl_probe(struct platform_device
*pdev
)
272 struct dc_pinmap
*pmap
;
274 struct pinctrl_pin_desc
*pins
;
275 struct pinctrl_desc
*pctl_desc
;
277 int name_len
= strlen("GP_xx") + 1;
280 pmap
= devm_kzalloc(&pdev
->dev
, sizeof(*pmap
), GFP_KERNEL
);
284 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
285 pmap
->regs
= devm_ioremap_resource(&pdev
->dev
, r
);
286 if (IS_ERR(pmap
->regs
))
287 return PTR_ERR(pmap
->regs
);
289 pins
= devm_kcalloc(&pdev
->dev
, PINS_COUNT
, sizeof(*pins
),
293 pin_names
= devm_kcalloc(&pdev
->dev
, PINS_COUNT
, name_len
,
298 for (i
= 0; i
< PIN_COLLECTIONS
; i
++) {
299 for (j
= 0; j
< PINS_PER_COLLECTION
; j
++) {
300 int pin_id
= i
*PINS_PER_COLLECTION
+ j
;
301 char *name
= &pin_names
[pin_id
* name_len
];
303 snprintf(name
, name_len
, "GP_%c%c", 'A'+i
, '0'+j
);
305 pins
[pin_id
].number
= pin_id
;
306 pins
[pin_id
].name
= name
;
307 pmap
->pin_names
[pin_id
] = name
;
311 pctl_desc
= devm_kzalloc(&pdev
->dev
, sizeof(*pctl_desc
), GFP_KERNEL
);
315 pctl_desc
->name
= DRIVER_NAME
,
316 pctl_desc
->owner
= THIS_MODULE
,
317 pctl_desc
->pctlops
= &dc_pinctrl_ops
,
318 pctl_desc
->pmxops
= &dc_pmxops
,
319 pctl_desc
->npins
= PINS_COUNT
;
320 pctl_desc
->pins
= pins
;
321 pmap
->desc
= pctl_desc
;
323 pmap
->dev
= &pdev
->dev
;
325 pmap
->pctl
= devm_pinctrl_register(&pdev
->dev
, pctl_desc
, pmap
);
326 if (IS_ERR(pmap
->pctl
)) {
327 dev_err(&pdev
->dev
, "pinctrl driver registration failed\n");
328 return PTR_ERR(pmap
->pctl
);
331 return dc_gpiochip_add(pmap
, pdev
->dev
.of_node
);
334 static const struct of_device_id dc_pinctrl_ids
[] = {
335 { .compatible
= "cnxt,cx92755-pinctrl" },
339 static struct platform_driver dc_pinctrl_driver
= {
342 .of_match_table
= dc_pinctrl_ids
,
343 .suppress_bind_attrs
= true,
345 .probe
= dc_pinctrl_probe
,
347 builtin_platform_driver(dc_pinctrl_driver
);