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[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / pinctrl-sx150x.c
1 /*
2 * Copyright (c) 2016, BayLibre, SAS. All rights reserved.
3 * Author: Neil Armstrong <narmstrong@baylibre.com>
4 *
5 * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
6 *
7 * Driver for Semtech SX150X I2C GPIO Expanders
8 *
9 * Author: Gregory Bean <gbean@codeaurora.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 and
13 * only version 2 as published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 */
20
21 #include <linux/i2c.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/mutex.h>
26 #include <linux/slab.h>
27 #include <linux/of.h>
28 #include <linux/gpio.h>
29 #include <linux/pinctrl/machine.h>
30 #include <linux/pinctrl/pinconf.h>
31 #include <linux/pinctrl/pinctrl.h>
32 #include <linux/pinctrl/pinmux.h>
33 #include <linux/pinctrl/pinconf-generic.h>
34
35 #include "core.h"
36 #include "pinconf.h"
37 #include "pinctrl-utils.h"
38
39 /* The chip models of sx150x */
40 enum {
41 SX150X_123 = 0,
42 SX150X_456,
43 SX150X_789,
44 };
45
46 struct sx150x_123_pri {
47 u8 reg_pld_mode;
48 u8 reg_pld_table0;
49 u8 reg_pld_table1;
50 u8 reg_pld_table2;
51 u8 reg_pld_table3;
52 u8 reg_pld_table4;
53 u8 reg_advance;
54 };
55
56 struct sx150x_456_pri {
57 u8 reg_pld_mode;
58 u8 reg_pld_table0;
59 u8 reg_pld_table1;
60 u8 reg_pld_table2;
61 u8 reg_pld_table3;
62 u8 reg_pld_table4;
63 u8 reg_advance;
64 };
65
66 struct sx150x_789_pri {
67 u8 reg_drain;
68 u8 reg_polarity;
69 u8 reg_clock;
70 u8 reg_misc;
71 u8 reg_reset;
72 u8 ngpios;
73 };
74
75 struct sx150x_device_data {
76 u8 model;
77 u8 reg_pullup;
78 u8 reg_pulldn;
79 u8 reg_dir;
80 u8 reg_data;
81 u8 reg_irq_mask;
82 u8 reg_irq_src;
83 u8 reg_sense;
84 u8 ngpios;
85 union {
86 struct sx150x_123_pri x123;
87 struct sx150x_456_pri x456;
88 struct sx150x_789_pri x789;
89 } pri;
90 const struct pinctrl_pin_desc *pins;
91 unsigned int npins;
92 };
93
94 struct sx150x_pinctrl {
95 struct device *dev;
96 struct i2c_client *client;
97 struct pinctrl_dev *pctldev;
98 struct pinctrl_desc pinctrl_desc;
99 struct gpio_chip gpio;
100 struct irq_chip irq_chip;
101 struct {
102 int update;
103 u32 sense;
104 u32 masked;
105 u32 dev_sense;
106 u32 dev_masked;
107 } irq;
108 struct mutex lock;
109 const struct sx150x_device_data *data;
110 };
111
112 static const struct pinctrl_pin_desc sx150x_8_pins[] = {
113 PINCTRL_PIN(0, "gpio0"),
114 PINCTRL_PIN(1, "gpio1"),
115 PINCTRL_PIN(2, "gpio2"),
116 PINCTRL_PIN(3, "gpio3"),
117 PINCTRL_PIN(4, "gpio4"),
118 PINCTRL_PIN(5, "gpio5"),
119 PINCTRL_PIN(6, "gpio6"),
120 PINCTRL_PIN(7, "gpio7"),
121 PINCTRL_PIN(8, "oscio"),
122 };
123
124 static const struct pinctrl_pin_desc sx150x_16_pins[] = {
125 PINCTRL_PIN(0, "gpio0"),
126 PINCTRL_PIN(1, "gpio1"),
127 PINCTRL_PIN(2, "gpio2"),
128 PINCTRL_PIN(3, "gpio3"),
129 PINCTRL_PIN(4, "gpio4"),
130 PINCTRL_PIN(5, "gpio5"),
131 PINCTRL_PIN(6, "gpio6"),
132 PINCTRL_PIN(7, "gpio7"),
133 PINCTRL_PIN(8, "gpio8"),
134 PINCTRL_PIN(9, "gpio9"),
135 PINCTRL_PIN(10, "gpio10"),
136 PINCTRL_PIN(11, "gpio11"),
137 PINCTRL_PIN(12, "gpio12"),
138 PINCTRL_PIN(13, "gpio13"),
139 PINCTRL_PIN(14, "gpio14"),
140 PINCTRL_PIN(15, "gpio15"),
141 PINCTRL_PIN(16, "oscio"),
142 };
143
144 static const struct sx150x_device_data sx1508q_device_data = {
145 .model = SX150X_789,
146 .reg_pullup = 0x03,
147 .reg_pulldn = 0x04,
148 .reg_dir = 0x07,
149 .reg_data = 0x08,
150 .reg_irq_mask = 0x09,
151 .reg_irq_src = 0x0c,
152 .reg_sense = 0x0b,
153 .pri.x789 = {
154 .reg_drain = 0x05,
155 .reg_polarity = 0x06,
156 .reg_clock = 0x0f,
157 .reg_misc = 0x10,
158 .reg_reset = 0x7d,
159 },
160 .ngpios = 8,
161 .pins = sx150x_8_pins,
162 .npins = ARRAY_SIZE(sx150x_8_pins),
163 };
164
165 static const struct sx150x_device_data sx1509q_device_data = {
166 .model = SX150X_789,
167 .reg_pullup = 0x07,
168 .reg_pulldn = 0x09,
169 .reg_dir = 0x0f,
170 .reg_data = 0x11,
171 .reg_irq_mask = 0x13,
172 .reg_irq_src = 0x19,
173 .reg_sense = 0x17,
174 .pri.x789 = {
175 .reg_drain = 0x0b,
176 .reg_polarity = 0x0d,
177 .reg_clock = 0x1e,
178 .reg_misc = 0x1f,
179 .reg_reset = 0x7d,
180 },
181 .ngpios = 16,
182 .pins = sx150x_16_pins,
183 .npins = ARRAY_SIZE(sx150x_16_pins),
184 };
185
186 static const struct sx150x_device_data sx1506q_device_data = {
187 .model = SX150X_456,
188 .reg_pullup = 0x05,
189 .reg_pulldn = 0x07,
190 .reg_dir = 0x03,
191 .reg_data = 0x01,
192 .reg_irq_mask = 0x09,
193 .reg_irq_src = 0x0f,
194 .reg_sense = 0x0d,
195 .pri.x456 = {
196 .reg_pld_mode = 0x21,
197 .reg_pld_table0 = 0x23,
198 .reg_pld_table1 = 0x25,
199 .reg_pld_table2 = 0x27,
200 .reg_pld_table3 = 0x29,
201 .reg_pld_table4 = 0x2b,
202 .reg_advance = 0xad,
203 },
204 .ngpios = 16,
205 .pins = sx150x_16_pins,
206 .npins = 16, /* oscio not available */
207 };
208
209 static const struct sx150x_device_data sx1502q_device_data = {
210 .model = SX150X_123,
211 .reg_pullup = 0x02,
212 .reg_pulldn = 0x03,
213 .reg_dir = 0x01,
214 .reg_data = 0x00,
215 .reg_irq_mask = 0x05,
216 .reg_irq_src = 0x08,
217 .reg_sense = 0x07,
218 .pri.x123 = {
219 .reg_pld_mode = 0x10,
220 .reg_pld_table0 = 0x11,
221 .reg_pld_table1 = 0x12,
222 .reg_pld_table2 = 0x13,
223 .reg_pld_table3 = 0x14,
224 .reg_pld_table4 = 0x15,
225 .reg_advance = 0xad,
226 },
227 .ngpios = 8,
228 .pins = sx150x_8_pins,
229 .npins = 8, /* oscio not available */
230 };
231
232 static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
233 {
234 s32 err = i2c_smbus_write_byte_data(client, reg, val);
235
236 if (err < 0)
237 dev_warn(&client->dev,
238 "i2c write fail: can't write %02x to %02x: %d\n",
239 val, reg, err);
240 return err;
241 }
242
243 static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
244 {
245 s32 err = i2c_smbus_read_byte_data(client, reg);
246
247 if (err >= 0)
248 *val = err;
249 else
250 dev_warn(&client->dev,
251 "i2c read fail: can't read from %02x: %d\n",
252 reg, err);
253 return err;
254 }
255
256 /*
257 * These utility functions solve the common problem of locating and setting
258 * configuration bits. Configuration bits are grouped into registers
259 * whose indexes increase downwards. For example, with eight-bit registers,
260 * sixteen gpios would have their config bits grouped in the following order:
261 * REGISTER N-1 [ f e d c b a 9 8 ]
262 * N [ 7 6 5 4 3 2 1 0 ]
263 *
264 * For multi-bit configurations, the pattern gets wider:
265 * REGISTER N-3 [ f f e e d d c c ]
266 * N-2 [ b b a a 9 9 8 8 ]
267 * N-1 [ 7 7 6 6 5 5 4 4 ]
268 * N [ 3 3 2 2 1 1 0 0 ]
269 *
270 * Given the address of the starting register 'N', the index of the gpio
271 * whose configuration we seek to change, and the width in bits of that
272 * configuration, these functions allow us to locate the correct
273 * register and mask the correct bits.
274 */
275 static inline void sx150x_find_cfg(u8 offset, u8 width,
276 u8 *reg, u8 *mask, u8 *shift)
277 {
278 *reg -= offset * width / 8;
279 *mask = (1 << width) - 1;
280 *shift = (offset * width) % 8;
281 *mask <<= *shift;
282 }
283
284 static int sx150x_write_cfg(struct i2c_client *client,
285 u8 offset, u8 width, u8 reg, u8 val)
286 {
287 u8 mask;
288 u8 data;
289 u8 shift;
290 int err;
291
292 sx150x_find_cfg(offset, width, &reg, &mask, &shift);
293 err = sx150x_i2c_read(client, reg, &data);
294 if (err < 0)
295 return err;
296
297 data &= ~mask;
298 data |= (val << shift) & mask;
299 return sx150x_i2c_write(client, reg, data);
300 }
301
302 static int sx150x_read_cfg(struct i2c_client *client,
303 u8 offset, u8 width, u8 reg)
304 {
305 u8 mask;
306 u8 data;
307 u8 shift;
308 int err;
309
310 sx150x_find_cfg(offset, width, &reg, &mask, &shift);
311 err = sx150x_i2c_read(client, reg, &data);
312 if (err < 0)
313 return err;
314
315 return (data & mask);
316 }
317
318 static int sx150x_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
319 {
320 return 0;
321 }
322
323 static const char *sx150x_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
324 unsigned int group)
325 {
326 return NULL;
327 }
328
329 static int sx150x_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
330 unsigned int group,
331 const unsigned int **pins,
332 unsigned int *num_pins)
333 {
334 return -ENOTSUPP;
335 }
336
337 static const struct pinctrl_ops sx150x_pinctrl_ops = {
338 .get_groups_count = sx150x_pinctrl_get_groups_count,
339 .get_group_name = sx150x_pinctrl_get_group_name,
340 .get_group_pins = sx150x_pinctrl_get_group_pins,
341 #ifdef CONFIG_OF
342 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
343 .dt_free_map = pinctrl_utils_free_map,
344 #endif
345 };
346
347 static bool sx150x_pin_is_oscio(struct sx150x_pinctrl *pctl, unsigned int pin)
348 {
349 if (pin >= pctl->data->npins)
350 return false;
351
352 /* OSCIO pin is only present in 789 devices */
353 if (pctl->data->model != SX150X_789)
354 return false;
355
356 return !strcmp(pctl->data->pins[pin].name, "oscio");
357 }
358
359 static int sx150x_gpio_get_direction(struct gpio_chip *chip,
360 unsigned int offset)
361 {
362 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
363 int status;
364
365 if (sx150x_pin_is_oscio(pctl, offset))
366 return false;
367
368 status = sx150x_read_cfg(pctl->client, offset, 1, pctl->data->reg_dir);
369 if (status >= 0)
370 status = !!status;
371
372 return status;
373 }
374
375 static int sx150x_gpio_get(struct gpio_chip *chip, unsigned int offset)
376 {
377 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
378 int status;
379
380 if (sx150x_pin_is_oscio(pctl, offset))
381 return -EINVAL;
382
383 status = sx150x_read_cfg(pctl->client, offset, 1, pctl->data->reg_data);
384 if (status >= 0)
385 status = !!status;
386
387 return status;
388 }
389
390 static int sx150x_gpio_set_single_ended(struct gpio_chip *chip,
391 unsigned int offset,
392 enum single_ended_mode mode)
393 {
394 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
395 int ret;
396
397 switch (mode) {
398 case LINE_MODE_PUSH_PULL:
399 if (pctl->data->model != SX150X_789 ||
400 sx150x_pin_is_oscio(pctl, offset))
401 return 0;
402
403 mutex_lock(&pctl->lock);
404 ret = sx150x_write_cfg(pctl->client, offset, 1,
405 pctl->data->pri.x789.reg_drain,
406 0);
407 mutex_unlock(&pctl->lock);
408 if (ret < 0)
409 return ret;
410 break;
411
412 case LINE_MODE_OPEN_DRAIN:
413 if (pctl->data->model != SX150X_789 ||
414 sx150x_pin_is_oscio(pctl, offset))
415 return -ENOTSUPP;
416
417 mutex_lock(&pctl->lock);
418 ret = sx150x_write_cfg(pctl->client, offset, 1,
419 pctl->data->pri.x789.reg_drain,
420 1);
421 mutex_unlock(&pctl->lock);
422 if (ret < 0)
423 return ret;
424 break;
425
426 default:
427 return -ENOTSUPP;
428 }
429
430 return 0;
431 }
432
433 static void sx150x_gpio_set(struct gpio_chip *chip, unsigned int offset,
434 int value)
435 {
436 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
437
438 if (sx150x_pin_is_oscio(pctl, offset)) {
439
440 mutex_lock(&pctl->lock);
441 sx150x_i2c_write(pctl->client,
442 pctl->data->pri.x789.reg_clock,
443 (value ? 0x1f : 0x10));
444 mutex_unlock(&pctl->lock);
445 } else {
446 mutex_lock(&pctl->lock);
447 sx150x_write_cfg(pctl->client, offset, 1,
448 pctl->data->reg_data,
449 (value ? 1 : 0));
450 mutex_unlock(&pctl->lock);
451 }
452 }
453
454 static int sx150x_gpio_direction_input(struct gpio_chip *chip,
455 unsigned int offset)
456 {
457 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
458 int ret;
459
460 if (sx150x_pin_is_oscio(pctl, offset))
461 return -EINVAL;
462
463 mutex_lock(&pctl->lock);
464 ret = sx150x_write_cfg(pctl->client, offset, 1,
465 pctl->data->reg_dir, 1);
466 mutex_unlock(&pctl->lock);
467
468 return ret;
469 }
470
471 static int sx150x_gpio_direction_output(struct gpio_chip *chip,
472 unsigned int offset, int value)
473 {
474 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
475 int status;
476
477 if (sx150x_pin_is_oscio(pctl, offset)) {
478 sx150x_gpio_set(chip, offset, value);
479 return 0;
480 }
481
482 mutex_lock(&pctl->lock);
483 status = sx150x_write_cfg(pctl->client, offset, 1,
484 pctl->data->reg_data,
485 (value ? 1 : 0));
486 if (status >= 0)
487 status = sx150x_write_cfg(pctl->client, offset, 1,
488 pctl->data->reg_dir, 0);
489 mutex_unlock(&pctl->lock);
490
491 return status;
492 }
493
494 static void sx150x_irq_mask(struct irq_data *d)
495 {
496 struct sx150x_pinctrl *pctl =
497 gpiochip_get_data(irq_data_get_irq_chip_data(d));
498 unsigned int n = d->hwirq;
499
500 pctl->irq.masked |= (1 << n);
501 pctl->irq.update = n;
502 }
503
504 static void sx150x_irq_unmask(struct irq_data *d)
505 {
506 struct sx150x_pinctrl *pctl =
507 gpiochip_get_data(irq_data_get_irq_chip_data(d));
508 unsigned int n = d->hwirq;
509
510 pctl->irq.masked &= ~(1 << n);
511 pctl->irq.update = n;
512 }
513
514 static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
515 {
516 struct sx150x_pinctrl *pctl =
517 gpiochip_get_data(irq_data_get_irq_chip_data(d));
518 unsigned int n, val = 0;
519
520 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
521 return -EINVAL;
522
523 n = d->hwirq;
524
525 if (flow_type & IRQ_TYPE_EDGE_RISING)
526 val |= 0x1;
527 if (flow_type & IRQ_TYPE_EDGE_FALLING)
528 val |= 0x2;
529
530 pctl->irq.sense &= ~(3UL << (n * 2));
531 pctl->irq.sense |= val << (n * 2);
532 pctl->irq.update = n;
533 return 0;
534 }
535
536 static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
537 {
538 struct sx150x_pinctrl *pctl = (struct sx150x_pinctrl *)dev_id;
539 unsigned int nhandled = 0;
540 unsigned int sub_irq;
541 unsigned int n;
542 s32 err;
543 u8 val;
544 int i;
545
546 for (i = (pctl->data->ngpios / 8) - 1; i >= 0; --i) {
547 err = sx150x_i2c_read(pctl->client,
548 pctl->data->reg_irq_src - i,
549 &val);
550 if (err < 0)
551 continue;
552
553 err = sx150x_i2c_write(pctl->client,
554 pctl->data->reg_irq_src - i,
555 val);
556 if (err < 0)
557 continue;
558
559 for (n = 0; n < 8; ++n) {
560 if (val & (1 << n)) {
561 sub_irq = irq_find_mapping(
562 pctl->gpio.irqdomain,
563 (i * 8) + n);
564 handle_nested_irq(sub_irq);
565 ++nhandled;
566 }
567 }
568 }
569
570 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
571 }
572
573 static void sx150x_irq_bus_lock(struct irq_data *d)
574 {
575 struct sx150x_pinctrl *pctl =
576 gpiochip_get_data(irq_data_get_irq_chip_data(d));
577
578 mutex_lock(&pctl->lock);
579 }
580
581 static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
582 {
583 struct sx150x_pinctrl *pctl =
584 gpiochip_get_data(irq_data_get_irq_chip_data(d));
585 unsigned int n;
586
587 if (pctl->irq.update < 0)
588 goto out;
589
590 n = pctl->irq.update;
591 pctl->irq.update = -1;
592
593 /* Avoid updates if nothing changed */
594 if (pctl->irq.dev_sense == pctl->irq.sense &&
595 pctl->irq.dev_masked == pctl->irq.masked)
596 goto out;
597
598 pctl->irq.dev_sense = pctl->irq.sense;
599 pctl->irq.dev_masked = pctl->irq.masked;
600
601 if (pctl->irq.masked & (1 << n)) {
602 sx150x_write_cfg(pctl->client, n, 1,
603 pctl->data->reg_irq_mask, 1);
604 sx150x_write_cfg(pctl->client, n, 2,
605 pctl->data->reg_sense, 0);
606 } else {
607 sx150x_write_cfg(pctl->client, n, 1,
608 pctl->data->reg_irq_mask, 0);
609 sx150x_write_cfg(pctl->client, n, 2,
610 pctl->data->reg_sense,
611 pctl->irq.sense >> (n * 2));
612 }
613 out:
614 mutex_unlock(&pctl->lock);
615 }
616
617 static int sx150x_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
618 unsigned long *config)
619 {
620 struct sx150x_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
621 unsigned int param = pinconf_to_config_param(*config);
622 int ret;
623 u32 arg;
624
625 if (sx150x_pin_is_oscio(pctl, pin)) {
626 u8 data;
627
628 switch (param) {
629 case PIN_CONFIG_DRIVE_PUSH_PULL:
630 case PIN_CONFIG_OUTPUT:
631 mutex_lock(&pctl->lock);
632 ret = sx150x_i2c_read(pctl->client,
633 pctl->data->pri.x789.reg_clock,
634 &data);
635 mutex_unlock(&pctl->lock);
636
637 if (ret < 0)
638 return ret;
639
640 if (param == PIN_CONFIG_DRIVE_PUSH_PULL)
641 arg = (data & 0x1f) ? 1 : 0;
642 else {
643 if ((data & 0x1f) == 0x1f)
644 arg = 1;
645 else if ((data & 0x1f) == 0x10)
646 arg = 0;
647 else
648 return -EINVAL;
649 }
650
651 break;
652 default:
653 return -ENOTSUPP;
654 }
655
656 goto out;
657 }
658
659 switch (param) {
660 case PIN_CONFIG_BIAS_PULL_DOWN:
661 mutex_lock(&pctl->lock);
662 ret = sx150x_read_cfg(pctl->client, pin, 1,
663 pctl->data->reg_pulldn);
664 mutex_unlock(&pctl->lock);
665
666 if (ret < 0)
667 return ret;
668
669 if (!ret)
670 return -EINVAL;
671
672 arg = 1;
673 break;
674
675 case PIN_CONFIG_BIAS_PULL_UP:
676 mutex_lock(&pctl->lock);
677 ret = sx150x_read_cfg(pctl->client, pin, 1,
678 pctl->data->reg_pullup);
679 mutex_unlock(&pctl->lock);
680
681 if (ret < 0)
682 return ret;
683
684 if (!ret)
685 return -EINVAL;
686
687 arg = 1;
688 break;
689
690 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
691 if (pctl->data->model != SX150X_789)
692 return -ENOTSUPP;
693
694 mutex_lock(&pctl->lock);
695 ret = sx150x_read_cfg(pctl->client, pin, 1,
696 pctl->data->pri.x789.reg_drain);
697 mutex_unlock(&pctl->lock);
698
699 if (ret < 0)
700 return ret;
701
702 if (!ret)
703 return -EINVAL;
704
705 arg = 1;
706 break;
707
708 case PIN_CONFIG_DRIVE_PUSH_PULL:
709 if (pctl->data->model != SX150X_789)
710 arg = true;
711 else {
712 mutex_lock(&pctl->lock);
713 ret = sx150x_read_cfg(pctl->client, pin, 1,
714 pctl->data->pri.x789.reg_drain);
715 mutex_unlock(&pctl->lock);
716
717 if (ret < 0)
718 return ret;
719
720 if (ret)
721 return -EINVAL;
722
723 arg = 1;
724 }
725 break;
726
727 case PIN_CONFIG_OUTPUT:
728 ret = sx150x_gpio_get_direction(&pctl->gpio, pin);
729 if (ret < 0)
730 return ret;
731
732 if (ret)
733 return -EINVAL;
734
735 ret = sx150x_gpio_get(&pctl->gpio, pin);
736 if (ret < 0)
737 return ret;
738
739 arg = ret;
740 break;
741
742 default:
743 return -ENOTSUPP;
744 }
745
746 out:
747 *config = pinconf_to_config_packed(param, arg);
748
749 return 0;
750 }
751
752 static int sx150x_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
753 unsigned long *configs, unsigned int num_configs)
754 {
755 struct sx150x_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
756 enum pin_config_param param;
757 u32 arg;
758 int i;
759 int ret;
760
761 for (i = 0; i < num_configs; i++) {
762 param = pinconf_to_config_param(configs[i]);
763 arg = pinconf_to_config_argument(configs[i]);
764
765 if (sx150x_pin_is_oscio(pctl, pin)) {
766 if (param == PIN_CONFIG_OUTPUT) {
767 ret = sx150x_gpio_direction_output(&pctl->gpio,
768 pin, arg);
769 if (ret < 0)
770 return ret;
771
772 continue;
773 } else
774 return -ENOTSUPP;
775 }
776
777 switch (param) {
778 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
779 case PIN_CONFIG_BIAS_DISABLE:
780 mutex_lock(&pctl->lock);
781 ret = sx150x_write_cfg(pctl->client, pin, 1,
782 pctl->data->reg_pulldn, 0);
783 mutex_unlock(&pctl->lock);
784 if (ret < 0)
785 return ret;
786
787 mutex_lock(&pctl->lock);
788 ret = sx150x_write_cfg(pctl->client, pin, 1,
789 pctl->data->reg_pullup, 0);
790 mutex_unlock(&pctl->lock);
791 if (ret < 0)
792 return ret;
793
794 break;
795
796 case PIN_CONFIG_BIAS_PULL_UP:
797 mutex_lock(&pctl->lock);
798 ret = sx150x_write_cfg(pctl->client, pin, 1,
799 pctl->data->reg_pullup,
800 1);
801 mutex_unlock(&pctl->lock);
802 if (ret < 0)
803 return ret;
804
805 break;
806
807 case PIN_CONFIG_BIAS_PULL_DOWN:
808 mutex_lock(&pctl->lock);
809 ret = sx150x_write_cfg(pctl->client, pin, 1,
810 pctl->data->reg_pulldn,
811 1);
812 mutex_unlock(&pctl->lock);
813 if (ret < 0)
814 return ret;
815
816 break;
817
818 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
819 ret = sx150x_gpio_set_single_ended(&pctl->gpio,
820 pin, LINE_MODE_OPEN_DRAIN);
821 if (ret < 0)
822 return ret;
823
824 break;
825
826 case PIN_CONFIG_DRIVE_PUSH_PULL:
827 ret = sx150x_gpio_set_single_ended(&pctl->gpio,
828 pin, LINE_MODE_PUSH_PULL);
829 if (ret < 0)
830 return ret;
831
832 break;
833
834 case PIN_CONFIG_OUTPUT:
835 ret = sx150x_gpio_direction_output(&pctl->gpio,
836 pin, arg);
837 if (ret < 0)
838 return ret;
839
840 break;
841
842 default:
843 return -ENOTSUPP;
844 }
845 } /* for each config */
846
847 return 0;
848 }
849
850 static const struct pinconf_ops sx150x_pinconf_ops = {
851 .pin_config_get = sx150x_pinconf_get,
852 .pin_config_set = sx150x_pinconf_set,
853 .is_generic = true,
854 };
855
856 static const struct i2c_device_id sx150x_id[] = {
857 {"sx1508q", (kernel_ulong_t) &sx1508q_device_data },
858 {"sx1509q", (kernel_ulong_t) &sx1509q_device_data },
859 {"sx1506q", (kernel_ulong_t) &sx1506q_device_data },
860 {"sx1502q", (kernel_ulong_t) &sx1502q_device_data },
861 {}
862 };
863
864 static const struct of_device_id sx150x_of_match[] = {
865 { .compatible = "semtech,sx1508q" },
866 { .compatible = "semtech,sx1509q" },
867 { .compatible = "semtech,sx1506q" },
868 { .compatible = "semtech,sx1502q" },
869 {},
870 };
871
872 static int sx150x_init_io(struct sx150x_pinctrl *pctl, u8 base, u16 cfg)
873 {
874 int err = 0;
875 unsigned int n;
876
877 for (n = 0; err >= 0 && n < (pctl->data->ngpios / 8); ++n)
878 err = sx150x_i2c_write(pctl->client, base - n, cfg >> (n * 8));
879 return err;
880 }
881
882 static int sx150x_reset(struct sx150x_pinctrl *pctl)
883 {
884 int err;
885
886 err = i2c_smbus_write_byte_data(pctl->client,
887 pctl->data->pri.x789.reg_reset,
888 0x12);
889 if (err < 0)
890 return err;
891
892 err = i2c_smbus_write_byte_data(pctl->client,
893 pctl->data->pri.x789.reg_reset,
894 0x34);
895 return err;
896 }
897
898 static int sx150x_init_hw(struct sx150x_pinctrl *pctl)
899 {
900 int err;
901
902 if (pctl->data->model == SX150X_789 &&
903 of_property_read_bool(pctl->dev->of_node, "semtech,probe-reset")) {
904 err = sx150x_reset(pctl);
905 if (err < 0)
906 return err;
907 }
908
909 if (pctl->data->model == SX150X_789)
910 err = sx150x_i2c_write(pctl->client,
911 pctl->data->pri.x789.reg_misc,
912 0x01);
913 else if (pctl->data->model == SX150X_456)
914 err = sx150x_i2c_write(pctl->client,
915 pctl->data->pri.x456.reg_advance,
916 0x04);
917 else
918 err = sx150x_i2c_write(pctl->client,
919 pctl->data->pri.x123.reg_advance,
920 0x00);
921 if (err < 0)
922 return err;
923
924 /* Set all pins to work in normal mode */
925 if (pctl->data->model == SX150X_789) {
926 err = sx150x_init_io(pctl,
927 pctl->data->pri.x789.reg_polarity,
928 0);
929 if (err < 0)
930 return err;
931 } else if (pctl->data->model == SX150X_456) {
932 /* Set all pins to work in normal mode */
933 err = sx150x_init_io(pctl,
934 pctl->data->pri.x456.reg_pld_mode,
935 0);
936 if (err < 0)
937 return err;
938 } else {
939 /* Set all pins to work in normal mode */
940 err = sx150x_init_io(pctl,
941 pctl->data->pri.x123.reg_pld_mode,
942 0);
943 if (err < 0)
944 return err;
945 }
946
947 return 0;
948 }
949
950 static int sx150x_probe(struct i2c_client *client,
951 const struct i2c_device_id *id)
952 {
953 static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
954 I2C_FUNC_SMBUS_WRITE_WORD_DATA;
955 struct device *dev = &client->dev;
956 struct sx150x_pinctrl *pctl;
957 int ret;
958
959 if (!id->driver_data)
960 return -EINVAL;
961
962 if (!i2c_check_functionality(client->adapter, i2c_funcs))
963 return -ENOSYS;
964
965 pctl = devm_kzalloc(dev, sizeof(*pctl), GFP_KERNEL);
966 if (!pctl)
967 return -ENOMEM;
968
969 pctl->dev = dev;
970 pctl->client = client;
971 pctl->data = (void *)id->driver_data;
972
973 mutex_init(&pctl->lock);
974
975 ret = sx150x_init_hw(pctl);
976 if (ret)
977 return ret;
978
979 /* Register GPIO controller */
980 pctl->gpio.label = devm_kstrdup(dev, client->name, GFP_KERNEL);
981 pctl->gpio.base = -1;
982 pctl->gpio.ngpio = pctl->data->npins;
983 pctl->gpio.get_direction = sx150x_gpio_get_direction;
984 pctl->gpio.direction_input = sx150x_gpio_direction_input;
985 pctl->gpio.direction_output = sx150x_gpio_direction_output;
986 pctl->gpio.get = sx150x_gpio_get;
987 pctl->gpio.set = sx150x_gpio_set;
988 pctl->gpio.set_single_ended = sx150x_gpio_set_single_ended;
989 pctl->gpio.parent = dev;
990 #ifdef CONFIG_OF_GPIO
991 pctl->gpio.of_node = dev->of_node;
992 #endif
993 pctl->gpio.can_sleep = true;
994
995 ret = devm_gpiochip_add_data(dev, &pctl->gpio, pctl);
996 if (ret)
997 return ret;
998
999 /* Add Interrupt support if an irq is specified */
1000 if (client->irq > 0) {
1001 pctl->irq_chip.name = devm_kstrdup(dev, client->name,
1002 GFP_KERNEL);
1003 pctl->irq_chip.irq_mask = sx150x_irq_mask;
1004 pctl->irq_chip.irq_unmask = sx150x_irq_unmask;
1005 pctl->irq_chip.irq_set_type = sx150x_irq_set_type;
1006 pctl->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
1007 pctl->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
1008
1009 pctl->irq.masked = ~0;
1010 pctl->irq.sense = 0;
1011 pctl->irq.dev_masked = ~0;
1012 pctl->irq.dev_sense = 0;
1013 pctl->irq.update = -1;
1014
1015 ret = gpiochip_irqchip_add(&pctl->gpio,
1016 &pctl->irq_chip, 0,
1017 handle_edge_irq, IRQ_TYPE_NONE);
1018 if (ret) {
1019 dev_err(dev, "could not connect irqchip to gpiochip\n");
1020 return ret;
1021 }
1022
1023 ret = devm_request_threaded_irq(dev, client->irq, NULL,
1024 sx150x_irq_thread_fn,
1025 IRQF_ONESHOT | IRQF_SHARED |
1026 IRQF_TRIGGER_FALLING,
1027 pctl->irq_chip.name, pctl);
1028 if (ret < 0)
1029 return ret;
1030 }
1031
1032 /* Pinctrl_desc */
1033 pctl->pinctrl_desc.name = "sx150x-pinctrl";
1034 pctl->pinctrl_desc.pctlops = &sx150x_pinctrl_ops;
1035 pctl->pinctrl_desc.confops = &sx150x_pinconf_ops;
1036 pctl->pinctrl_desc.pins = pctl->data->pins;
1037 pctl->pinctrl_desc.npins = pctl->data->npins;
1038 pctl->pinctrl_desc.owner = THIS_MODULE;
1039
1040 pctl->pctldev = pinctrl_register(&pctl->pinctrl_desc, dev, pctl);
1041 if (IS_ERR(pctl->pctldev)) {
1042 dev_err(dev, "Failed to register pinctrl device\n");
1043 return PTR_ERR(pctl->pctldev);
1044 }
1045
1046 return 0;
1047 }
1048
1049 static struct i2c_driver sx150x_driver = {
1050 .driver = {
1051 .name = "sx150x-pinctrl",
1052 .of_match_table = of_match_ptr(sx150x_of_match),
1053 },
1054 .probe = sx150x_probe,
1055 .id_table = sx150x_id,
1056 };
1057
1058 static int __init sx150x_init(void)
1059 {
1060 return i2c_add_driver(&sx150x_driver);
1061 }
1062 subsys_initcall(sx150x_init);
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