drivers/pinctrl/qcom/pinctrl-apq8084.c

   1 /*
   2  * Copyright (c) 2014, The Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/pinctrl/pinctrl.h>
  19
  20 #include "pinctrl-msm.h"
  21
  22 static const struct pinctrl_pin_desc apq8084_pins[] = {
  23         PINCTRL_PIN(0, "GPIO_0"),
  24         PINCTRL_PIN(1, "GPIO_1"),
  25         PINCTRL_PIN(2, "GPIO_2"),
  26         PINCTRL_PIN(3, "GPIO_3"),
  27         PINCTRL_PIN(4, "GPIO_4"),
  28         PINCTRL_PIN(5, "GPIO_5"),
  29         PINCTRL_PIN(6, "GPIO_6"),
  30         PINCTRL_PIN(7, "GPIO_7"),
  31         PINCTRL_PIN(8, "GPIO_8"),
  32         PINCTRL_PIN(9, "GPIO_9"),
  33         PINCTRL_PIN(10, "GPIO_10"),
  34         PINCTRL_PIN(11, "GPIO_11"),
  35         PINCTRL_PIN(12, "GPIO_12"),
  36         PINCTRL_PIN(13, "GPIO_13"),
  37         PINCTRL_PIN(14, "GPIO_14"),
  38         PINCTRL_PIN(15, "GPIO_15"),
  39         PINCTRL_PIN(16, "GPIO_16"),
  40         PINCTRL_PIN(17, "GPIO_17"),
  41         PINCTRL_PIN(18, "GPIO_18"),
  42         PINCTRL_PIN(19, "GPIO_19"),
  43         PINCTRL_PIN(20, "GPIO_20"),
  44         PINCTRL_PIN(21, "GPIO_21"),
  45         PINCTRL_PIN(22, "GPIO_22"),
  46         PINCTRL_PIN(23, "GPIO_23"),
  47         PINCTRL_PIN(24, "GPIO_24"),
  48         PINCTRL_PIN(25, "GPIO_25"),
  49         PINCTRL_PIN(26, "GPIO_26"),
  50         PINCTRL_PIN(27, "GPIO_27"),
  51         PINCTRL_PIN(28, "GPIO_28"),
  52         PINCTRL_PIN(29, "GPIO_29"),
  53         PINCTRL_PIN(30, "GPIO_30"),
  54         PINCTRL_PIN(31, "GPIO_31"),
  55         PINCTRL_PIN(32, "GPIO_32"),
  56         PINCTRL_PIN(33, "GPIO_33"),
  57         PINCTRL_PIN(34, "GPIO_34"),
  58         PINCTRL_PIN(35, "GPIO_35"),
  59         PINCTRL_PIN(36, "GPIO_36"),
  60         PINCTRL_PIN(37, "GPIO_37"),
  61         PINCTRL_PIN(38, "GPIO_38"),
  62         PINCTRL_PIN(39, "GPIO_39"),
  63         PINCTRL_PIN(40, "GPIO_40"),
  64         PINCTRL_PIN(41, "GPIO_41"),
  65         PINCTRL_PIN(42, "GPIO_42"),
  66         PINCTRL_PIN(43, "GPIO_43"),
  67         PINCTRL_PIN(44, "GPIO_44"),
  68         PINCTRL_PIN(45, "GPIO_45"),
  69         PINCTRL_PIN(46, "GPIO_46"),
  70         PINCTRL_PIN(47, "GPIO_47"),
  71         PINCTRL_PIN(48, "GPIO_48"),
  72         PINCTRL_PIN(49, "GPIO_49"),
  73         PINCTRL_PIN(50, "GPIO_50"),
  74         PINCTRL_PIN(51, "GPIO_51"),
  75         PINCTRL_PIN(52, "GPIO_52"),
  76         PINCTRL_PIN(53, "GPIO_53"),
  77         PINCTRL_PIN(54, "GPIO_54"),
  78         PINCTRL_PIN(55, "GPIO_55"),
  79         PINCTRL_PIN(56, "GPIO_56"),
  80         PINCTRL_PIN(57, "GPIO_57"),
  81         PINCTRL_PIN(58, "GPIO_58"),
  82         PINCTRL_PIN(59, "GPIO_59"),
  83         PINCTRL_PIN(60, "GPIO_60"),
  84         PINCTRL_PIN(61, "GPIO_61"),
  85         PINCTRL_PIN(62, "GPIO_62"),
  86         PINCTRL_PIN(63, "GPIO_63"),
  87         PINCTRL_PIN(64, "GPIO_64"),
  88         PINCTRL_PIN(65, "GPIO_65"),
  89         PINCTRL_PIN(66, "GPIO_66"),
  90         PINCTRL_PIN(67, "GPIO_67"),
  91         PINCTRL_PIN(68, "GPIO_68"),
  92         PINCTRL_PIN(69, "GPIO_69"),
  93         PINCTRL_PIN(70, "GPIO_70"),
  94         PINCTRL_PIN(71, "GPIO_71"),
  95         PINCTRL_PIN(72, "GPIO_72"),
  96         PINCTRL_PIN(73, "GPIO_73"),
  97         PINCTRL_PIN(74, "GPIO_74"),
  98         PINCTRL_PIN(75, "GPIO_75"),
  99         PINCTRL_PIN(76, "GPIO_76"),
 100         PINCTRL_PIN(77, "GPIO_77"),
 101         PINCTRL_PIN(78, "GPIO_78"),
 102         PINCTRL_PIN(79, "GPIO_79"),
 103         PINCTRL_PIN(80, "GPIO_80"),
 104         PINCTRL_PIN(81, "GPIO_81"),
 105         PINCTRL_PIN(82, "GPIO_82"),
 106         PINCTRL_PIN(83, "GPIO_83"),
 107         PINCTRL_PIN(84, "GPIO_84"),
 108         PINCTRL_PIN(85, "GPIO_85"),
 109         PINCTRL_PIN(86, "GPIO_86"),
 110         PINCTRL_PIN(87, "GPIO_87"),
 111         PINCTRL_PIN(88, "GPIO_88"),
 112         PINCTRL_PIN(89, "GPIO_89"),
 113         PINCTRL_PIN(90, "GPIO_90"),
 114         PINCTRL_PIN(91, "GPIO_91"),
 115         PINCTRL_PIN(92, "GPIO_92"),
 116         PINCTRL_PIN(93, "GPIO_93"),
 117         PINCTRL_PIN(94, "GPIO_94"),
 118         PINCTRL_PIN(95, "GPIO_95"),
 119         PINCTRL_PIN(96, "GPIO_96"),
 120         PINCTRL_PIN(97, "GPIO_97"),
 121         PINCTRL_PIN(98, "GPIO_98"),
 122         PINCTRL_PIN(99, "GPIO_99"),
 123         PINCTRL_PIN(100, "GPIO_100"),
 124         PINCTRL_PIN(101, "GPIO_101"),
 125         PINCTRL_PIN(102, "GPIO_102"),
 126         PINCTRL_PIN(103, "GPIO_103"),
 127         PINCTRL_PIN(104, "GPIO_104"),
 128         PINCTRL_PIN(105, "GPIO_105"),
 129         PINCTRL_PIN(106, "GPIO_106"),
 130         PINCTRL_PIN(107, "GPIO_107"),
 131         PINCTRL_PIN(108, "GPIO_108"),
 132         PINCTRL_PIN(109, "GPIO_109"),
 133         PINCTRL_PIN(110, "GPIO_110"),
 134         PINCTRL_PIN(111, "GPIO_111"),
 135         PINCTRL_PIN(112, "GPIO_112"),
 136         PINCTRL_PIN(113, "GPIO_113"),
 137         PINCTRL_PIN(114, "GPIO_114"),
 138         PINCTRL_PIN(115, "GPIO_115"),
 139         PINCTRL_PIN(116, "GPIO_116"),
 140         PINCTRL_PIN(117, "GPIO_117"),
 141         PINCTRL_PIN(118, "GPIO_118"),
 142         PINCTRL_PIN(119, "GPIO_119"),
 143         PINCTRL_PIN(120, "GPIO_120"),
 144         PINCTRL_PIN(121, "GPIO_121"),
 145         PINCTRL_PIN(122, "GPIO_122"),
 146         PINCTRL_PIN(123, "GPIO_123"),
 147         PINCTRL_PIN(124, "GPIO_124"),
 148         PINCTRL_PIN(125, "GPIO_125"),
 149         PINCTRL_PIN(126, "GPIO_126"),
 150         PINCTRL_PIN(127, "GPIO_127"),
 151         PINCTRL_PIN(128, "GPIO_128"),
 152         PINCTRL_PIN(129, "GPIO_129"),
 153         PINCTRL_PIN(130, "GPIO_130"),
 154         PINCTRL_PIN(131, "GPIO_131"),
 155         PINCTRL_PIN(132, "GPIO_132"),
 156         PINCTRL_PIN(133, "GPIO_133"),
 157         PINCTRL_PIN(134, "GPIO_134"),
 158         PINCTRL_PIN(135, "GPIO_135"),
 159         PINCTRL_PIN(136, "GPIO_136"),
 160         PINCTRL_PIN(137, "GPIO_137"),
 161         PINCTRL_PIN(138, "GPIO_138"),
 162         PINCTRL_PIN(139, "GPIO_139"),
 163         PINCTRL_PIN(140, "GPIO_140"),
 164         PINCTRL_PIN(141, "GPIO_141"),
 165         PINCTRL_PIN(142, "GPIO_142"),
 166         PINCTRL_PIN(143, "GPIO_143"),
 167         PINCTRL_PIN(144, "GPIO_144"),
 168         PINCTRL_PIN(145, "GPIO_145"),
 169         PINCTRL_PIN(146, "GPIO_146"),
 170
 171         PINCTRL_PIN(147, "SDC1_CLK"),
 172         PINCTRL_PIN(148, "SDC1_CMD"),
 173         PINCTRL_PIN(149, "SDC1_DATA"),
 174         PINCTRL_PIN(150, "SDC2_CLK"),
 175         PINCTRL_PIN(151, "SDC2_CMD"),
 176         PINCTRL_PIN(152, "SDC2_DATA"),
 177 };
 178
 179 #define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
 180
 181 DECLARE_APQ_GPIO_PINS(0);
 182 DECLARE_APQ_GPIO_PINS(1);
 183 DECLARE_APQ_GPIO_PINS(2);
 184 DECLARE_APQ_GPIO_PINS(3);
 185 DECLARE_APQ_GPIO_PINS(4);
 186 DECLARE_APQ_GPIO_PINS(5);
 187 DECLARE_APQ_GPIO_PINS(6);
 188 DECLARE_APQ_GPIO_PINS(7);
 189 DECLARE_APQ_GPIO_PINS(8);
 190 DECLARE_APQ_GPIO_PINS(9);
 191 DECLARE_APQ_GPIO_PINS(10);
 192 DECLARE_APQ_GPIO_PINS(11);
 193 DECLARE_APQ_GPIO_PINS(12);
 194 DECLARE_APQ_GPIO_PINS(13);
 195 DECLARE_APQ_GPIO_PINS(14);
 196 DECLARE_APQ_GPIO_PINS(15);
 197 DECLARE_APQ_GPIO_PINS(16);
 198 DECLARE_APQ_GPIO_PINS(17);
 199 DECLARE_APQ_GPIO_PINS(18);
 200 DECLARE_APQ_GPIO_PINS(19);
 201 DECLARE_APQ_GPIO_PINS(20);
 202 DECLARE_APQ_GPIO_PINS(21);
 203 DECLARE_APQ_GPIO_PINS(22);
 204 DECLARE_APQ_GPIO_PINS(23);
 205 DECLARE_APQ_GPIO_PINS(24);
 206 DECLARE_APQ_GPIO_PINS(25);
 207 DECLARE_APQ_GPIO_PINS(26);
 208 DECLARE_APQ_GPIO_PINS(27);
 209 DECLARE_APQ_GPIO_PINS(28);
 210 DECLARE_APQ_GPIO_PINS(29);
 211 DECLARE_APQ_GPIO_PINS(30);
 212 DECLARE_APQ_GPIO_PINS(31);
 213 DECLARE_APQ_GPIO_PINS(32);
 214 DECLARE_APQ_GPIO_PINS(33);
 215 DECLARE_APQ_GPIO_PINS(34);
 216 DECLARE_APQ_GPIO_PINS(35);
 217 DECLARE_APQ_GPIO_PINS(36);
 218 DECLARE_APQ_GPIO_PINS(37);
 219 DECLARE_APQ_GPIO_PINS(38);
 220 DECLARE_APQ_GPIO_PINS(39);
 221 DECLARE_APQ_GPIO_PINS(40);
 222 DECLARE_APQ_GPIO_PINS(41);
 223 DECLARE_APQ_GPIO_PINS(42);
 224 DECLARE_APQ_GPIO_PINS(43);
 225 DECLARE_APQ_GPIO_PINS(44);
 226 DECLARE_APQ_GPIO_PINS(45);
 227 DECLARE_APQ_GPIO_PINS(46);
 228 DECLARE_APQ_GPIO_PINS(47);
 229 DECLARE_APQ_GPIO_PINS(48);
 230 DECLARE_APQ_GPIO_PINS(49);
 231 DECLARE_APQ_GPIO_PINS(50);
 232 DECLARE_APQ_GPIO_PINS(51);
 233 DECLARE_APQ_GPIO_PINS(52);
 234 DECLARE_APQ_GPIO_PINS(53);
 235 DECLARE_APQ_GPIO_PINS(54);
 236 DECLARE_APQ_GPIO_PINS(55);
 237 DECLARE_APQ_GPIO_PINS(56);
 238 DECLARE_APQ_GPIO_PINS(57);
 239 DECLARE_APQ_GPIO_PINS(58);
 240 DECLARE_APQ_GPIO_PINS(59);
 241 DECLARE_APQ_GPIO_PINS(60);
 242 DECLARE_APQ_GPIO_PINS(61);
 243 DECLARE_APQ_GPIO_PINS(62);
 244 DECLARE_APQ_GPIO_PINS(63);
 245 DECLARE_APQ_GPIO_PINS(64);
 246 DECLARE_APQ_GPIO_PINS(65);
 247 DECLARE_APQ_GPIO_PINS(66);
 248 DECLARE_APQ_GPIO_PINS(67);
 249 DECLARE_APQ_GPIO_PINS(68);
 250 DECLARE_APQ_GPIO_PINS(69);
 251 DECLARE_APQ_GPIO_PINS(70);
 252 DECLARE_APQ_GPIO_PINS(71);
 253 DECLARE_APQ_GPIO_PINS(72);
 254 DECLARE_APQ_GPIO_PINS(73);
 255 DECLARE_APQ_GPIO_PINS(74);
 256 DECLARE_APQ_GPIO_PINS(75);
 257 DECLARE_APQ_GPIO_PINS(76);
 258 DECLARE_APQ_GPIO_PINS(77);
 259 DECLARE_APQ_GPIO_PINS(78);
 260 DECLARE_APQ_GPIO_PINS(79);
 261 DECLARE_APQ_GPIO_PINS(80);
 262 DECLARE_APQ_GPIO_PINS(81);
 263 DECLARE_APQ_GPIO_PINS(82);
 264 DECLARE_APQ_GPIO_PINS(83);
 265 DECLARE_APQ_GPIO_PINS(84);
 266 DECLARE_APQ_GPIO_PINS(85);
 267 DECLARE_APQ_GPIO_PINS(86);
 268 DECLARE_APQ_GPIO_PINS(87);
 269 DECLARE_APQ_GPIO_PINS(88);
 270 DECLARE_APQ_GPIO_PINS(89);
 271 DECLARE_APQ_GPIO_PINS(90);
 272 DECLARE_APQ_GPIO_PINS(91);
 273 DECLARE_APQ_GPIO_PINS(92);
 274 DECLARE_APQ_GPIO_PINS(93);
 275 DECLARE_APQ_GPIO_PINS(94);
 276 DECLARE_APQ_GPIO_PINS(95);
 277 DECLARE_APQ_GPIO_PINS(96);
 278 DECLARE_APQ_GPIO_PINS(97);
 279 DECLARE_APQ_GPIO_PINS(98);
 280 DECLARE_APQ_GPIO_PINS(99);
 281 DECLARE_APQ_GPIO_PINS(100);
 282 DECLARE_APQ_GPIO_PINS(101);
 283 DECLARE_APQ_GPIO_PINS(102);
 284 DECLARE_APQ_GPIO_PINS(103);
 285 DECLARE_APQ_GPIO_PINS(104);
 286 DECLARE_APQ_GPIO_PINS(105);
 287 DECLARE_APQ_GPIO_PINS(106);
 288 DECLARE_APQ_GPIO_PINS(107);
 289 DECLARE_APQ_GPIO_PINS(108);
 290 DECLARE_APQ_GPIO_PINS(109);
 291 DECLARE_APQ_GPIO_PINS(110);
 292 DECLARE_APQ_GPIO_PINS(111);
 293 DECLARE_APQ_GPIO_PINS(112);
 294 DECLARE_APQ_GPIO_PINS(113);
 295 DECLARE_APQ_GPIO_PINS(114);
 296 DECLARE_APQ_GPIO_PINS(115);
 297 DECLARE_APQ_GPIO_PINS(116);
 298 DECLARE_APQ_GPIO_PINS(117);
 299 DECLARE_APQ_GPIO_PINS(118);
 300 DECLARE_APQ_GPIO_PINS(119);
 301 DECLARE_APQ_GPIO_PINS(120);
 302 DECLARE_APQ_GPIO_PINS(121);
 303 DECLARE_APQ_GPIO_PINS(122);
 304 DECLARE_APQ_GPIO_PINS(123);
 305 DECLARE_APQ_GPIO_PINS(124);
 306 DECLARE_APQ_GPIO_PINS(125);
 307 DECLARE_APQ_GPIO_PINS(126);
 308 DECLARE_APQ_GPIO_PINS(127);
 309 DECLARE_APQ_GPIO_PINS(128);
 310 DECLARE_APQ_GPIO_PINS(129);
 311 DECLARE_APQ_GPIO_PINS(130);
 312 DECLARE_APQ_GPIO_PINS(131);
 313 DECLARE_APQ_GPIO_PINS(132);
 314 DECLARE_APQ_GPIO_PINS(133);
 315 DECLARE_APQ_GPIO_PINS(134);
 316 DECLARE_APQ_GPIO_PINS(135);
 317 DECLARE_APQ_GPIO_PINS(136);
 318 DECLARE_APQ_GPIO_PINS(137);
 319 DECLARE_APQ_GPIO_PINS(138);
 320 DECLARE_APQ_GPIO_PINS(139);
 321 DECLARE_APQ_GPIO_PINS(140);
 322 DECLARE_APQ_GPIO_PINS(141);
 323 DECLARE_APQ_GPIO_PINS(142);
 324 DECLARE_APQ_GPIO_PINS(143);
 325 DECLARE_APQ_GPIO_PINS(144);
 326 DECLARE_APQ_GPIO_PINS(145);
 327 DECLARE_APQ_GPIO_PINS(146);
 328
 329 static const unsigned int sdc1_clk_pins[] = { 147 };
 330 static const unsigned int sdc1_cmd_pins[] = { 148 };
 331 static const unsigned int sdc1_data_pins[] = { 149 };
 332 static const unsigned int sdc2_clk_pins[] = { 150 };
 333 static const unsigned int sdc2_cmd_pins[] = { 151 };
 334 static const unsigned int sdc2_data_pins[] = { 152 };
 335
 336 #define FUNCTION(fname)                                 \
 337         [APQ_MUX_##fname] = {                           \
 338                 .name = #fname,                         \
 339                 .groups = fname##_groups,               \
 340                 .ngroups = ARRAY_SIZE(fname##_groups),  \
 341         }
 342
 343 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7)        \
 344         {                                               \
 345                 .name = "gpio" #id,                     \
 346                 .pins = gpio##id##_pins,                \
 347                 .npins = ARRAY_SIZE(gpio##id##_pins),   \
 348                 .funcs = (int[]){                       \
 349                         APQ_MUX_gpio,                   \
 350                         APQ_MUX_##f1,                   \
 351                         APQ_MUX_##f2,                   \
 352                         APQ_MUX_##f3,                   \
 353                         APQ_MUX_##f4,                   \
 354                         APQ_MUX_##f5,                   \
 355                         APQ_MUX_##f6,                   \
 356                         APQ_MUX_##f7                    \
 357                 },                                      \
 358                 .nfuncs = 8,                            \
 359                 .ctl_reg = 0x1000 + 0x10 * id,          \
 360                 .io_reg = 0x1004 + 0x10 * id,           \
 361                 .intr_cfg_reg = 0x1008 + 0x10 * id,     \
 362                 .intr_status_reg = 0x100c + 0x10 * id,  \
 363                 .intr_target_reg = 0x1008 + 0x10 * id,  \
 364                 .mux_bit = 2,                           \
 365                 .pull_bit = 0,                          \
 366                 .drv_bit = 6,                           \
 367                 .oe_bit = 9,                            \
 368                 .in_bit = 0,                            \
 369                 .out_bit = 1,                           \
 370                 .intr_enable_bit = 0,                   \
 371                 .intr_status_bit = 0,                   \
 372                 .intr_ack_high = 0,                     \
 373                 .intr_target_bit = 5,                   \
 374                 .intr_target_kpss_val = 3,              \
 375                 .intr_raw_status_bit = 4,               \
 376                 .intr_polarity_bit = 1,                 \
 377                 .intr_detection_bit = 2,                \
 378                 .intr_detection_width = 2,              \
 379         }
 380
 381 #define SDC_PINGROUP(pg_name, ctl, pull, drv)           \
 382         {                                               \
 383                 .name = #pg_name,                       \
 384                 .pins = pg_name##_pins,                 \
 385                 .npins = ARRAY_SIZE(pg_name##_pins),    \
 386                 .ctl_reg = ctl,                         \
 387                 .io_reg = 0,                            \
 388                 .intr_cfg_reg = 0,                      \
 389                 .intr_status_reg = 0,                   \
 390                 .intr_target_reg = 0,                   \
 391                 .mux_bit = -1,                          \
 392                 .pull_bit = pull,                       \
 393                 .drv_bit = drv,                         \
 394                 .oe_bit = -1,                           \
 395                 .in_bit = -1,                           \
 396                 .out_bit = -1,                          \
 397                 .intr_enable_bit = -1,                  \
 398                 .intr_status_bit = -1,                  \
 399                 .intr_target_bit = -1,                  \
 400                 .intr_target_kpss_val = -1,             \
 401                 .intr_raw_status_bit = -1,              \
 402                 .intr_polarity_bit = -1,                \
 403                 .intr_detection_bit = -1,               \
 404                 .intr_detection_width = -1,             \
 405         }
 406
 407 enum apq8084_functions {
 408         APQ_MUX_adsp_ext,
 409         APQ_MUX_audio_ref,
 410         APQ_MUX_blsp_i2c1,
 411         APQ_MUX_blsp_i2c2,
 412         APQ_MUX_blsp_i2c3,
 413         APQ_MUX_blsp_i2c4,
 414         APQ_MUX_blsp_i2c5,
 415         APQ_MUX_blsp_i2c6,
 416         APQ_MUX_blsp_i2c7,
 417         APQ_MUX_blsp_i2c8,
 418         APQ_MUX_blsp_i2c9,
 419         APQ_MUX_blsp_i2c10,
 420         APQ_MUX_blsp_i2c11,
 421         APQ_MUX_blsp_i2c12,
 422         APQ_MUX_blsp_spi1,
 423         APQ_MUX_blsp_spi1_cs1,
 424         APQ_MUX_blsp_spi1_cs2,
 425         APQ_MUX_blsp_spi1_cs3,
 426         APQ_MUX_blsp_spi2,
 427         APQ_MUX_blsp_spi3,
 428         APQ_MUX_blsp_spi3_cs1,
 429         APQ_MUX_blsp_spi3_cs2,
 430         APQ_MUX_blsp_spi3_cs3,
 431         APQ_MUX_blsp_spi4,
 432         APQ_MUX_blsp_spi5,
 433         APQ_MUX_blsp_spi6,
 434         APQ_MUX_blsp_spi7,
 435         APQ_MUX_blsp_spi8,
 436         APQ_MUX_blsp_spi9,
 437         APQ_MUX_blsp_spi10,
 438         APQ_MUX_blsp_spi10_cs1,
 439         APQ_MUX_blsp_spi10_cs2,
 440         APQ_MUX_blsp_spi10_cs3,
 441         APQ_MUX_blsp_spi11,
 442         APQ_MUX_blsp_spi12,
 443         APQ_MUX_blsp_uart1,
 444         APQ_MUX_blsp_uart2,
 445         APQ_MUX_blsp_uart3,
 446         APQ_MUX_blsp_uart4,
 447         APQ_MUX_blsp_uart5,
 448         APQ_MUX_blsp_uart6,
 449         APQ_MUX_blsp_uart7,
 450         APQ_MUX_blsp_uart8,
 451         APQ_MUX_blsp_uart9,
 452         APQ_MUX_blsp_uart10,
 453         APQ_MUX_blsp_uart11,
 454         APQ_MUX_blsp_uart12,
 455         APQ_MUX_blsp_uim1,
 456         APQ_MUX_blsp_uim2,
 457         APQ_MUX_blsp_uim3,
 458         APQ_MUX_blsp_uim4,
 459         APQ_MUX_blsp_uim5,
 460         APQ_MUX_blsp_uim6,
 461         APQ_MUX_blsp_uim7,
 462         APQ_MUX_blsp_uim8,
 463         APQ_MUX_blsp_uim9,
 464         APQ_MUX_blsp_uim10,
 465         APQ_MUX_blsp_uim11,
 466         APQ_MUX_blsp_uim12,
 467         APQ_MUX_cam_mclk0,
 468         APQ_MUX_cam_mclk1,
 469         APQ_MUX_cam_mclk2,
 470         APQ_MUX_cam_mclk3,
 471         APQ_MUX_cci_async,
 472         APQ_MUX_cci_async_in0,
 473         APQ_MUX_cci_i2c0,
 474         APQ_MUX_cci_i2c1,
 475         APQ_MUX_cci_timer0,
 476         APQ_MUX_cci_timer1,
 477         APQ_MUX_cci_timer2,
 478         APQ_MUX_cci_timer3,
 479         APQ_MUX_cci_timer4,
 480         APQ_MUX_edp_hpd,
 481         APQ_MUX_gcc_gp1,
 482         APQ_MUX_gcc_gp2,
 483         APQ_MUX_gcc_gp3,
 484         APQ_MUX_gcc_obt,
 485         APQ_MUX_gcc_vtt,
 486         APQ_MUX_gp_mn,
 487         APQ_MUX_gp_pdm0,
 488         APQ_MUX_gp_pdm1,
 489         APQ_MUX_gp_pdm2,
 490         APQ_MUX_gp0_clk,
 491         APQ_MUX_gp1_clk,
 492         APQ_MUX_gpio,
 493         APQ_MUX_hdmi_cec,
 494         APQ_MUX_hdmi_ddc,
 495         APQ_MUX_hdmi_dtest,
 496         APQ_MUX_hdmi_hpd,
 497         APQ_MUX_hdmi_rcv,
 498         APQ_MUX_hsic,
 499         APQ_MUX_ldo_en,
 500         APQ_MUX_ldo_update,
 501         APQ_MUX_mdp_vsync,
 502         APQ_MUX_pci_e0,
 503         APQ_MUX_pci_e0_n,
 504         APQ_MUX_pci_e0_rst,
 505         APQ_MUX_pci_e1,
 506         APQ_MUX_pci_e1_rst,
 507         APQ_MUX_pci_e1_rst_n,
 508         APQ_MUX_pci_e1_clkreq_n,
 509         APQ_MUX_pri_mi2s,
 510         APQ_MUX_qua_mi2s,
 511         APQ_MUX_sata_act,
 512         APQ_MUX_sata_devsleep,
 513         APQ_MUX_sata_devsleep_n,
 514         APQ_MUX_sd_write,
 515         APQ_MUX_sdc_emmc_mode,
 516         APQ_MUX_sdc3,
 517         APQ_MUX_sdc4,
 518         APQ_MUX_sec_mi2s,
 519         APQ_MUX_slimbus,
 520         APQ_MUX_spdif_tx,
 521         APQ_MUX_spkr_i2s,
 522         APQ_MUX_spkr_i2s_ws,
 523         APQ_MUX_spss_geni,
 524         APQ_MUX_ter_mi2s,
 525         APQ_MUX_tsif1,
 526         APQ_MUX_tsif2,
 527         APQ_MUX_uim,
 528         APQ_MUX_uim_batt_alarm,
 529         APQ_MUX_NA,
 530 };
 531
 532 static const char * const gpio_groups[] = {
 533         "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
 534         "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
 535         "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
 536         "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
 537         "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
 538         "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
 539         "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
 540         "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
 541         "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
 542         "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
 543         "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
 544         "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
 545         "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
 546         "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
 547         "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
 548         "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
 549         "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
 550         "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
 551         "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
 552         "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
 553         "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
 554         "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146"
 555 };
 556
 557 static const char * const adsp_ext_groups[] = {
 558         "gpio34"
 559 };
 560 static const char * const audio_ref_groups[] = {
 561         "gpio100"
 562 };
 563 static const char * const blsp_i2c1_groups[] = {
 564         "gpio2", "gpio3"
 565 };
 566 static const char * const blsp_i2c2_groups[] = {
 567         "gpio6", "gpio7"
 568 };
 569 static const char * const blsp_i2c3_groups[] = {
 570         "gpio10", "gpio11"
 571 };
 572 static const char * const blsp_i2c4_groups[] = {
 573         "gpio29", "gpio30"
 574 };
 575 static const char * const blsp_i2c5_groups[] = {
 576         "gpio41", "gpio42"
 577 };
 578 static const char * const blsp_i2c6_groups[] = {
 579         "gpio45", "gpio46"
 580 };
 581 static const char * const blsp_i2c7_groups[] = {
 582         "gpio132", "gpio133"
 583 };
 584 static const char * const blsp_i2c8_groups[] = {
 585         "gpio53", "gpio54"
 586 };
 587 static const char * const blsp_i2c9_groups[] = {
 588         "gpio57", "gpio58"
 589 };
 590 static const char * const blsp_i2c10_groups[] = {
 591         "gpio61", "gpio62"
 592 };
 593 static const char * const blsp_i2c11_groups[] = {
 594         "gpio65", "gpio66"
 595 };
 596 static const char * const blsp_i2c12_groups[] = {
 597         "gpio49", "gpio50"
 598 };
 599 static const char * const blsp_spi1_groups[] = {
 600         "gpio0", "gpio1", "gpio2", "gpio3"
 601 };
 602 static const char * const blsp_spi2_groups[] = {
 603         "gpio4", "gpio5", "gpio6", "gpio7"
 604 };
 605 static const char * const blsp_spi3_groups[] = {
 606         "gpio8", "gpio9", "gpio10", "gpio11"
 607 };
 608 static const char * const blsp_spi4_groups[] = {
 609         "gpio27", "gpio28", "gpio29", "gpio30"
 610 };
 611 static const char * const blsp_spi5_groups[] = {
 612         "gpio39", "gpio40", "gpio41", "gpio42"
 613 };
 614 static const char * const blsp_spi6_groups[] = {
 615         "gpio43", "gpio44", "gpio45", "gpio46"
 616 };
 617 static const char * const blsp_spi7_groups[] = {
 618         "gpio130", "gpio131", "gpio132", "gpio133"
 619 };
 620 static const char * const blsp_spi8_groups[] = {
 621         "gpio51", "gpio52", "gpio53", "gpio54"
 622 };
 623 static const char * const blsp_spi9_groups[] = {
 624         "gpio55", "gpio56", "gpio57", "gpio58"
 625 };
 626 static const char * const blsp_spi10_groups[] = {
 627         "gpio59", "gpio60", "gpio61", "gpio62"
 628 };
 629 static const char * const blsp_spi11_groups[] = {
 630         "gpio63", "gpio64", "gpio65", "gpio66"
 631 };
 632 static const char * const blsp_spi12_groups[] = {
 633         "gpio47", "gpio48", "gpio49", "gpio50"
 634 };
 635 static const char * const blsp_uart1_groups[] = {
 636         "gpio0", "gpio1", "gpio2", "gpio3"
 637 };
 638 static const char * const blsp_uart2_groups[] = {
 639         "gpio4", "gpio5", "gpio6", "gpio7"
 640 };
 641 static const char * const blsp_uart3_groups[] = {
 642         "gpio8"
 643 };
 644 static const char * const blsp_uart4_groups[] = {
 645         "gpio27", "gpio28", "gpio29", "gpio30"
 646 };
 647 static const char * const blsp_uart5_groups[] = {
 648         "gpio39", "gpio40", "gpio41", "gpio42"
 649 };
 650 static const char * const blsp_uart6_groups[] = {
 651         "gpio43", "gpio44", "gpio45", "gpio46"
 652 };
 653 static const char * const blsp_uart7_groups[] = {
 654         "gpio130", "gpio131", "gpio132", "gpio133"
 655 };
 656 static const char * const blsp_uart8_groups[] = {
 657         "gpio51", "gpio52", "gpio53", "gpio54"
 658 };
 659 static const char * const blsp_uart9_groups[] = {
 660         "gpio55", "gpio56", "gpio57", "gpio58"
 661 };
 662 static const char * const blsp_uart10_groups[] = {
 663         "gpio59", "gpio60", "gpio61", "gpio62"
 664 };
 665 static const char * const blsp_uart11_groups[] = {
 666         "gpio63", "gpio64", "gpio65", "gpio66"
 667 };
 668 static const char * const blsp_uart12_groups[] = {
 669         "gpio47", "gpio48", "gpio49", "gpio50"
 670 };
 671 static const char * const blsp_uim1_groups[] = {
 672         "gpio0", "gpio1"
 673 };
 674 static const char * const blsp_uim2_groups[] = {
 675         "gpio4", "gpio5"
 676 };
 677 static const char * const blsp_uim3_groups[] = {
 678         "gpio8", "gpio9"
 679 };
 680 static const char * const blsp_uim4_groups[] = {
 681         "gpio27", "gpio28"
 682 };
 683 static const char * const blsp_uim5_groups[] = {
 684         "gpio39", "gpio40"
 685 };
 686 static const char * const blsp_uim6_groups[] = {
 687         "gpio43", "gpio44"
 688 };
 689 static const char * const blsp_uim7_groups[] = {
 690         "gpio130", "gpio131"
 691 };
 692 static const char * const blsp_uim8_groups[] = {
 693         "gpio51", "gpio52"
 694 };
 695 static const char * const blsp_uim9_groups[] = {
 696         "gpio55", "gpio56"
 697 };
 698 static const char * const blsp_uim10_groups[] = {
 699         "gpio59", "gpio60"
 700 };
 701 static const char * const blsp_uim11_groups[] = {
 702         "gpio63", "gpio64"
 703 };
 704 static const char * const blsp_uim12_groups[] = {
 705         "gpio47", "gpio48"
 706 };
 707 static const char * const blsp_spi1_cs1_groups[] = {
 708         "gpio116"
 709 };
 710 static const char * const blsp_spi1_cs2_groups[] = {
 711         "gpio117"
 712 };
 713 static const char * const blsp_spi1_cs3_groups[] = {
 714         "gpio118"
 715 };
 716 static const char * const blsp_spi3_cs1_groups[] = {
 717         "gpio67"
 718 };
 719 static const char * const blsp_spi3_cs2_groups[] = {
 720         "gpio71"
 721 };
 722 static const char * const blsp_spi3_cs3_groups[] = {
 723         "gpio72"
 724 };
 725 static const char * const blsp_spi10_cs1_groups[] = {
 726         "gpio106"
 727 };
 728 static const char * const blsp_spi10_cs2_groups[] = {
 729         "gpio111"
 730 };
 731 static const char * const blsp_spi10_cs3_groups[] = {
 732         "gpio128"
 733 };
 734 static const char * const cam_mclk0_groups[] = {
 735         "gpio15"
 736 };
 737 static const char * const cam_mclk1_groups[] = {
 738         "gpio16"
 739 };
 740 static const char * const cam_mclk2_groups[] = {
 741         "gpio17"
 742 };
 743 static const char * const cam_mclk3_groups[] = {
 744         "gpio18"
 745 };
 746 static const char * const cci_async_groups[] = {
 747         "gpio26", "gpio119"
 748 };
 749 static const char * const cci_async_in0_groups[] = {
 750         "gpio120"
 751 };
 752 static const char * const cci_i2c0_groups[] = {
 753         "gpio19", "gpio20"
 754 };
 755 static const char * const cci_i2c1_groups[] = {
 756         "gpio21", "gpio22"
 757 };
 758 static const char * const cci_timer0_groups[] = {
 759         "gpio23"
 760 };
 761 static const char * const cci_timer1_groups[] = {
 762         "gpio24"
 763 };
 764 static const char * const cci_timer2_groups[] = {
 765         "gpio25"
 766 };
 767 static const char * const cci_timer3_groups[] = {
 768         "gpio26"
 769 };
 770 static const char * const cci_timer4_groups[] = {
 771         "gpio119"
 772 };
 773 static const char * const edp_hpd_groups[] = {
 774         "gpio103"
 775 };
 776 static const char * const gcc_gp1_groups[] = {
 777         "gpio37"
 778 };
 779 static const char * const gcc_gp2_groups[] = {
 780         "gpio38"
 781 };
 782 static const char * const gcc_gp3_groups[] = {
 783         "gpio86"
 784 };
 785 static const char * const gcc_obt_groups[] = {
 786         "gpio127"
 787 };
 788 static const char * const gcc_vtt_groups[] = {
 789         "gpio126"
 790 };
 791 static const char * const gp_mn_groups[] = {
 792         "gpio29"
 793 };
 794 static const char * const gp_pdm0_groups[] = {
 795         "gpio48", "gpio83"
 796 };
 797 static const char * const gp_pdm1_groups[] = {
 798         "gpio84", "gpio101"
 799 };
 800 static const char * const gp_pdm2_groups[] = {
 801         "gpio85", "gpio110"
 802 };
 803 static const char * const gp0_clk_groups[] = {
 804         "gpio25"
 805 };
 806 static const char * const gp1_clk_groups[] = {
 807         "gpio26"
 808 };
 809 static const char * const hdmi_cec_groups[] = {
 810         "gpio31"
 811 };
 812 static const char * const hdmi_ddc_groups[] = {
 813         "gpio32", "gpio33"
 814 };
 815 static const char * const hdmi_dtest_groups[] = {
 816         "gpio123"
 817 };
 818 static const char * const hdmi_hpd_groups[] = {
 819         "gpio34"
 820 };
 821 static const char * const hdmi_rcv_groups[] = {
 822         "gpio125"
 823 };
 824 static const char * const hsic_groups[] = {
 825         "gpio134", "gpio135"
 826 };
 827 static const char * const ldo_en_groups[] = {
 828         "gpio124"
 829 };
 830 static const char * const ldo_update_groups[] = {
 831         "gpio125"
 832 };
 833 static const char * const mdp_vsync_groups[] = {
 834         "gpio12", "gpio13", "gpio14"
 835 };
 836 static const char * const pci_e0_groups[] = {
 837         "gpio68", "gpio70"
 838 };
 839 static const char * const pci_e0_n_groups[] = {
 840         "gpio68", "gpio70"
 841 };
 842 static const char * const pci_e0_rst_groups[] = {
 843         "gpio70"
 844 };
 845 static const char * const pci_e1_groups[] = {
 846         "gpio140"
 847 };
 848 static const char * const pci_e1_rst_groups[] = {
 849         "gpio140"
 850 };
 851 static const char * const pci_e1_rst_n_groups[] = {
 852         "gpio140"
 853 };
 854 static const char * const pci_e1_clkreq_n_groups[] = {
 855         "gpio141"
 856 };
 857 static const char * const pri_mi2s_groups[] = {
 858         "gpio76", "gpio77", "gpio78", "gpio79", "gpio80"
 859 };
 860 static const char * const qua_mi2s_groups[] = {
 861         "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97"
 862 };
 863 static const char * const sata_act_groups[] = {
 864         "gpio129"
 865 };
 866 static const char * const sata_devsleep_groups[] = {
 867         "gpio119"
 868 };
 869 static const char * const sata_devsleep_n_groups[] = {
 870         "gpio119"
 871 };
 872 static const char * const sd_write_groups[] = {
 873         "gpio75"
 874 };
 875 static const char * const sdc_emmc_mode_groups[] = {
 876         "gpio146"
 877 };
 878 static const char * const sdc3_groups[] = {
 879         "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", "gpio72"
 880 };
 881 static const char * const sdc4_groups[] = {
 882         "gpio82", "gpio83", "gpio84", "gpio85", "gpio86",
 883         "gpio91", "gpio95", "gpio96", "gpio97", "gpio101"
 884 };
 885 static const char * const sec_mi2s_groups[] = {
 886         "gpio81", "gpio82", "gpio83", "gpio84", "gpio85"
 887 };
 888 static const char * const slimbus_groups[] = {
 889         "gpio98", "gpio99"
 890 };
 891 static const char * const spdif_tx_groups[] = {
 892         "gpio124", "gpio136", "gpio142"
 893 };
 894 static const char * const spkr_i2s_groups[] = {
 895         "gpio98", "gpio99", "gpio100"
 896 };
 897 static const char * const spkr_i2s_ws_groups[] = {
 898         "gpio104"
 899 };
 900 static const char * const spss_geni_groups[] = {
 901         "gpio8", "gpio9"
 902 };
 903 static const char * const ter_mi2s_groups[] = {
 904         "gpio86", "gpio87", "gpio88", "gpio89", "gpio90"
 905 };
 906 static const char * const tsif1_groups[] = {
 907         "gpio82", "gpio83", "gpio84", "gpio85", "gpio86"
 908 };
 909 static const char * const tsif2_groups[] = {
 910         "gpio91", "gpio95", "gpio96", "gpio97", "gpio101"
 911 };
 912 static const char * const uim_groups[] = {
 913         "gpio130", "gpio131", "gpio132", "gpio133"
 914 };
 915 static const char * const uim_batt_alarm_groups[] = {
 916         "gpio102"
 917 };
 918 static const struct msm_function apq8084_functions[] = {
 919         FUNCTION(adsp_ext),
 920         FUNCTION(audio_ref),
 921         FUNCTION(blsp_i2c1),
 922         FUNCTION(blsp_i2c2),
 923         FUNCTION(blsp_i2c3),
 924         FUNCTION(blsp_i2c4),
 925         FUNCTION(blsp_i2c5),
 926         FUNCTION(blsp_i2c6),
 927         FUNCTION(blsp_i2c7),
 928         FUNCTION(blsp_i2c8),
 929         FUNCTION(blsp_i2c9),
 930         FUNCTION(blsp_i2c10),
 931         FUNCTION(blsp_i2c11),
 932         FUNCTION(blsp_i2c12),
 933         FUNCTION(blsp_spi1),
 934         FUNCTION(blsp_spi1_cs1),
 935         FUNCTION(blsp_spi1_cs2),
 936         FUNCTION(blsp_spi1_cs3),
 937         FUNCTION(blsp_spi2),
 938         FUNCTION(blsp_spi3),
 939         FUNCTION(blsp_spi3_cs1),
 940         FUNCTION(blsp_spi3_cs2),
 941         FUNCTION(blsp_spi3_cs3),
 942         FUNCTION(blsp_spi4),
 943         FUNCTION(blsp_spi5),
 944         FUNCTION(blsp_spi6),
 945         FUNCTION(blsp_spi7),
 946         FUNCTION(blsp_spi8),
 947         FUNCTION(blsp_spi9),
 948         FUNCTION(blsp_spi10),
 949         FUNCTION(blsp_spi10_cs1),
 950         FUNCTION(blsp_spi10_cs2),
 951         FUNCTION(blsp_spi10_cs3),
 952         FUNCTION(blsp_spi11),
 953         FUNCTION(blsp_spi12),
 954         FUNCTION(blsp_uart1),
 955         FUNCTION(blsp_uart2),
 956         FUNCTION(blsp_uart3),
 957         FUNCTION(blsp_uart4),
 958         FUNCTION(blsp_uart5),
 959         FUNCTION(blsp_uart6),
 960         FUNCTION(blsp_uart7),
 961         FUNCTION(blsp_uart8),
 962         FUNCTION(blsp_uart9),
 963         FUNCTION(blsp_uart10),
 964         FUNCTION(blsp_uart11),
 965         FUNCTION(blsp_uart12),
 966         FUNCTION(blsp_uim1),
 967         FUNCTION(blsp_uim2),
 968         FUNCTION(blsp_uim3),
 969         FUNCTION(blsp_uim4),
 970         FUNCTION(blsp_uim5),
 971         FUNCTION(blsp_uim6),
 972         FUNCTION(blsp_uim7),
 973         FUNCTION(blsp_uim8),
 974         FUNCTION(blsp_uim9),
 975         FUNCTION(blsp_uim10),
 976         FUNCTION(blsp_uim11),
 977         FUNCTION(blsp_uim12),
 978         FUNCTION(cam_mclk0),
 979         FUNCTION(cam_mclk1),
 980         FUNCTION(cam_mclk2),
 981         FUNCTION(cam_mclk3),
 982         FUNCTION(cci_async),
 983         FUNCTION(cci_async_in0),
 984         FUNCTION(cci_i2c0),
 985         FUNCTION(cci_i2c1),
 986         FUNCTION(cci_timer0),
 987         FUNCTION(cci_timer1),
 988         FUNCTION(cci_timer2),
 989         FUNCTION(cci_timer3),
 990         FUNCTION(cci_timer4),
 991         FUNCTION(edp_hpd),
 992         FUNCTION(gcc_gp1),
 993         FUNCTION(gcc_gp2),
 994         FUNCTION(gcc_gp3),
 995         FUNCTION(gcc_obt),
 996         FUNCTION(gcc_vtt),
 997         FUNCTION(gp_mn),
 998         FUNCTION(gp_pdm0),
 999         FUNCTION(gp_pdm1),
1000         FUNCTION(gp_pdm2),
1001         FUNCTION(gp0_clk),
1002         FUNCTION(gp1_clk),
1003         FUNCTION(gpio),
1004         FUNCTION(hdmi_cec),
1005         FUNCTION(hdmi_ddc),
1006         FUNCTION(hdmi_dtest),
1007         FUNCTION(hdmi_hpd),
1008         FUNCTION(hdmi_rcv),
1009         FUNCTION(hsic),
1010         FUNCTION(ldo_en),
1011         FUNCTION(ldo_update),
1012         FUNCTION(mdp_vsync),
1013         FUNCTION(pci_e0),
1014         FUNCTION(pci_e0_n),
1015         FUNCTION(pci_e0_rst),
1016         FUNCTION(pci_e1),
1017         FUNCTION(pci_e1_rst),
1018         FUNCTION(pci_e1_rst_n),
1019         FUNCTION(pci_e1_clkreq_n),
1020         FUNCTION(pri_mi2s),
1021         FUNCTION(qua_mi2s),
1022         FUNCTION(sata_act),
1023         FUNCTION(sata_devsleep),
1024         FUNCTION(sata_devsleep_n),
1025         FUNCTION(sd_write),
1026         FUNCTION(sdc_emmc_mode),
1027         FUNCTION(sdc3),
1028         FUNCTION(sdc4),
1029         FUNCTION(sec_mi2s),
1030         FUNCTION(slimbus),
1031         FUNCTION(spdif_tx),
1032         FUNCTION(spkr_i2s),
1033         FUNCTION(spkr_i2s_ws),
1034         FUNCTION(spss_geni),
1035         FUNCTION(ter_mi2s),
1036         FUNCTION(tsif1),
1037         FUNCTION(tsif2),
1038         FUNCTION(uim),
1039         FUNCTION(uim_batt_alarm),
1040 };
1041
1042 static const struct msm_pingroup apq8084_groups[] = {
1043         PINGROUP(0,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
1044         PINGROUP(1,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
1045         PINGROUP(2,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
1046         PINGROUP(3,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
1047         PINGROUP(4,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
1048         PINGROUP(5,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
1049         PINGROUP(6,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
1050         PINGROUP(7,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
1051         PINGROUP(8,   blsp_spi3, blsp_uart3, blsp_uim3, spss_geni, NA, NA, NA),
1052         PINGROUP(9,   blsp_spi3, blsp_uim3, blsp_uart3, spss_geni, NA, NA, NA),
1053         PINGROUP(10,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
1054         PINGROUP(11,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
1055         PINGROUP(12,  mdp_vsync, NA, NA, NA, NA, NA, NA),
1056         PINGROUP(13,  mdp_vsync, NA, NA, NA, NA, NA, NA),
1057         PINGROUP(14,  mdp_vsync, NA, NA, NA, NA, NA, NA),
1058         PINGROUP(15,  cam_mclk0, NA, NA, NA, NA, NA, NA),
1059         PINGROUP(16,  cam_mclk1, NA, NA, NA, NA, NA, NA),
1060         PINGROUP(17,  cam_mclk2, NA, NA, NA, NA, NA, NA),
1061         PINGROUP(18,  cam_mclk3, NA, NA, NA, NA, NA, NA),
1062         PINGROUP(19,  cci_i2c0, NA, NA, NA, NA, NA, NA),
1063         PINGROUP(20,  cci_i2c0, NA, NA, NA, NA, NA, NA),
1064         PINGROUP(21,  cci_i2c1, NA, NA, NA, NA, NA, NA),
1065         PINGROUP(22,  cci_i2c1, NA, NA, NA, NA, NA, NA),
1066         PINGROUP(23,  cci_timer0, NA, NA, NA, NA, NA, NA),
1067         PINGROUP(24,  cci_timer1, NA, NA, NA, NA, NA, NA),
1068         PINGROUP(25,  cci_timer2, gp0_clk, NA, NA, NA, NA, NA),
1069         PINGROUP(26,  cci_timer3, cci_async, gp1_clk, NA, NA, NA, NA),
1070         PINGROUP(27,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
1071         PINGROUP(28,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
1072         PINGROUP(29,  blsp_spi4, blsp_uart4, blsp_i2c4, gp_mn, NA, NA, NA),
1073         PINGROUP(30,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
1074         PINGROUP(31,  hdmi_cec, NA, NA, NA, NA, NA, NA),
1075         PINGROUP(32,  hdmi_ddc, NA, NA, NA, NA, NA, NA),
1076         PINGROUP(33,  hdmi_ddc, NA, NA, NA, NA, NA, NA),
1077         PINGROUP(34,  hdmi_hpd, NA, adsp_ext, NA, NA, NA, NA),
1078         PINGROUP(35,  NA, NA, NA, NA, NA, NA, NA),
1079         PINGROUP(36,  NA, NA, NA, NA, NA, NA, NA),
1080         PINGROUP(37,  gcc_gp1, NA, NA, NA, NA, NA, NA),
1081         PINGROUP(38,  gcc_gp2, NA, NA, NA, NA, NA, NA),
1082         PINGROUP(39,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
1083         PINGROUP(40,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
1084         PINGROUP(41,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
1085         PINGROUP(42,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
1086         PINGROUP(43,  blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA, NA),
1087         PINGROUP(44,  blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA, NA),
1088         PINGROUP(45,  blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
1089         PINGROUP(46,  blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
1090         PINGROUP(47,  blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, NA, NA),
1091         PINGROUP(48,  blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm0, NA, NA, NA),
1092         PINGROUP(49,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
1093         PINGROUP(50,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
1094         PINGROUP(51,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
1095         PINGROUP(52,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
1096         PINGROUP(53,  blsp_spi8, blsp_uart8, blsp_i2c8, NA, NA, NA, NA),
1097         PINGROUP(54,  blsp_spi8, blsp_uart8, blsp_i2c8, NA, NA, NA, NA),
1098         PINGROUP(55,  blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA),
1099         PINGROUP(56,  blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA),
1100         PINGROUP(57,  blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA),
1101         PINGROUP(58,  blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA),
1102         PINGROUP(59,  blsp_spi10, blsp_uart10, blsp_uim10, NA, NA, NA, NA),
1103         PINGROUP(60,  blsp_spi10, blsp_uart10, blsp_uim10, NA, NA, NA, NA),
1104         PINGROUP(61,  blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
1105         PINGROUP(62,  blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
1106         PINGROUP(63,  blsp_spi11, blsp_uart11, blsp_uim11, NA, NA, NA, NA),
1107         PINGROUP(64,  blsp_spi11, blsp_uart11, blsp_uim11, NA, NA, NA, NA),
1108         PINGROUP(65,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
1109         PINGROUP(66,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
1110         PINGROUP(67,  sdc3, blsp_spi3_cs1, NA, NA, NA, NA, NA),
1111         PINGROUP(68,  sdc3, pci_e0, NA, NA, NA, NA, NA),
1112         PINGROUP(69,  sdc3, NA, NA, NA, NA, NA, NA),
1113         PINGROUP(70,  sdc3, pci_e0_n, pci_e0, NA, NA, NA, NA),
1114         PINGROUP(71,  sdc3, blsp_spi3_cs2, NA, NA, NA, NA, NA),
1115         PINGROUP(72,  sdc3, blsp_spi3_cs3, NA, NA, NA, NA, NA),
1116         PINGROUP(73,  NA, NA, NA, NA, NA, NA, NA),
1117         PINGROUP(74,  NA, NA, NA, NA, NA, NA, NA),
1118         PINGROUP(75,  sd_write, NA, NA, NA, NA, NA, NA),
1119         PINGROUP(76,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1120         PINGROUP(77,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1121         PINGROUP(78,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1122         PINGROUP(79,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1123         PINGROUP(80,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1124         PINGROUP(81,  sec_mi2s, NA, NA, NA, NA, NA, NA),
1125         PINGROUP(82,  sec_mi2s, sdc4, tsif1, NA, NA, NA, NA),
1126         PINGROUP(83,  sec_mi2s, sdc4, tsif1, NA, NA, NA, gp_pdm0),
1127         PINGROUP(84,  sec_mi2s, sdc4, tsif1, NA, NA, NA, gp_pdm1),
1128         PINGROUP(85,  sec_mi2s, sdc4, tsif1, NA, gp_pdm2, NA, NA),
1129         PINGROUP(86,  ter_mi2s, sdc4, tsif1, NA, NA, NA, gcc_gp3),
1130         PINGROUP(87,  ter_mi2s, NA, NA, NA, NA, NA, NA),
1131         PINGROUP(88,  ter_mi2s, NA, NA, NA, NA, NA, NA),
1132         PINGROUP(89,  ter_mi2s, NA, NA, NA, NA, NA, NA),
1133         PINGROUP(90,  ter_mi2s, NA, NA, NA, NA, NA, NA),
1134         PINGROUP(91,  qua_mi2s, sdc4, tsif2, NA, NA, NA, NA),
1135         PINGROUP(92,  qua_mi2s, NA, NA, NA, NA, NA, NA),
1136         PINGROUP(93,  qua_mi2s, NA, NA, NA, NA, NA, NA),
1137         PINGROUP(94,  qua_mi2s, NA, NA, NA, NA, NA, NA),
1138         PINGROUP(95,  qua_mi2s, sdc4, tsif2, NA, NA, NA, gcc_gp1),
1139         PINGROUP(96,  qua_mi2s, sdc4, tsif2, NA, NA, NA, gcc_gp2),
1140         PINGROUP(97,  qua_mi2s, sdc4, tsif2, NA, gcc_gp3, NA, NA),
1141         PINGROUP(98,  slimbus, spkr_i2s, NA, NA, NA, NA, NA),
1142         PINGROUP(99,  slimbus, spkr_i2s, NA, NA, NA, NA, NA),
1143         PINGROUP(100, audio_ref, spkr_i2s, NA, NA, NA, NA, NA),
1144         PINGROUP(101, sdc4, tsif2, gp_pdm1, NA, NA, NA, NA),
1145         PINGROUP(102, uim_batt_alarm, NA, NA, NA, NA, NA, NA),
1146         PINGROUP(103, edp_hpd, NA, NA, NA, NA, NA, NA),
1147         PINGROUP(104, spkr_i2s, NA, NA, NA, NA, NA, NA),
1148         PINGROUP(105, NA, NA, NA, NA, NA, NA, NA),
1149         PINGROUP(106, blsp_spi10_cs1, NA, NA, NA, NA, NA, NA),
1150         PINGROUP(107, NA, NA, NA, NA, NA, NA, NA),
1151         PINGROUP(108, NA, NA, NA, NA, NA, NA, NA),
1152         PINGROUP(109, NA, NA, NA, NA, NA, NA, NA),
1153         PINGROUP(110, gp_pdm2, NA, NA, NA, NA, NA, NA),
1154         PINGROUP(111, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA),
1155         PINGROUP(112, NA, NA, NA, NA, NA, NA, NA),
1156         PINGROUP(113, NA, NA, NA, NA, NA, NA, NA),
1157         PINGROUP(114, NA, NA, NA, NA, NA, NA, NA),
1158         PINGROUP(115, NA, NA, NA, NA, NA, NA, NA),
1159         PINGROUP(116, blsp_spi1_cs1, NA, NA, NA, NA, NA, NA),
1160         PINGROUP(117, blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
1161         PINGROUP(118, blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
1162         PINGROUP(119, cci_timer4, cci_async, sata_devsleep, sata_devsleep_n, NA, NA, NA),
1163         PINGROUP(120, cci_async, NA, NA, NA, NA, NA, NA),
1164         PINGROUP(121, NA, NA, NA, NA, NA, NA, NA),
1165         PINGROUP(122, NA, NA, NA, NA, NA, NA, NA),
1166         PINGROUP(123, hdmi_dtest, NA, NA, NA, NA, NA, NA),
1167         PINGROUP(124, spdif_tx, ldo_en, NA, NA, NA, NA, NA),
1168         PINGROUP(125, ldo_update, hdmi_rcv, NA, NA, NA, NA, NA),
1169         PINGROUP(126, gcc_vtt, NA, NA, NA, NA, NA, NA),
1170         PINGROUP(127, gcc_obt, NA, NA, NA, NA, NA, NA),
1171         PINGROUP(128, blsp_spi10_cs3, NA, NA, NA, NA, NA, NA),
1172         PINGROUP(129, sata_act, NA, NA, NA, NA, NA, NA),
1173         PINGROUP(130, uim, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
1174         PINGROUP(131, uim, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
1175         PINGROUP(132, uim, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
1176         PINGROUP(133, uim, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
1177         PINGROUP(134, hsic, NA, NA, NA, NA, NA, NA),
1178         PINGROUP(135, hsic, NA, NA, NA, NA, NA, NA),
1179         PINGROUP(136, spdif_tx, NA, NA, NA, NA, NA, NA),
1180         PINGROUP(137, NA, NA, NA, NA, NA, NA, NA),
1181         PINGROUP(138, NA, NA, NA, NA, NA, NA, NA),
1182         PINGROUP(139, NA, NA, NA, NA, NA, NA, NA),
1183         PINGROUP(140, pci_e1_rst_n, pci_e1_rst, NA, NA, NA, NA, NA),
1184         PINGROUP(141, pci_e1_clkreq_n, NA, NA, NA, NA, NA, NA),
1185         PINGROUP(142, spdif_tx, NA, NA, NA, NA, NA, NA),
1186         PINGROUP(143, NA, NA, NA, NA, NA, NA, NA),
1187         PINGROUP(144, NA, NA, NA, NA, NA, NA, NA),
1188         PINGROUP(145, NA, NA, NA, NA, NA, NA, NA),
1189         PINGROUP(146, sdc_emmc_mode, NA, NA, NA, NA, NA, NA),
1190
1191         SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1192         SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1193         SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1194         SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1195         SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1196         SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1197 };
1198
1199 #define NUM_GPIO_PINGROUPS 147
1200
1201 static const struct msm_pinctrl_soc_data apq8084_pinctrl = {
1202         .pins = apq8084_pins,
1203         .npins = ARRAY_SIZE(apq8084_pins),
1204         .functions = apq8084_functions,
1205         .nfunctions = ARRAY_SIZE(apq8084_functions),
1206         .groups = apq8084_groups,
1207         .ngroups = ARRAY_SIZE(apq8084_groups),
1208         .ngpios = NUM_GPIO_PINGROUPS,
1209 };
1210
1211 static int apq8084_pinctrl_probe(struct platform_device *pdev)
1212 {
1213         return msm_pinctrl_probe(pdev, &apq8084_pinctrl);
1214 }
1215
1216 static const struct of_device_id apq8084_pinctrl_of_match[] = {
1217         { .compatible = "qcom,apq8084-pinctrl", },
1218         { },
1219 };
1220
1221 static struct platform_driver apq8084_pinctrl_driver = {
1222         .driver = {
1223                 .name = "apq8084-pinctrl",
1224                 .of_match_table = apq8084_pinctrl_of_match,
1225         },
1226         .probe = apq8084_pinctrl_probe,
1227         .remove = msm_pinctrl_remove,
1228 };
1229
1230 static int __init apq8084_pinctrl_init(void)
1231 {
1232         return platform_driver_register(&apq8084_pinctrl_driver);
1233 }
1234 arch_initcall(apq8084_pinctrl_init);
1235
1236 static void __exit apq8084_pinctrl_exit(void)
1237 {
1238         platform_driver_unregister(&apq8084_pinctrl_driver);
1239 }
1240 module_exit(apq8084_pinctrl_exit);
1241
1242 MODULE_DESCRIPTION("Qualcomm APQ8084 pinctrl driver");
1243 MODULE_LICENSE("GPL v2");
1244 MODULE_DEVICE_TABLE(of, apq8084_pinctrl_of_match);