drivers/pinctrl/qcom/pinctrl-msm8x74.c

   1 /*
   2  * Copyright (c) 2013, Sony Mobile Communications AB.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/of.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/pinctrl/pinctrl.h>
  18
  19 #include "pinctrl-msm.h"
  20
  21 static const struct pinctrl_pin_desc msm8x74_pins[] = {
  22         PINCTRL_PIN(0, "GPIO_0"),
  23         PINCTRL_PIN(1, "GPIO_1"),
  24         PINCTRL_PIN(2, "GPIO_2"),
  25         PINCTRL_PIN(3, "GPIO_3"),
  26         PINCTRL_PIN(4, "GPIO_4"),
  27         PINCTRL_PIN(5, "GPIO_5"),
  28         PINCTRL_PIN(6, "GPIO_6"),
  29         PINCTRL_PIN(7, "GPIO_7"),
  30         PINCTRL_PIN(8, "GPIO_8"),
  31         PINCTRL_PIN(9, "GPIO_9"),
  32         PINCTRL_PIN(10, "GPIO_10"),
  33         PINCTRL_PIN(11, "GPIO_11"),
  34         PINCTRL_PIN(12, "GPIO_12"),
  35         PINCTRL_PIN(13, "GPIO_13"),
  36         PINCTRL_PIN(14, "GPIO_14"),
  37         PINCTRL_PIN(15, "GPIO_15"),
  38         PINCTRL_PIN(16, "GPIO_16"),
  39         PINCTRL_PIN(17, "GPIO_17"),
  40         PINCTRL_PIN(18, "GPIO_18"),
  41         PINCTRL_PIN(19, "GPIO_19"),
  42         PINCTRL_PIN(20, "GPIO_20"),
  43         PINCTRL_PIN(21, "GPIO_21"),
  44         PINCTRL_PIN(22, "GPIO_22"),
  45         PINCTRL_PIN(23, "GPIO_23"),
  46         PINCTRL_PIN(24, "GPIO_24"),
  47         PINCTRL_PIN(25, "GPIO_25"),
  48         PINCTRL_PIN(26, "GPIO_26"),
  49         PINCTRL_PIN(27, "GPIO_27"),
  50         PINCTRL_PIN(28, "GPIO_28"),
  51         PINCTRL_PIN(29, "GPIO_29"),
  52         PINCTRL_PIN(30, "GPIO_30"),
  53         PINCTRL_PIN(31, "GPIO_31"),
  54         PINCTRL_PIN(32, "GPIO_32"),
  55         PINCTRL_PIN(33, "GPIO_33"),
  56         PINCTRL_PIN(34, "GPIO_34"),
  57         PINCTRL_PIN(35, "GPIO_35"),
  58         PINCTRL_PIN(36, "GPIO_36"),
  59         PINCTRL_PIN(37, "GPIO_37"),
  60         PINCTRL_PIN(38, "GPIO_38"),
  61         PINCTRL_PIN(39, "GPIO_39"),
  62         PINCTRL_PIN(40, "GPIO_40"),
  63         PINCTRL_PIN(41, "GPIO_41"),
  64         PINCTRL_PIN(42, "GPIO_42"),
  65         PINCTRL_PIN(43, "GPIO_43"),
  66         PINCTRL_PIN(44, "GPIO_44"),
  67         PINCTRL_PIN(45, "GPIO_45"),
  68         PINCTRL_PIN(46, "GPIO_46"),
  69         PINCTRL_PIN(47, "GPIO_47"),
  70         PINCTRL_PIN(48, "GPIO_48"),
  71         PINCTRL_PIN(49, "GPIO_49"),
  72         PINCTRL_PIN(50, "GPIO_50"),
  73         PINCTRL_PIN(51, "GPIO_51"),
  74         PINCTRL_PIN(52, "GPIO_52"),
  75         PINCTRL_PIN(53, "GPIO_53"),
  76         PINCTRL_PIN(54, "GPIO_54"),
  77         PINCTRL_PIN(55, "GPIO_55"),
  78         PINCTRL_PIN(56, "GPIO_56"),
  79         PINCTRL_PIN(57, "GPIO_57"),
  80         PINCTRL_PIN(58, "GPIO_58"),
  81         PINCTRL_PIN(59, "GPIO_59"),
  82         PINCTRL_PIN(60, "GPIO_60"),
  83         PINCTRL_PIN(61, "GPIO_61"),
  84         PINCTRL_PIN(62, "GPIO_62"),
  85         PINCTRL_PIN(63, "GPIO_63"),
  86         PINCTRL_PIN(64, "GPIO_64"),
  87         PINCTRL_PIN(65, "GPIO_65"),
  88         PINCTRL_PIN(66, "GPIO_66"),
  89         PINCTRL_PIN(67, "GPIO_67"),
  90         PINCTRL_PIN(68, "GPIO_68"),
  91         PINCTRL_PIN(69, "GPIO_69"),
  92         PINCTRL_PIN(70, "GPIO_70"),
  93         PINCTRL_PIN(71, "GPIO_71"),
  94         PINCTRL_PIN(72, "GPIO_72"),
  95         PINCTRL_PIN(73, "GPIO_73"),
  96         PINCTRL_PIN(74, "GPIO_74"),
  97         PINCTRL_PIN(75, "GPIO_75"),
  98         PINCTRL_PIN(76, "GPIO_76"),
  99         PINCTRL_PIN(77, "GPIO_77"),
 100         PINCTRL_PIN(78, "GPIO_78"),
 101         PINCTRL_PIN(79, "GPIO_79"),
 102         PINCTRL_PIN(80, "GPIO_80"),
 103         PINCTRL_PIN(81, "GPIO_81"),
 104         PINCTRL_PIN(82, "GPIO_82"),
 105         PINCTRL_PIN(83, "GPIO_83"),
 106         PINCTRL_PIN(84, "GPIO_84"),
 107         PINCTRL_PIN(85, "GPIO_85"),
 108         PINCTRL_PIN(86, "GPIO_86"),
 109         PINCTRL_PIN(87, "GPIO_87"),
 110         PINCTRL_PIN(88, "GPIO_88"),
 111         PINCTRL_PIN(89, "GPIO_89"),
 112         PINCTRL_PIN(90, "GPIO_90"),
 113         PINCTRL_PIN(91, "GPIO_91"),
 114         PINCTRL_PIN(92, "GPIO_92"),
 115         PINCTRL_PIN(93, "GPIO_93"),
 116         PINCTRL_PIN(94, "GPIO_94"),
 117         PINCTRL_PIN(95, "GPIO_95"),
 118         PINCTRL_PIN(96, "GPIO_96"),
 119         PINCTRL_PIN(97, "GPIO_97"),
 120         PINCTRL_PIN(98, "GPIO_98"),
 121         PINCTRL_PIN(99, "GPIO_99"),
 122         PINCTRL_PIN(100, "GPIO_100"),
 123         PINCTRL_PIN(101, "GPIO_101"),
 124         PINCTRL_PIN(102, "GPIO_102"),
 125         PINCTRL_PIN(103, "GPIO_103"),
 126         PINCTRL_PIN(104, "GPIO_104"),
 127         PINCTRL_PIN(105, "GPIO_105"),
 128         PINCTRL_PIN(106, "GPIO_106"),
 129         PINCTRL_PIN(107, "GPIO_107"),
 130         PINCTRL_PIN(108, "GPIO_108"),
 131         PINCTRL_PIN(109, "GPIO_109"),
 132         PINCTRL_PIN(110, "GPIO_110"),
 133         PINCTRL_PIN(111, "GPIO_111"),
 134         PINCTRL_PIN(112, "GPIO_112"),
 135         PINCTRL_PIN(113, "GPIO_113"),
 136         PINCTRL_PIN(114, "GPIO_114"),
 137         PINCTRL_PIN(115, "GPIO_115"),
 138         PINCTRL_PIN(116, "GPIO_116"),
 139         PINCTRL_PIN(117, "GPIO_117"),
 140         PINCTRL_PIN(118, "GPIO_118"),
 141         PINCTRL_PIN(119, "GPIO_119"),
 142         PINCTRL_PIN(120, "GPIO_120"),
 143         PINCTRL_PIN(121, "GPIO_121"),
 144         PINCTRL_PIN(122, "GPIO_122"),
 145         PINCTRL_PIN(123, "GPIO_123"),
 146         PINCTRL_PIN(124, "GPIO_124"),
 147         PINCTRL_PIN(125, "GPIO_125"),
 148         PINCTRL_PIN(126, "GPIO_126"),
 149         PINCTRL_PIN(127, "GPIO_127"),
 150         PINCTRL_PIN(128, "GPIO_128"),
 151         PINCTRL_PIN(129, "GPIO_129"),
 152         PINCTRL_PIN(130, "GPIO_130"),
 153         PINCTRL_PIN(131, "GPIO_131"),
 154         PINCTRL_PIN(132, "GPIO_132"),
 155         PINCTRL_PIN(133, "GPIO_133"),
 156         PINCTRL_PIN(134, "GPIO_134"),
 157         PINCTRL_PIN(135, "GPIO_135"),
 158         PINCTRL_PIN(136, "GPIO_136"),
 159         PINCTRL_PIN(137, "GPIO_137"),
 160         PINCTRL_PIN(138, "GPIO_138"),
 161         PINCTRL_PIN(139, "GPIO_139"),
 162         PINCTRL_PIN(140, "GPIO_140"),
 163         PINCTRL_PIN(141, "GPIO_141"),
 164         PINCTRL_PIN(142, "GPIO_142"),
 165         PINCTRL_PIN(143, "GPIO_143"),
 166         PINCTRL_PIN(144, "GPIO_144"),
 167         PINCTRL_PIN(145, "GPIO_145"),
 168
 169         PINCTRL_PIN(146, "SDC1_CLK"),
 170         PINCTRL_PIN(147, "SDC1_CMD"),
 171         PINCTRL_PIN(148, "SDC1_DATA"),
 172         PINCTRL_PIN(149, "SDC2_CLK"),
 173         PINCTRL_PIN(150, "SDC2_CMD"),
 174         PINCTRL_PIN(151, "SDC2_DATA"),
 175         PINCTRL_PIN(152, "HSIC_STROBE"),
 176         PINCTRL_PIN(153, "HSIC_DATA"),
 177 };
 178
 179 #define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
 180 DECLARE_MSM_GPIO_PINS(0);
 181 DECLARE_MSM_GPIO_PINS(1);
 182 DECLARE_MSM_GPIO_PINS(2);
 183 DECLARE_MSM_GPIO_PINS(3);
 184 DECLARE_MSM_GPIO_PINS(4);
 185 DECLARE_MSM_GPIO_PINS(5);
 186 DECLARE_MSM_GPIO_PINS(6);
 187 DECLARE_MSM_GPIO_PINS(7);
 188 DECLARE_MSM_GPIO_PINS(8);
 189 DECLARE_MSM_GPIO_PINS(9);
 190 DECLARE_MSM_GPIO_PINS(10);
 191 DECLARE_MSM_GPIO_PINS(11);
 192 DECLARE_MSM_GPIO_PINS(12);
 193 DECLARE_MSM_GPIO_PINS(13);
 194 DECLARE_MSM_GPIO_PINS(14);
 195 DECLARE_MSM_GPIO_PINS(15);
 196 DECLARE_MSM_GPIO_PINS(16);
 197 DECLARE_MSM_GPIO_PINS(17);
 198 DECLARE_MSM_GPIO_PINS(18);
 199 DECLARE_MSM_GPIO_PINS(19);
 200 DECLARE_MSM_GPIO_PINS(20);
 201 DECLARE_MSM_GPIO_PINS(21);
 202 DECLARE_MSM_GPIO_PINS(22);
 203 DECLARE_MSM_GPIO_PINS(23);
 204 DECLARE_MSM_GPIO_PINS(24);
 205 DECLARE_MSM_GPIO_PINS(25);
 206 DECLARE_MSM_GPIO_PINS(26);
 207 DECLARE_MSM_GPIO_PINS(27);
 208 DECLARE_MSM_GPIO_PINS(28);
 209 DECLARE_MSM_GPIO_PINS(29);
 210 DECLARE_MSM_GPIO_PINS(30);
 211 DECLARE_MSM_GPIO_PINS(31);
 212 DECLARE_MSM_GPIO_PINS(32);
 213 DECLARE_MSM_GPIO_PINS(33);
 214 DECLARE_MSM_GPIO_PINS(34);
 215 DECLARE_MSM_GPIO_PINS(35);
 216 DECLARE_MSM_GPIO_PINS(36);
 217 DECLARE_MSM_GPIO_PINS(37);
 218 DECLARE_MSM_GPIO_PINS(38);
 219 DECLARE_MSM_GPIO_PINS(39);
 220 DECLARE_MSM_GPIO_PINS(40);
 221 DECLARE_MSM_GPIO_PINS(41);
 222 DECLARE_MSM_GPIO_PINS(42);
 223 DECLARE_MSM_GPIO_PINS(43);
 224 DECLARE_MSM_GPIO_PINS(44);
 225 DECLARE_MSM_GPIO_PINS(45);
 226 DECLARE_MSM_GPIO_PINS(46);
 227 DECLARE_MSM_GPIO_PINS(47);
 228 DECLARE_MSM_GPIO_PINS(48);
 229 DECLARE_MSM_GPIO_PINS(49);
 230 DECLARE_MSM_GPIO_PINS(50);
 231 DECLARE_MSM_GPIO_PINS(51);
 232 DECLARE_MSM_GPIO_PINS(52);
 233 DECLARE_MSM_GPIO_PINS(53);
 234 DECLARE_MSM_GPIO_PINS(54);
 235 DECLARE_MSM_GPIO_PINS(55);
 236 DECLARE_MSM_GPIO_PINS(56);
 237 DECLARE_MSM_GPIO_PINS(57);
 238 DECLARE_MSM_GPIO_PINS(58);
 239 DECLARE_MSM_GPIO_PINS(59);
 240 DECLARE_MSM_GPIO_PINS(60);
 241 DECLARE_MSM_GPIO_PINS(61);
 242 DECLARE_MSM_GPIO_PINS(62);
 243 DECLARE_MSM_GPIO_PINS(63);
 244 DECLARE_MSM_GPIO_PINS(64);
 245 DECLARE_MSM_GPIO_PINS(65);
 246 DECLARE_MSM_GPIO_PINS(66);
 247 DECLARE_MSM_GPIO_PINS(67);
 248 DECLARE_MSM_GPIO_PINS(68);
 249 DECLARE_MSM_GPIO_PINS(69);
 250 DECLARE_MSM_GPIO_PINS(70);
 251 DECLARE_MSM_GPIO_PINS(71);
 252 DECLARE_MSM_GPIO_PINS(72);
 253 DECLARE_MSM_GPIO_PINS(73);
 254 DECLARE_MSM_GPIO_PINS(74);
 255 DECLARE_MSM_GPIO_PINS(75);
 256 DECLARE_MSM_GPIO_PINS(76);
 257 DECLARE_MSM_GPIO_PINS(77);
 258 DECLARE_MSM_GPIO_PINS(78);
 259 DECLARE_MSM_GPIO_PINS(79);
 260 DECLARE_MSM_GPIO_PINS(80);
 261 DECLARE_MSM_GPIO_PINS(81);
 262 DECLARE_MSM_GPIO_PINS(82);
 263 DECLARE_MSM_GPIO_PINS(83);
 264 DECLARE_MSM_GPIO_PINS(84);
 265 DECLARE_MSM_GPIO_PINS(85);
 266 DECLARE_MSM_GPIO_PINS(86);
 267 DECLARE_MSM_GPIO_PINS(87);
 268 DECLARE_MSM_GPIO_PINS(88);
 269 DECLARE_MSM_GPIO_PINS(89);
 270 DECLARE_MSM_GPIO_PINS(90);
 271 DECLARE_MSM_GPIO_PINS(91);
 272 DECLARE_MSM_GPIO_PINS(92);
 273 DECLARE_MSM_GPIO_PINS(93);
 274 DECLARE_MSM_GPIO_PINS(94);
 275 DECLARE_MSM_GPIO_PINS(95);
 276 DECLARE_MSM_GPIO_PINS(96);
 277 DECLARE_MSM_GPIO_PINS(97);
 278 DECLARE_MSM_GPIO_PINS(98);
 279 DECLARE_MSM_GPIO_PINS(99);
 280 DECLARE_MSM_GPIO_PINS(100);
 281 DECLARE_MSM_GPIO_PINS(101);
 282 DECLARE_MSM_GPIO_PINS(102);
 283 DECLARE_MSM_GPIO_PINS(103);
 284 DECLARE_MSM_GPIO_PINS(104);
 285 DECLARE_MSM_GPIO_PINS(105);
 286 DECLARE_MSM_GPIO_PINS(106);
 287 DECLARE_MSM_GPIO_PINS(107);
 288 DECLARE_MSM_GPIO_PINS(108);
 289 DECLARE_MSM_GPIO_PINS(109);
 290 DECLARE_MSM_GPIO_PINS(110);
 291 DECLARE_MSM_GPIO_PINS(111);
 292 DECLARE_MSM_GPIO_PINS(112);
 293 DECLARE_MSM_GPIO_PINS(113);
 294 DECLARE_MSM_GPIO_PINS(114);
 295 DECLARE_MSM_GPIO_PINS(115);
 296 DECLARE_MSM_GPIO_PINS(116);
 297 DECLARE_MSM_GPIO_PINS(117);
 298 DECLARE_MSM_GPIO_PINS(118);
 299 DECLARE_MSM_GPIO_PINS(119);
 300 DECLARE_MSM_GPIO_PINS(120);
 301 DECLARE_MSM_GPIO_PINS(121);
 302 DECLARE_MSM_GPIO_PINS(122);
 303 DECLARE_MSM_GPIO_PINS(123);
 304 DECLARE_MSM_GPIO_PINS(124);
 305 DECLARE_MSM_GPIO_PINS(125);
 306 DECLARE_MSM_GPIO_PINS(126);
 307 DECLARE_MSM_GPIO_PINS(127);
 308 DECLARE_MSM_GPIO_PINS(128);
 309 DECLARE_MSM_GPIO_PINS(129);
 310 DECLARE_MSM_GPIO_PINS(130);
 311 DECLARE_MSM_GPIO_PINS(131);
 312 DECLARE_MSM_GPIO_PINS(132);
 313 DECLARE_MSM_GPIO_PINS(133);
 314 DECLARE_MSM_GPIO_PINS(134);
 315 DECLARE_MSM_GPIO_PINS(135);
 316 DECLARE_MSM_GPIO_PINS(136);
 317 DECLARE_MSM_GPIO_PINS(137);
 318 DECLARE_MSM_GPIO_PINS(138);
 319 DECLARE_MSM_GPIO_PINS(139);
 320 DECLARE_MSM_GPIO_PINS(140);
 321 DECLARE_MSM_GPIO_PINS(141);
 322 DECLARE_MSM_GPIO_PINS(142);
 323 DECLARE_MSM_GPIO_PINS(143);
 324 DECLARE_MSM_GPIO_PINS(144);
 325 DECLARE_MSM_GPIO_PINS(145);
 326
 327 static const unsigned int sdc1_clk_pins[] = { 146 };
 328 static const unsigned int sdc1_cmd_pins[] = { 147 };
 329 static const unsigned int sdc1_data_pins[] = { 148 };
 330 static const unsigned int sdc2_clk_pins[] = { 149 };
 331 static const unsigned int sdc2_cmd_pins[] = { 150 };
 332 static const unsigned int sdc2_data_pins[] = { 151 };
 333 static const unsigned int hsic_strobe_pins[] = { 152 };
 334 static const unsigned int hsic_data_pins[] = { 153 };
 335
 336 #define FUNCTION(fname)                                 \
 337         [MSM_MUX_##fname] = {                           \
 338                 .name = #fname,                         \
 339                 .groups = fname##_groups,               \
 340                 .ngroups = ARRAY_SIZE(fname##_groups),  \
 341         }
 342
 343 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7)        \
 344         {                                               \
 345                 .name = "gpio" #id,                     \
 346                 .pins = gpio##id##_pins,                \
 347                 .npins = ARRAY_SIZE(gpio##id##_pins),   \
 348                 .funcs = (int[]){                       \
 349                         MSM_MUX_gpio,                   \
 350                         MSM_MUX_##f1,                   \
 351                         MSM_MUX_##f2,                   \
 352                         MSM_MUX_##f3,                   \
 353                         MSM_MUX_##f4,                   \
 354                         MSM_MUX_##f5,                   \
 355                         MSM_MUX_##f6,                   \
 356                         MSM_MUX_##f7                    \
 357                 },                                      \
 358                 .nfuncs = 8,                            \
 359                 .ctl_reg = 0x1000 + 0x10 * id,          \
 360                 .io_reg = 0x1004 + 0x10 * id,           \
 361                 .intr_cfg_reg = 0x1008 + 0x10 * id,     \
 362                 .intr_status_reg = 0x100c + 0x10 * id,  \
 363                 .intr_target_reg = 0x1008 + 0x10 * id,  \
 364                 .mux_bit = 2,                           \
 365                 .pull_bit = 0,                          \
 366                 .drv_bit = 6,                           \
 367                 .oe_bit = 9,                            \
 368                 .in_bit = 0,                            \
 369                 .out_bit = 1,                           \
 370                 .intr_enable_bit = 0,                   \
 371                 .intr_status_bit = 0,                   \
 372                 .intr_target_bit = 5,                   \
 373                 .intr_target_kpss_val = 4,              \
 374                 .intr_raw_status_bit = 4,               \
 375                 .intr_polarity_bit = 1,                 \
 376                 .intr_detection_bit = 2,                \
 377                 .intr_detection_width = 2,              \
 378         }
 379
 380 #define SDC_PINGROUP(pg_name, ctl, pull, drv)           \
 381         {                                               \
 382                 .name = #pg_name,                       \
 383                 .pins = pg_name##_pins,                 \
 384                 .npins = ARRAY_SIZE(pg_name##_pins),    \
 385                 .ctl_reg = ctl,                         \
 386                 .io_reg = 0,                            \
 387                 .intr_cfg_reg = 0,                      \
 388                 .intr_status_reg = 0,                   \
 389                 .intr_target_reg = 0,                   \
 390                 .mux_bit = -1,                          \
 391                 .pull_bit = pull,                       \
 392                 .drv_bit = drv,                         \
 393                 .oe_bit = -1,                           \
 394                 .in_bit = -1,                           \
 395                 .out_bit = -1,                          \
 396                 .intr_enable_bit = -1,                  \
 397                 .intr_status_bit = -1,                  \
 398                 .intr_target_bit = -1,                  \
 399                 .intr_target_kpss_val = -1,             \
 400                 .intr_raw_status_bit = -1,              \
 401                 .intr_polarity_bit = -1,                \
 402                 .intr_detection_bit = -1,               \
 403                 .intr_detection_width = -1,             \
 404         }
 405
 406 #define HSIC_PINGROUP(pg_name, ctl)                     \
 407         {                                               \
 408                 .name = #pg_name,                       \
 409                 .pins = pg_name##_pins,                 \
 410                 .npins = ARRAY_SIZE(pg_name##_pins),    \
 411                 .funcs = (int[]){                       \
 412                         MSM_MUX_gpio,                   \
 413                         MSM_MUX_hsic_ctl,               \
 414                 },                                      \
 415                 .nfuncs = 2,                            \
 416                 .ctl_reg = ctl,                         \
 417                 .io_reg = 0,                            \
 418                 .intr_cfg_reg = 0,                      \
 419                 .intr_status_reg = 0,                   \
 420                 .intr_target_reg = 0,                   \
 421                 .mux_bit = 25,                          \
 422                 .pull_bit = -1,                         \
 423                 .drv_bit = -1,                          \
 424                 .oe_bit = -1,                           \
 425                 .in_bit = -1,                           \
 426                 .out_bit = -1,                          \
 427                 .intr_enable_bit = -1,                  \
 428                 .intr_status_bit = -1,                  \
 429                 .intr_target_bit = -1,                  \
 430                 .intr_target_kpss_val = -1,             \
 431                 .intr_raw_status_bit = -1,              \
 432                 .intr_polarity_bit = -1,                \
 433                 .intr_detection_bit = -1,               \
 434                 .intr_detection_width = -1,             \
 435         }
 436
 437 /*
 438  * TODO: Add the rest of the possible functions and fill out
 439  * the pingroup table below.
 440  */
 441 enum msm8x74_functions {
 442         MSM_MUX_gpio,
 443         MSM_MUX_cci_i2c0,
 444         MSM_MUX_cci_i2c1,
 445         MSM_MUX_blsp_i2c1,
 446         MSM_MUX_blsp_i2c2,
 447         MSM_MUX_blsp_i2c3,
 448         MSM_MUX_blsp_i2c4,
 449         MSM_MUX_blsp_i2c5,
 450         MSM_MUX_blsp_i2c6,
 451         MSM_MUX_blsp_i2c7,
 452         MSM_MUX_blsp_i2c8,
 453         MSM_MUX_blsp_i2c9,
 454         MSM_MUX_blsp_i2c10,
 455         MSM_MUX_blsp_i2c11,
 456         MSM_MUX_blsp_i2c12,
 457         MSM_MUX_blsp_spi1,
 458         MSM_MUX_blsp_spi1_cs1,
 459         MSM_MUX_blsp_spi1_cs2,
 460         MSM_MUX_blsp_spi1_cs3,
 461         MSM_MUX_blsp_spi2,
 462         MSM_MUX_blsp_spi2_cs1,
 463         MSM_MUX_blsp_spi2_cs2,
 464         MSM_MUX_blsp_spi2_cs3,
 465         MSM_MUX_blsp_spi3,
 466         MSM_MUX_blsp_spi4,
 467         MSM_MUX_blsp_spi5,
 468         MSM_MUX_blsp_spi6,
 469         MSM_MUX_blsp_spi7,
 470         MSM_MUX_blsp_spi8,
 471         MSM_MUX_blsp_spi9,
 472         MSM_MUX_blsp_spi10,
 473         MSM_MUX_blsp_spi10_cs1,
 474         MSM_MUX_blsp_spi10_cs2,
 475         MSM_MUX_blsp_spi10_cs3,
 476         MSM_MUX_blsp_spi11,
 477         MSM_MUX_blsp_spi12,
 478         MSM_MUX_blsp_uart1,
 479         MSM_MUX_blsp_uart2,
 480         MSM_MUX_blsp_uart3,
 481         MSM_MUX_blsp_uart4,
 482         MSM_MUX_blsp_uart5,
 483         MSM_MUX_blsp_uart6,
 484         MSM_MUX_blsp_uart7,
 485         MSM_MUX_blsp_uart8,
 486         MSM_MUX_blsp_uart9,
 487         MSM_MUX_blsp_uart10,
 488         MSM_MUX_blsp_uart11,
 489         MSM_MUX_blsp_uart12,
 490         MSM_MUX_blsp_uim1,
 491         MSM_MUX_blsp_uim2,
 492         MSM_MUX_blsp_uim3,
 493         MSM_MUX_blsp_uim4,
 494         MSM_MUX_blsp_uim5,
 495         MSM_MUX_blsp_uim6,
 496         MSM_MUX_blsp_uim7,
 497         MSM_MUX_blsp_uim8,
 498         MSM_MUX_blsp_uim9,
 499         MSM_MUX_blsp_uim10,
 500         MSM_MUX_blsp_uim11,
 501         MSM_MUX_blsp_uim12,
 502         MSM_MUX_uim1,
 503         MSM_MUX_uim2,
 504         MSM_MUX_uim_batt_alarm,
 505         MSM_MUX_sdc3,
 506         MSM_MUX_sdc4,
 507         MSM_MUX_gcc_gp_clk1,
 508         MSM_MUX_gcc_gp_clk2,
 509         MSM_MUX_gcc_gp_clk3,
 510         MSM_MUX_qua_mi2s,
 511         MSM_MUX_pri_mi2s,
 512         MSM_MUX_spkr_mi2s,
 513         MSM_MUX_ter_mi2s,
 514         MSM_MUX_sec_mi2s,
 515         MSM_MUX_hdmi_cec,
 516         MSM_MUX_hdmi_ddc,
 517         MSM_MUX_hdmi_hpd,
 518         MSM_MUX_edp_hpd,
 519         MSM_MUX_mdp_vsync,
 520         MSM_MUX_cam_mclk0,
 521         MSM_MUX_cam_mclk1,
 522         MSM_MUX_cam_mclk2,
 523         MSM_MUX_cam_mclk3,
 524         MSM_MUX_cci_timer0,
 525         MSM_MUX_cci_timer1,
 526         MSM_MUX_cci_timer2,
 527         MSM_MUX_cci_timer3,
 528         MSM_MUX_cci_timer4,
 529         MSM_MUX_cci_async_in0,
 530         MSM_MUX_cci_async_in1,
 531         MSM_MUX_cci_async_in2,
 532         MSM_MUX_gp_pdm0,
 533         MSM_MUX_gp_pdm1,
 534         MSM_MUX_gp_pdm2,
 535         MSM_MUX_gp0_clk,
 536         MSM_MUX_gp1_clk,
 537         MSM_MUX_gp_mn,
 538         MSM_MUX_tsif1,
 539         MSM_MUX_tsif2,
 540         MSM_MUX_hsic,
 541         MSM_MUX_grfc,
 542         MSM_MUX_audio_ref_clk,
 543         MSM_MUX_bt,
 544         MSM_MUX_fm,
 545         MSM_MUX_wlan,
 546         MSM_MUX_slimbus,
 547         MSM_MUX_hsic_ctl,
 548         MSM_MUX_NA,
 549 };
 550
 551 static const char * const gpio_groups[] = {
 552         "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
 553         "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
 554         "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
 555         "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
 556         "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
 557         "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
 558         "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
 559         "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
 560         "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
 561         "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
 562         "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
 563         "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
 564         "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
 565         "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
 566         "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
 567         "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
 568         "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
 569         "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
 570         "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
 571         "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
 572         "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
 573         "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "hsic_data",
 574         "hsic_strobe",
 575 };
 576
 577 static const char * const blsp_uart1_groups[] = {
 578         "gpio0", "gpio1", "gpio2", "gpio3"
 579 };
 580 static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" };
 581 static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" };
 582 static const char * const blsp_spi1_groups[] = {
 583         "gpio0", "gpio1", "gpio2", "gpio3"
 584 };
 585 static const char * const blsp_spi1_cs1_groups[] = { "gpio8" };
 586 static const char * const blsp_spi1_cs2_groups[] = { "gpio9", "gpio11" };
 587 static const char * const blsp_spi1_cs3_groups[] = { "gpio10" };
 588
 589 static const char * const blsp_uart2_groups[] = {
 590         "gpio4", "gpio5", "gpio6", "gpio7"
 591 };
 592 static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" };
 593 static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" };
 594 static const char * const blsp_spi2_groups[] = {
 595         "gpio4", "gpio5", "gpio6", "gpio7"
 596 };
 597 static const char * const blsp_spi2_cs1_groups[] = { "gpio53", "gpio62" };
 598 static const char * const blsp_spi2_cs2_groups[] = { "gpio54", "gpio63" };
 599 static const char * const blsp_spi2_cs3_groups[] = { "gpio66" };
 600
 601 static const char * const blsp_uart3_groups[] = {
 602         "gpio8", "gpio9", "gpio10", "gpio11"
 603 };
 604 static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" };
 605 static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" };
 606 static const char * const blsp_spi3_groups[] = {
 607         "gpio8", "gpio9", "gpio10", "gpio11"
 608 };
 609
 610 static const char * const cci_i2c0_groups[] = { "gpio19", "gpio20" };
 611 static const char * const cci_i2c1_groups[] = { "gpio21", "gpio22" };
 612
 613 static const char * const blsp_uart4_groups[] = {
 614         "gpio19", "gpio20", "gpio21", "gpio22"
 615 };
 616 static const char * const blsp_uim4_groups[] = { "gpio19", "gpio20" };
 617 static const char * const blsp_i2c4_groups[] = { "gpio21", "gpio22" };
 618 static const char * const blsp_spi4_groups[] = {
 619         "gpio19", "gpio20", "gpio21", "gpio22"
 620 };
 621
 622 static const char * const blsp_uart5_groups[] = {
 623         "gpio23", "gpio24", "gpio25", "gpio26"
 624 };
 625 static const char * const blsp_uim5_groups[] = { "gpio23", "gpio24" };
 626 static const char * const blsp_i2c5_groups[] = { "gpio25", "gpio26" };
 627 static const char * const blsp_spi5_groups[] = {
 628         "gpio23", "gpio24", "gpio25", "gpio26"
 629 };
 630
 631 static const char * const blsp_uart6_groups[] = {
 632         "gpio27", "gpio28", "gpio29", "gpio30"
 633 };
 634 static const char * const blsp_uim6_groups[] = { "gpio27", "gpio28" };
 635 static const char * const blsp_i2c6_groups[] = { "gpio29", "gpio30" };
 636 static const char * const blsp_spi6_groups[] = {
 637         "gpio27", "gpio28", "gpio29", "gpio30"
 638 };
 639
 640 static const char * const blsp_uart7_groups[] = {
 641         "gpio41", "gpio42", "gpio43", "gpio44"
 642 };
 643 static const char * const blsp_uim7_groups[] = { "gpio41", "gpio42" };
 644 static const char * const blsp_i2c7_groups[] = { "gpio43", "gpio44" };
 645 static const char * const blsp_spi7_groups[] = {
 646         "gpio41", "gpio42", "gpio43", "gpio44"
 647 };
 648
 649 static const char * const blsp_uart8_groups[] = {
 650         "gpio45", "gpio46", "gpio47", "gpio48"
 651 };
 652 static const char * const blsp_uim8_groups[] = { "gpio45", "gpio46" };
 653 static const char * const blsp_i2c8_groups[] = { "gpio47", "gpio48" };
 654 static const char * const blsp_spi8_groups[] = {
 655         "gpio45", "gpio46", "gpio47", "gpio48"
 656 };
 657
 658 static const char * const blsp_uart9_groups[] = {
 659         "gpio49", "gpio50", "gpio51", "gpio52"
 660 };
 661 static const char * const blsp_uim9_groups[] = { "gpio49", "gpio50" };
 662 static const char * const blsp_i2c9_groups[] = { "gpio51", "gpio52" };
 663 static const char * const blsp_spi9_groups[] = {
 664         "gpio49", "gpio50", "gpio51", "gpio52"
 665 };
 666
 667 static const char * const blsp_uart10_groups[] = {
 668         "gpio53", "gpio54", "gpio55", "gpio56"
 669 };
 670 static const char * const blsp_uim10_groups[] = { "gpio53", "gpio54" };
 671 static const char * const blsp_i2c10_groups[] = { "gpio55", "gpio56" };
 672 static const char * const blsp_spi10_groups[] = {
 673         "gpio53", "gpio54", "gpio55", "gpio56"
 674 };
 675 static const char * const blsp_spi10_cs1_groups[] = { "gpio47", "gpio67" };
 676 static const char * const blsp_spi10_cs2_groups[] = { "gpio48", "gpio68" };
 677 static const char * const blsp_spi10_cs3_groups[] = { "gpio90" };
 678
 679 static const char * const blsp_uart11_groups[] = {
 680         "gpio81", "gpio82", "gpio83", "gpio84"
 681 };
 682 static const char * const blsp_uim11_groups[] = { "gpio81", "gpio82" };
 683 static const char * const blsp_i2c11_groups[] = { "gpio83", "gpio84" };
 684 static const char * const blsp_spi11_groups[] = {
 685         "gpio81", "gpio82", "gpio83", "gpio84"
 686 };
 687
 688 static const char * const blsp_uart12_groups[] = {
 689         "gpio85", "gpio86", "gpio87", "gpio88"
 690 };
 691 static const char * const blsp_uim12_groups[] = { "gpio85", "gpio86" };
 692 static const char * const blsp_i2c12_groups[] = { "gpio87", "gpio88" };
 693 static const char * const blsp_spi12_groups[] = {
 694         "gpio85", "gpio86", "gpio87", "gpio88"
 695 };
 696
 697 static const char * const uim1_groups[] = {
 698         "gpio97", "gpio98", "gpio99", "gpio100"
 699 };
 700
 701 static const char * const uim2_groups[] = {
 702         "gpio49", "gpio50", "gpio51", "gpio52"
 703 };
 704
 705 static const char * const uim_batt_alarm_groups[] = { "gpio101" };
 706
 707 static const char * const sdc3_groups[] = {
 708         "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"
 709 };
 710
 711 static const char * const sdc4_groups[] = {
 712         "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
 713 };
 714
 715 static const char * const gp0_clk_groups[] = { "gpio26" };
 716 static const char * const gp1_clk_groups[] = { "gpio27", "gpio57", "gpio78" };
 717 static const char * const gp_mn_groups[] = { "gpio29" };
 718 static const char * const gcc_gp_clk1_groups[] = { "gpio57", "gpio78" };
 719 static const char * const gcc_gp_clk2_groups[] = { "gpio58", "gpio81" };
 720 static const char * const gcc_gp_clk3_groups[] = { "gpio59", "gpio82" };
 721
 722 static const char * const qua_mi2s_groups[] = {
 723         "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
 724 };
 725
 726 static const char * const pri_mi2s_groups[] = {
 727         "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
 728 };
 729
 730 static const char * const spkr_mi2s_groups[] = {
 731         "gpio69", "gpio70", "gpio71", "gpio72"
 732 };
 733
 734 static const char * const ter_mi2s_groups[] = {
 735         "gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
 736 };
 737
 738 static const char * const sec_mi2s_groups[] = {
 739         "gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
 740 };
 741
 742 static const char * const hdmi_cec_groups[] = { "gpio31" };
 743 static const char * const hdmi_ddc_groups[] = { "gpio32", "gpio33" };
 744 static const char * const hdmi_hpd_groups[] = { "gpio34" };
 745 static const char * const edp_hpd_groups[] = { "gpio102" };
 746
 747 static const char * const mdp_vsync_groups[] = { "gpio12", "gpio13", "gpio14" };
 748 static const char * const cam_mclk0_groups[] = { "gpio15" };
 749 static const char * const cam_mclk1_groups[] = { "gpio16" };
 750 static const char * const cam_mclk2_groups[] = { "gpio17" };
 751 static const char * const cam_mclk3_groups[] = { "gpio18" };
 752
 753 static const char * const cci_timer0_groups[] = { "gpio23" };
 754 static const char * const cci_timer1_groups[] = { "gpio24" };
 755 static const char * const cci_timer2_groups[] = { "gpio25" };
 756 static const char * const cci_timer3_groups[] = { "gpio26" };
 757 static const char * const cci_timer4_groups[] = { "gpio27" };
 758 static const char * const cci_async_in0_groups[] = { "gpio28" };
 759 static const char * const cci_async_in1_groups[] = { "gpio26" };
 760 static const char * const cci_async_in2_groups[] = { "gpio27" };
 761
 762 static const char * const gp_pdm0_groups[] = { "gpio54", "gpio68" };
 763 static const char * const gp_pdm1_groups[] = { "gpio74", "gpio86" };
 764 static const char * const gp_pdm2_groups[] = { "gpio63", "gpio79" };
 765
 766 static const char * const tsif1_groups[] = {
 767         "gpio89", "gpio90", "gpio91", "gpio92"
 768 };
 769
 770 static const char * const tsif2_groups[] = {
 771         "gpio93", "gpio94", "gpio95", "gpio96"
 772 };
 773
 774 static const char * const hsic_groups[] = { "gpio144", "gpio145" };
 775 static const char * const grfc_groups[] = {
 776         "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109",
 777         "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115",
 778         "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
 779         "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio127",
 780         "gpio128", "gpio136", "gpio137", "gpio141", "gpio143"
 781 };
 782
 783 static const char * const audio_ref_clk_groups[] = { "gpio69" };
 784
 785 static const char * const bt_groups[] = { "gpio35", "gpio43", "gpio44" };
 786
 787 static const char * const fm_groups[] = { "gpio41", "gpio42" };
 788
 789 static const char * const wlan_groups[] = {
 790         "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"
 791 };
 792
 793 static const char * const slimbus_groups[] = { "gpio70", "gpio71" };
 794 static const char * const hsic_ctl_groups[] = { "hsic_strobe", "hsic_data" };
 795
 796 static const struct msm_function msm8x74_functions[] = {
 797         FUNCTION(gpio),
 798         FUNCTION(cci_i2c0),
 799         FUNCTION(cci_i2c1),
 800         FUNCTION(uim1),
 801         FUNCTION(uim2),
 802         FUNCTION(uim_batt_alarm),
 803         FUNCTION(blsp_uim1),
 804         FUNCTION(blsp_uim2),
 805         FUNCTION(blsp_uim3),
 806         FUNCTION(blsp_uim4),
 807         FUNCTION(blsp_uim5),
 808         FUNCTION(blsp_uim6),
 809         FUNCTION(blsp_uim7),
 810         FUNCTION(blsp_uim8),
 811         FUNCTION(blsp_uim9),
 812         FUNCTION(blsp_uim10),
 813         FUNCTION(blsp_uim11),
 814         FUNCTION(blsp_uim12),
 815         FUNCTION(blsp_i2c1),
 816         FUNCTION(blsp_i2c2),
 817         FUNCTION(blsp_i2c3),
 818         FUNCTION(blsp_i2c4),
 819         FUNCTION(blsp_i2c5),
 820         FUNCTION(blsp_i2c6),
 821         FUNCTION(blsp_i2c7),
 822         FUNCTION(blsp_i2c8),
 823         FUNCTION(blsp_i2c9),
 824         FUNCTION(blsp_i2c10),
 825         FUNCTION(blsp_i2c11),
 826         FUNCTION(blsp_i2c12),
 827         FUNCTION(blsp_spi1),
 828         FUNCTION(blsp_spi1_cs1),
 829         FUNCTION(blsp_spi1_cs2),
 830         FUNCTION(blsp_spi1_cs3),
 831         FUNCTION(blsp_spi2),
 832         FUNCTION(blsp_spi2_cs1),
 833         FUNCTION(blsp_spi2_cs2),
 834         FUNCTION(blsp_spi2_cs3),
 835         FUNCTION(blsp_spi3),
 836         FUNCTION(blsp_spi4),
 837         FUNCTION(blsp_spi5),
 838         FUNCTION(blsp_spi6),
 839         FUNCTION(blsp_spi7),
 840         FUNCTION(blsp_spi8),
 841         FUNCTION(blsp_spi9),
 842         FUNCTION(blsp_spi10),
 843         FUNCTION(blsp_spi10_cs1),
 844         FUNCTION(blsp_spi10_cs2),
 845         FUNCTION(blsp_spi10_cs3),
 846         FUNCTION(blsp_spi11),
 847         FUNCTION(blsp_spi12),
 848         FUNCTION(blsp_uart1),
 849         FUNCTION(blsp_uart2),
 850         FUNCTION(blsp_uart3),
 851         FUNCTION(blsp_uart4),
 852         FUNCTION(blsp_uart5),
 853         FUNCTION(blsp_uart6),
 854         FUNCTION(blsp_uart7),
 855         FUNCTION(blsp_uart8),
 856         FUNCTION(blsp_uart9),
 857         FUNCTION(blsp_uart10),
 858         FUNCTION(blsp_uart11),
 859         FUNCTION(blsp_uart12),
 860         FUNCTION(sdc3),
 861         FUNCTION(sdc4),
 862         FUNCTION(gcc_gp_clk1),
 863         FUNCTION(gcc_gp_clk2),
 864         FUNCTION(gcc_gp_clk3),
 865         FUNCTION(qua_mi2s),
 866         FUNCTION(pri_mi2s),
 867         FUNCTION(spkr_mi2s),
 868         FUNCTION(ter_mi2s),
 869         FUNCTION(sec_mi2s),
 870         FUNCTION(mdp_vsync),
 871         FUNCTION(cam_mclk0),
 872         FUNCTION(cam_mclk1),
 873         FUNCTION(cam_mclk2),
 874         FUNCTION(cam_mclk3),
 875         FUNCTION(cci_timer0),
 876         FUNCTION(cci_timer1),
 877         FUNCTION(cci_timer2),
 878         FUNCTION(cci_timer3),
 879         FUNCTION(cci_timer4),
 880         FUNCTION(cci_async_in0),
 881         FUNCTION(cci_async_in1),
 882         FUNCTION(cci_async_in2),
 883         FUNCTION(hdmi_cec),
 884         FUNCTION(hdmi_ddc),
 885         FUNCTION(hdmi_hpd),
 886         FUNCTION(edp_hpd),
 887         FUNCTION(gp_pdm0),
 888         FUNCTION(gp_pdm1),
 889         FUNCTION(gp_pdm2),
 890         FUNCTION(gp0_clk),
 891         FUNCTION(gp1_clk),
 892         FUNCTION(gp_mn),
 893         FUNCTION(tsif1),
 894         FUNCTION(tsif2),
 895         FUNCTION(hsic),
 896         FUNCTION(grfc),
 897         FUNCTION(audio_ref_clk),
 898         FUNCTION(bt),
 899         FUNCTION(fm),
 900         FUNCTION(wlan),
 901         FUNCTION(slimbus),
 902         FUNCTION(hsic_ctl),
 903 };
 904
 905 static const struct msm_pingroup msm8x74_groups[] = {
 906         PINGROUP(0,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
 907         PINGROUP(1,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
 908         PINGROUP(2,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
 909         PINGROUP(3,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
 910         PINGROUP(4,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
 911         PINGROUP(5,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
 912         PINGROUP(6,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
 913         PINGROUP(7,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
 914         PINGROUP(8,   blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA, NA),
 915         PINGROUP(9,   blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA, NA),
 916         PINGROUP(10,  blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs3, NA, NA, NA),
 917         PINGROUP(11,  blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs2, NA, NA, NA),
 918         PINGROUP(12,  mdp_vsync, NA, NA, NA, NA, NA, NA),
 919         PINGROUP(13,  mdp_vsync, NA, NA, NA, NA, NA, NA),
 920         PINGROUP(14,  mdp_vsync, NA, NA, NA, NA, NA, NA),
 921         PINGROUP(15,  cam_mclk0, NA, NA, NA, NA, NA, NA),
 922         PINGROUP(16,  cam_mclk1, NA, NA, NA, NA, NA, NA),
 923         PINGROUP(17,  cam_mclk2, NA, NA, NA, NA, NA, NA),
 924         PINGROUP(18,  cam_mclk3, NA, NA, NA, NA, NA, NA),
 925         PINGROUP(19,  cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA),
 926         PINGROUP(20,  cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA),
 927         PINGROUP(21,  cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA),
 928         PINGROUP(22,  cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA),
 929         PINGROUP(23,  cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA),
 930         PINGROUP(24,  cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA),
 931         PINGROUP(25,  cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA),
 932         PINGROUP(26,  cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5, blsp_i2c5, gp0_clk, NA),
 933         PINGROUP(27,  cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk, NA),
 934         PINGROUP(28,  cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA),
 935         PINGROUP(29,  blsp_spi6, blsp_uart6, blsp_i2c6, gp_mn, NA, NA, NA),
 936         PINGROUP(30,  blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
 937         PINGROUP(31,  hdmi_cec, NA, NA, NA, NA, NA, NA),
 938         PINGROUP(32,  hdmi_ddc, NA, NA, NA, NA, NA, NA),
 939         PINGROUP(33,  hdmi_ddc, NA, NA, NA, NA, NA, NA),
 940         PINGROUP(34,  hdmi_hpd, NA, NA, NA, NA, NA, NA),
 941         PINGROUP(35,  bt, sdc3, NA, NA, NA, NA, NA),
 942         PINGROUP(36,  wlan, sdc3, NA, NA, NA, NA, NA),
 943         PINGROUP(37,  wlan, sdc3, NA, NA, NA, NA, NA),
 944         PINGROUP(38,  wlan, sdc3, NA, NA, NA, NA, NA),
 945         PINGROUP(39,  wlan, sdc3, NA, NA, NA, NA, NA),
 946         PINGROUP(40,  wlan, sdc3, NA, NA, NA, NA, NA),
 947         PINGROUP(41,  fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
 948         PINGROUP(42,  fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
 949         PINGROUP(43,  bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
 950         PINGROUP(44,  bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
 951         PINGROUP(45,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
 952         PINGROUP(46,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
 953         PINGROUP(47,  blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA, NA),
 954         PINGROUP(48,  blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA, NA),
 955         PINGROUP(49,  uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA),
 956         PINGROUP(50,  uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA),
 957         PINGROUP(51,  uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA),
 958         PINGROUP(52,  uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA),
 959         PINGROUP(53,  blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs1, NA, NA, NA),
 960         PINGROUP(54,  blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs2, gp_pdm0, NA, NA),
 961         PINGROUP(55,  blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
 962         PINGROUP(56,  blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
 963         PINGROUP(57,  qua_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA),
 964         PINGROUP(58,  qua_mi2s, gcc_gp_clk2, NA, NA, NA, NA, NA),
 965         PINGROUP(59,  qua_mi2s, gcc_gp_clk3, NA, NA, NA, NA, NA),
 966         PINGROUP(60,  qua_mi2s, NA, NA, NA, NA, NA, NA),
 967         PINGROUP(61,  qua_mi2s, NA, NA, NA, NA, NA, NA),
 968         PINGROUP(62,  qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA),
 969         PINGROUP(63,  qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA),
 970         PINGROUP(64,  pri_mi2s, NA, NA, NA, NA, NA, NA),
 971         PINGROUP(65,  pri_mi2s, NA, NA, NA, NA, NA, NA),
 972         PINGROUP(66,  pri_mi2s, blsp_spi2_cs3, NA, NA, NA, NA, NA),
 973         PINGROUP(67,  pri_mi2s, blsp_spi10_cs1, NA, NA, NA, NA, NA),
 974         PINGROUP(68,  pri_mi2s, blsp_spi10_cs2, gp_pdm0, NA, NA, NA, NA),
 975         PINGROUP(69,  spkr_mi2s, audio_ref_clk, NA, NA, NA, NA, NA),
 976         PINGROUP(70,  slimbus, spkr_mi2s, NA, NA, NA, NA, NA),
 977         PINGROUP(71,  slimbus, spkr_mi2s, NA, NA, NA, NA, NA),
 978         PINGROUP(72,  spkr_mi2s, NA, NA, NA, NA, NA, NA),
 979         PINGROUP(73,  ter_mi2s, NA, NA, NA, NA, NA, NA),
 980         PINGROUP(74,  ter_mi2s, gp_pdm1, NA, NA, NA, NA, NA),
 981         PINGROUP(75,  ter_mi2s, NA, NA, NA, NA, NA, NA),
 982         PINGROUP(76,  ter_mi2s, NA, NA, NA, NA, NA, NA),
 983         PINGROUP(77,  ter_mi2s, NA, NA, NA, NA, NA, NA),
 984         PINGROUP(78,  sec_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA),
 985         PINGROUP(79,  sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA),
 986         PINGROUP(80,  sec_mi2s, NA, NA, NA, NA, NA, NA),
 987         PINGROUP(81,  sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk2, NA, NA),
 988         PINGROUP(82,  sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk3, NA, NA),
 989         PINGROUP(83,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
 990         PINGROUP(84,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
 991         PINGROUP(85,  blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, NA, NA),
 992         PINGROUP(86,  blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA, NA, NA),
 993         PINGROUP(87,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
 994         PINGROUP(88,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
 995         PINGROUP(89,  tsif1, NA, NA, NA, NA, NA, NA),
 996         PINGROUP(90,  tsif1, blsp_spi10_cs3, NA, NA, NA, NA, NA),
 997         PINGROUP(91,  tsif1, sdc4, NA, NA, NA, NA, NA),
 998         PINGROUP(92,  tsif1, sdc4, NA, NA, NA, NA, NA),
 999         PINGROUP(93,  tsif2, sdc4, NA, NA, NA, NA, NA),
1000         PINGROUP(94,  tsif2, sdc4, NA, NA, NA, NA, NA),
1001         PINGROUP(95,  tsif2, sdc4, NA, NA, NA, NA, NA),
1002         PINGROUP(96,  tsif2, sdc4, NA, NA, NA, NA, NA),
1003         PINGROUP(97,  uim1, NA, NA, NA, NA, NA, NA),
1004         PINGROUP(98,  uim1, NA, NA, NA, NA, NA, NA),
1005         PINGROUP(99,  uim1, NA, NA, NA, NA, NA, NA),
1006         PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA),
1007         PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA),
1008         PINGROUP(102, edp_hpd, NA, NA, NA, NA, NA, NA),
1009         PINGROUP(103, NA, NA, NA, NA, NA, NA, NA),
1010         PINGROUP(104, grfc, NA, NA, NA, NA, NA, NA),
1011         PINGROUP(105, grfc, NA, NA, NA, NA, NA, NA),
1012         PINGROUP(106, grfc, NA, NA, NA, NA, NA, NA),
1013         PINGROUP(107, grfc, NA, NA, NA, NA, NA, NA),
1014         PINGROUP(108, grfc, NA, NA, NA, NA, NA, NA),
1015         PINGROUP(109, grfc, NA, NA, NA, NA, NA, NA),
1016         PINGROUP(110, grfc, NA, NA, NA, NA, NA, NA),
1017         PINGROUP(111, grfc, NA, NA, NA, NA, NA, NA),
1018         PINGROUP(112, grfc, NA, NA, NA, NA, NA, NA),
1019         PINGROUP(113, grfc, NA, NA, NA, NA, NA, NA),
1020         PINGROUP(114, grfc, NA, NA, NA, NA, NA, NA),
1021         PINGROUP(115, grfc, NA, NA, NA, NA, NA, NA),
1022         PINGROUP(116, grfc, NA, NA, NA, NA, NA, NA),
1023         PINGROUP(117, grfc, NA, NA, NA, NA, NA, NA),
1024         PINGROUP(118, grfc, NA, NA, NA, NA, NA, NA),
1025         PINGROUP(119, grfc, NA, NA, NA, NA, NA, NA),
1026         PINGROUP(120, grfc, NA, NA, NA, NA, NA, NA),
1027         PINGROUP(121, grfc, NA, NA, NA, NA, NA, NA),
1028         PINGROUP(122, grfc, NA, NA, NA, NA, NA, NA),
1029         PINGROUP(123, grfc, NA, NA, NA, NA, NA, NA),
1030         PINGROUP(124, grfc, NA, NA, NA, NA, NA, NA),
1031         PINGROUP(125, grfc, NA, NA, NA, NA, NA, NA),
1032         PINGROUP(126, grfc, NA, NA, NA, NA, NA, NA),
1033         PINGROUP(127, grfc, NA, NA, NA, NA, NA, NA),
1034         PINGROUP(128, NA, grfc, NA, NA, NA, NA, NA),
1035         PINGROUP(129, NA, NA, NA, NA, NA, NA, NA),
1036         PINGROUP(130, NA, NA, NA, NA, NA, NA, NA),
1037         PINGROUP(131, NA, NA, NA, NA, NA, NA, NA),
1038         PINGROUP(132, NA, NA, NA, NA, NA, NA, NA),
1039         PINGROUP(133, NA, NA, NA, NA, NA, NA, NA),
1040         PINGROUP(134, NA, NA, NA, NA, NA, NA, NA),
1041         PINGROUP(135, NA, NA, NA, NA, NA, NA, NA),
1042         PINGROUP(136, NA, grfc, NA, NA, NA, NA, NA),
1043         PINGROUP(137, NA, grfc, NA, NA, NA, NA, NA),
1044         PINGROUP(138, NA, NA, NA, NA, NA, NA, NA),
1045         PINGROUP(139, NA, NA, NA, NA, NA, NA, NA),
1046         PINGROUP(140, NA, NA, NA, NA, NA, NA, NA),
1047         PINGROUP(141, NA, grfc, NA, NA, NA, NA, NA),
1048         PINGROUP(142, NA, NA, NA, NA, NA, NA, NA),
1049         PINGROUP(143, NA, grfc, NA, NA, NA, NA, NA),
1050         PINGROUP(144, hsic, NA, NA, NA, NA, NA, NA),
1051         PINGROUP(145, hsic, NA, NA, NA, NA, NA, NA),
1052         SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1053         SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1054         SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1055         SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1056         SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1057         SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1058         HSIC_PINGROUP(hsic_strobe, 0x2050),
1059         HSIC_PINGROUP(hsic_data, 0x2054),
1060 };
1061
1062 #define NUM_GPIO_PINGROUPS 146
1063
1064 static const struct msm_pinctrl_soc_data msm8x74_pinctrl = {
1065         .pins = msm8x74_pins,
1066         .npins = ARRAY_SIZE(msm8x74_pins),
1067         .functions = msm8x74_functions,
1068         .nfunctions = ARRAY_SIZE(msm8x74_functions),
1069         .groups = msm8x74_groups,
1070         .ngroups = ARRAY_SIZE(msm8x74_groups),
1071         .ngpios = NUM_GPIO_PINGROUPS,
1072 };
1073
1074 static int msm8x74_pinctrl_probe(struct platform_device *pdev)
1075 {
1076         return msm_pinctrl_probe(pdev, &msm8x74_pinctrl);
1077 }
1078
1079 static const struct of_device_id msm8x74_pinctrl_of_match[] = {
1080         { .compatible = "qcom,msm8974-pinctrl", },
1081         { },
1082 };
1083
1084 static struct platform_driver msm8x74_pinctrl_driver = {
1085         .driver = {
1086                 .name = "msm8x74-pinctrl",
1087                 .of_match_table = msm8x74_pinctrl_of_match,
1088         },
1089         .probe = msm8x74_pinctrl_probe,
1090         .remove = msm_pinctrl_remove,
1091 };
1092
1093 static int __init msm8x74_pinctrl_init(void)
1094 {
1095         return platform_driver_register(&msm8x74_pinctrl_driver);
1096 }
1097 arch_initcall(msm8x74_pinctrl_init);
1098
1099 static void __exit msm8x74_pinctrl_exit(void)
1100 {
1101         platform_driver_unregister(&msm8x74_pinctrl_driver);
1102 }
1103 module_exit(msm8x74_pinctrl_exit);
1104
1105 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
1106 MODULE_DESCRIPTION("Qualcomm MSM8x74 pinctrl driver");
1107 MODULE_LICENSE("GPL v2");
1108 MODULE_DEVICE_TABLE(of, msm8x74_pinctrl_of_match);
1109