2 * SuperH Pin Function Controller pinmux support.
4 * Copyright (C) 2012 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
11 #define DRV_NAME "sh-pfc"
12 #define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
14 #include <linux/device.h>
15 #include <linux/err.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/pinctrl/pinconf.h>
20 #include <linux/pinctrl/pinconf-generic.h>
21 #include <linux/pinctrl/pinctrl.h>
22 #include <linux/pinctrl/pinmux.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
28 struct sh_pfc_pinctrl
{
29 struct pinctrl_dev
*pctl
;
32 struct pinmux_gpio
**functions
;
33 unsigned int nr_functions
;
35 struct pinctrl_pin_desc
*pads
;
41 static int sh_pfc_get_groups_count(struct pinctrl_dev
*pctldev
)
43 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
48 static const char *sh_pfc_get_group_name(struct pinctrl_dev
*pctldev
,
51 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
53 return pmx
->pads
[selector
].name
;
56 static int sh_pfc_get_group_pins(struct pinctrl_dev
*pctldev
, unsigned group
,
57 const unsigned **pins
, unsigned *num_pins
)
59 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
61 *pins
= &pmx
->pads
[group
].number
;
67 static void sh_pfc_pin_dbg_show(struct pinctrl_dev
*pctldev
, struct seq_file
*s
,
70 seq_printf(s
, "%s", DRV_NAME
);
73 static struct pinctrl_ops sh_pfc_pinctrl_ops
= {
74 .get_groups_count
= sh_pfc_get_groups_count
,
75 .get_group_name
= sh_pfc_get_group_name
,
76 .get_group_pins
= sh_pfc_get_group_pins
,
77 .pin_dbg_show
= sh_pfc_pin_dbg_show
,
80 static int sh_pfc_get_functions_count(struct pinctrl_dev
*pctldev
)
82 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
84 return pmx
->nr_functions
;
87 static const char *sh_pfc_get_function_name(struct pinctrl_dev
*pctldev
,
90 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
92 return pmx
->functions
[selector
]->name
;
95 static int sh_pfc_get_function_groups(struct pinctrl_dev
*pctldev
, unsigned func
,
96 const char * const **groups
,
97 unsigned * const num_groups
)
99 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
101 *groups
= &pmx
->functions
[func
]->name
;
107 static int sh_pfc_noop_enable(struct pinctrl_dev
*pctldev
, unsigned func
,
113 static void sh_pfc_noop_disable(struct pinctrl_dev
*pctldev
, unsigned func
,
118 static int sh_pfc_config_function(struct sh_pfc
*pfc
, unsigned offset
)
120 if (sh_pfc_config_gpio(pfc
, offset
,
121 PINMUX_TYPE_FUNCTION
,
122 GPIO_CFG_DRYRUN
) != 0)
125 if (sh_pfc_config_gpio(pfc
, offset
,
126 PINMUX_TYPE_FUNCTION
,
133 static int sh_pfc_reconfig_pin(struct sh_pfc
*pfc
, unsigned offset
,
140 spin_lock_irqsave(&pfc
->lock
, flags
);
142 pinmux_type
= pfc
->info
->gpios
[offset
].flags
& PINMUX_FLAG_TYPE
;
145 * See if the present config needs to first be de-configured.
147 switch (pinmux_type
) {
148 case PINMUX_TYPE_GPIO
:
150 case PINMUX_TYPE_OUTPUT
:
151 case PINMUX_TYPE_INPUT
:
152 case PINMUX_TYPE_INPUT_PULLUP
:
153 case PINMUX_TYPE_INPUT_PULLDOWN
:
154 sh_pfc_config_gpio(pfc
, offset
, pinmux_type
, GPIO_CFG_FREE
);
163 if (sh_pfc_config_gpio(pfc
, offset
, new_type
,
164 GPIO_CFG_DRYRUN
) != 0)
170 if (sh_pfc_config_gpio(pfc
, offset
, new_type
,
174 pfc
->info
->gpios
[offset
].flags
&= ~PINMUX_FLAG_TYPE
;
175 pfc
->info
->gpios
[offset
].flags
|= new_type
;
180 spin_unlock_irqrestore(&pfc
->lock
, flags
);
186 static int sh_pfc_gpio_request_enable(struct pinctrl_dev
*pctldev
,
187 struct pinctrl_gpio_range
*range
,
190 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
191 struct sh_pfc
*pfc
= pmx
->pfc
;
193 int ret
, pinmux_type
;
195 spin_lock_irqsave(&pfc
->lock
, flags
);
197 pinmux_type
= pfc
->info
->gpios
[offset
].flags
& PINMUX_FLAG_TYPE
;
199 switch (pinmux_type
) {
200 case PINMUX_TYPE_FUNCTION
:
201 pr_notice_once("Use of GPIO API for function requests is "
202 "deprecated, convert to pinctrl\n");
204 ret
= sh_pfc_config_function(pfc
, offset
);
205 if (unlikely(ret
< 0))
209 case PINMUX_TYPE_GPIO
:
210 case PINMUX_TYPE_INPUT
:
211 case PINMUX_TYPE_OUTPUT
:
214 pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type
);
222 spin_unlock_irqrestore(&pfc
->lock
, flags
);
227 static void sh_pfc_gpio_disable_free(struct pinctrl_dev
*pctldev
,
228 struct pinctrl_gpio_range
*range
,
231 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
232 struct sh_pfc
*pfc
= pmx
->pfc
;
236 spin_lock_irqsave(&pfc
->lock
, flags
);
238 pinmux_type
= pfc
->info
->gpios
[offset
].flags
& PINMUX_FLAG_TYPE
;
240 sh_pfc_config_gpio(pfc
, offset
, pinmux_type
, GPIO_CFG_FREE
);
242 spin_unlock_irqrestore(&pfc
->lock
, flags
);
245 static int sh_pfc_gpio_set_direction(struct pinctrl_dev
*pctldev
,
246 struct pinctrl_gpio_range
*range
,
247 unsigned offset
, bool input
)
249 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
250 int type
= input
? PINMUX_TYPE_INPUT
: PINMUX_TYPE_OUTPUT
;
252 return sh_pfc_reconfig_pin(pmx
->pfc
, offset
, type
);
255 static struct pinmux_ops sh_pfc_pinmux_ops
= {
256 .get_functions_count
= sh_pfc_get_functions_count
,
257 .get_function_name
= sh_pfc_get_function_name
,
258 .get_function_groups
= sh_pfc_get_function_groups
,
259 .enable
= sh_pfc_noop_enable
,
260 .disable
= sh_pfc_noop_disable
,
261 .gpio_request_enable
= sh_pfc_gpio_request_enable
,
262 .gpio_disable_free
= sh_pfc_gpio_disable_free
,
263 .gpio_set_direction
= sh_pfc_gpio_set_direction
,
266 static int sh_pfc_pinconf_get(struct pinctrl_dev
*pctldev
, unsigned pin
,
267 unsigned long *config
)
269 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
270 struct sh_pfc
*pfc
= pmx
->pfc
;
272 *config
= pfc
->info
->gpios
[pin
].flags
& PINMUX_FLAG_TYPE
;
277 static int sh_pfc_pinconf_set(struct pinctrl_dev
*pctldev
, unsigned pin
,
278 unsigned long config
)
280 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
282 /* Validate the new type */
283 if (config
>= PINMUX_FLAG_TYPE
)
286 return sh_pfc_reconfig_pin(pmx
->pfc
, pin
, config
);
289 static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev
*pctldev
,
290 struct seq_file
*s
, unsigned pin
)
292 const char *pinmux_type_str
[] = {
293 [PINMUX_TYPE_NONE
] = "none",
294 [PINMUX_TYPE_FUNCTION
] = "function",
295 [PINMUX_TYPE_GPIO
] = "gpio",
296 [PINMUX_TYPE_OUTPUT
] = "output",
297 [PINMUX_TYPE_INPUT
] = "input",
298 [PINMUX_TYPE_INPUT_PULLUP
] = "input bias pull up",
299 [PINMUX_TYPE_INPUT_PULLDOWN
] = "input bias pull down",
301 unsigned long config
;
304 rc
= sh_pfc_pinconf_get(pctldev
, pin
, &config
);
305 if (unlikely(rc
!= 0))
308 seq_printf(s
, " %s", pinmux_type_str
[config
]);
311 static struct pinconf_ops sh_pfc_pinconf_ops
= {
312 .pin_config_get
= sh_pfc_pinconf_get
,
313 .pin_config_set
= sh_pfc_pinconf_set
,
314 .pin_config_dbg_show
= sh_pfc_pinconf_dbg_show
,
317 static struct pinctrl_gpio_range sh_pfc_gpio_range
= {
322 static struct pinctrl_desc sh_pfc_pinctrl_desc
= {
324 .owner
= THIS_MODULE
,
325 .pctlops
= &sh_pfc_pinctrl_ops
,
326 .pmxops
= &sh_pfc_pinmux_ops
,
327 .confops
= &sh_pfc_pinconf_ops
,
330 static void sh_pfc_map_one_gpio(struct sh_pfc
*pfc
, struct sh_pfc_pinctrl
*pmx
,
331 struct pinmux_gpio
*gpio
, unsigned offset
)
333 struct pinmux_data_reg
*dummy
;
337 gpio
->flags
&= ~PINMUX_FLAG_TYPE
;
339 if (sh_pfc_get_data_reg(pfc
, offset
, &dummy
, &bit
) == 0)
340 gpio
->flags
|= PINMUX_TYPE_GPIO
;
342 gpio
->flags
|= PINMUX_TYPE_FUNCTION
;
344 spin_lock_irqsave(&pmx
->lock
, flags
);
346 spin_unlock_irqrestore(&pmx
->lock
, flags
);
350 /* pinmux ranges -> pinctrl pin descs */
351 static int sh_pfc_map_gpios(struct sh_pfc
*pfc
, struct sh_pfc_pinctrl
*pmx
)
356 pmx
->nr_pads
= pfc
->info
->last_gpio
- pfc
->info
->first_gpio
+ 1;
358 pmx
->pads
= devm_kzalloc(pfc
->dev
, sizeof(*pmx
->pads
) * pmx
->nr_pads
,
360 if (unlikely(!pmx
->pads
)) {
365 spin_lock_irqsave(&pfc
->lock
, flags
);
368 * We don't necessarily have a 1:1 mapping between pin and linux
369 * GPIO number, as the latter maps to the associated enum_id.
370 * Care needs to be taken to translate back to pin space when
371 * dealing with any pin configurations.
373 for (i
= 0; i
< pmx
->nr_pads
; i
++) {
374 struct pinctrl_pin_desc
*pin
= pmx
->pads
+ i
;
375 struct pinmux_gpio
*gpio
= pfc
->info
->gpios
+ i
;
377 pin
->number
= pfc
->info
->first_gpio
+ i
;
378 pin
->name
= gpio
->name
;
381 if (unlikely(!gpio
->enum_id
))
384 sh_pfc_map_one_gpio(pfc
, pmx
, gpio
, i
);
387 spin_unlock_irqrestore(&pfc
->lock
, flags
);
389 sh_pfc_pinctrl_desc
.pins
= pmx
->pads
;
390 sh_pfc_pinctrl_desc
.npins
= pmx
->nr_pads
;
395 static int sh_pfc_map_functions(struct sh_pfc
*pfc
, struct sh_pfc_pinctrl
*pmx
)
400 pmx
->functions
= devm_kzalloc(pfc
->dev
, pmx
->nr_functions
*
401 sizeof(*pmx
->functions
), GFP_KERNEL
);
402 if (unlikely(!pmx
->functions
))
405 spin_lock_irqsave(&pmx
->lock
, flags
);
407 for (i
= fn
= 0; i
< pmx
->nr_pads
; i
++) {
408 struct pinmux_gpio
*gpio
= pfc
->info
->gpios
+ i
;
410 if ((gpio
->flags
& PINMUX_FLAG_TYPE
) == PINMUX_TYPE_FUNCTION
)
411 pmx
->functions
[fn
++] = gpio
;
414 spin_unlock_irqrestore(&pmx
->lock
, flags
);
419 int sh_pfc_register_pinctrl(struct sh_pfc
*pfc
)
421 struct sh_pfc_pinctrl
*pmx
;
424 pmx
= devm_kzalloc(pfc
->dev
, sizeof(*pmx
), GFP_KERNEL
);
428 spin_lock_init(&pmx
->lock
);
433 ret
= sh_pfc_map_gpios(pfc
, pmx
);
434 if (unlikely(ret
!= 0))
437 ret
= sh_pfc_map_functions(pfc
, pmx
);
438 if (unlikely(ret
!= 0))
441 pmx
->pctl
= pinctrl_register(&sh_pfc_pinctrl_desc
, pfc
->dev
, pmx
);
442 if (IS_ERR(pmx
->pctl
))
443 return PTR_ERR(pmx
->pctl
);
445 sh_pfc_gpio_range
.npins
= pfc
->info
->last_gpio
446 - pfc
->info
->first_gpio
+ 1;
447 sh_pfc_gpio_range
.base
= pfc
->info
->first_gpio
;
448 sh_pfc_gpio_range
.pin_base
= pfc
->info
->first_gpio
;
450 pinctrl_add_gpio_range(pmx
->pctl
, &sh_pfc_gpio_range
);
455 int sh_pfc_unregister_pinctrl(struct sh_pfc
*pfc
)
457 struct sh_pfc_pinctrl
*pmx
= pfc
->pinctrl
;
459 pinctrl_unregister(pmx
->pctl
);