2 * SuperH Pin Function Controller pinmux support.
4 * Copyright (C) 2012 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
11 #define DRV_NAME "sh-pfc"
12 #define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
14 #include <linux/device.h>
15 #include <linux/err.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/pinctrl/pinconf.h>
20 #include <linux/pinctrl/pinconf-generic.h>
21 #include <linux/pinctrl/pinctrl.h>
22 #include <linux/pinctrl/pinmux.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
28 struct sh_pfc_pinctrl
{
29 struct pinctrl_dev
*pctl
;
30 struct pinctrl_desc pctl_desc
;
31 struct pinctrl_gpio_range range
;
35 struct pinmux_func
**functions
;
36 unsigned int nr_functions
;
38 struct pinctrl_pin_desc
*pads
;
42 static int sh_pfc_get_groups_count(struct pinctrl_dev
*pctldev
)
44 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
49 static const char *sh_pfc_get_group_name(struct pinctrl_dev
*pctldev
,
52 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
54 return pmx
->pads
[selector
].name
;
57 static int sh_pfc_get_group_pins(struct pinctrl_dev
*pctldev
, unsigned group
,
58 const unsigned **pins
, unsigned *num_pins
)
60 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
62 *pins
= &pmx
->pads
[group
].number
;
68 static void sh_pfc_pin_dbg_show(struct pinctrl_dev
*pctldev
, struct seq_file
*s
,
71 seq_printf(s
, "%s", DRV_NAME
);
74 static const struct pinctrl_ops sh_pfc_pinctrl_ops
= {
75 .get_groups_count
= sh_pfc_get_groups_count
,
76 .get_group_name
= sh_pfc_get_group_name
,
77 .get_group_pins
= sh_pfc_get_group_pins
,
78 .pin_dbg_show
= sh_pfc_pin_dbg_show
,
81 static int sh_pfc_get_functions_count(struct pinctrl_dev
*pctldev
)
83 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
85 return pmx
->nr_functions
;
88 static const char *sh_pfc_get_function_name(struct pinctrl_dev
*pctldev
,
91 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
93 return pmx
->functions
[selector
]->name
;
96 static int sh_pfc_get_function_groups(struct pinctrl_dev
*pctldev
, unsigned func
,
97 const char * const **groups
,
98 unsigned * const num_groups
)
100 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
102 *groups
= &pmx
->functions
[func
]->name
;
108 static int sh_pfc_noop_enable(struct pinctrl_dev
*pctldev
, unsigned func
,
114 static void sh_pfc_noop_disable(struct pinctrl_dev
*pctldev
, unsigned func
,
119 static int sh_pfc_reconfig_pin(struct sh_pfc
*pfc
, unsigned offset
,
126 spin_lock_irqsave(&pfc
->lock
, flags
);
128 pinmux_type
= pfc
->info
->pins
[offset
].flags
& PINMUX_FLAG_TYPE
;
131 * See if the present config needs to first be de-configured.
133 switch (pinmux_type
) {
134 case PINMUX_TYPE_GPIO
:
136 case PINMUX_TYPE_OUTPUT
:
137 case PINMUX_TYPE_INPUT
:
138 case PINMUX_TYPE_INPUT_PULLUP
:
139 case PINMUX_TYPE_INPUT_PULLDOWN
:
140 sh_pfc_config_gpio(pfc
, offset
, pinmux_type
, GPIO_CFG_FREE
);
149 if (sh_pfc_config_gpio(pfc
, offset
, new_type
,
150 GPIO_CFG_DRYRUN
) != 0)
156 if (sh_pfc_config_gpio(pfc
, offset
, new_type
,
160 pfc
->info
->pins
[offset
].flags
&= ~PINMUX_FLAG_TYPE
;
161 pfc
->info
->pins
[offset
].flags
|= new_type
;
166 spin_unlock_irqrestore(&pfc
->lock
, flags
);
171 static int sh_pfc_gpio_request_enable(struct pinctrl_dev
*pctldev
,
172 struct pinctrl_gpio_range
*range
,
175 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
176 struct sh_pfc
*pfc
= pmx
->pfc
;
178 int ret
, pinmux_type
;
180 spin_lock_irqsave(&pfc
->lock
, flags
);
182 pinmux_type
= pfc
->info
->pins
[offset
].flags
& PINMUX_FLAG_TYPE
;
184 switch (pinmux_type
) {
185 case PINMUX_TYPE_GPIO
:
186 case PINMUX_TYPE_INPUT
:
187 case PINMUX_TYPE_OUTPUT
:
189 case PINMUX_TYPE_FUNCTION
:
191 pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type
);
199 spin_unlock_irqrestore(&pfc
->lock
, flags
);
204 static void sh_pfc_gpio_disable_free(struct pinctrl_dev
*pctldev
,
205 struct pinctrl_gpio_range
*range
,
208 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
209 struct sh_pfc
*pfc
= pmx
->pfc
;
213 spin_lock_irqsave(&pfc
->lock
, flags
);
215 pinmux_type
= pfc
->info
->pins
[offset
].flags
& PINMUX_FLAG_TYPE
;
217 sh_pfc_config_gpio(pfc
, offset
, pinmux_type
, GPIO_CFG_FREE
);
219 spin_unlock_irqrestore(&pfc
->lock
, flags
);
222 static int sh_pfc_gpio_set_direction(struct pinctrl_dev
*pctldev
,
223 struct pinctrl_gpio_range
*range
,
224 unsigned offset
, bool input
)
226 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
227 int type
= input
? PINMUX_TYPE_INPUT
: PINMUX_TYPE_OUTPUT
;
229 return sh_pfc_reconfig_pin(pmx
->pfc
, offset
, type
);
232 static const struct pinmux_ops sh_pfc_pinmux_ops
= {
233 .get_functions_count
= sh_pfc_get_functions_count
,
234 .get_function_name
= sh_pfc_get_function_name
,
235 .get_function_groups
= sh_pfc_get_function_groups
,
236 .enable
= sh_pfc_noop_enable
,
237 .disable
= sh_pfc_noop_disable
,
238 .gpio_request_enable
= sh_pfc_gpio_request_enable
,
239 .gpio_disable_free
= sh_pfc_gpio_disable_free
,
240 .gpio_set_direction
= sh_pfc_gpio_set_direction
,
243 static int sh_pfc_pinconf_get(struct pinctrl_dev
*pctldev
, unsigned pin
,
244 unsigned long *config
)
246 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
247 struct sh_pfc
*pfc
= pmx
->pfc
;
249 *config
= pfc
->info
->pins
[pin
].flags
& PINMUX_FLAG_TYPE
;
254 static int sh_pfc_pinconf_set(struct pinctrl_dev
*pctldev
, unsigned pin
,
255 unsigned long config
)
257 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
259 /* Validate the new type */
260 if (config
>= PINMUX_FLAG_TYPE
)
263 return sh_pfc_reconfig_pin(pmx
->pfc
, pin
, config
);
266 static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev
*pctldev
,
267 struct seq_file
*s
, unsigned pin
)
269 const char *pinmux_type_str
[] = {
270 [PINMUX_TYPE_NONE
] = "none",
271 [PINMUX_TYPE_FUNCTION
] = "function",
272 [PINMUX_TYPE_GPIO
] = "gpio",
273 [PINMUX_TYPE_OUTPUT
] = "output",
274 [PINMUX_TYPE_INPUT
] = "input",
275 [PINMUX_TYPE_INPUT_PULLUP
] = "input bias pull up",
276 [PINMUX_TYPE_INPUT_PULLDOWN
] = "input bias pull down",
278 unsigned long config
;
281 rc
= sh_pfc_pinconf_get(pctldev
, pin
, &config
);
282 if (unlikely(rc
!= 0))
285 seq_printf(s
, " %s", pinmux_type_str
[config
]);
288 static const struct pinconf_ops sh_pfc_pinconf_ops
= {
289 .pin_config_get
= sh_pfc_pinconf_get
,
290 .pin_config_set
= sh_pfc_pinconf_set
,
291 .pin_config_dbg_show
= sh_pfc_pinconf_dbg_show
,
294 /* pinmux ranges -> pinctrl pin descs */
295 static int sh_pfc_map_gpios(struct sh_pfc
*pfc
, struct sh_pfc_pinctrl
*pmx
)
299 pmx
->nr_pads
= pfc
->info
->nr_pins
;
301 pmx
->pads
= devm_kzalloc(pfc
->dev
, sizeof(*pmx
->pads
) * pmx
->nr_pads
,
303 if (unlikely(!pmx
->pads
)) {
308 for (i
= 0; i
< pmx
->nr_pads
; i
++) {
309 struct pinctrl_pin_desc
*pin
= pmx
->pads
+ i
;
310 struct sh_pfc_pin
*gpio
= pfc
->info
->pins
+ i
;
313 pin
->name
= gpio
->name
;
319 static int sh_pfc_map_functions(struct sh_pfc
*pfc
, struct sh_pfc_pinctrl
*pmx
)
323 for (i
= 0; i
< pfc
->info
->nr_func_gpios
; i
++) {
324 struct pinmux_func
*func
= pfc
->info
->func_gpios
+ i
;
330 pmx
->functions
= devm_kzalloc(pfc
->dev
, pmx
->nr_functions
*
331 sizeof(*pmx
->functions
), GFP_KERNEL
);
332 if (unlikely(!pmx
->functions
))
335 for (i
= fn
= 0; i
< pfc
->info
->nr_func_gpios
; i
++) {
336 struct pinmux_func
*func
= pfc
->info
->func_gpios
+ i
;
339 pmx
->functions
[fn
++] = func
;
345 int sh_pfc_register_pinctrl(struct sh_pfc
*pfc
)
347 struct sh_pfc_pinctrl
*pmx
;
350 pmx
= devm_kzalloc(pfc
->dev
, sizeof(*pmx
), GFP_KERNEL
);
357 ret
= sh_pfc_map_gpios(pfc
, pmx
);
358 if (unlikely(ret
!= 0))
361 ret
= sh_pfc_map_functions(pfc
, pmx
);
362 if (unlikely(ret
!= 0))
365 pmx
->pctl_desc
.name
= DRV_NAME
;
366 pmx
->pctl_desc
.owner
= THIS_MODULE
;
367 pmx
->pctl_desc
.pctlops
= &sh_pfc_pinctrl_ops
;
368 pmx
->pctl_desc
.pmxops
= &sh_pfc_pinmux_ops
;
369 pmx
->pctl_desc
.confops
= &sh_pfc_pinconf_ops
;
370 pmx
->pctl_desc
.pins
= pmx
->pads
;
371 pmx
->pctl_desc
.npins
= pmx
->nr_pads
;
373 pmx
->pctl
= pinctrl_register(&pmx
->pctl_desc
, pfc
->dev
, pmx
);
374 if (IS_ERR(pmx
->pctl
))
375 return PTR_ERR(pmx
->pctl
);
377 pmx
->range
.name
= DRV_NAME
,
379 pmx
->range
.npins
= pfc
->info
->nr_pins
;
381 pmx
->range
.pin_base
= 0;
383 pinctrl_add_gpio_range(pmx
->pctl
, &pmx
->range
);
388 int sh_pfc_unregister_pinctrl(struct sh_pfc
*pfc
)
390 struct sh_pfc_pinctrl
*pmx
= pfc
->pinctrl
;
392 pinctrl_unregister(pmx
->pctl
);