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sh-pfc: Rename struct pinmux_pin to struct sh_pfc_pin
[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / sh-pfc / pinctrl.c
1 /*
2 * SuperH Pin Function Controller pinmux support.
3 *
4 * Copyright (C) 2012 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11 #define DRV_NAME "sh-pfc"
12 #define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
13
14 #include <linux/device.h>
15 #include <linux/err.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/pinctrl/pinconf.h>
20 #include <linux/pinctrl/pinconf-generic.h>
21 #include <linux/pinctrl/pinctrl.h>
22 #include <linux/pinctrl/pinmux.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
25
26 #include "core.h"
27
28 struct sh_pfc_pinctrl {
29 struct pinctrl_dev *pctl;
30 struct pinctrl_desc pctl_desc;
31 struct pinctrl_gpio_range range;
32
33 struct sh_pfc *pfc;
34
35 struct pinmux_func **functions;
36 unsigned int nr_functions;
37
38 struct pinctrl_pin_desc *pads;
39 unsigned int nr_pads;
40 };
41
42 static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
43 {
44 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
45
46 return pmx->nr_pads;
47 }
48
49 static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
50 unsigned selector)
51 {
52 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
53
54 return pmx->pads[selector].name;
55 }
56
57 static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
58 const unsigned **pins, unsigned *num_pins)
59 {
60 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
61
62 *pins = &pmx->pads[group].number;
63 *num_pins = 1;
64
65 return 0;
66 }
67
68 static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
69 unsigned offset)
70 {
71 seq_printf(s, "%s", DRV_NAME);
72 }
73
74 static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
75 .get_groups_count = sh_pfc_get_groups_count,
76 .get_group_name = sh_pfc_get_group_name,
77 .get_group_pins = sh_pfc_get_group_pins,
78 .pin_dbg_show = sh_pfc_pin_dbg_show,
79 };
80
81 static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
82 {
83 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
84
85 return pmx->nr_functions;
86 }
87
88 static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
89 unsigned selector)
90 {
91 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
92
93 return pmx->functions[selector]->name;
94 }
95
96 static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
97 const char * const **groups,
98 unsigned * const num_groups)
99 {
100 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
101
102 *groups = &pmx->functions[func]->name;
103 *num_groups = 1;
104
105 return 0;
106 }
107
108 static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
109 unsigned group)
110 {
111 return 0;
112 }
113
114 static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
115 unsigned group)
116 {
117 }
118
119 static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
120 int new_type)
121 {
122 unsigned long flags;
123 int pinmux_type;
124 int ret = -EINVAL;
125
126 spin_lock_irqsave(&pfc->lock, flags);
127
128 pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
129
130 /*
131 * See if the present config needs to first be de-configured.
132 */
133 switch (pinmux_type) {
134 case PINMUX_TYPE_GPIO:
135 break;
136 case PINMUX_TYPE_OUTPUT:
137 case PINMUX_TYPE_INPUT:
138 case PINMUX_TYPE_INPUT_PULLUP:
139 case PINMUX_TYPE_INPUT_PULLDOWN:
140 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
141 break;
142 default:
143 goto err;
144 }
145
146 /*
147 * Dry run
148 */
149 if (sh_pfc_config_gpio(pfc, offset, new_type,
150 GPIO_CFG_DRYRUN) != 0)
151 goto err;
152
153 /*
154 * Request
155 */
156 if (sh_pfc_config_gpio(pfc, offset, new_type,
157 GPIO_CFG_REQ) != 0)
158 goto err;
159
160 pfc->info->pins[offset].flags &= ~PINMUX_FLAG_TYPE;
161 pfc->info->pins[offset].flags |= new_type;
162
163 ret = 0;
164
165 err:
166 spin_unlock_irqrestore(&pfc->lock, flags);
167
168 return ret;
169 }
170
171 static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
172 struct pinctrl_gpio_range *range,
173 unsigned offset)
174 {
175 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
176 struct sh_pfc *pfc = pmx->pfc;
177 unsigned long flags;
178 int ret, pinmux_type;
179
180 spin_lock_irqsave(&pfc->lock, flags);
181
182 pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
183
184 switch (pinmux_type) {
185 case PINMUX_TYPE_GPIO:
186 case PINMUX_TYPE_INPUT:
187 case PINMUX_TYPE_OUTPUT:
188 break;
189 case PINMUX_TYPE_FUNCTION:
190 default:
191 pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
192 ret = -ENOTSUPP;
193 goto err;
194 }
195
196 ret = 0;
197
198 err:
199 spin_unlock_irqrestore(&pfc->lock, flags);
200
201 return ret;
202 }
203
204 static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
205 struct pinctrl_gpio_range *range,
206 unsigned offset)
207 {
208 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
209 struct sh_pfc *pfc = pmx->pfc;
210 unsigned long flags;
211 int pinmux_type;
212
213 spin_lock_irqsave(&pfc->lock, flags);
214
215 pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
216
217 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
218
219 spin_unlock_irqrestore(&pfc->lock, flags);
220 }
221
222 static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
223 struct pinctrl_gpio_range *range,
224 unsigned offset, bool input)
225 {
226 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
227 int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
228
229 return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
230 }
231
232 static const struct pinmux_ops sh_pfc_pinmux_ops = {
233 .get_functions_count = sh_pfc_get_functions_count,
234 .get_function_name = sh_pfc_get_function_name,
235 .get_function_groups = sh_pfc_get_function_groups,
236 .enable = sh_pfc_noop_enable,
237 .disable = sh_pfc_noop_disable,
238 .gpio_request_enable = sh_pfc_gpio_request_enable,
239 .gpio_disable_free = sh_pfc_gpio_disable_free,
240 .gpio_set_direction = sh_pfc_gpio_set_direction,
241 };
242
243 static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
244 unsigned long *config)
245 {
246 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
247 struct sh_pfc *pfc = pmx->pfc;
248
249 *config = pfc->info->pins[pin].flags & PINMUX_FLAG_TYPE;
250
251 return 0;
252 }
253
254 static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
255 unsigned long config)
256 {
257 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
258
259 /* Validate the new type */
260 if (config >= PINMUX_FLAG_TYPE)
261 return -EINVAL;
262
263 return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
264 }
265
266 static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
267 struct seq_file *s, unsigned pin)
268 {
269 const char *pinmux_type_str[] = {
270 [PINMUX_TYPE_NONE] = "none",
271 [PINMUX_TYPE_FUNCTION] = "function",
272 [PINMUX_TYPE_GPIO] = "gpio",
273 [PINMUX_TYPE_OUTPUT] = "output",
274 [PINMUX_TYPE_INPUT] = "input",
275 [PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
276 [PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
277 };
278 unsigned long config;
279 int rc;
280
281 rc = sh_pfc_pinconf_get(pctldev, pin, &config);
282 if (unlikely(rc != 0))
283 return;
284
285 seq_printf(s, " %s", pinmux_type_str[config]);
286 }
287
288 static const struct pinconf_ops sh_pfc_pinconf_ops = {
289 .pin_config_get = sh_pfc_pinconf_get,
290 .pin_config_set = sh_pfc_pinconf_set,
291 .pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
292 };
293
294 /* pinmux ranges -> pinctrl pin descs */
295 static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
296 {
297 int i;
298
299 pmx->nr_pads = pfc->info->nr_pins;
300
301 pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
302 GFP_KERNEL);
303 if (unlikely(!pmx->pads)) {
304 pmx->nr_pads = 0;
305 return -ENOMEM;
306 }
307
308 for (i = 0; i < pmx->nr_pads; i++) {
309 struct pinctrl_pin_desc *pin = pmx->pads + i;
310 struct sh_pfc_pin *gpio = pfc->info->pins + i;
311
312 pin->number = i;
313 pin->name = gpio->name;
314 }
315
316 return 0;
317 }
318
319 static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
320 {
321 int i, fn;
322
323 for (i = 0; i < pfc->info->nr_func_gpios; i++) {
324 struct pinmux_func *func = pfc->info->func_gpios + i;
325
326 if (func->enum_id)
327 pmx->nr_functions++;
328 }
329
330 pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions *
331 sizeof(*pmx->functions), GFP_KERNEL);
332 if (unlikely(!pmx->functions))
333 return -ENOMEM;
334
335 for (i = fn = 0; i < pfc->info->nr_func_gpios; i++) {
336 struct pinmux_func *func = pfc->info->func_gpios + i;
337
338 if (func->enum_id)
339 pmx->functions[fn++] = func;
340 }
341
342 return 0;
343 }
344
345 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
346 {
347 struct sh_pfc_pinctrl *pmx;
348 int ret;
349
350 pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
351 if (unlikely(!pmx))
352 return -ENOMEM;
353
354 pmx->pfc = pfc;
355 pfc->pinctrl = pmx;
356
357 ret = sh_pfc_map_gpios(pfc, pmx);
358 if (unlikely(ret != 0))
359 return ret;
360
361 ret = sh_pfc_map_functions(pfc, pmx);
362 if (unlikely(ret != 0))
363 return ret;
364
365 pmx->pctl_desc.name = DRV_NAME;
366 pmx->pctl_desc.owner = THIS_MODULE;
367 pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
368 pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
369 pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
370 pmx->pctl_desc.pins = pmx->pads;
371 pmx->pctl_desc.npins = pmx->nr_pads;
372
373 pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
374 if (IS_ERR(pmx->pctl))
375 return PTR_ERR(pmx->pctl);
376
377 pmx->range.name = DRV_NAME,
378 pmx->range.id = 0;
379 pmx->range.npins = pfc->info->nr_pins;
380 pmx->range.base = 0;
381 pmx->range.pin_base = 0;
382
383 pinctrl_add_gpio_range(pmx->pctl, &pmx->range);
384
385 return 0;
386 }
387
388 int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
389 {
390 struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
391
392 pinctrl_unregister(pmx->pctl);
393
394 pfc->pinctrl = NULL;
395 return 0;
396 }