]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/pinctrl/sh-pfc/pinctrl.c
sh-pfc: Fix return value check in sh_pfc_register_pinctrl()
[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / sh-pfc / pinctrl.c
1 /*
2 * SuperH Pin Function Controller pinmux support.
3 *
4 * Copyright (C) 2012 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11 #define DRV_NAME "sh-pfc"
12 #define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
13
14 #include <linux/device.h>
15 #include <linux/err.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/pinctrl/pinconf.h>
20 #include <linux/pinctrl/pinconf-generic.h>
21 #include <linux/pinctrl/pinctrl.h>
22 #include <linux/pinctrl/pinmux.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
25
26 #include "core.h"
27
28 struct sh_pfc_pinctrl {
29 struct pinctrl_dev *pctl;
30 struct pinctrl_desc pctl_desc;
31
32 struct sh_pfc *pfc;
33
34 struct pinctrl_pin_desc *pins;
35 };
36
37 static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
38 {
39 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
40
41 return pmx->pfc->info->nr_groups;
42 }
43
44 static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
45 unsigned selector)
46 {
47 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
48
49 return pmx->pfc->info->groups[selector].name;
50 }
51
52 static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
53 const unsigned **pins, unsigned *num_pins)
54 {
55 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
56
57 *pins = pmx->pfc->info->groups[selector].pins;
58 *num_pins = pmx->pfc->info->groups[selector].nr_pins;
59
60 return 0;
61 }
62
63 static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
64 unsigned offset)
65 {
66 seq_printf(s, "%s", DRV_NAME);
67 }
68
69 static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
70 .get_groups_count = sh_pfc_get_groups_count,
71 .get_group_name = sh_pfc_get_group_name,
72 .get_group_pins = sh_pfc_get_group_pins,
73 .pin_dbg_show = sh_pfc_pin_dbg_show,
74 };
75
76 static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
77 {
78 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
79
80 return pmx->pfc->info->nr_functions;
81 }
82
83 static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
84 unsigned selector)
85 {
86 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
87
88 return pmx->pfc->info->functions[selector].name;
89 }
90
91 static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev,
92 unsigned selector,
93 const char * const **groups,
94 unsigned * const num_groups)
95 {
96 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
97
98 *groups = pmx->pfc->info->functions[selector].groups;
99 *num_groups = pmx->pfc->info->functions[selector].nr_groups;
100
101 return 0;
102 }
103
104 static int sh_pfc_func_enable(struct pinctrl_dev *pctldev, unsigned selector,
105 unsigned group)
106 {
107 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
108 struct sh_pfc *pfc = pmx->pfc;
109 const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
110 unsigned long flags;
111 unsigned int i;
112 int ret = -EINVAL;
113
114 spin_lock_irqsave(&pfc->lock, flags);
115
116 for (i = 0; i < grp->nr_pins; ++i) {
117 if (sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION,
118 GPIO_CFG_DRYRUN))
119 goto done;
120
121 if (sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION,
122 GPIO_CFG_REQ))
123 goto done;
124 }
125
126 ret = 0;
127
128 done:
129 spin_unlock_irqrestore(&pfc->lock, flags);
130 return ret;
131 }
132
133 static void sh_pfc_func_disable(struct pinctrl_dev *pctldev, unsigned selector,
134 unsigned group)
135 {
136 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
137 struct sh_pfc *pfc = pmx->pfc;
138 const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
139 unsigned long flags;
140 unsigned int i;
141
142 spin_lock_irqsave(&pfc->lock, flags);
143
144 for (i = 0; i < grp->nr_pins; ++i)
145 sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION,
146 GPIO_CFG_FREE);
147
148 spin_unlock_irqrestore(&pfc->lock, flags);
149 }
150
151 static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
152 int new_type)
153 {
154 struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
155 unsigned int mark = pin->enum_id;
156 unsigned long flags;
157 int pinmux_type;
158 int ret = -EINVAL;
159
160 spin_lock_irqsave(&pfc->lock, flags);
161
162 pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
163
164 /*
165 * See if the present config needs to first be de-configured.
166 */
167 switch (pinmux_type) {
168 case PINMUX_TYPE_GPIO:
169 break;
170 case PINMUX_TYPE_OUTPUT:
171 case PINMUX_TYPE_INPUT:
172 case PINMUX_TYPE_INPUT_PULLUP:
173 case PINMUX_TYPE_INPUT_PULLDOWN:
174 sh_pfc_config_mux(pfc, mark, pinmux_type, GPIO_CFG_FREE);
175 break;
176 default:
177 goto err;
178 }
179
180 /*
181 * Dry run
182 */
183 if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_DRYRUN) != 0)
184 goto err;
185
186 /*
187 * Request
188 */
189 if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_REQ) != 0)
190 goto err;
191
192 pin->flags &= ~PINMUX_FLAG_TYPE;
193 pin->flags |= new_type;
194
195 ret = 0;
196
197 err:
198 spin_unlock_irqrestore(&pfc->lock, flags);
199
200 return ret;
201 }
202
203 static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
204 struct pinctrl_gpio_range *range,
205 unsigned offset)
206 {
207 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
208 struct sh_pfc *pfc = pmx->pfc;
209 struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
210 unsigned long flags;
211 int ret, pinmux_type;
212
213 spin_lock_irqsave(&pfc->lock, flags);
214
215 pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
216
217 switch (pinmux_type) {
218 case PINMUX_TYPE_GPIO:
219 case PINMUX_TYPE_INPUT:
220 case PINMUX_TYPE_OUTPUT:
221 break;
222 case PINMUX_TYPE_FUNCTION:
223 default:
224 pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
225 ret = -ENOTSUPP;
226 goto err;
227 }
228
229 ret = 0;
230
231 err:
232 spin_unlock_irqrestore(&pfc->lock, flags);
233
234 return ret;
235 }
236
237 static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
238 struct pinctrl_gpio_range *range,
239 unsigned offset)
240 {
241 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
242 struct sh_pfc *pfc = pmx->pfc;
243 struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
244 unsigned long flags;
245 int pinmux_type;
246
247 spin_lock_irqsave(&pfc->lock, flags);
248
249 pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
250
251 sh_pfc_config_mux(pfc, pin->enum_id, pinmux_type, GPIO_CFG_FREE);
252
253 spin_unlock_irqrestore(&pfc->lock, flags);
254 }
255
256 static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
257 struct pinctrl_gpio_range *range,
258 unsigned offset, bool input)
259 {
260 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
261 int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
262
263 return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
264 }
265
266 static const struct pinmux_ops sh_pfc_pinmux_ops = {
267 .get_functions_count = sh_pfc_get_functions_count,
268 .get_function_name = sh_pfc_get_function_name,
269 .get_function_groups = sh_pfc_get_function_groups,
270 .enable = sh_pfc_func_enable,
271 .disable = sh_pfc_func_disable,
272 .gpio_request_enable = sh_pfc_gpio_request_enable,
273 .gpio_disable_free = sh_pfc_gpio_disable_free,
274 .gpio_set_direction = sh_pfc_gpio_set_direction,
275 };
276
277 static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
278 unsigned long *config)
279 {
280 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
281 struct sh_pfc *pfc = pmx->pfc;
282 struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, _pin);
283
284 *config = pin->flags & PINMUX_FLAG_TYPE;
285
286 return 0;
287 }
288
289 static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
290 unsigned long config)
291 {
292 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
293
294 /* Validate the new type */
295 if (config >= PINMUX_FLAG_TYPE)
296 return -EINVAL;
297
298 return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
299 }
300
301 static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
302 struct seq_file *s, unsigned pin)
303 {
304 const char *pinmux_type_str[] = {
305 [PINMUX_TYPE_NONE] = "none",
306 [PINMUX_TYPE_FUNCTION] = "function",
307 [PINMUX_TYPE_GPIO] = "gpio",
308 [PINMUX_TYPE_OUTPUT] = "output",
309 [PINMUX_TYPE_INPUT] = "input",
310 [PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
311 [PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
312 };
313 unsigned long config;
314 int rc;
315
316 rc = sh_pfc_pinconf_get(pctldev, pin, &config);
317 if (unlikely(rc != 0))
318 return;
319
320 seq_printf(s, " %s", pinmux_type_str[config]);
321 }
322
323 static const struct pinconf_ops sh_pfc_pinconf_ops = {
324 .pin_config_get = sh_pfc_pinconf_get,
325 .pin_config_set = sh_pfc_pinconf_set,
326 .pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
327 };
328
329 /* PFC ranges -> pinctrl pin descs */
330 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
331 {
332 const struct pinmux_range *ranges;
333 struct pinmux_range def_range;
334 unsigned int nr_ranges;
335 unsigned int nr_pins;
336 unsigned int i;
337
338 if (pfc->info->ranges == NULL) {
339 def_range.begin = 0;
340 def_range.end = pfc->info->nr_pins - 1;
341 ranges = &def_range;
342 nr_ranges = 1;
343 } else {
344 ranges = pfc->info->ranges;
345 nr_ranges = pfc->info->nr_ranges;
346 }
347
348 pmx->pins = devm_kzalloc(pfc->dev,
349 sizeof(*pmx->pins) * pfc->info->nr_pins,
350 GFP_KERNEL);
351 if (unlikely(!pmx->pins))
352 return -ENOMEM;
353
354 for (i = 0, nr_pins = 0; i < nr_ranges; ++i) {
355 const struct pinmux_range *range = &ranges[i];
356 unsigned int number;
357
358 for (number = range->begin; number <= range->end;
359 number++, nr_pins++) {
360 struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins];
361 struct sh_pfc_pin *info = &pfc->info->pins[nr_pins];
362
363 pin->number = number;
364 pin->name = info->name;
365 }
366 }
367
368 pfc->nr_pins = ranges[nr_ranges-1].end + 1;
369
370 return nr_ranges;
371 }
372
373 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
374 {
375 struct sh_pfc_pinctrl *pmx;
376 int nr_ranges;
377
378 pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
379 if (unlikely(!pmx))
380 return -ENOMEM;
381
382 pmx->pfc = pfc;
383 pfc->pinctrl = pmx;
384
385 nr_ranges = sh_pfc_map_pins(pfc, pmx);
386 if (unlikely(nr_ranges < 0))
387 return nr_ranges;
388
389 pmx->pctl_desc.name = DRV_NAME;
390 pmx->pctl_desc.owner = THIS_MODULE;
391 pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
392 pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
393 pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
394 pmx->pctl_desc.pins = pmx->pins;
395 pmx->pctl_desc.npins = pfc->info->nr_pins;
396
397 pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
398 if (pmx->pctl == NULL)
399 return -EINVAL;
400
401 return 0;
402 }
403
404 int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
405 {
406 struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
407
408 pinctrl_unregister(pmx->pctl);
409
410 pfc->pinctrl = NULL;
411 return 0;
412 }