drivers/platform/x86/intel_int0002_vgpio.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Intel INT0002 "Virtual GPIO" driver
   4  *
   5  * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
   6  *
   7  * Loosely based on android x86 kernel code which is:
   8  *
   9  * Copyright (c) 2014, Intel Corporation.
  10  *
  11  * Author: Dyut Kumar Sil <dyut.k.sil@intel.com>
  12  *
  13  * Some peripherals on Bay Trail and Cherry Trail platforms signal a Power
  14  * Management Event (PME) to the Power Management Controller (PMC) to wakeup
  15  * the system. When this happens software needs to clear the PME bus 0 status
  16  * bit in the GPE0a_STS register to avoid an IRQ storm on IRQ 9.
  17  *
  18  * This is modelled in ACPI through the INT0002 ACPI device, which is
  19  * called a "Virtual GPIO controller" in ACPI because it defines the event
  20  * handler to call when the PME triggers through _AEI and _L02 / _E02
  21  * methods as would be done for a real GPIO interrupt in ACPI. Note this
  22  * is a hack to define an AML event handler for the PME while using existing
  23  * ACPI mechanisms, this is not a real GPIO at all.
  24  *
  25  * This driver will bind to the INT0002 device, and register as a GPIO
  26  * controller, letting gpiolib-acpi.c call the _L02 handler as it would
  27  * for a real GPIO controller.
  28  */
  29
  30 #include <linux/acpi.h>
  31 #include <linux/bitmap.h>
  32 #include <linux/gpio/driver.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/io.h>
  35 #include <linux/kernel.h>
  36 #include <linux/module.h>
  37 #include <linux/platform_device.h>
  38 #include <linux/slab.h>
  39 #include <linux/suspend.h>
  40
  41 #include <asm/cpu_device_id.h>
  42 #include <asm/intel-family.h>
  43
  44 #define DRV_NAME                        "INT0002 Virtual GPIO"
  45
  46 /* For some reason the virtual GPIO pin tied to the GPE is numbered pin 2 */
  47 #define GPE0A_PME_B0_VIRT_GPIO_PIN      2
  48
  49 #define GPE0A_PME_B0_STS_BIT            BIT(13)
  50 #define GPE0A_PME_B0_EN_BIT             BIT(13)
  51 #define GPE0A_STS_PORT                  0x420
  52 #define GPE0A_EN_PORT                   0x428
  53
  54 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
  55
  56 static const struct x86_cpu_id int0002_cpu_ids[] = {
  57         ICPU(INTEL_FAM6_ATOM_SILVERMONT1),      /* Valleyview, Bay Trail  */
  58         ICPU(INTEL_FAM6_ATOM_AIRMONT),          /* Braswell, Cherry Trail */
  59         {}
  60 };
  61
  62 /*
  63  * As this is not a real GPIO at all, but just a hack to model an event in
  64  * ACPI the get / set functions are dummy functions.
  65  */
  66
  67 static int int0002_gpio_get(struct gpio_chip *chip, unsigned int offset)
  68 {
  69         return 0;
  70 }
  71
  72 static void int0002_gpio_set(struct gpio_chip *chip, unsigned int offset,
  73                              int value)
  74 {
  75 }
  76
  77 static int int0002_gpio_direction_output(struct gpio_chip *chip,
  78                                          unsigned int offset, int value)
  79 {
  80         return 0;
  81 }
  82
  83 static void int0002_irq_ack(struct irq_data *data)
  84 {
  85         outl(GPE0A_PME_B0_STS_BIT, GPE0A_STS_PORT);
  86 }
  87
  88 static void int0002_irq_unmask(struct irq_data *data)
  89 {
  90         u32 gpe_en_reg;
  91
  92         gpe_en_reg = inl(GPE0A_EN_PORT);
  93         gpe_en_reg |= GPE0A_PME_B0_EN_BIT;
  94         outl(gpe_en_reg, GPE0A_EN_PORT);
  95 }
  96
  97 static void int0002_irq_mask(struct irq_data *data)
  98 {
  99         u32 gpe_en_reg;
 100
 101         gpe_en_reg = inl(GPE0A_EN_PORT);
 102         gpe_en_reg &= ~GPE0A_PME_B0_EN_BIT;
 103         outl(gpe_en_reg, GPE0A_EN_PORT);
 104 }
 105
 106 static int int0002_irq_set_wake(struct irq_data *data, unsigned int on)
 107 {
 108         struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
 109         struct platform_device *pdev = to_platform_device(chip->parent);
 110         int irq = platform_get_irq(pdev, 0);
 111
 112         /* Propagate to parent irq */
 113         if (on)
 114                 enable_irq_wake(irq);
 115         else
 116                 disable_irq_wake(irq);
 117
 118         return 0;
 119 }
 120
 121 static irqreturn_t int0002_irq(int irq, void *data)
 122 {
 123         struct gpio_chip *chip = data;
 124         u32 gpe_sts_reg;
 125
 126         gpe_sts_reg = inl(GPE0A_STS_PORT);
 127         if (!(gpe_sts_reg & GPE0A_PME_B0_STS_BIT))
 128                 return IRQ_NONE;
 129
 130         generic_handle_irq(irq_find_mapping(chip->irq.domain,
 131                                             GPE0A_PME_B0_VIRT_GPIO_PIN));
 132
 133         pm_system_wakeup();
 134
 135         return IRQ_HANDLED;
 136 }
 137
 138 static struct irq_chip int0002_irqchip = {
 139         .name                   = DRV_NAME,
 140         .irq_ack                = int0002_irq_ack,
 141         .irq_mask               = int0002_irq_mask,
 142         .irq_unmask             = int0002_irq_unmask,
 143         .irq_set_wake           = int0002_irq_set_wake,
 144 };
 145
 146 static int int0002_probe(struct platform_device *pdev)
 147 {
 148         struct device *dev = &pdev->dev;
 149         const struct x86_cpu_id *cpu_id;
 150         struct gpio_chip *chip;
 151         int irq, ret;
 152
 153         /* Menlow has a different INT0002 device? <sigh> */
 154         cpu_id = x86_match_cpu(int0002_cpu_ids);
 155         if (!cpu_id)
 156                 return -ENODEV;
 157
 158         irq = platform_get_irq(pdev, 0);
 159         if (irq < 0) {
 160                 dev_err(dev, "Error getting IRQ: %d\n", irq);
 161                 return irq;
 162         }
 163
 164         chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
 165         if (!chip)
 166                 return -ENOMEM;
 167
 168         chip->label = DRV_NAME;
 169         chip->parent = dev;
 170         chip->owner = THIS_MODULE;
 171         chip->get = int0002_gpio_get;
 172         chip->set = int0002_gpio_set;
 173         chip->direction_input = int0002_gpio_get;
 174         chip->direction_output = int0002_gpio_direction_output;
 175         chip->base = -1;
 176         chip->ngpio = GPE0A_PME_B0_VIRT_GPIO_PIN + 1;
 177         chip->irq.need_valid_mask = true;
 178
 179         ret = devm_gpiochip_add_data(&pdev->dev, chip, NULL);
 180         if (ret) {
 181                 dev_err(dev, "Error adding gpio chip: %d\n", ret);
 182                 return ret;
 183         }
 184
 185         bitmap_clear(chip->irq.valid_mask, 0, GPE0A_PME_B0_VIRT_GPIO_PIN);
 186
 187         /*
 188          * We manually request the irq here instead of passing a flow-handler
 189          * to gpiochip_set_chained_irqchip, because the irq is shared.
 190          */
 191         ret = devm_request_irq(dev, irq, int0002_irq,
 192                                IRQF_SHARED, "INT0002", chip);
 193         if (ret) {
 194                 dev_err(dev, "Error requesting IRQ %d: %d\n", irq, ret);
 195                 return ret;
 196         }
 197
 198         ret = gpiochip_irqchip_add(chip, &int0002_irqchip, 0, handle_edge_irq,
 199                                    IRQ_TYPE_NONE);
 200         if (ret) {
 201                 dev_err(dev, "Error adding irqchip: %d\n", ret);
 202                 return ret;
 203         }
 204
 205         gpiochip_set_chained_irqchip(chip, &int0002_irqchip, irq, NULL);
 206
 207         return 0;
 208 }
 209
 210 static const struct acpi_device_id int0002_acpi_ids[] = {
 211         { "INT0002", 0 },
 212         { },
 213 };
 214 MODULE_DEVICE_TABLE(acpi, int0002_acpi_ids);
 215
 216 static struct platform_driver int0002_driver = {
 217         .driver = {
 218                 .name                   = DRV_NAME,
 219                 .acpi_match_table       = int0002_acpi_ids,
 220         },
 221         .probe  = int0002_probe,
 222 };
 223
 224 module_platform_driver(int0002_driver);
 225
 226 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
 227 MODULE_DESCRIPTION("Intel INT0002 Virtual GPIO driver");
 228 MODULE_LICENSE("GPL v2");