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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * This file contains quirk handling code for PnP devices
4 * Some devices do not report all their resources, and need to have extra
5 * resources added. This is most easily accomplished at initialisation time
6 * when building up the resource structure for the first time.
7 *
8 * Copyright (c) 2000 Peter Denison <peterd@pnd-pc.demon.co.uk>
9 * Copyright (C) 2008 Hewlett-Packard Development Company, L.P.
10 * Bjorn Helgaas <bjorn.helgaas@hp.com>
11 *
12 * Heavily based on PCI quirks handling which is
13 *
14 * Copyright (c) 1999 Martin Mares <mj@ucw.cz>
15 */
16
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/pci.h>
20 #include <linux/string.h>
21 #include <linux/slab.h>
22 #include <linux/pnp.h>
23 #include <linux/io.h>
24 #include <linux/kallsyms.h>
25 #include "base.h"
26
27 static void quirk_awe32_add_ports(struct pnp_dev *dev,
28 struct pnp_option *option,
29 unsigned int offset)
30 {
31 struct pnp_option *new_option;
32
33 new_option = kmalloc(sizeof(struct pnp_option), GFP_KERNEL);
34 if (!new_option) {
35 dev_err(&dev->dev, "couldn't add ioport region to option set "
36 "%d\n", pnp_option_set(option));
37 return;
38 }
39
40 *new_option = *option;
41 new_option->u.port.min += offset;
42 new_option->u.port.max += offset;
43 list_add(&new_option->list, &option->list);
44
45 dev_info(&dev->dev, "added ioport region %#llx-%#llx to set %d\n",
46 (unsigned long long) new_option->u.port.min,
47 (unsigned long long) new_option->u.port.max,
48 pnp_option_set(option));
49 }
50
51 static void quirk_awe32_resources(struct pnp_dev *dev)
52 {
53 struct pnp_option *option;
54 unsigned int set = ~0;
55
56 /*
57 * Add two extra ioport regions (at offset 0x400 and 0x800 from the
58 * one given) to every dependent option set.
59 */
60 list_for_each_entry(option, &dev->options, list) {
61 if (pnp_option_is_dependent(option) &&
62 pnp_option_set(option) != set) {
63 set = pnp_option_set(option);
64 quirk_awe32_add_ports(dev, option, 0x800);
65 quirk_awe32_add_ports(dev, option, 0x400);
66 }
67 }
68 }
69
70 static void quirk_cmi8330_resources(struct pnp_dev *dev)
71 {
72 struct pnp_option *option;
73 struct pnp_irq *irq;
74 struct pnp_dma *dma;
75
76 list_for_each_entry(option, &dev->options, list) {
77 if (!pnp_option_is_dependent(option))
78 continue;
79
80 if (option->type == IORESOURCE_IRQ) {
81 irq = &option->u.irq;
82 bitmap_zero(irq->map.bits, PNP_IRQ_NR);
83 __set_bit(5, irq->map.bits);
84 __set_bit(7, irq->map.bits);
85 __set_bit(10, irq->map.bits);
86 dev_info(&dev->dev, "set possible IRQs in "
87 "option set %d to 5, 7, 10\n",
88 pnp_option_set(option));
89 } else if (option->type == IORESOURCE_DMA) {
90 dma = &option->u.dma;
91 if ((dma->flags & IORESOURCE_DMA_TYPE_MASK) ==
92 IORESOURCE_DMA_8BIT &&
93 dma->map != 0x0A) {
94 dev_info(&dev->dev, "changing possible "
95 "DMA channel mask in option set %d "
96 "from %#02x to 0x0A (1, 3)\n",
97 pnp_option_set(option), dma->map);
98 dma->map = 0x0A;
99 }
100 }
101 }
102 }
103
104 static void quirk_sb16audio_resources(struct pnp_dev *dev)
105 {
106 struct pnp_option *option;
107 unsigned int prev_option_flags = ~0, n = 0;
108 struct pnp_port *port;
109
110 /*
111 * The default range on the OPL port for these devices is 0x388-0x388.
112 * Here we increase that range so that two such cards can be
113 * auto-configured.
114 */
115 list_for_each_entry(option, &dev->options, list) {
116 if (prev_option_flags != option->flags) {
117 prev_option_flags = option->flags;
118 n = 0;
119 }
120
121 if (pnp_option_is_dependent(option) &&
122 option->type == IORESOURCE_IO) {
123 n++;
124 port = &option->u.port;
125 if (n == 3 && port->min == port->max) {
126 port->max += 0x70;
127 dev_info(&dev->dev, "increased option port "
128 "range from %#llx-%#llx to "
129 "%#llx-%#llx\n",
130 (unsigned long long) port->min,
131 (unsigned long long) port->min,
132 (unsigned long long) port->min,
133 (unsigned long long) port->max);
134 }
135 }
136 }
137 }
138
139 static struct pnp_option *pnp_clone_dependent_set(struct pnp_dev *dev,
140 unsigned int set)
141 {
142 struct pnp_option *tail = NULL, *first_new_option = NULL;
143 struct pnp_option *option, *new_option;
144 unsigned int flags;
145
146 list_for_each_entry(option, &dev->options, list) {
147 if (pnp_option_is_dependent(option))
148 tail = option;
149 }
150 if (!tail) {
151 dev_err(&dev->dev, "no dependent option sets\n");
152 return NULL;
153 }
154
155 flags = pnp_new_dependent_set(dev, PNP_RES_PRIORITY_FUNCTIONAL);
156 list_for_each_entry(option, &dev->options, list) {
157 if (pnp_option_is_dependent(option) &&
158 pnp_option_set(option) == set) {
159 new_option = kmalloc(sizeof(struct pnp_option),
160 GFP_KERNEL);
161 if (!new_option) {
162 dev_err(&dev->dev, "couldn't clone dependent "
163 "set %d\n", set);
164 return NULL;
165 }
166
167 *new_option = *option;
168 new_option->flags = flags;
169 if (!first_new_option)
170 first_new_option = new_option;
171
172 list_add(&new_option->list, &tail->list);
173 tail = new_option;
174 }
175 }
176
177 return first_new_option;
178 }
179
180
181 static void quirk_add_irq_optional_dependent_sets(struct pnp_dev *dev)
182 {
183 struct pnp_option *new_option;
184 unsigned int num_sets, i, set;
185 struct pnp_irq *irq;
186
187 num_sets = dev->num_dependent_sets;
188 for (i = 0; i < num_sets; i++) {
189 new_option = pnp_clone_dependent_set(dev, i);
190 if (!new_option)
191 return;
192
193 set = pnp_option_set(new_option);
194 while (new_option && pnp_option_set(new_option) == set) {
195 if (new_option->type == IORESOURCE_IRQ) {
196 irq = &new_option->u.irq;
197 irq->flags |= IORESOURCE_IRQ_OPTIONAL;
198 }
199 dbg_pnp_show_option(dev, new_option);
200 new_option = list_entry(new_option->list.next,
201 struct pnp_option, list);
202 }
203
204 dev_info(&dev->dev, "added dependent option set %d (same as "
205 "set %d except IRQ optional)\n", set, i);
206 }
207 }
208
209 static void quirk_ad1815_mpu_resources(struct pnp_dev *dev)
210 {
211 struct pnp_option *option;
212 struct pnp_irq *irq = NULL;
213 unsigned int independent_irqs = 0;
214
215 list_for_each_entry(option, &dev->options, list) {
216 if (option->type == IORESOURCE_IRQ &&
217 !pnp_option_is_dependent(option)) {
218 independent_irqs++;
219 irq = &option->u.irq;
220 }
221 }
222
223 if (independent_irqs != 1)
224 return;
225
226 irq->flags |= IORESOURCE_IRQ_OPTIONAL;
227 dev_info(&dev->dev, "made independent IRQ optional\n");
228 }
229
230 #include <linux/pci.h>
231
232 static void quirk_system_pci_resources(struct pnp_dev *dev)
233 {
234 struct pci_dev *pdev = NULL;
235 struct resource *res;
236 resource_size_t pnp_start, pnp_end, pci_start, pci_end;
237 int i, j;
238
239 /*
240 * Some BIOSes have PNP motherboard devices with resources that
241 * partially overlap PCI BARs. The PNP system driver claims these
242 * motherboard resources, which prevents the normal PCI driver from
243 * requesting them later.
244 *
245 * This patch disables the PNP resources that conflict with PCI BARs
246 * so they won't be claimed by the PNP system driver.
247 */
248 for_each_pci_dev(pdev) {
249 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
250 unsigned long flags, type;
251
252 flags = pci_resource_flags(pdev, i);
253 type = flags & (IORESOURCE_IO | IORESOURCE_MEM);
254 if (!type || pci_resource_len(pdev, i) == 0)
255 continue;
256
257 if (flags & IORESOURCE_UNSET)
258 continue;
259
260 pci_start = pci_resource_start(pdev, i);
261 pci_end = pci_resource_end(pdev, i);
262 for (j = 0;
263 (res = pnp_get_resource(dev, type, j)); j++) {
264 if (res->start == 0 && res->end == 0)
265 continue;
266
267 pnp_start = res->start;
268 pnp_end = res->end;
269
270 /*
271 * If the PNP region doesn't overlap the PCI
272 * region at all, there's no problem.
273 */
274 if (pnp_end < pci_start || pnp_start > pci_end)
275 continue;
276
277 /*
278 * If the PNP region completely encloses (or is
279 * at least as large as) the PCI region, that's
280 * also OK. For example, this happens when the
281 * PNP device describes a bridge with PCI
282 * behind it.
283 */
284 if (pnp_start <= pci_start &&
285 pnp_end >= pci_end)
286 continue;
287
288 /*
289 * Otherwise, the PNP region overlaps *part* of
290 * the PCI region, and that might prevent a PCI
291 * driver from requesting its resources.
292 */
293 dev_warn(&dev->dev,
294 "disabling %pR because it overlaps "
295 "%s BAR %d %pR\n", res,
296 pci_name(pdev), i, &pdev->resource[i]);
297 res->flags |= IORESOURCE_DISABLED;
298 }
299 }
300 }
301 }
302
303 #ifdef CONFIG_AMD_NB
304
305 #include <asm/amd_nb.h>
306
307 static void quirk_amd_mmconfig_area(struct pnp_dev *dev)
308 {
309 resource_size_t start, end;
310 struct pnp_resource *pnp_res;
311 struct resource *res;
312 struct resource mmconfig_res, *mmconfig;
313
314 mmconfig = amd_get_mmconfig_range(&mmconfig_res);
315 if (!mmconfig)
316 return;
317
318 list_for_each_entry(pnp_res, &dev->resources, list) {
319 res = &pnp_res->res;
320 if (res->end < mmconfig->start || res->start > mmconfig->end ||
321 (res->start == mmconfig->start && res->end == mmconfig->end))
322 continue;
323
324 dev_info(&dev->dev, FW_BUG
325 "%pR covers only part of AMD MMCONFIG area %pR; adding more reservations\n",
326 res, mmconfig);
327 if (mmconfig->start < res->start) {
328 start = mmconfig->start;
329 end = res->start - 1;
330 pnp_add_mem_resource(dev, start, end, 0);
331 }
332 if (mmconfig->end > res->end) {
333 start = res->end + 1;
334 end = mmconfig->end;
335 pnp_add_mem_resource(dev, start, end, 0);
336 }
337 break;
338 }
339 }
340 #endif
341
342 #ifdef CONFIG_PCI
343 /* Device IDs of parts that have 32KB MCH space */
344 static const unsigned int mch_quirk_devices[] = {
345 0x0154, /* Ivy Bridge */
346 0x0a04, /* Haswell-ULT */
347 0x0c00, /* Haswell */
348 0x1604, /* Broadwell */
349 };
350
351 static struct pci_dev *get_intel_host(void)
352 {
353 int i;
354 struct pci_dev *host;
355
356 for (i = 0; i < ARRAY_SIZE(mch_quirk_devices); i++) {
357 host = pci_get_device(PCI_VENDOR_ID_INTEL, mch_quirk_devices[i],
358 NULL);
359 if (host)
360 return host;
361 }
362 return NULL;
363 }
364
365 static void quirk_intel_mch(struct pnp_dev *dev)
366 {
367 struct pci_dev *host;
368 u32 addr_lo, addr_hi;
369 struct pci_bus_region region;
370 struct resource mch;
371 struct pnp_resource *pnp_res;
372 struct resource *res;
373
374 host = get_intel_host();
375 if (!host)
376 return;
377
378 /*
379 * MCHBAR is not an architected PCI BAR, so MCH space is usually
380 * reported as a PNP0C02 resource. The MCH space was originally
381 * 16KB, but is 32KB in newer parts. Some BIOSes still report a
382 * PNP0C02 resource that is only 16KB, which means the rest of the
383 * MCH space is consumed but unreported.
384 */
385
386 /*
387 * Read MCHBAR for Host Member Mapped Register Range Base
388 * https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet
389 * Sec 3.1.12.
390 */
391 pci_read_config_dword(host, 0x48, &addr_lo);
392 region.start = addr_lo & ~0x7fff;
393 pci_read_config_dword(host, 0x4c, &addr_hi);
394 region.start |= (u64) addr_hi << 32;
395 region.end = region.start + 32*1024 - 1;
396
397 memset(&mch, 0, sizeof(mch));
398 mch.flags = IORESOURCE_MEM;
399 pcibios_bus_to_resource(host->bus, &mch, &region);
400
401 list_for_each_entry(pnp_res, &dev->resources, list) {
402 res = &pnp_res->res;
403 if (res->end < mch.start || res->start > mch.end)
404 continue; /* no overlap */
405 if (res->start == mch.start && res->end == mch.end)
406 continue; /* exact match */
407
408 dev_info(&dev->dev, FW_BUG "PNP resource %pR covers only part of %s Intel MCH; extending to %pR\n",
409 res, pci_name(host), &mch);
410 res->start = mch.start;
411 res->end = mch.end;
412 break;
413 }
414
415 pci_dev_put(host);
416 }
417 #endif
418
419 /*
420 * PnP Quirks
421 * Cards or devices that need some tweaking due to incomplete resource info
422 */
423
424 static struct pnp_fixup pnp_fixups[] = {
425 /* Soundblaster awe io port quirk */
426 {"CTL0021", quirk_awe32_resources},
427 {"CTL0022", quirk_awe32_resources},
428 {"CTL0023", quirk_awe32_resources},
429 /* CMI 8330 interrupt and dma fix */
430 {"@X@0001", quirk_cmi8330_resources},
431 /* Soundblaster audio device io port range quirk */
432 {"CTL0001", quirk_sb16audio_resources},
433 {"CTL0031", quirk_sb16audio_resources},
434 {"CTL0041", quirk_sb16audio_resources},
435 {"CTL0042", quirk_sb16audio_resources},
436 {"CTL0043", quirk_sb16audio_resources},
437 {"CTL0044", quirk_sb16audio_resources},
438 {"CTL0045", quirk_sb16audio_resources},
439 /* Add IRQ-optional MPU options */
440 {"ADS7151", quirk_ad1815_mpu_resources},
441 {"ADS7181", quirk_add_irq_optional_dependent_sets},
442 {"AZT0002", quirk_add_irq_optional_dependent_sets},
443 /* PnP resources that might overlap PCI BARs */
444 {"PNP0c01", quirk_system_pci_resources},
445 {"PNP0c02", quirk_system_pci_resources},
446 #ifdef CONFIG_AMD_NB
447 {"PNP0c01", quirk_amd_mmconfig_area},
448 #endif
449 #ifdef CONFIG_PCI
450 {"PNP0c02", quirk_intel_mch},
451 #endif
452 {""}
453 };
454
455 void pnp_fixup_device(struct pnp_dev *dev)
456 {
457 struct pnp_fixup *f;
458
459 for (f = pnp_fixups; *f->id; f++) {
460 if (!compare_pnp_id(dev->id, f->id))
461 continue;
462 pnp_dbg(&dev->dev, "%s: calling %pF\n", f->id,
463 f->quirk_function);
464 f->quirk_function(dev);
465 }
466 }