1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2020 Facebook */
5 #include <linux/kernel.h>
6 #include <linux/module.h>
7 #include <linux/init.h>
9 #include <linux/serial_8250.h>
10 #include <linux/clkdev.h>
11 #include <linux/clk-provider.h>
12 #include <linux/platform_device.h>
13 #include <linux/ptp_clock_kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/xilinx_spi.h>
16 #include <net/devlink.h>
17 #include <linux/i2c.h>
18 #include <linux/mtd/mtd.h>
20 #ifndef PCI_VENDOR_ID_FACEBOOK
21 #define PCI_VENDOR_ID_FACEBOOK 0x1d9b
24 #ifndef PCI_DEVICE_ID_FACEBOOK_TIMECARD
25 #define PCI_DEVICE_ID_FACEBOOK_TIMECARD 0x0400
28 static struct class timecard_class
= {
56 #define OCP_CTRL_ENABLE BIT(0)
57 #define OCP_CTRL_ADJUST_TIME BIT(1)
58 #define OCP_CTRL_ADJUST_OFFSET BIT(2)
59 #define OCP_CTRL_ADJUST_DRIFT BIT(3)
60 #define OCP_CTRL_ADJUST_SERVO BIT(8)
61 #define OCP_CTRL_READ_TIME_REQ BIT(30)
62 #define OCP_CTRL_READ_TIME_DONE BIT(31)
64 #define OCP_STATUS_IN_SYNC BIT(0)
65 #define OCP_STATUS_IN_HOLDOVER BIT(1)
67 #define OCP_SELECT_CLK_NONE 0
68 #define OCP_SELECT_CLK_REG 0xfe
83 #define TOD_CTRL_PROTOCOL BIT(28)
84 #define TOD_CTRL_DISABLE_FMT_A BIT(17)
85 #define TOD_CTRL_DISABLE_FMT_B BIT(16)
86 #define TOD_CTRL_ENABLE BIT(0)
87 #define TOD_CTRL_GNSS_MASK ((1U << 4) - 1)
88 #define TOD_CTRL_GNSS_SHIFT 24
90 #define TOD_STATUS_UTC_MASK 0xff
91 #define TOD_STATUS_UTC_VALID BIT(8)
92 #define TOD_STATUS_LEAP_VALID BIT(16)
120 #define PPS_STATUS_FILTER_ERR BIT(0)
121 #define PPS_STATUS_SUPERV_ERR BIT(1)
127 struct ptp_ocp_flash_info
{
134 struct ptp_ocp_ext_info
{
137 irqreturn_t (*irq_fcn
)(int irq
, void *priv
);
138 int (*enable
)(void *priv
, bool enable
);
141 struct ptp_ocp_ext_src
{
144 struct ptp_ocp_ext_info
*info
;
149 struct pci_dev
*pdev
;
152 struct ocp_reg __iomem
*reg
;
153 struct tod_reg __iomem
*tod
;
154 struct pps_reg __iomem
*pps_to_ext
;
155 struct pps_reg __iomem
*pps_to_clk
;
156 struct ptp_ocp_ext_src
*pps
;
157 struct ptp_ocp_ext_src
*ts0
;
158 struct ptp_ocp_ext_src
*ts1
;
159 struct img_reg __iomem
*image
;
160 struct ptp_clock
*ptp
;
161 struct ptp_clock_info ptp_info
;
162 struct platform_device
*i2c_ctrl
;
163 struct platform_device
*spi_flash
;
164 struct clk_hw
*i2c_clk
;
165 struct timer_list watchdog
;
170 int mac_port
; /* miniature atomic clock */
176 struct ocp_resource
{
177 unsigned long offset
;
180 int (*setup
)(struct ptp_ocp
*bp
, struct ocp_resource
*r
);
182 unsigned long bp_offset
;
185 static int ptp_ocp_register_mem(struct ptp_ocp
*bp
, struct ocp_resource
*r
);
186 static int ptp_ocp_register_i2c(struct ptp_ocp
*bp
, struct ocp_resource
*r
);
187 static int ptp_ocp_register_spi(struct ptp_ocp
*bp
, struct ocp_resource
*r
);
188 static int ptp_ocp_register_serial(struct ptp_ocp
*bp
, struct ocp_resource
*r
);
189 static int ptp_ocp_register_ext(struct ptp_ocp
*bp
, struct ocp_resource
*r
);
190 static int ptp_ocp_fb_board_init(struct ptp_ocp
*bp
, struct ocp_resource
*r
);
191 static irqreturn_t
ptp_ocp_ts_irq(int irq
, void *priv
);
192 static int ptp_ocp_ts_enable(void *priv
, bool enable
);
194 #define bp_assign_entry(bp, res, val) ({ \
195 uintptr_t addr = (uintptr_t)(bp) + (res)->bp_offset; \
196 *(typeof(val) *)addr = val; \
199 #define OCP_RES_LOCATION(member) \
200 .bp_offset = offsetof(struct ptp_ocp, member)
202 #define OCP_MEM_RESOURCE(member) \
203 OCP_RES_LOCATION(member), .setup = ptp_ocp_register_mem
205 #define OCP_SERIAL_RESOURCE(member) \
206 OCP_RES_LOCATION(member), .setup = ptp_ocp_register_serial
208 #define OCP_I2C_RESOURCE(member) \
209 OCP_RES_LOCATION(member), .setup = ptp_ocp_register_i2c
211 #define OCP_SPI_RESOURCE(member) \
212 OCP_RES_LOCATION(member), .setup = ptp_ocp_register_spi
214 #define OCP_EXT_RESOURCE(member) \
215 OCP_RES_LOCATION(member), .setup = ptp_ocp_register_ext
217 /* This is the MSI vector mapping used.
224 * 6: SPI IMU (inertial measurement unit)
230 static struct ocp_resource ocp_fb_resource
[] = {
232 OCP_MEM_RESOURCE(reg
),
233 .offset
= 0x01000000, .size
= 0x10000,
236 OCP_EXT_RESOURCE(ts0
),
237 .offset
= 0x01010000, .size
= 0x10000, .irq_vec
= 1,
238 .extra
= &(struct ptp_ocp_ext_info
) {
239 .name
= "ts0", .index
= 0,
240 .irq_fcn
= ptp_ocp_ts_irq
,
241 .enable
= ptp_ocp_ts_enable
,
245 OCP_EXT_RESOURCE(ts1
),
246 .offset
= 0x01020000, .size
= 0x10000, .irq_vec
= 2,
247 .extra
= &(struct ptp_ocp_ext_info
) {
248 .name
= "ts1", .index
= 1,
249 .irq_fcn
= ptp_ocp_ts_irq
,
250 .enable
= ptp_ocp_ts_enable
,
254 OCP_MEM_RESOURCE(pps_to_ext
),
255 .offset
= 0x01030000, .size
= 0x10000,
258 OCP_MEM_RESOURCE(pps_to_clk
),
259 .offset
= 0x01040000, .size
= 0x10000,
262 OCP_MEM_RESOURCE(tod
),
263 .offset
= 0x01050000, .size
= 0x10000,
266 OCP_MEM_RESOURCE(image
),
267 .offset
= 0x00020000, .size
= 0x1000,
270 OCP_I2C_RESOURCE(i2c_ctrl
),
271 .offset
= 0x00150000, .size
= 0x10000, .irq_vec
= 7,
274 OCP_SERIAL_RESOURCE(gnss_port
),
275 .offset
= 0x00160000 + 0x1000, .irq_vec
= 3,
278 OCP_SERIAL_RESOURCE(mac_port
),
279 .offset
= 0x00180000 + 0x1000, .irq_vec
= 5,
282 OCP_SPI_RESOURCE(spi_flash
),
283 .offset
= 0x00310000, .size
= 0x10000, .irq_vec
= 9,
284 .extra
= &(struct ptp_ocp_flash_info
) {
285 .name
= "xilinx_spi", .pci_offset
= 0,
286 .data_size
= sizeof(struct xspi_platform_data
),
287 .data
= &(struct xspi_platform_data
) {
291 .devices
= &(struct spi_board_info
) {
292 .modalias
= "spi-nor",
298 .setup
= ptp_ocp_fb_board_init
,
303 static const struct pci_device_id ptp_ocp_pcidev_id
[] = {
304 { PCI_DEVICE_DATA(FACEBOOK
, TIMECARD
, &ocp_fb_resource
) },
307 MODULE_DEVICE_TABLE(pci
, ptp_ocp_pcidev_id
);
309 static DEFINE_MUTEX(ptp_ocp_lock
);
310 static DEFINE_IDR(ptp_ocp_idr
);
315 } ptp_ocp_clock
[] = {
316 { .name
= "NONE", .value
= 0 },
317 { .name
= "TOD", .value
= 1 },
318 { .name
= "IRIG", .value
= 2 },
319 { .name
= "PPS", .value
= 3 },
320 { .name
= "PTP", .value
= 4 },
321 { .name
= "RTC", .value
= 5 },
322 { .name
= "DCF", .value
= 6 },
323 { .name
= "REGS", .value
= 0xfe },
324 { .name
= "EXT", .value
= 0xff },
328 ptp_ocp_clock_name_from_val(int val
)
332 for (i
= 0; i
< ARRAY_SIZE(ptp_ocp_clock
); i
++)
333 if (ptp_ocp_clock
[i
].value
== val
)
334 return ptp_ocp_clock
[i
].name
;
339 ptp_ocp_clock_val_from_name(const char *name
)
344 for (i
= 0; i
< ARRAY_SIZE(ptp_ocp_clock
); i
++) {
345 clk
= ptp_ocp_clock
[i
].name
;
346 if (!strncasecmp(name
, clk
, strlen(clk
)))
347 return ptp_ocp_clock
[i
].value
;
353 __ptp_ocp_gettime_locked(struct ptp_ocp
*bp
, struct timespec64
*ts
,
354 struct ptp_system_timestamp
*sts
)
356 u32 ctrl
, time_sec
, time_ns
;
359 ctrl
= ioread32(&bp
->reg
->ctrl
);
360 ctrl
|= OCP_CTRL_READ_TIME_REQ
;
362 ptp_read_system_prets(sts
);
363 iowrite32(ctrl
, &bp
->reg
->ctrl
);
365 for (i
= 0; i
< 100; i
++) {
366 ctrl
= ioread32(&bp
->reg
->ctrl
);
367 if (ctrl
& OCP_CTRL_READ_TIME_DONE
)
370 ptp_read_system_postts(sts
);
372 time_ns
= ioread32(&bp
->reg
->time_ns
);
373 time_sec
= ioread32(&bp
->reg
->time_sec
);
375 ts
->tv_sec
= time_sec
;
376 ts
->tv_nsec
= time_ns
;
378 return ctrl
& OCP_CTRL_READ_TIME_DONE
? 0 : -ETIMEDOUT
;
382 ptp_ocp_gettimex(struct ptp_clock_info
*ptp_info
, struct timespec64
*ts
,
383 struct ptp_system_timestamp
*sts
)
385 struct ptp_ocp
*bp
= container_of(ptp_info
, struct ptp_ocp
, ptp_info
);
389 spin_lock_irqsave(&bp
->lock
, flags
);
390 err
= __ptp_ocp_gettime_locked(bp
, ts
, sts
);
391 spin_unlock_irqrestore(&bp
->lock
, flags
);
397 __ptp_ocp_settime_locked(struct ptp_ocp
*bp
, const struct timespec64
*ts
)
399 u32 ctrl
, time_sec
, time_ns
;
402 time_ns
= ts
->tv_nsec
;
403 time_sec
= ts
->tv_sec
;
405 select
= ioread32(&bp
->reg
->select
);
406 iowrite32(OCP_SELECT_CLK_REG
, &bp
->reg
->select
);
408 iowrite32(time_ns
, &bp
->reg
->adjust_ns
);
409 iowrite32(time_sec
, &bp
->reg
->adjust_sec
);
411 ctrl
= ioread32(&bp
->reg
->ctrl
);
412 ctrl
|= OCP_CTRL_ADJUST_TIME
;
413 iowrite32(ctrl
, &bp
->reg
->ctrl
);
415 /* restore clock selection */
416 iowrite32(select
>> 16, &bp
->reg
->select
);
420 ptp_ocp_settime(struct ptp_clock_info
*ptp_info
, const struct timespec64
*ts
)
422 struct ptp_ocp
*bp
= container_of(ptp_info
, struct ptp_ocp
, ptp_info
);
425 if (ioread32(&bp
->reg
->status
) & OCP_STATUS_IN_SYNC
)
428 spin_lock_irqsave(&bp
->lock
, flags
);
429 __ptp_ocp_settime_locked(bp
, ts
);
430 spin_unlock_irqrestore(&bp
->lock
, flags
);
436 ptp_ocp_adjtime(struct ptp_clock_info
*ptp_info
, s64 delta_ns
)
438 struct ptp_ocp
*bp
= container_of(ptp_info
, struct ptp_ocp
, ptp_info
);
439 struct timespec64 ts
;
443 if (ioread32(&bp
->reg
->status
) & OCP_STATUS_IN_SYNC
)
446 spin_lock_irqsave(&bp
->lock
, flags
);
447 err
= __ptp_ocp_gettime_locked(bp
, &ts
, NULL
);
449 timespec64_add_ns(&ts
, delta_ns
);
450 __ptp_ocp_settime_locked(bp
, &ts
);
452 spin_unlock_irqrestore(&bp
->lock
, flags
);
458 ptp_ocp_null_adjfine(struct ptp_clock_info
*ptp_info
, long scaled_ppm
)
467 ptp_ocp_adjphase(struct ptp_clock_info
*ptp_info
, s32 phase_ns
)
473 ptp_ocp_enable(struct ptp_clock_info
*ptp_info
, struct ptp_clock_request
*rq
,
476 struct ptp_ocp
*bp
= container_of(ptp_info
, struct ptp_ocp
, ptp_info
);
477 struct ptp_ocp_ext_src
*ext
= NULL
;
481 case PTP_CLK_REQ_EXTTS
:
482 switch (rq
->extts
.index
) {
491 case PTP_CLK_REQ_PPS
:
500 err
= ext
->info
->enable(ext
, on
);
505 static const struct ptp_clock_info ptp_ocp_clock_info
= {
506 .owner
= THIS_MODULE
,
507 .name
= KBUILD_MODNAME
,
508 .max_adj
= 100000000,
509 .gettimex64
= ptp_ocp_gettimex
,
510 .settime64
= ptp_ocp_settime
,
511 .adjtime
= ptp_ocp_adjtime
,
512 .adjfine
= ptp_ocp_null_adjfine
,
513 .adjphase
= ptp_ocp_adjphase
,
514 .enable
= ptp_ocp_enable
,
520 __ptp_ocp_clear_drift_locked(struct ptp_ocp
*bp
)
524 select
= ioread32(&bp
->reg
->select
);
525 iowrite32(OCP_SELECT_CLK_REG
, &bp
->reg
->select
);
527 iowrite32(0, &bp
->reg
->drift_ns
);
529 ctrl
= ioread32(&bp
->reg
->ctrl
);
530 ctrl
|= OCP_CTRL_ADJUST_DRIFT
;
531 iowrite32(ctrl
, &bp
->reg
->ctrl
);
533 /* restore clock selection */
534 iowrite32(select
>> 16, &bp
->reg
->select
);
538 ptp_ocp_watchdog(struct timer_list
*t
)
540 struct ptp_ocp
*bp
= from_timer(bp
, t
, watchdog
);
544 status
= ioread32(&bp
->pps_to_clk
->status
);
546 if (status
& PPS_STATUS_SUPERV_ERR
) {
547 iowrite32(status
, &bp
->pps_to_clk
->status
);
548 if (!bp
->gnss_lost
) {
549 spin_lock_irqsave(&bp
->lock
, flags
);
550 __ptp_ocp_clear_drift_locked(bp
);
551 spin_unlock_irqrestore(&bp
->lock
, flags
);
552 bp
->gnss_lost
= ktime_get_real_seconds();
555 } else if (bp
->gnss_lost
) {
559 mod_timer(&bp
->watchdog
, jiffies
+ HZ
);
563 ptp_ocp_init_clock(struct ptp_ocp
*bp
)
565 struct timespec64 ts
;
569 /* make sure clock is enabled */
570 ctrl
= ioread32(&bp
->reg
->ctrl
);
571 ctrl
|= OCP_CTRL_ENABLE
;
572 iowrite32(ctrl
, &bp
->reg
->ctrl
);
574 /* NO DRIFT Correction */
575 /* offset_p:i 1/8, offset_i: 1/16, drift_p: 0, drift_i: 0 */
576 iowrite32(0x2000, &bp
->reg
->servo_offset_p
);
577 iowrite32(0x1000, &bp
->reg
->servo_offset_i
);
578 iowrite32(0, &bp
->reg
->servo_drift_p
);
579 iowrite32(0, &bp
->reg
->servo_drift_i
);
581 /* latch servo values */
582 ctrl
|= OCP_CTRL_ADJUST_SERVO
;
583 iowrite32(ctrl
, &bp
->reg
->ctrl
);
585 if ((ioread32(&bp
->reg
->ctrl
) & OCP_CTRL_ENABLE
) == 0) {
586 dev_err(&bp
->pdev
->dev
, "clock not enabled\n");
590 sync
= ioread32(&bp
->reg
->status
) & OCP_STATUS_IN_SYNC
;
592 ktime_get_real_ts64(&ts
);
593 ptp_ocp_settime(&bp
->ptp_info
, &ts
);
595 if (!ptp_ocp_gettimex(&bp
->ptp_info
, &ts
, NULL
))
596 dev_info(&bp
->pdev
->dev
, "Time: %lld.%ld, %s\n",
597 ts
.tv_sec
, ts
.tv_nsec
,
598 sync
? "in-sync" : "UNSYNCED");
600 timer_setup(&bp
->watchdog
, ptp_ocp_watchdog
, 0);
601 mod_timer(&bp
->watchdog
, jiffies
+ HZ
);
607 ptp_ocp_tod_info(struct ptp_ocp
*bp
)
609 static const char * const proto_name
[] = {
610 "NMEA", "NMEA_ZDA", "NMEA_RMC", "NMEA_none",
611 "UBX", "UBX_UTC", "UBX_LS", "UBX_none"
613 static const char * const gnss_name
[] = {
614 "ALL", "COMBINED", "GPS", "GLONASS", "GALILEO", "BEIDOU",
616 u32 version
, ctrl
, reg
;
619 version
= ioread32(&bp
->tod
->version
);
620 dev_info(&bp
->pdev
->dev
, "TOD Version %d.%d.%d\n",
621 version
>> 24, (version
>> 16) & 0xff, version
& 0xffff);
623 ctrl
= ioread32(&bp
->tod
->ctrl
);
624 ctrl
|= TOD_CTRL_PROTOCOL
| TOD_CTRL_ENABLE
;
625 ctrl
&= ~(TOD_CTRL_DISABLE_FMT_A
| TOD_CTRL_DISABLE_FMT_B
);
626 iowrite32(ctrl
, &bp
->tod
->ctrl
);
628 ctrl
= ioread32(&bp
->tod
->ctrl
);
629 idx
= ctrl
& TOD_CTRL_PROTOCOL
? 4 : 0;
630 idx
+= (ctrl
>> 16) & 3;
631 dev_info(&bp
->pdev
->dev
, "control: %x\n", ctrl
);
632 dev_info(&bp
->pdev
->dev
, "TOD Protocol %s %s\n", proto_name
[idx
],
633 ctrl
& TOD_CTRL_ENABLE
? "enabled" : "");
635 idx
= (ctrl
>> TOD_CTRL_GNSS_SHIFT
) & TOD_CTRL_GNSS_MASK
;
636 if (idx
< ARRAY_SIZE(gnss_name
))
637 dev_info(&bp
->pdev
->dev
, "GNSS %s\n", gnss_name
[idx
]);
639 reg
= ioread32(&bp
->tod
->status
);
640 dev_info(&bp
->pdev
->dev
, "status: %x\n", reg
);
642 reg
= ioread32(&bp
->tod
->correction_sec
);
643 dev_info(&bp
->pdev
->dev
, "correction: %d\n", reg
);
645 reg
= ioread32(&bp
->tod
->utc_status
);
646 dev_info(&bp
->pdev
->dev
, "utc_status: %x\n", reg
);
647 dev_info(&bp
->pdev
->dev
, "utc_offset: %d valid:%d leap_valid:%d\n",
648 reg
& TOD_STATUS_UTC_MASK
, reg
& TOD_STATUS_UTC_VALID
? 1 : 0,
649 reg
& TOD_STATUS_LEAP_VALID
? 1 : 0);
653 ptp_ocp_firstchild(struct device
*dev
, void *data
)
659 ptp_ocp_read_i2c(struct i2c_adapter
*adap
, u8 addr
, u8 reg
, u8 sz
, u8
*data
)
661 struct i2c_msg msgs
[2] = {
677 /* xiic-i2c for some stupid reason only does 2 byte reads. */
679 len
= min_t(u8
, sz
, 2);
681 err
= i2c_transfer(adap
, msgs
, 2);
682 if (err
!= msgs
[1].len
)
692 ptp_ocp_get_serial_number(struct ptp_ocp
*bp
)
694 struct i2c_adapter
*adap
;
698 dev
= device_find_child(&bp
->i2c_ctrl
->dev
, NULL
, ptp_ocp_firstchild
);
700 dev_err(&bp
->pdev
->dev
, "Can't find I2C adapter\n");
704 adap
= i2c_verify_adapter(dev
);
706 dev_err(&bp
->pdev
->dev
, "device '%s' isn't an I2C adapter\n",
711 err
= ptp_ocp_read_i2c(adap
, 0x58, 0x9A, 6, bp
->serial
);
713 dev_err(&bp
->pdev
->dev
, "could not read eeprom: %d\n", err
);
717 bp
->has_serial
= true;
724 ptp_ocp_info(struct ptp_ocp
*bp
)
728 version
= ioread32(&bp
->reg
->version
);
729 select
= ioread32(&bp
->reg
->select
);
730 dev_info(&bp
->pdev
->dev
, "Version %d.%d.%d, clock %s, device ptp%d\n",
731 version
>> 24, (version
>> 16) & 0xff, version
& 0xffff,
732 ptp_ocp_clock_name_from_val(select
>> 16),
733 ptp_clock_index(bp
->ptp
));
735 ptp_ocp_tod_info(bp
);
738 static struct device
*
739 ptp_ocp_find_flash(struct ptp_ocp
*bp
)
741 struct device
*dev
, *last
;
744 dev
= &bp
->spi_flash
->dev
;
746 while ((dev
= device_find_child(dev
, NULL
, ptp_ocp_firstchild
))) {
747 if (!strcmp("mtd", dev_bus_name(dev
)))
758 ptp_ocp_devlink_flash(struct devlink
*devlink
, struct device
*dev
,
759 const struct firmware
*fw
)
761 struct mtd_info
*mtd
= dev_get_drvdata(dev
);
762 struct ptp_ocp
*bp
= devlink_priv(devlink
);
763 size_t off
, len
, resid
, wrote
;
764 struct erase_info erase
;
769 base
= bp
->flash_start
;
774 devlink_flash_update_status_notify(devlink
, "Flashing",
775 NULL
, off
, fw
->size
);
777 len
= min_t(size_t, resid
, blksz
);
778 erase
.addr
= base
+ off
;
781 err
= mtd_erase(mtd
, &erase
);
785 err
= mtd_write(mtd
, base
+ off
, len
, &wrote
, &fw
->data
[off
]);
797 ptp_ocp_devlink_flash_update(struct devlink
*devlink
,
798 struct devlink_flash_update_params
*params
,
799 struct netlink_ext_ack
*extack
)
801 struct ptp_ocp
*bp
= devlink_priv(devlink
);
806 dev
= ptp_ocp_find_flash(bp
);
808 dev_err(&bp
->pdev
->dev
, "Can't find Flash SPI adapter\n");
812 devlink_flash_update_status_notify(devlink
, "Preparing to flash",
815 err
= ptp_ocp_devlink_flash(devlink
, dev
, params
->fw
);
817 msg
= err
? "Flash error" : "Flash complete";
818 devlink_flash_update_status_notify(devlink
, msg
, NULL
, 0, 0);
825 ptp_ocp_devlink_info_get(struct devlink
*devlink
, struct devlink_info_req
*req
,
826 struct netlink_ext_ack
*extack
)
828 struct ptp_ocp
*bp
= devlink_priv(devlink
);
832 err
= devlink_info_driver_name_put(req
, KBUILD_MODNAME
);
837 u32 ver
= ioread32(&bp
->image
->version
);
840 sprintf(buf
, "%d", ver
);
841 err
= devlink_info_version_running_put(req
,
845 sprintf(buf
, "%d", ver
>> 16);
846 err
= devlink_info_version_running_put(req
,
855 ptp_ocp_get_serial_number(bp
);
857 if (bp
->has_serial
) {
858 sprintf(buf
, "%pM", bp
->serial
);
859 err
= devlink_info_serial_number_put(req
, buf
);
867 static const struct devlink_ops ptp_ocp_devlink_ops
= {
868 .flash_update
= ptp_ocp_devlink_flash_update
,
869 .info_get
= ptp_ocp_devlink_info_get
,
872 static void __iomem
*
873 __ptp_ocp_get_mem(struct ptp_ocp
*bp
, unsigned long start
, int size
)
875 struct resource res
= DEFINE_RES_MEM_NAMED(start
, size
, "ptp_ocp");
877 return devm_ioremap_resource(&bp
->pdev
->dev
, &res
);
880 static void __iomem
*
881 ptp_ocp_get_mem(struct ptp_ocp
*bp
, struct ocp_resource
*r
)
885 start
= pci_resource_start(bp
->pdev
, 0) + r
->offset
;
886 return __ptp_ocp_get_mem(bp
, start
, r
->size
);
890 ptp_ocp_set_irq_resource(struct resource
*res
, int irq
)
892 struct resource r
= DEFINE_RES_IRQ(irq
);
897 ptp_ocp_set_mem_resource(struct resource
*res
, unsigned long start
, int size
)
899 struct resource r
= DEFINE_RES_MEM(start
, size
);
904 ptp_ocp_register_spi(struct ptp_ocp
*bp
, struct ocp_resource
*r
)
906 struct ptp_ocp_flash_info
*info
;
907 struct pci_dev
*pdev
= bp
->pdev
;
908 struct platform_device
*p
;
909 struct resource res
[2];
913 /* XXX hack to work around old FPGA */
914 if (bp
->n_irqs
< 10) {
915 dev_err(&bp
->pdev
->dev
, "FPGA does not have SPI devices\n");
919 if (r
->irq_vec
> bp
->n_irqs
) {
920 dev_err(&bp
->pdev
->dev
, "spi device irq %d out of range\n",
925 start
= pci_resource_start(pdev
, 0) + r
->offset
;
926 ptp_ocp_set_mem_resource(&res
[0], start
, r
->size
);
927 ptp_ocp_set_irq_resource(&res
[1], pci_irq_vector(pdev
, r
->irq_vec
));
930 id
= pci_dev_id(pdev
) << 1;
931 id
+= info
->pci_offset
;
933 p
= platform_device_register_resndata(&pdev
->dev
, info
->name
, id
,
939 bp_assign_entry(bp
, r
, p
);
944 static struct platform_device
*
945 ptp_ocp_i2c_bus(struct pci_dev
*pdev
, struct ocp_resource
*r
, int id
)
947 struct resource res
[2];
950 start
= pci_resource_start(pdev
, 0) + r
->offset
;
951 ptp_ocp_set_mem_resource(&res
[0], start
, r
->size
);
952 ptp_ocp_set_irq_resource(&res
[1], pci_irq_vector(pdev
, r
->irq_vec
));
954 return platform_device_register_resndata(&pdev
->dev
, "xiic-i2c",
955 id
, res
, 2, NULL
, 0);
959 ptp_ocp_register_i2c(struct ptp_ocp
*bp
, struct ocp_resource
*r
)
961 struct pci_dev
*pdev
= bp
->pdev
;
962 struct platform_device
*p
;
967 if (r
->irq_vec
> bp
->n_irqs
) {
968 dev_err(&bp
->pdev
->dev
, "i2c device irq %d out of range\n",
973 id
= pci_dev_id(bp
->pdev
);
975 sprintf(buf
, "AXI.%d", id
);
976 clk
= clk_hw_register_fixed_rate(&pdev
->dev
, buf
, NULL
, 0, 50000000);
981 sprintf(buf
, "xiic-i2c.%d", id
);
982 devm_clk_hw_register_clkdev(&pdev
->dev
, clk
, NULL
, buf
);
983 p
= ptp_ocp_i2c_bus(bp
->pdev
, r
, id
);
987 bp_assign_entry(bp
, r
, p
);
993 ptp_ocp_ts_irq(int irq
, void *priv
)
995 struct ptp_ocp_ext_src
*ext
= priv
;
996 struct ts_reg __iomem
*reg
= ext
->mem
;
997 struct ptp_clock_event ev
;
1000 /* XXX should fix API - this converts s/ns -> ts -> s/ns */
1001 sec
= ioread32(®
->time_sec
);
1002 nsec
= ioread32(®
->time_ns
);
1004 ev
.type
= PTP_CLOCK_EXTTS
;
1005 ev
.index
= ext
->info
->index
;
1006 ev
.timestamp
= sec
* 1000000000ULL + nsec
;
1008 ptp_clock_event(ext
->bp
->ptp
, &ev
);
1010 iowrite32(1, ®
->intr
); /* write 1 to ack */
1016 ptp_ocp_ts_enable(void *priv
, bool enable
)
1018 struct ptp_ocp_ext_src
*ext
= priv
;
1019 struct ts_reg __iomem
*reg
= ext
->mem
;
1022 iowrite32(1, ®
->enable
);
1023 iowrite32(1, ®
->intr_mask
);
1024 iowrite32(1, ®
->intr
);
1026 iowrite32(0, ®
->intr_mask
);
1027 iowrite32(0, ®
->enable
);
1034 ptp_ocp_unregister_ext(struct ptp_ocp_ext_src
*ext
)
1036 ext
->info
->enable(ext
, false);
1037 pci_free_irq(ext
->bp
->pdev
, ext
->irq_vec
, ext
);
1042 ptp_ocp_register_ext(struct ptp_ocp
*bp
, struct ocp_resource
*r
)
1044 struct pci_dev
*pdev
= bp
->pdev
;
1045 struct ptp_ocp_ext_src
*ext
;
1048 ext
= kzalloc(sizeof(*ext
), GFP_KERNEL
);
1053 ext
->mem
= ptp_ocp_get_mem(bp
, r
);
1058 ext
->info
= r
->extra
;
1059 ext
->irq_vec
= r
->irq_vec
;
1061 err
= pci_request_irq(pdev
, r
->irq_vec
, ext
->info
->irq_fcn
, NULL
,
1062 ext
, "ocp%d.%s", bp
->id
, ext
->info
->name
);
1064 dev_err(&pdev
->dev
, "Could not get irq %d\n", r
->irq_vec
);
1068 bp_assign_entry(bp
, r
, ext
);
1078 ptp_ocp_serial_line(struct ptp_ocp
*bp
, struct ocp_resource
*r
)
1080 struct pci_dev
*pdev
= bp
->pdev
;
1081 struct uart_8250_port uart
;
1083 /* Setting UPF_IOREMAP and leaving port.membase unspecified lets
1084 * the serial port device claim and release the pci resource.
1086 memset(&uart
, 0, sizeof(uart
));
1087 uart
.port
.dev
= &pdev
->dev
;
1088 uart
.port
.iotype
= UPIO_MEM
;
1089 uart
.port
.regshift
= 2;
1090 uart
.port
.mapbase
= pci_resource_start(pdev
, 0) + r
->offset
;
1091 uart
.port
.irq
= pci_irq_vector(pdev
, r
->irq_vec
);
1092 uart
.port
.uartclk
= 50000000;
1093 uart
.port
.flags
= UPF_FIXED_TYPE
| UPF_IOREMAP
;
1094 uart
.port
.type
= PORT_16550A
;
1096 return serial8250_register_8250_port(&uart
);
1100 ptp_ocp_register_serial(struct ptp_ocp
*bp
, struct ocp_resource
*r
)
1104 if (r
->irq_vec
> bp
->n_irqs
) {
1105 dev_err(&bp
->pdev
->dev
, "serial device irq %d out of range\n",
1110 port
= ptp_ocp_serial_line(bp
, r
);
1114 bp_assign_entry(bp
, r
, port
);
1120 ptp_ocp_register_mem(struct ptp_ocp
*bp
, struct ocp_resource
*r
)
1124 mem
= ptp_ocp_get_mem(bp
, r
);
1128 bp_assign_entry(bp
, r
, mem
);
1133 /* FB specific board initializers; last "resource" registered. */
1135 ptp_ocp_fb_board_init(struct ptp_ocp
*bp
, struct ocp_resource
*r
)
1137 bp
->flash_start
= 1024 * 4096;
1139 return ptp_ocp_init_clock(bp
);
1143 ptp_ocp_register_resources(struct ptp_ocp
*bp
, kernel_ulong_t driver_data
)
1145 struct ocp_resource
*r
, *table
;
1148 table
= (struct ocp_resource
*)driver_data
;
1149 for (r
= table
; r
->setup
; r
++) {
1150 err
= r
->setup(bp
, r
);
1158 serialnum_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1160 struct ptp_ocp
*bp
= dev_get_drvdata(dev
);
1162 if (!bp
->has_serial
)
1163 ptp_ocp_get_serial_number(bp
);
1165 return sysfs_emit(buf
, "%pM\n", bp
->serial
);
1167 static DEVICE_ATTR_RO(serialnum
);
1170 gnss_sync_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1172 struct ptp_ocp
*bp
= dev_get_drvdata(dev
);
1176 ret
= sysfs_emit(buf
, "LOST @ %ptT\n", &bp
->gnss_lost
);
1178 ret
= sysfs_emit(buf
, "SYNC\n");
1182 static DEVICE_ATTR_RO(gnss_sync
);
1185 clock_source_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1187 struct ptp_ocp
*bp
= dev_get_drvdata(dev
);
1191 select
= ioread32(&bp
->reg
->select
);
1192 p
= ptp_ocp_clock_name_from_val(select
>> 16);
1194 return sysfs_emit(buf
, "%s\n", p
);
1198 clock_source_store(struct device
*dev
, struct device_attribute
*attr
,
1199 const char *buf
, size_t count
)
1201 struct ptp_ocp
*bp
= dev_get_drvdata(dev
);
1202 unsigned long flags
;
1205 val
= ptp_ocp_clock_val_from_name(buf
);
1209 spin_lock_irqsave(&bp
->lock
, flags
);
1210 iowrite32(val
, &bp
->reg
->select
);
1211 spin_unlock_irqrestore(&bp
->lock
, flags
);
1215 static DEVICE_ATTR_RW(clock_source
);
1218 available_clock_sources_show(struct device
*dev
,
1219 struct device_attribute
*attr
, char *buf
)
1226 for (i
= 0; i
< ARRAY_SIZE(ptp_ocp_clock
); i
++) {
1227 clk
= ptp_ocp_clock
[i
].name
;
1228 count
+= sysfs_emit_at(buf
, count
, "%s ", clk
);
1232 count
+= sysfs_emit_at(buf
, count
, "\n");
1235 static DEVICE_ATTR_RO(available_clock_sources
);
1237 static struct attribute
*timecard_attrs
[] = {
1238 &dev_attr_serialnum
.attr
,
1239 &dev_attr_gnss_sync
.attr
,
1240 &dev_attr_clock_source
.attr
,
1241 &dev_attr_available_clock_sources
.attr
,
1244 ATTRIBUTE_GROUPS(timecard
);
1247 ptp_ocp_dev_release(struct device
*dev
)
1249 struct ptp_ocp
*bp
= dev_get_drvdata(dev
);
1251 mutex_lock(&ptp_ocp_lock
);
1252 idr_remove(&ptp_ocp_idr
, bp
->id
);
1253 mutex_unlock(&ptp_ocp_lock
);
1257 ptp_ocp_device_init(struct ptp_ocp
*bp
, struct pci_dev
*pdev
)
1261 mutex_lock(&ptp_ocp_lock
);
1262 err
= idr_alloc(&ptp_ocp_idr
, bp
, 0, 0, GFP_KERNEL
);
1263 mutex_unlock(&ptp_ocp_lock
);
1265 dev_err(&pdev
->dev
, "idr_alloc failed: %d\n", err
);
1270 bp
->ptp_info
= ptp_ocp_clock_info
;
1271 spin_lock_init(&bp
->lock
);
1276 device_initialize(&bp
->dev
);
1277 dev_set_name(&bp
->dev
, "ocp%d", bp
->id
);
1278 bp
->dev
.class = &timecard_class
;
1279 bp
->dev
.parent
= &pdev
->dev
;
1280 bp
->dev
.release
= ptp_ocp_dev_release
;
1281 dev_set_drvdata(&bp
->dev
, bp
);
1283 err
= device_add(&bp
->dev
);
1285 dev_err(&bp
->dev
, "device add failed: %d\n", err
);
1289 pci_set_drvdata(pdev
, bp
);
1294 ptp_ocp_dev_release(&bp
->dev
);
1295 put_device(&bp
->dev
);
1300 ptp_ocp_symlink(struct ptp_ocp
*bp
, struct device
*child
, const char *link
)
1302 struct device
*dev
= &bp
->dev
;
1304 if (sysfs_create_link(&dev
->kobj
, &child
->kobj
, link
))
1305 dev_err(dev
, "%s symlink failed\n", link
);
1309 ptp_ocp_link_child(struct ptp_ocp
*bp
, const char *name
, const char *link
)
1311 struct device
*dev
, *child
;
1313 dev
= &bp
->pdev
->dev
;
1315 child
= device_find_child_by_name(dev
, name
);
1317 dev_err(dev
, "Could not find device %s\n", name
);
1321 ptp_ocp_symlink(bp
, child
, link
);
1326 ptp_ocp_complete(struct ptp_ocp
*bp
)
1328 struct pps_device
*pps
;
1331 if (bp
->gnss_port
!= -1) {
1332 sprintf(buf
, "ttyS%d", bp
->gnss_port
);
1333 ptp_ocp_link_child(bp
, buf
, "ttyGNSS");
1335 if (bp
->mac_port
!= -1) {
1336 sprintf(buf
, "ttyS%d", bp
->mac_port
);
1337 ptp_ocp_link_child(bp
, buf
, "ttyMAC");
1339 sprintf(buf
, "ptp%d", ptp_clock_index(bp
->ptp
));
1340 ptp_ocp_link_child(bp
, buf
, "ptp");
1342 pps
= pps_lookup_dev(bp
->ptp
);
1344 ptp_ocp_symlink(bp
, pps
->dev
, "pps");
1346 if (device_add_groups(&bp
->dev
, timecard_groups
))
1347 pr_err("device add groups failed\n");
1353 ptp_ocp_resource_summary(struct ptp_ocp
*bp
)
1355 struct device
*dev
= &bp
->pdev
->dev
;
1358 u32 ver
= ioread32(&bp
->image
->version
);
1360 dev_info(dev
, "version %x\n", ver
);
1362 dev_info(dev
, "regular image, version %d\n",
1365 dev_info(dev
, "golden image, version %d\n",
1368 if (bp
->gnss_port
!= -1)
1369 dev_info(dev
, "GNSS @ /dev/ttyS%d 115200\n", bp
->gnss_port
);
1370 if (bp
->mac_port
!= -1)
1371 dev_info(dev
, "MAC @ /dev/ttyS%d 57600\n", bp
->mac_port
);
1375 ptp_ocp_detach_sysfs(struct ptp_ocp
*bp
)
1377 struct device
*dev
= &bp
->dev
;
1379 sysfs_remove_link(&dev
->kobj
, "ttyGNSS");
1380 sysfs_remove_link(&dev
->kobj
, "ttyMAC");
1381 sysfs_remove_link(&dev
->kobj
, "ptp");
1382 sysfs_remove_link(&dev
->kobj
, "pps");
1383 device_remove_groups(dev
, timecard_groups
);
1387 ptp_ocp_detach(struct ptp_ocp
*bp
)
1389 ptp_ocp_detach_sysfs(bp
);
1390 if (timer_pending(&bp
->watchdog
))
1391 del_timer_sync(&bp
->watchdog
);
1393 ptp_ocp_unregister_ext(bp
->ts0
);
1395 ptp_ocp_unregister_ext(bp
->ts1
);
1397 ptp_ocp_unregister_ext(bp
->pps
);
1398 if (bp
->gnss_port
!= -1)
1399 serial8250_unregister_port(bp
->gnss_port
);
1400 if (bp
->mac_port
!= -1)
1401 serial8250_unregister_port(bp
->mac_port
);
1403 platform_device_unregister(bp
->spi_flash
);
1405 platform_device_unregister(bp
->i2c_ctrl
);
1407 clk_hw_unregister_fixed_rate(bp
->i2c_clk
);
1409 pci_free_irq_vectors(bp
->pdev
);
1411 ptp_clock_unregister(bp
->ptp
);
1412 device_unregister(&bp
->dev
);
1416 ptp_ocp_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1418 struct devlink
*devlink
;
1422 devlink
= devlink_alloc(&ptp_ocp_devlink_ops
, sizeof(*bp
), &pdev
->dev
);
1424 dev_err(&pdev
->dev
, "devlink_alloc failed\n");
1428 err
= devlink_register(devlink
);
1432 err
= pci_enable_device(pdev
);
1434 dev_err(&pdev
->dev
, "pci_enable_device\n");
1435 goto out_unregister
;
1438 bp
= devlink_priv(devlink
);
1439 err
= ptp_ocp_device_init(bp
, pdev
);
1444 * Older FPGA firmware only returns 2 irq's.
1445 * allow this - if not all of the IRQ's are returned, skip the
1446 * extra devices and just register the clock.
1448 err
= pci_alloc_irq_vectors(pdev
, 1, 10, PCI_IRQ_MSI
| PCI_IRQ_MSIX
);
1450 dev_err(&pdev
->dev
, "alloc_irq_vectors err: %d\n", err
);
1454 pci_set_master(pdev
);
1456 err
= ptp_ocp_register_resources(bp
, id
->driver_data
);
1460 bp
->ptp
= ptp_clock_register(&bp
->ptp_info
, &pdev
->dev
);
1461 if (IS_ERR(bp
->ptp
)) {
1462 err
= PTR_ERR(bp
->ptp
);
1463 dev_err(&pdev
->dev
, "ptp_clock_register: %d\n", err
);
1468 err
= ptp_ocp_complete(bp
);
1473 ptp_ocp_resource_summary(bp
);
1479 pci_set_drvdata(pdev
, NULL
);
1481 pci_disable_device(pdev
);
1483 devlink_unregister(devlink
);
1485 devlink_free(devlink
);
1491 ptp_ocp_remove(struct pci_dev
*pdev
)
1493 struct ptp_ocp
*bp
= pci_get_drvdata(pdev
);
1494 struct devlink
*devlink
= priv_to_devlink(bp
);
1497 pci_set_drvdata(pdev
, NULL
);
1498 pci_disable_device(pdev
);
1500 devlink_unregister(devlink
);
1501 devlink_free(devlink
);
1504 static struct pci_driver ptp_ocp_driver
= {
1505 .name
= KBUILD_MODNAME
,
1506 .id_table
= ptp_ocp_pcidev_id
,
1507 .probe
= ptp_ocp_probe
,
1508 .remove
= ptp_ocp_remove
,
1512 ptp_ocp_i2c_notifier_call(struct notifier_block
*nb
,
1513 unsigned long action
, void *data
)
1515 struct device
*dev
, *child
= data
;
1520 case BUS_NOTIFY_ADD_DEVICE
:
1521 case BUS_NOTIFY_DEL_DEVICE
:
1522 add
= action
== BUS_NOTIFY_ADD_DEVICE
;
1528 if (!i2c_verify_adapter(child
))
1532 while ((dev
= dev
->parent
))
1533 if (dev
->driver
&& !strcmp(dev
->driver
->name
, KBUILD_MODNAME
))
1538 bp
= dev_get_drvdata(dev
);
1540 ptp_ocp_symlink(bp
, child
, "i2c");
1542 sysfs_remove_link(&bp
->dev
.kobj
, "i2c");
1547 static struct notifier_block ptp_ocp_i2c_notifier
= {
1548 .notifier_call
= ptp_ocp_i2c_notifier_call
,
1557 what
= "timecard class";
1558 err
= class_register(&timecard_class
);
1562 what
= "i2c notifier";
1563 err
= bus_register_notifier(&i2c_bus_type
, &ptp_ocp_i2c_notifier
);
1567 what
= "ptp_ocp driver";
1568 err
= pci_register_driver(&ptp_ocp_driver
);
1575 bus_unregister_notifier(&i2c_bus_type
, &ptp_ocp_i2c_notifier
);
1577 class_unregister(&timecard_class
);
1579 pr_err(KBUILD_MODNAME
": failed to register %s: %d\n", what
, err
);
1586 bus_unregister_notifier(&i2c_bus_type
, &ptp_ocp_i2c_notifier
);
1587 pci_unregister_driver(&ptp_ocp_driver
);
1588 class_unregister(&timecard_class
);
1591 module_init(ptp_ocp_init
);
1592 module_exit(ptp_ocp_fini
);
1594 MODULE_DESCRIPTION("OpenCompute TimeCard driver");
1595 MODULE_LICENSE("GPL v2");