1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2021 MediaTek Inc.
5 #include <linux/platform_device.h>
6 #include <linux/mfd/mt6359/registers.h>
7 #include <linux/mfd/mt6359p/registers.h>
8 #include <linux/mfd/mt6397/core.h>
9 #include <linux/module.h>
10 #include <linux/of_device.h>
11 #include <linux/regmap.h>
12 #include <linux/regulator/driver.h>
13 #include <linux/regulator/machine.h>
14 #include <linux/regulator/mt6359-regulator.h>
15 #include <linux/regulator/of_regulator.h>
17 #define MT6359_BUCK_MODE_AUTO 0
18 #define MT6359_BUCK_MODE_FORCE_PWM 1
19 #define MT6359_BUCK_MODE_NORMAL 0
20 #define MT6359_BUCK_MODE_LP 2
23 * MT6359 regulators' information
25 * @desc: standard fields of regulator description.
26 * @status_reg: for query status of regulators.
27 * @qi: Mask for query enable signal status of regulators.
28 * @modeset_reg: for operating AUTO/PWM mode register.
29 * @modeset_mask: MASK for operating modeset register.
30 * @modeset_shift: SHIFT for operating modeset register.
32 struct mt6359_regulator_info
{
33 struct regulator_desc desc
;
44 #define MT6359_BUCK(match, _name, min, max, step, \
45 _enable_reg, _status_reg, \
46 _vsel_reg, _vsel_mask, \
47 _lp_mode_reg, _lp_mode_shift, \
48 _modeset_reg, _modeset_shift) \
49 [MT6359_ID_##_name] = { \
52 .of_match = of_match_ptr(match), \
53 .regulators_node = of_match_ptr("regulators"), \
54 .ops = &mt6359_volt_linear_ops, \
55 .type = REGULATOR_VOLTAGE, \
56 .id = MT6359_ID_##_name, \
57 .owner = THIS_MODULE, \
59 .n_voltages = ((max) - (min)) / (step) + 1, \
61 .vsel_reg = _vsel_reg, \
62 .vsel_mask = _vsel_mask, \
63 .enable_reg = _enable_reg, \
64 .enable_mask = BIT(0), \
65 .of_map_mode = mt6359_map_mode, \
67 .status_reg = _status_reg, \
69 .lp_mode_reg = _lp_mode_reg, \
70 .lp_mode_mask = BIT(_lp_mode_shift), \
71 .lp_mode_shift = _lp_mode_shift, \
72 .modeset_reg = _modeset_reg, \
73 .modeset_mask = BIT(_modeset_shift), \
74 .modeset_shift = _modeset_shift \
77 #define MT6359_LDO_LINEAR(match, _name, min, max, step, \
78 _enable_reg, _status_reg, _vsel_reg, _vsel_mask) \
79 [MT6359_ID_##_name] = { \
82 .of_match = of_match_ptr(match), \
83 .regulators_node = of_match_ptr("regulators"), \
84 .ops = &mt6359_volt_linear_ops, \
85 .type = REGULATOR_VOLTAGE, \
86 .id = MT6359_ID_##_name, \
87 .owner = THIS_MODULE, \
89 .n_voltages = ((max) - (min)) / (step) + 1, \
91 .vsel_reg = _vsel_reg, \
92 .vsel_mask = _vsel_mask, \
93 .enable_reg = _enable_reg, \
94 .enable_mask = BIT(0), \
96 .status_reg = _status_reg, \
100 #define MT6359_LDO(match, _name, _volt_table, \
101 _enable_reg, _enable_mask, _status_reg, \
102 _vsel_reg, _vsel_mask, _en_delay) \
103 [MT6359_ID_##_name] = { \
106 .of_match = of_match_ptr(match), \
107 .regulators_node = of_match_ptr("regulators"), \
108 .ops = &mt6359_volt_table_ops, \
109 .type = REGULATOR_VOLTAGE, \
110 .id = MT6359_ID_##_name, \
111 .owner = THIS_MODULE, \
112 .n_voltages = ARRAY_SIZE(_volt_table), \
113 .volt_table = _volt_table, \
114 .vsel_reg = _vsel_reg, \
115 .vsel_mask = _vsel_mask, \
116 .enable_reg = _enable_reg, \
117 .enable_mask = BIT(_enable_mask), \
118 .enable_time = _en_delay, \
120 .status_reg = _status_reg, \
124 #define MT6359_REG_FIXED(match, _name, _enable_reg, \
125 _status_reg, _fixed_volt) \
126 [MT6359_ID_##_name] = { \
129 .of_match = of_match_ptr(match), \
130 .regulators_node = of_match_ptr("regulators"), \
131 .ops = &mt6359_volt_fixed_ops, \
132 .type = REGULATOR_VOLTAGE, \
133 .id = MT6359_ID_##_name, \
134 .owner = THIS_MODULE, \
136 .enable_reg = _enable_reg, \
137 .enable_mask = BIT(0), \
138 .fixed_uV = (_fixed_volt), \
140 .status_reg = _status_reg, \
144 #define MT6359P_LDO1(match, _name, _ops, _volt_table, \
145 _enable_reg, _enable_mask, _status_reg, \
146 _vsel_reg, _vsel_mask) \
147 [MT6359_ID_##_name] = { \
150 .of_match = of_match_ptr(match), \
151 .regulators_node = of_match_ptr("regulators"), \
153 .type = REGULATOR_VOLTAGE, \
154 .id = MT6359_ID_##_name, \
155 .owner = THIS_MODULE, \
156 .n_voltages = ARRAY_SIZE(_volt_table), \
157 .volt_table = _volt_table, \
158 .vsel_reg = _vsel_reg, \
159 .vsel_mask = _vsel_mask, \
160 .enable_reg = _enable_reg, \
161 .enable_mask = BIT(_enable_mask), \
163 .status_reg = _status_reg, \
167 static const unsigned int vsim1_voltages
[] = {
168 0, 0, 0, 1700000, 1800000, 0, 0, 0, 2700000, 0, 0, 3000000, 3100000,
171 static const unsigned int vibr_voltages
[] = {
172 1200000, 1300000, 1500000, 0, 1800000, 2000000, 0, 0, 2700000, 2800000,
173 0, 3000000, 0, 3300000,
176 static const unsigned int vrf12_voltages
[] = {
177 0, 0, 1100000, 1200000, 1300000,
180 static const unsigned int volt18_voltages
[] = {
181 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1700000, 1800000, 1900000,
184 static const unsigned int vcn13_voltages
[] = {
185 900000, 1000000, 0, 1200000, 1300000,
188 static const unsigned int vcn33_voltages
[] = {
189 0, 0, 0, 0, 0, 0, 0, 0, 0, 2800000, 0, 0, 0, 3300000, 3400000, 3500000,
192 static const unsigned int vefuse_voltages
[] = {
193 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1700000, 1800000, 1900000, 2000000,
196 static const unsigned int vxo22_voltages
[] = {
197 1800000, 0, 0, 0, 2200000,
200 static const unsigned int vrfck_voltages
[] = {
201 0, 0, 1500000, 0, 0, 0, 0, 1600000, 0, 0, 0, 0, 1700000,
204 static const unsigned int vrfck_voltages_1
[] = {
208 static const unsigned int vio28_voltages
[] = {
209 0, 0, 0, 0, 0, 0, 0, 0, 0, 2800000, 2900000, 3000000, 3100000, 3300000,
212 static const unsigned int vemc_voltages
[] = {
213 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2900000, 3000000, 0, 3300000,
216 static const unsigned int vemc_voltages_1
[] = {
217 0, 0, 0, 0, 0, 0, 0, 0, 2500000, 2800000, 2900000, 3000000, 3100000,
221 static const unsigned int va12_voltages
[] = {
222 0, 0, 0, 0, 0, 0, 1200000, 1300000,
225 static const unsigned int va09_voltages
[] = {
226 0, 0, 800000, 900000, 0, 0, 1200000,
229 static const unsigned int vrf18_voltages
[] = {
230 0, 0, 0, 0, 0, 1700000, 1800000, 1810000,
233 static const unsigned int vbbck_voltages
[] = {
234 0, 0, 0, 0, 1100000, 0, 0, 0, 1150000, 0, 0, 0, 1200000,
237 static const unsigned int vsim2_voltages
[] = {
238 0, 0, 0, 1700000, 1800000, 0, 0, 0, 2700000, 0, 0, 3000000, 3100000,
241 static inline unsigned int mt6359_map_mode(unsigned int mode
)
244 case MT6359_BUCK_MODE_NORMAL
:
245 return REGULATOR_MODE_NORMAL
;
246 case MT6359_BUCK_MODE_FORCE_PWM
:
247 return REGULATOR_MODE_FAST
;
248 case MT6359_BUCK_MODE_LP
:
249 return REGULATOR_MODE_IDLE
;
251 return REGULATOR_MODE_INVALID
;
255 static int mt6359_get_status(struct regulator_dev
*rdev
)
259 struct mt6359_regulator_info
*info
= rdev_get_drvdata(rdev
);
261 ret
= regmap_read(rdev
->regmap
, info
->status_reg
, ®val
);
263 dev_err(&rdev
->dev
, "Failed to get enable reg: %d\n", ret
);
267 if (regval
& info
->qi
)
268 return REGULATOR_STATUS_ON
;
270 return REGULATOR_STATUS_OFF
;
273 static unsigned int mt6359_regulator_get_mode(struct regulator_dev
*rdev
)
275 struct mt6359_regulator_info
*info
= rdev_get_drvdata(rdev
);
278 ret
= regmap_read(rdev
->regmap
, info
->modeset_reg
, ®val
);
281 "Failed to get mt6359 buck mode: %d\n", ret
);
285 if ((regval
& info
->modeset_mask
) >> info
->modeset_shift
==
286 MT6359_BUCK_MODE_FORCE_PWM
)
287 return REGULATOR_MODE_FAST
;
289 ret
= regmap_read(rdev
->regmap
, info
->lp_mode_reg
, ®val
);
292 "Failed to get mt6359 buck lp mode: %d\n", ret
);
296 if (regval
& info
->lp_mode_mask
)
297 return REGULATOR_MODE_IDLE
;
299 return REGULATOR_MODE_NORMAL
;
302 static int mt6359_regulator_set_mode(struct regulator_dev
*rdev
,
305 struct mt6359_regulator_info
*info
= rdev_get_drvdata(rdev
);
309 curr_mode
= mt6359_regulator_get_mode(rdev
);
311 case REGULATOR_MODE_FAST
:
312 val
= MT6359_BUCK_MODE_FORCE_PWM
;
313 val
<<= info
->modeset_shift
;
314 ret
= regmap_update_bits(rdev
->regmap
,
319 case REGULATOR_MODE_NORMAL
:
320 if (curr_mode
== REGULATOR_MODE_FAST
) {
321 val
= MT6359_BUCK_MODE_AUTO
;
322 val
<<= info
->modeset_shift
;
323 ret
= regmap_update_bits(rdev
->regmap
,
327 } else if (curr_mode
== REGULATOR_MODE_IDLE
) {
328 val
= MT6359_BUCK_MODE_NORMAL
;
329 val
<<= info
->lp_mode_shift
;
330 ret
= regmap_update_bits(rdev
->regmap
,
337 case REGULATOR_MODE_IDLE
:
338 val
= MT6359_BUCK_MODE_LP
>> 1;
339 val
<<= info
->lp_mode_shift
;
340 ret
= regmap_update_bits(rdev
->regmap
,
351 "Failed to set mt6359 buck mode: %d\n", ret
);
357 static int mt6359p_vemc_set_voltage_sel(struct regulator_dev
*rdev
,
360 struct mt6359_regulator_info
*info
= rdev_get_drvdata(rdev
);
364 sel
<<= ffs(info
->desc
.vsel_mask
) - 1;
365 ret
= regmap_write(rdev
->regmap
, MT6359P_TMA_KEY_ADDR
, TMA_KEY
);
369 ret
= regmap_read(rdev
->regmap
, MT6359P_VM_MODE_ADDR
, &val
);
375 /* If HW trapping is 0, use VEMC_VOSEL_0 */
376 ret
= regmap_update_bits(rdev
->regmap
,
378 info
->desc
.vsel_mask
, sel
);
381 /* If HW trapping is 1, use VEMC_VOSEL_1 */
382 ret
= regmap_update_bits(rdev
->regmap
,
383 info
->desc
.vsel_reg
+ 0x2,
384 info
->desc
.vsel_mask
, sel
);
393 ret
= regmap_write(rdev
->regmap
, MT6359P_TMA_KEY_ADDR
, 0);
397 static int mt6359p_vemc_get_voltage_sel(struct regulator_dev
*rdev
)
399 struct mt6359_regulator_info
*info
= rdev_get_drvdata(rdev
);
403 ret
= regmap_read(rdev
->regmap
, MT6359P_VM_MODE_ADDR
, &val
);
408 /* If HW trapping is 0, use VEMC_VOSEL_0 */
409 ret
= regmap_read(rdev
->regmap
,
410 info
->desc
.vsel_reg
, &val
);
413 /* If HW trapping is 1, use VEMC_VOSEL_1 */
414 ret
= regmap_read(rdev
->regmap
,
415 info
->desc
.vsel_reg
+ 0x2, &val
);
423 val
&= info
->desc
.vsel_mask
;
424 val
>>= ffs(info
->desc
.vsel_mask
) - 1;
429 static const struct regulator_ops mt6359_volt_linear_ops
= {
430 .list_voltage
= regulator_list_voltage_linear
,
431 .map_voltage
= regulator_map_voltage_linear
,
432 .set_voltage_sel
= regulator_set_voltage_sel_regmap
,
433 .get_voltage_sel
= regulator_get_voltage_sel_regmap
,
434 .set_voltage_time_sel
= regulator_set_voltage_time_sel
,
435 .enable
= regulator_enable_regmap
,
436 .disable
= regulator_disable_regmap
,
437 .is_enabled
= regulator_is_enabled_regmap
,
438 .get_status
= mt6359_get_status
,
439 .set_mode
= mt6359_regulator_set_mode
,
440 .get_mode
= mt6359_regulator_get_mode
,
443 static const struct regulator_ops mt6359_volt_table_ops
= {
444 .list_voltage
= regulator_list_voltage_table
,
445 .map_voltage
= regulator_map_voltage_iterate
,
446 .set_voltage_sel
= regulator_set_voltage_sel_regmap
,
447 .get_voltage_sel
= regulator_get_voltage_sel_regmap
,
448 .set_voltage_time_sel
= regulator_set_voltage_time_sel
,
449 .enable
= regulator_enable_regmap
,
450 .disable
= regulator_disable_regmap
,
451 .is_enabled
= regulator_is_enabled_regmap
,
452 .get_status
= mt6359_get_status
,
455 static const struct regulator_ops mt6359_volt_fixed_ops
= {
456 .enable
= regulator_enable_regmap
,
457 .disable
= regulator_disable_regmap
,
458 .is_enabled
= regulator_is_enabled_regmap
,
459 .get_status
= mt6359_get_status
,
462 static const struct regulator_ops mt6359p_vemc_ops
= {
463 .list_voltage
= regulator_list_voltage_table
,
464 .map_voltage
= regulator_map_voltage_iterate
,
465 .set_voltage_sel
= mt6359p_vemc_set_voltage_sel
,
466 .get_voltage_sel
= mt6359p_vemc_get_voltage_sel
,
467 .set_voltage_time_sel
= regulator_set_voltage_time_sel
,
468 .enable
= regulator_enable_regmap
,
469 .disable
= regulator_disable_regmap
,
470 .is_enabled
= regulator_is_enabled_regmap
,
471 .get_status
= mt6359_get_status
,
474 /* The array is indexed by id(MT6359_ID_XXX) */
475 static struct mt6359_regulator_info mt6359_regulators
[] = {
476 MT6359_BUCK("buck_vs1", VS1
, 800000, 2200000, 12500,
477 MT6359_RG_BUCK_VS1_EN_ADDR
,
478 MT6359_DA_VS1_EN_ADDR
, MT6359_RG_BUCK_VS1_VOSEL_ADDR
,
479 MT6359_RG_BUCK_VS1_VOSEL_MASK
<<
480 MT6359_RG_BUCK_VS1_VOSEL_SHIFT
,
481 MT6359_RG_BUCK_VS1_LP_ADDR
, MT6359_RG_BUCK_VS1_LP_SHIFT
,
482 MT6359_RG_VS1_FPWM_ADDR
, MT6359_RG_VS1_FPWM_SHIFT
),
483 MT6359_BUCK("buck_vgpu11", VGPU11
, 400000, 1193750, 6250,
484 MT6359_RG_BUCK_VGPU11_EN_ADDR
,
485 MT6359_DA_VGPU11_EN_ADDR
, MT6359_RG_BUCK_VGPU11_VOSEL_ADDR
,
486 MT6359_RG_BUCK_VGPU11_VOSEL_MASK
<<
487 MT6359_RG_BUCK_VGPU11_VOSEL_SHIFT
,
488 MT6359_RG_BUCK_VGPU11_LP_ADDR
,
489 MT6359_RG_BUCK_VGPU11_LP_SHIFT
,
490 MT6359_RG_VGPU11_FCCM_ADDR
, MT6359_RG_VGPU11_FCCM_SHIFT
),
491 MT6359_BUCK("buck_vmodem", VMODEM
, 400000, 1100000, 6250,
492 MT6359_RG_BUCK_VMODEM_EN_ADDR
,
493 MT6359_DA_VMODEM_EN_ADDR
, MT6359_RG_BUCK_VMODEM_VOSEL_ADDR
,
494 MT6359_RG_BUCK_VMODEM_VOSEL_MASK
<<
495 MT6359_RG_BUCK_VMODEM_VOSEL_SHIFT
,
496 MT6359_RG_BUCK_VMODEM_LP_ADDR
,
497 MT6359_RG_BUCK_VMODEM_LP_SHIFT
,
498 MT6359_RG_VMODEM_FCCM_ADDR
, MT6359_RG_VMODEM_FCCM_SHIFT
),
499 MT6359_BUCK("buck_vpu", VPU
, 400000, 1193750, 6250,
500 MT6359_RG_BUCK_VPU_EN_ADDR
,
501 MT6359_DA_VPU_EN_ADDR
, MT6359_RG_BUCK_VPU_VOSEL_ADDR
,
502 MT6359_RG_BUCK_VPU_VOSEL_MASK
<<
503 MT6359_RG_BUCK_VPU_VOSEL_SHIFT
,
504 MT6359_RG_BUCK_VPU_LP_ADDR
, MT6359_RG_BUCK_VPU_LP_SHIFT
,
505 MT6359_RG_VPU_FCCM_ADDR
, MT6359_RG_VPU_FCCM_SHIFT
),
506 MT6359_BUCK("buck_vcore", VCORE
, 400000, 1193750, 6250,
507 MT6359_RG_BUCK_VCORE_EN_ADDR
,
508 MT6359_DA_VCORE_EN_ADDR
, MT6359_RG_BUCK_VCORE_VOSEL_ADDR
,
509 MT6359_RG_BUCK_VCORE_VOSEL_MASK
<<
510 MT6359_RG_BUCK_VCORE_VOSEL_SHIFT
,
511 MT6359_RG_BUCK_VCORE_LP_ADDR
, MT6359_RG_BUCK_VCORE_LP_SHIFT
,
512 MT6359_RG_VCORE_FCCM_ADDR
, MT6359_RG_VCORE_FCCM_SHIFT
),
513 MT6359_BUCK("buck_vs2", VS2
, 800000, 1600000, 12500,
514 MT6359_RG_BUCK_VS2_EN_ADDR
,
515 MT6359_DA_VS2_EN_ADDR
, MT6359_RG_BUCK_VS2_VOSEL_ADDR
,
516 MT6359_RG_BUCK_VS2_VOSEL_MASK
<<
517 MT6359_RG_BUCK_VS2_VOSEL_SHIFT
,
518 MT6359_RG_BUCK_VS2_LP_ADDR
, MT6359_RG_BUCK_VS2_LP_SHIFT
,
519 MT6359_RG_VS2_FPWM_ADDR
, MT6359_RG_VS2_FPWM_SHIFT
),
520 MT6359_BUCK("buck_vpa", VPA
, 500000, 3650000, 50000,
521 MT6359_RG_BUCK_VPA_EN_ADDR
,
522 MT6359_DA_VPA_EN_ADDR
, MT6359_RG_BUCK_VPA_VOSEL_ADDR
,
523 MT6359_RG_BUCK_VPA_VOSEL_MASK
<<
524 MT6359_RG_BUCK_VPA_VOSEL_SHIFT
,
525 MT6359_RG_BUCK_VPA_LP_ADDR
, MT6359_RG_BUCK_VPA_LP_SHIFT
,
526 MT6359_RG_VPA_MODESET_ADDR
, MT6359_RG_VPA_MODESET_SHIFT
),
527 MT6359_BUCK("buck_vproc2", VPROC2
, 400000, 1193750, 6250,
528 MT6359_RG_BUCK_VPROC2_EN_ADDR
,
529 MT6359_DA_VPROC2_EN_ADDR
, MT6359_RG_BUCK_VPROC2_VOSEL_ADDR
,
530 MT6359_RG_BUCK_VPROC2_VOSEL_MASK
<<
531 MT6359_RG_BUCK_VPROC2_VOSEL_SHIFT
,
532 MT6359_RG_BUCK_VPROC2_LP_ADDR
,
533 MT6359_RG_BUCK_VPROC2_LP_SHIFT
,
534 MT6359_RG_VPROC2_FCCM_ADDR
, MT6359_RG_VPROC2_FCCM_SHIFT
),
535 MT6359_BUCK("buck_vproc1", VPROC1
, 400000, 1193750, 6250,
536 MT6359_RG_BUCK_VPROC1_EN_ADDR
,
537 MT6359_DA_VPROC1_EN_ADDR
, MT6359_RG_BUCK_VPROC1_VOSEL_ADDR
,
538 MT6359_RG_BUCK_VPROC1_VOSEL_MASK
<<
539 MT6359_RG_BUCK_VPROC1_VOSEL_SHIFT
,
540 MT6359_RG_BUCK_VPROC1_LP_ADDR
,
541 MT6359_RG_BUCK_VPROC1_LP_SHIFT
,
542 MT6359_RG_VPROC1_FCCM_ADDR
, MT6359_RG_VPROC1_FCCM_SHIFT
),
543 MT6359_BUCK("buck_vcore_sshub", VCORE_SSHUB
, 400000, 1193750, 6250,
544 MT6359_RG_BUCK_VCORE_SSHUB_EN_ADDR
,
545 MT6359_DA_VCORE_EN_ADDR
,
546 MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_ADDR
,
547 MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_MASK
<<
548 MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_SHIFT
,
549 MT6359_RG_BUCK_VCORE_LP_ADDR
, MT6359_RG_BUCK_VCORE_LP_SHIFT
,
550 MT6359_RG_VCORE_FCCM_ADDR
, MT6359_RG_VCORE_FCCM_SHIFT
),
551 MT6359_REG_FIXED("ldo_vaud18", VAUD18
, MT6359_RG_LDO_VAUD18_EN_ADDR
,
552 MT6359_DA_VAUD18_B_EN_ADDR
, 1800000),
553 MT6359_LDO("ldo_vsim1", VSIM1
, vsim1_voltages
,
554 MT6359_RG_LDO_VSIM1_EN_ADDR
, MT6359_RG_LDO_VSIM1_EN_SHIFT
,
555 MT6359_DA_VSIM1_B_EN_ADDR
, MT6359_RG_VSIM1_VOSEL_ADDR
,
556 MT6359_RG_VSIM1_VOSEL_MASK
<< MT6359_RG_VSIM1_VOSEL_SHIFT
,
558 MT6359_LDO("ldo_vibr", VIBR
, vibr_voltages
,
559 MT6359_RG_LDO_VIBR_EN_ADDR
, MT6359_RG_LDO_VIBR_EN_SHIFT
,
560 MT6359_DA_VIBR_B_EN_ADDR
, MT6359_RG_VIBR_VOSEL_ADDR
,
561 MT6359_RG_VIBR_VOSEL_MASK
<< MT6359_RG_VIBR_VOSEL_SHIFT
,
563 MT6359_LDO("ldo_vrf12", VRF12
, vrf12_voltages
,
564 MT6359_RG_LDO_VRF12_EN_ADDR
, MT6359_RG_LDO_VRF12_EN_SHIFT
,
565 MT6359_DA_VRF12_B_EN_ADDR
, MT6359_RG_VRF12_VOSEL_ADDR
,
566 MT6359_RG_VRF12_VOSEL_MASK
<< MT6359_RG_VRF12_VOSEL_SHIFT
,
568 MT6359_REG_FIXED("ldo_vusb", VUSB
, MT6359_RG_LDO_VUSB_EN_0_ADDR
,
569 MT6359_DA_VUSB_B_EN_ADDR
, 3000000),
570 MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2
, 500000, 1293750, 6250,
571 MT6359_RG_LDO_VSRAM_PROC2_EN_ADDR
,
572 MT6359_DA_VSRAM_PROC2_B_EN_ADDR
,
573 MT6359_RG_LDO_VSRAM_PROC2_VOSEL_ADDR
,
574 MT6359_RG_LDO_VSRAM_PROC2_VOSEL_MASK
<<
575 MT6359_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT
),
576 MT6359_LDO("ldo_vio18", VIO18
, volt18_voltages
,
577 MT6359_RG_LDO_VIO18_EN_ADDR
, MT6359_RG_LDO_VIO18_EN_SHIFT
,
578 MT6359_DA_VIO18_B_EN_ADDR
, MT6359_RG_VIO18_VOSEL_ADDR
,
579 MT6359_RG_VIO18_VOSEL_MASK
<< MT6359_RG_VIO18_VOSEL_SHIFT
,
581 MT6359_LDO("ldo_vcamio", VCAMIO
, volt18_voltages
,
582 MT6359_RG_LDO_VCAMIO_EN_ADDR
, MT6359_RG_LDO_VCAMIO_EN_SHIFT
,
583 MT6359_DA_VCAMIO_B_EN_ADDR
, MT6359_RG_VCAMIO_VOSEL_ADDR
,
584 MT6359_RG_VCAMIO_VOSEL_MASK
<< MT6359_RG_VCAMIO_VOSEL_SHIFT
,
586 MT6359_REG_FIXED("ldo_vcn18", VCN18
, MT6359_RG_LDO_VCN18_EN_ADDR
,
587 MT6359_DA_VCN18_B_EN_ADDR
, 1800000),
588 MT6359_REG_FIXED("ldo_vfe28", VFE28
, MT6359_RG_LDO_VFE28_EN_ADDR
,
589 MT6359_DA_VFE28_B_EN_ADDR
, 2800000),
590 MT6359_LDO("ldo_vcn13", VCN13
, vcn13_voltages
,
591 MT6359_RG_LDO_VCN13_EN_ADDR
, MT6359_RG_LDO_VCN13_EN_SHIFT
,
592 MT6359_DA_VCN13_B_EN_ADDR
, MT6359_RG_VCN13_VOSEL_ADDR
,
593 MT6359_RG_VCN13_VOSEL_MASK
<< MT6359_RG_VCN13_VOSEL_SHIFT
,
595 MT6359_LDO("ldo_vcn33_1_bt", VCN33_1_BT
, vcn33_voltages
,
596 MT6359_RG_LDO_VCN33_1_EN_0_ADDR
,
597 MT6359_RG_LDO_VCN33_1_EN_0_SHIFT
,
598 MT6359_DA_VCN33_1_B_EN_ADDR
, MT6359_RG_VCN33_1_VOSEL_ADDR
,
599 MT6359_RG_VCN33_1_VOSEL_MASK
<<
600 MT6359_RG_VCN33_1_VOSEL_SHIFT
, 240),
601 MT6359_LDO("ldo_vcn33_1_wifi", VCN33_1_WIFI
, vcn33_voltages
,
602 MT6359_RG_LDO_VCN33_1_EN_1_ADDR
,
603 MT6359_RG_LDO_VCN33_1_EN_1_SHIFT
,
604 MT6359_DA_VCN33_1_B_EN_ADDR
, MT6359_RG_VCN33_1_VOSEL_ADDR
,
605 MT6359_RG_VCN33_1_VOSEL_MASK
<<
606 MT6359_RG_VCN33_1_VOSEL_SHIFT
, 240),
607 MT6359_REG_FIXED("ldo_vaux18", VAUX18
, MT6359_RG_LDO_VAUX18_EN_ADDR
,
608 MT6359_DA_VAUX18_B_EN_ADDR
, 1800000),
609 MT6359_LDO_LINEAR("ldo_vsram_others", VSRAM_OTHERS
, 500000, 1293750,
611 MT6359_RG_LDO_VSRAM_OTHERS_EN_ADDR
,
612 MT6359_DA_VSRAM_OTHERS_B_EN_ADDR
,
613 MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR
,
614 MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_MASK
<<
615 MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT
),
616 MT6359_LDO("ldo_vefuse", VEFUSE
, vefuse_voltages
,
617 MT6359_RG_LDO_VEFUSE_EN_ADDR
, MT6359_RG_LDO_VEFUSE_EN_SHIFT
,
618 MT6359_DA_VEFUSE_B_EN_ADDR
, MT6359_RG_VEFUSE_VOSEL_ADDR
,
619 MT6359_RG_VEFUSE_VOSEL_MASK
<< MT6359_RG_VEFUSE_VOSEL_SHIFT
,
621 MT6359_LDO("ldo_vxo22", VXO22
, vxo22_voltages
,
622 MT6359_RG_LDO_VXO22_EN_ADDR
, MT6359_RG_LDO_VXO22_EN_SHIFT
,
623 MT6359_DA_VXO22_B_EN_ADDR
, MT6359_RG_VXO22_VOSEL_ADDR
,
624 MT6359_RG_VXO22_VOSEL_MASK
<< MT6359_RG_VXO22_VOSEL_SHIFT
,
626 MT6359_LDO("ldo_vrfck", VRFCK
, vrfck_voltages
,
627 MT6359_RG_LDO_VRFCK_EN_ADDR
, MT6359_RG_LDO_VRFCK_EN_SHIFT
,
628 MT6359_DA_VRFCK_B_EN_ADDR
, MT6359_RG_VRFCK_VOSEL_ADDR
,
629 MT6359_RG_VRFCK_VOSEL_MASK
<< MT6359_RG_VRFCK_VOSEL_SHIFT
,
631 MT6359_REG_FIXED("ldo_vbif28", VBIF28
, MT6359_RG_LDO_VBIF28_EN_ADDR
,
632 MT6359_DA_VBIF28_B_EN_ADDR
, 2800000),
633 MT6359_LDO("ldo_vio28", VIO28
, vio28_voltages
,
634 MT6359_RG_LDO_VIO28_EN_ADDR
, MT6359_RG_LDO_VIO28_EN_SHIFT
,
635 MT6359_DA_VIO28_B_EN_ADDR
, MT6359_RG_VIO28_VOSEL_ADDR
,
636 MT6359_RG_VIO28_VOSEL_MASK
<< MT6359_RG_VIO28_VOSEL_SHIFT
,
638 MT6359_LDO("ldo_vemc", VEMC
, vemc_voltages
,
639 MT6359_RG_LDO_VEMC_EN_ADDR
, MT6359_RG_LDO_VEMC_EN_SHIFT
,
640 MT6359_DA_VEMC_B_EN_ADDR
, MT6359_RG_VEMC_VOSEL_ADDR
,
641 MT6359_RG_VEMC_VOSEL_MASK
<< MT6359_RG_VEMC_VOSEL_SHIFT
,
643 MT6359_LDO("ldo_vcn33_2_bt", VCN33_2_BT
, vcn33_voltages
,
644 MT6359_RG_LDO_VCN33_2_EN_0_ADDR
,
645 MT6359_RG_LDO_VCN33_2_EN_0_SHIFT
,
646 MT6359_DA_VCN33_2_B_EN_ADDR
, MT6359_RG_VCN33_2_VOSEL_ADDR
,
647 MT6359_RG_VCN33_2_VOSEL_MASK
<<
648 MT6359_RG_VCN33_2_VOSEL_SHIFT
, 240),
649 MT6359_LDO("ldo_vcn33_2_wifi", VCN33_2_WIFI
, vcn33_voltages
,
650 MT6359_RG_LDO_VCN33_2_EN_1_ADDR
,
651 MT6359_RG_LDO_VCN33_2_EN_1_SHIFT
,
652 MT6359_DA_VCN33_2_B_EN_ADDR
, MT6359_RG_VCN33_2_VOSEL_ADDR
,
653 MT6359_RG_VCN33_2_VOSEL_MASK
<<
654 MT6359_RG_VCN33_2_VOSEL_SHIFT
, 240),
655 MT6359_LDO("ldo_va12", VA12
, va12_voltages
,
656 MT6359_RG_LDO_VA12_EN_ADDR
, MT6359_RG_LDO_VA12_EN_SHIFT
,
657 MT6359_DA_VA12_B_EN_ADDR
, MT6359_RG_VA12_VOSEL_ADDR
,
658 MT6359_RG_VA12_VOSEL_MASK
<< MT6359_RG_VA12_VOSEL_SHIFT
,
660 MT6359_LDO("ldo_va09", VA09
, va09_voltages
,
661 MT6359_RG_LDO_VA09_EN_ADDR
, MT6359_RG_LDO_VA09_EN_SHIFT
,
662 MT6359_DA_VA09_B_EN_ADDR
, MT6359_RG_VA09_VOSEL_ADDR
,
663 MT6359_RG_VA09_VOSEL_MASK
<< MT6359_RG_VA09_VOSEL_SHIFT
,
665 MT6359_LDO("ldo_vrf18", VRF18
, vrf18_voltages
,
666 MT6359_RG_LDO_VRF18_EN_ADDR
, MT6359_RG_LDO_VRF18_EN_SHIFT
,
667 MT6359_DA_VRF18_B_EN_ADDR
, MT6359_RG_VRF18_VOSEL_ADDR
,
668 MT6359_RG_VRF18_VOSEL_MASK
<< MT6359_RG_VRF18_VOSEL_SHIFT
,
670 MT6359_LDO_LINEAR("ldo_vsram_md", VSRAM_MD
, 500000, 1100000, 6250,
671 MT6359_RG_LDO_VSRAM_MD_EN_ADDR
,
672 MT6359_DA_VSRAM_MD_B_EN_ADDR
,
673 MT6359_RG_LDO_VSRAM_MD_VOSEL_ADDR
,
674 MT6359_RG_LDO_VSRAM_MD_VOSEL_MASK
<<
675 MT6359_RG_LDO_VSRAM_MD_VOSEL_SHIFT
),
676 MT6359_LDO("ldo_vufs", VUFS
, volt18_voltages
,
677 MT6359_RG_LDO_VUFS_EN_ADDR
, MT6359_RG_LDO_VUFS_EN_SHIFT
,
678 MT6359_DA_VUFS_B_EN_ADDR
, MT6359_RG_VUFS_VOSEL_ADDR
,
679 MT6359_RG_VUFS_VOSEL_MASK
<< MT6359_RG_VUFS_VOSEL_SHIFT
,
681 MT6359_LDO("ldo_vm18", VM18
, volt18_voltages
,
682 MT6359_RG_LDO_VM18_EN_ADDR
, MT6359_RG_LDO_VM18_EN_SHIFT
,
683 MT6359_DA_VM18_B_EN_ADDR
, MT6359_RG_VM18_VOSEL_ADDR
,
684 MT6359_RG_VM18_VOSEL_MASK
<< MT6359_RG_VM18_VOSEL_SHIFT
,
686 MT6359_LDO("ldo_vbbck", VBBCK
, vbbck_voltages
,
687 MT6359_RG_LDO_VBBCK_EN_ADDR
, MT6359_RG_LDO_VBBCK_EN_SHIFT
,
688 MT6359_DA_VBBCK_B_EN_ADDR
, MT6359_RG_VBBCK_VOSEL_ADDR
,
689 MT6359_RG_VBBCK_VOSEL_MASK
<< MT6359_RG_VBBCK_VOSEL_SHIFT
,
691 MT6359_LDO_LINEAR("ldo_vsram_proc1", VSRAM_PROC1
, 500000, 1293750, 6250,
692 MT6359_RG_LDO_VSRAM_PROC1_EN_ADDR
,
693 MT6359_DA_VSRAM_PROC1_B_EN_ADDR
,
694 MT6359_RG_LDO_VSRAM_PROC1_VOSEL_ADDR
,
695 MT6359_RG_LDO_VSRAM_PROC1_VOSEL_MASK
<<
696 MT6359_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT
),
697 MT6359_LDO("ldo_vsim2", VSIM2
, vsim2_voltages
,
698 MT6359_RG_LDO_VSIM2_EN_ADDR
, MT6359_RG_LDO_VSIM2_EN_SHIFT
,
699 MT6359_DA_VSIM2_B_EN_ADDR
, MT6359_RG_VSIM2_VOSEL_ADDR
,
700 MT6359_RG_VSIM2_VOSEL_MASK
<< MT6359_RG_VSIM2_VOSEL_SHIFT
,
702 MT6359_LDO_LINEAR("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB
,
703 500000, 1293750, 6250,
704 MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_EN_ADDR
,
705 MT6359_DA_VSRAM_OTHERS_B_EN_ADDR
,
706 MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_ADDR
,
707 MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK
<<
708 MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT
),
711 static struct mt6359_regulator_info mt6359p_regulators
[] = {
712 MT6359_BUCK("buck_vs1", VS1
, 800000, 2200000, 12500,
713 MT6359_RG_BUCK_VS1_EN_ADDR
,
714 MT6359_DA_VS1_EN_ADDR
, MT6359_RG_BUCK_VS1_VOSEL_ADDR
,
715 MT6359_RG_BUCK_VS1_VOSEL_MASK
<<
716 MT6359_RG_BUCK_VS1_VOSEL_SHIFT
,
717 MT6359_RG_BUCK_VS1_LP_ADDR
, MT6359_RG_BUCK_VS1_LP_SHIFT
,
718 MT6359_RG_VS1_FPWM_ADDR
, MT6359_RG_VS1_FPWM_SHIFT
),
719 MT6359_BUCK("buck_vgpu11", VGPU11
, 400000, 1193750, 6250,
720 MT6359_RG_BUCK_VGPU11_EN_ADDR
,
721 MT6359_DA_VGPU11_EN_ADDR
, MT6359P_RG_BUCK_VGPU11_VOSEL_ADDR
,
722 MT6359_RG_BUCK_VGPU11_VOSEL_MASK
<<
723 MT6359_RG_BUCK_VGPU11_VOSEL_SHIFT
,
724 MT6359_RG_BUCK_VGPU11_LP_ADDR
,
725 MT6359_RG_BUCK_VGPU11_LP_SHIFT
,
726 MT6359_RG_VGPU11_FCCM_ADDR
, MT6359_RG_VGPU11_FCCM_SHIFT
),
727 MT6359_BUCK("buck_vmodem", VMODEM
, 400000, 1100000, 6250,
728 MT6359_RG_BUCK_VMODEM_EN_ADDR
,
729 MT6359_DA_VMODEM_EN_ADDR
, MT6359_RG_BUCK_VMODEM_VOSEL_ADDR
,
730 MT6359_RG_BUCK_VMODEM_VOSEL_MASK
<<
731 MT6359_RG_BUCK_VMODEM_VOSEL_SHIFT
,
732 MT6359_RG_BUCK_VMODEM_LP_ADDR
,
733 MT6359_RG_BUCK_VMODEM_LP_SHIFT
,
734 MT6359_RG_VMODEM_FCCM_ADDR
, MT6359_RG_VMODEM_FCCM_SHIFT
),
735 MT6359_BUCK("buck_vpu", VPU
, 400000, 1193750, 6250,
736 MT6359_RG_BUCK_VPU_EN_ADDR
,
737 MT6359_DA_VPU_EN_ADDR
, MT6359_RG_BUCK_VPU_VOSEL_ADDR
,
738 MT6359_RG_BUCK_VPU_VOSEL_MASK
<<
739 MT6359_RG_BUCK_VPU_VOSEL_SHIFT
,
740 MT6359_RG_BUCK_VPU_LP_ADDR
, MT6359_RG_BUCK_VPU_LP_SHIFT
,
741 MT6359_RG_VPU_FCCM_ADDR
, MT6359_RG_VPU_FCCM_SHIFT
),
742 MT6359_BUCK("buck_vcore", VCORE
, 506250, 1300000, 6250,
743 MT6359_RG_BUCK_VCORE_EN_ADDR
,
744 MT6359_DA_VCORE_EN_ADDR
, MT6359P_RG_BUCK_VCORE_VOSEL_ADDR
,
745 MT6359_RG_BUCK_VCORE_VOSEL_MASK
<<
746 MT6359_RG_BUCK_VCORE_VOSEL_SHIFT
,
747 MT6359_RG_BUCK_VCORE_LP_ADDR
, MT6359_RG_BUCK_VCORE_LP_SHIFT
,
748 MT6359_RG_VCORE_FCCM_ADDR
, MT6359_RG_VCORE_FCCM_SHIFT
),
749 MT6359_BUCK("buck_vs2", VS2
, 800000, 1600000, 12500,
750 MT6359_RG_BUCK_VS2_EN_ADDR
,
751 MT6359_DA_VS2_EN_ADDR
, MT6359_RG_BUCK_VS2_VOSEL_ADDR
,
752 MT6359_RG_BUCK_VS2_VOSEL_MASK
<<
753 MT6359_RG_BUCK_VS2_VOSEL_SHIFT
,
754 MT6359_RG_BUCK_VS2_LP_ADDR
, MT6359_RG_BUCK_VS2_LP_SHIFT
,
755 MT6359_RG_VS2_FPWM_ADDR
, MT6359_RG_VS2_FPWM_SHIFT
),
756 MT6359_BUCK("buck_vpa", VPA
, 500000, 3650000, 50000,
757 MT6359_RG_BUCK_VPA_EN_ADDR
,
758 MT6359_DA_VPA_EN_ADDR
, MT6359_RG_BUCK_VPA_VOSEL_ADDR
,
759 MT6359_RG_BUCK_VPA_VOSEL_MASK
<<
760 MT6359_RG_BUCK_VPA_VOSEL_SHIFT
,
761 MT6359_RG_BUCK_VPA_LP_ADDR
, MT6359_RG_BUCK_VPA_LP_SHIFT
,
762 MT6359_RG_VPA_MODESET_ADDR
, MT6359_RG_VPA_MODESET_SHIFT
),
763 MT6359_BUCK("buck_vproc2", VPROC2
, 400000, 1193750, 6250,
764 MT6359_RG_BUCK_VPROC2_EN_ADDR
,
765 MT6359_DA_VPROC2_EN_ADDR
, MT6359_RG_BUCK_VPROC2_VOSEL_ADDR
,
766 MT6359_RG_BUCK_VPROC2_VOSEL_MASK
<<
767 MT6359_RG_BUCK_VPROC2_VOSEL_SHIFT
,
768 MT6359_RG_BUCK_VPROC2_LP_ADDR
,
769 MT6359_RG_BUCK_VPROC2_LP_SHIFT
,
770 MT6359_RG_VPROC2_FCCM_ADDR
, MT6359_RG_VPROC2_FCCM_SHIFT
),
771 MT6359_BUCK("buck_vproc1", VPROC1
, 400000, 1193750, 6250,
772 MT6359_RG_BUCK_VPROC1_EN_ADDR
,
773 MT6359_DA_VPROC1_EN_ADDR
, MT6359_RG_BUCK_VPROC1_VOSEL_ADDR
,
774 MT6359_RG_BUCK_VPROC1_VOSEL_MASK
<<
775 MT6359_RG_BUCK_VPROC1_VOSEL_SHIFT
,
776 MT6359_RG_BUCK_VPROC1_LP_ADDR
,
777 MT6359_RG_BUCK_VPROC1_LP_SHIFT
,
778 MT6359_RG_VPROC1_FCCM_ADDR
, MT6359_RG_VPROC1_FCCM_SHIFT
),
779 MT6359_BUCK("buck_vgpu11_sshub", VGPU11_SSHUB
, 400000, 1193750, 6250,
780 MT6359P_RG_BUCK_VGPU11_SSHUB_EN_ADDR
,
781 MT6359_DA_VGPU11_EN_ADDR
,
782 MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_ADDR
,
783 MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_MASK
<<
784 MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_SHIFT
,
785 MT6359_RG_BUCK_VGPU11_LP_ADDR
,
786 MT6359_RG_BUCK_VGPU11_LP_SHIFT
,
787 MT6359_RG_VGPU11_FCCM_ADDR
, MT6359_RG_VGPU11_FCCM_SHIFT
),
788 MT6359_REG_FIXED("ldo_vaud18", VAUD18
, MT6359P_RG_LDO_VAUD18_EN_ADDR
,
789 MT6359P_DA_VAUD18_B_EN_ADDR
, 1800000),
790 MT6359_LDO("ldo_vsim1", VSIM1
, vsim1_voltages
,
791 MT6359P_RG_LDO_VSIM1_EN_ADDR
, MT6359P_RG_LDO_VSIM1_EN_SHIFT
,
792 MT6359P_DA_VSIM1_B_EN_ADDR
, MT6359P_RG_VSIM1_VOSEL_ADDR
,
793 MT6359_RG_VSIM1_VOSEL_MASK
<< MT6359_RG_VSIM1_VOSEL_SHIFT
,
795 MT6359_LDO("ldo_vibr", VIBR
, vibr_voltages
,
796 MT6359P_RG_LDO_VIBR_EN_ADDR
, MT6359P_RG_LDO_VIBR_EN_SHIFT
,
797 MT6359P_DA_VIBR_B_EN_ADDR
, MT6359P_RG_VIBR_VOSEL_ADDR
,
798 MT6359_RG_VIBR_VOSEL_MASK
<< MT6359_RG_VIBR_VOSEL_SHIFT
,
800 MT6359_LDO("ldo_vrf12", VRF12
, vrf12_voltages
,
801 MT6359P_RG_LDO_VRF12_EN_ADDR
, MT6359P_RG_LDO_VRF12_EN_SHIFT
,
802 MT6359P_DA_VRF12_B_EN_ADDR
, MT6359P_RG_VRF12_VOSEL_ADDR
,
803 MT6359_RG_VRF12_VOSEL_MASK
<< MT6359_RG_VRF12_VOSEL_SHIFT
,
805 MT6359_REG_FIXED("ldo_vusb", VUSB
, MT6359P_RG_LDO_VUSB_EN_0_ADDR
,
806 MT6359P_DA_VUSB_B_EN_ADDR
, 3000000),
807 MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2
, 500000, 1293750, 6250,
808 MT6359P_RG_LDO_VSRAM_PROC2_EN_ADDR
,
809 MT6359P_DA_VSRAM_PROC2_B_EN_ADDR
,
810 MT6359P_RG_LDO_VSRAM_PROC2_VOSEL_ADDR
,
811 MT6359_RG_LDO_VSRAM_PROC2_VOSEL_MASK
<<
812 MT6359_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT
),
813 MT6359_LDO("ldo_vio18", VIO18
, volt18_voltages
,
814 MT6359P_RG_LDO_VIO18_EN_ADDR
, MT6359P_RG_LDO_VIO18_EN_SHIFT
,
815 MT6359P_DA_VIO18_B_EN_ADDR
, MT6359P_RG_VIO18_VOSEL_ADDR
,
816 MT6359_RG_VIO18_VOSEL_MASK
<< MT6359_RG_VIO18_VOSEL_SHIFT
,
818 MT6359_LDO("ldo_vcamio", VCAMIO
, volt18_voltages
,
819 MT6359P_RG_LDO_VCAMIO_EN_ADDR
,
820 MT6359P_RG_LDO_VCAMIO_EN_SHIFT
,
821 MT6359P_DA_VCAMIO_B_EN_ADDR
, MT6359P_RG_VCAMIO_VOSEL_ADDR
,
822 MT6359_RG_VCAMIO_VOSEL_MASK
<< MT6359_RG_VCAMIO_VOSEL_SHIFT
,
824 MT6359_REG_FIXED("ldo_vcn18", VCN18
, MT6359P_RG_LDO_VCN18_EN_ADDR
,
825 MT6359P_DA_VCN18_B_EN_ADDR
, 1800000),
826 MT6359_REG_FIXED("ldo_vfe28", VFE28
, MT6359P_RG_LDO_VFE28_EN_ADDR
,
827 MT6359P_DA_VFE28_B_EN_ADDR
, 2800000),
828 MT6359_LDO("ldo_vcn13", VCN13
, vcn13_voltages
,
829 MT6359P_RG_LDO_VCN13_EN_ADDR
, MT6359P_RG_LDO_VCN13_EN_SHIFT
,
830 MT6359P_DA_VCN13_B_EN_ADDR
, MT6359P_RG_VCN13_VOSEL_ADDR
,
831 MT6359_RG_VCN13_VOSEL_MASK
<< MT6359_RG_VCN13_VOSEL_SHIFT
,
833 MT6359_LDO("ldo_vcn33_1_bt", VCN33_1_BT
, vcn33_voltages
,
834 MT6359P_RG_LDO_VCN33_1_EN_0_ADDR
,
835 MT6359_RG_LDO_VCN33_1_EN_0_SHIFT
,
836 MT6359P_DA_VCN33_1_B_EN_ADDR
, MT6359P_RG_VCN33_1_VOSEL_ADDR
,
837 MT6359_RG_VCN33_1_VOSEL_MASK
<<
838 MT6359_RG_VCN33_1_VOSEL_SHIFT
, 240),
839 MT6359_LDO("ldo_vcn33_1_wifi", VCN33_1_WIFI
, vcn33_voltages
,
840 MT6359P_RG_LDO_VCN33_1_EN_1_ADDR
,
841 MT6359P_RG_LDO_VCN33_1_EN_1_SHIFT
,
842 MT6359P_DA_VCN33_1_B_EN_ADDR
, MT6359P_RG_VCN33_1_VOSEL_ADDR
,
843 MT6359_RG_VCN33_1_VOSEL_MASK
<<
844 MT6359_RG_VCN33_1_VOSEL_SHIFT
, 240),
845 MT6359_REG_FIXED("ldo_vaux18", VAUX18
, MT6359P_RG_LDO_VAUX18_EN_ADDR
,
846 MT6359P_DA_VAUX18_B_EN_ADDR
, 1800000),
847 MT6359_LDO_LINEAR("ldo_vsram_others", VSRAM_OTHERS
, 500000, 1293750,
849 MT6359P_RG_LDO_VSRAM_OTHERS_EN_ADDR
,
850 MT6359P_DA_VSRAM_OTHERS_B_EN_ADDR
,
851 MT6359P_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR
,
852 MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_MASK
<<
853 MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT
),
854 MT6359_LDO("ldo_vefuse", VEFUSE
, vefuse_voltages
,
855 MT6359P_RG_LDO_VEFUSE_EN_ADDR
,
856 MT6359P_RG_LDO_VEFUSE_EN_SHIFT
,
857 MT6359P_DA_VEFUSE_B_EN_ADDR
, MT6359P_RG_VEFUSE_VOSEL_ADDR
,
858 MT6359_RG_VEFUSE_VOSEL_MASK
<< MT6359_RG_VEFUSE_VOSEL_SHIFT
,
860 MT6359_LDO("ldo_vxo22", VXO22
, vxo22_voltages
,
861 MT6359P_RG_LDO_VXO22_EN_ADDR
, MT6359P_RG_LDO_VXO22_EN_SHIFT
,
862 MT6359P_DA_VXO22_B_EN_ADDR
, MT6359P_RG_VXO22_VOSEL_ADDR
,
863 MT6359_RG_VXO22_VOSEL_MASK
<< MT6359_RG_VXO22_VOSEL_SHIFT
,
865 MT6359_LDO("ldo_vrfck_1", VRFCK
, vrfck_voltages_1
,
866 MT6359P_RG_LDO_VRFCK_EN_ADDR
, MT6359P_RG_LDO_VRFCK_EN_SHIFT
,
867 MT6359P_DA_VRFCK_B_EN_ADDR
, MT6359P_RG_VRFCK_VOSEL_ADDR
,
868 MT6359_RG_VRFCK_VOSEL_MASK
<< MT6359_RG_VRFCK_VOSEL_SHIFT
,
870 MT6359_REG_FIXED("ldo_vbif28", VBIF28
, MT6359P_RG_LDO_VBIF28_EN_ADDR
,
871 MT6359P_DA_VBIF28_B_EN_ADDR
, 2800000),
872 MT6359_LDO("ldo_vio28", VIO28
, vio28_voltages
,
873 MT6359P_RG_LDO_VIO28_EN_ADDR
, MT6359P_RG_LDO_VIO28_EN_SHIFT
,
874 MT6359P_DA_VIO28_B_EN_ADDR
, MT6359P_RG_VIO28_VOSEL_ADDR
,
875 MT6359_RG_VIO28_VOSEL_MASK
<< MT6359_RG_VIO28_VOSEL_SHIFT
,
877 MT6359P_LDO1("ldo_vemc_1", VEMC
, mt6359p_vemc_ops
, vemc_voltages_1
,
878 MT6359P_RG_LDO_VEMC_EN_ADDR
, MT6359P_RG_LDO_VEMC_EN_SHIFT
,
879 MT6359P_DA_VEMC_B_EN_ADDR
,
880 MT6359P_RG_LDO_VEMC_VOSEL_0_ADDR
,
881 MT6359P_RG_LDO_VEMC_VOSEL_0_MASK
<<
882 MT6359P_RG_LDO_VEMC_VOSEL_0_SHIFT
),
883 MT6359_LDO("ldo_vcn33_2_bt", VCN33_2_BT
, vcn33_voltages
,
884 MT6359P_RG_LDO_VCN33_2_EN_0_ADDR
,
885 MT6359P_RG_LDO_VCN33_2_EN_0_SHIFT
,
886 MT6359P_DA_VCN33_2_B_EN_ADDR
, MT6359P_RG_VCN33_2_VOSEL_ADDR
,
887 MT6359_RG_VCN33_2_VOSEL_MASK
<<
888 MT6359_RG_VCN33_2_VOSEL_SHIFT
, 240),
889 MT6359_LDO("ldo_vcn33_2_wifi", VCN33_2_WIFI
, vcn33_voltages
,
890 MT6359P_RG_LDO_VCN33_2_EN_1_ADDR
,
891 MT6359_RG_LDO_VCN33_2_EN_1_SHIFT
,
892 MT6359P_DA_VCN33_2_B_EN_ADDR
, MT6359P_RG_VCN33_2_VOSEL_ADDR
,
893 MT6359_RG_VCN33_2_VOSEL_MASK
<<
894 MT6359_RG_VCN33_2_VOSEL_SHIFT
, 240),
895 MT6359_LDO("ldo_va12", VA12
, va12_voltages
,
896 MT6359P_RG_LDO_VA12_EN_ADDR
, MT6359P_RG_LDO_VA12_EN_SHIFT
,
897 MT6359P_DA_VA12_B_EN_ADDR
, MT6359P_RG_VA12_VOSEL_ADDR
,
898 MT6359_RG_VA12_VOSEL_MASK
<< MT6359_RG_VA12_VOSEL_SHIFT
,
900 MT6359_LDO("ldo_va09", VA09
, va09_voltages
,
901 MT6359P_RG_LDO_VA09_EN_ADDR
, MT6359P_RG_LDO_VA09_EN_SHIFT
,
902 MT6359P_DA_VA09_B_EN_ADDR
, MT6359P_RG_VA09_VOSEL_ADDR
,
903 MT6359_RG_VA09_VOSEL_MASK
<< MT6359_RG_VA09_VOSEL_SHIFT
,
905 MT6359_LDO("ldo_vrf18", VRF18
, vrf18_voltages
,
906 MT6359P_RG_LDO_VRF18_EN_ADDR
, MT6359P_RG_LDO_VRF18_EN_SHIFT
,
907 MT6359P_DA_VRF18_B_EN_ADDR
, MT6359P_RG_VRF18_VOSEL_ADDR
,
908 MT6359_RG_VRF18_VOSEL_MASK
<< MT6359_RG_VRF18_VOSEL_SHIFT
,
910 MT6359_LDO_LINEAR("ldo_vsram_md", VSRAM_MD
, 500000, 1293750, 6250,
911 MT6359P_RG_LDO_VSRAM_MD_EN_ADDR
,
912 MT6359P_DA_VSRAM_MD_B_EN_ADDR
,
913 MT6359P_RG_LDO_VSRAM_MD_VOSEL_ADDR
,
914 MT6359_RG_LDO_VSRAM_MD_VOSEL_MASK
<<
915 MT6359_RG_LDO_VSRAM_MD_VOSEL_SHIFT
),
916 MT6359_LDO("ldo_vufs", VUFS
, volt18_voltages
,
917 MT6359P_RG_LDO_VUFS_EN_ADDR
, MT6359P_RG_LDO_VUFS_EN_SHIFT
,
918 MT6359P_DA_VUFS_B_EN_ADDR
, MT6359P_RG_VUFS_VOSEL_ADDR
,
919 MT6359_RG_VUFS_VOSEL_MASK
<< MT6359_RG_VUFS_VOSEL_SHIFT
,
921 MT6359_LDO("ldo_vm18", VM18
, volt18_voltages
,
922 MT6359P_RG_LDO_VM18_EN_ADDR
, MT6359P_RG_LDO_VM18_EN_SHIFT
,
923 MT6359P_DA_VM18_B_EN_ADDR
, MT6359P_RG_VM18_VOSEL_ADDR
,
924 MT6359_RG_VM18_VOSEL_MASK
<< MT6359_RG_VM18_VOSEL_SHIFT
,
926 MT6359_LDO("ldo_vbbck", VBBCK
, vbbck_voltages
,
927 MT6359P_RG_LDO_VBBCK_EN_ADDR
, MT6359P_RG_LDO_VBBCK_EN_SHIFT
,
928 MT6359P_DA_VBBCK_B_EN_ADDR
, MT6359P_RG_VBBCK_VOSEL_ADDR
,
929 MT6359P_RG_VBBCK_VOSEL_MASK
<< MT6359P_RG_VBBCK_VOSEL_SHIFT
,
931 MT6359_LDO_LINEAR("ldo_vsram_proc1", VSRAM_PROC1
, 500000, 1293750, 6250,
932 MT6359P_RG_LDO_VSRAM_PROC1_EN_ADDR
,
933 MT6359P_DA_VSRAM_PROC1_B_EN_ADDR
,
934 MT6359P_RG_LDO_VSRAM_PROC1_VOSEL_ADDR
,
935 MT6359_RG_LDO_VSRAM_PROC1_VOSEL_MASK
<<
936 MT6359_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT
),
937 MT6359_LDO("ldo_vsim2", VSIM2
, vsim2_voltages
,
938 MT6359P_RG_LDO_VSIM2_EN_ADDR
, MT6359P_RG_LDO_VSIM2_EN_SHIFT
,
939 MT6359P_DA_VSIM2_B_EN_ADDR
, MT6359P_RG_VSIM2_VOSEL_ADDR
,
940 MT6359_RG_VSIM2_VOSEL_MASK
<< MT6359_RG_VSIM2_VOSEL_SHIFT
,
942 MT6359_LDO_LINEAR("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB
,
943 500000, 1293750, 6250,
944 MT6359P_RG_LDO_VSRAM_OTHERS_SSHUB_EN_ADDR
,
945 MT6359P_DA_VSRAM_OTHERS_B_EN_ADDR
,
946 MT6359P_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_ADDR
,
947 MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK
<<
948 MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT
),
951 static int mt6359_regulator_probe(struct platform_device
*pdev
)
953 struct mt6397_chip
*mt6397
= dev_get_drvdata(pdev
->dev
.parent
);
954 struct regulator_config config
= {};
955 struct regulator_dev
*rdev
;
956 struct mt6359_regulator_info
*mt6359_info
;
959 regmap_read(mt6397
->regmap
, MT6359P_HWCID
, &hw_ver
);
960 if (hw_ver
>= MT6359P_CHIP_VER
)
961 mt6359_info
= mt6359p_regulators
;
963 mt6359_info
= mt6359_regulators
;
965 config
.dev
= mt6397
->dev
;
966 config
.regmap
= mt6397
->regmap
;
967 for (i
= 0; i
< MT6359_MAX_REGULATOR
; i
++, mt6359_info
++) {
968 config
.driver_data
= mt6359_info
;
969 rdev
= devm_regulator_register(&pdev
->dev
, &mt6359_info
->desc
, &config
);
971 dev_err(&pdev
->dev
, "failed to register %s\n", mt6359_info
->desc
.name
);
972 return PTR_ERR(rdev
);
979 static const struct platform_device_id mt6359_platform_ids
[] = {
980 {"mt6359-regulator", 0},
983 MODULE_DEVICE_TABLE(platform
, mt6359_platform_ids
);
985 static struct platform_driver mt6359_regulator_driver
= {
987 .name
= "mt6359-regulator",
989 .probe
= mt6359_regulator_probe
,
990 .id_table
= mt6359_platform_ids
,
993 module_platform_driver(mt6359_regulator_driver
);
995 MODULE_AUTHOR("Wen Su <wen.su@mediatek.com>");
996 MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6359 PMIC");
997 MODULE_LICENSE("GPL");