drivers/regulator/pfuze100-regulator.c

   1 /*
   2  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  17  */
  18 #include <linux/kernel.h>
  19 #include <linux/module.h>
  20 #include <linux/init.h>
  21 #include <linux/err.h>
  22 #include <linux/of.h>
  23 #include <linux/of_device.h>
  24 #include <linux/regulator/of_regulator.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/regulator/driver.h>
  27 #include <linux/regulator/machine.h>
  28 #include <linux/regulator/pfuze100.h>
  29 #include <linux/i2c.h>
  30 #include <linux/slab.h>
  31 #include <linux/regmap.h>
  32
  33 #define PFUZE_NUMREGS           128
  34 #define PFUZE100_VOL_OFFSET     0
  35 #define PFUZE100_STANDBY_OFFSET 1
  36 #define PFUZE100_MODE_OFFSET    3
  37 #define PFUZE100_CONF_OFFSET    4
  38
  39 #define PFUZE100_DEVICEID       0x0
  40 #define PFUZE100_REVID          0x3
  41 #define PFUZE100_FABID          0x4
  42
  43 #define PFUZE100_SW1ABVOL       0x20
  44 #define PFUZE100_SW1CVOL        0x2e
  45 #define PFUZE100_SW2VOL         0x35
  46 #define PFUZE100_SW3AVOL        0x3c
  47 #define PFUZE100_SW3BVOL        0x43
  48 #define PFUZE100_SW4VOL         0x4a
  49 #define PFUZE100_SWBSTCON1      0x66
  50 #define PFUZE100_VREFDDRCON     0x6a
  51 #define PFUZE100_VSNVSVOL       0x6b
  52 #define PFUZE100_VGEN1VOL       0x6c
  53 #define PFUZE100_VGEN2VOL       0x6d
  54 #define PFUZE100_VGEN3VOL       0x6e
  55 #define PFUZE100_VGEN4VOL       0x6f
  56 #define PFUZE100_VGEN5VOL       0x70
  57 #define PFUZE100_VGEN6VOL       0x71
  58
  59 enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
  60
  61 struct pfuze_regulator {
  62         struct regulator_desc desc;
  63         unsigned char stby_reg;
  64         unsigned char stby_mask;
  65 };
  66
  67 struct pfuze_chip {
  68         int     chip_id;
  69         struct regmap *regmap;
  70         struct device *dev;
  71         struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
  72         struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
  73         struct pfuze_regulator *pfuze_regulators;
  74 };
  75
  76 static const int pfuze100_swbst[] = {
  77         5000000, 5050000, 5100000, 5150000,
  78 };
  79
  80 static const int pfuze100_vsnvs[] = {
  81         1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
  82 };
  83
  84 static const int pfuze3000_sw2lo[] = {
  85         1500000, 1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000,
  86 };
  87
  88 static const int pfuze3000_sw2hi[] = {
  89         2500000, 2800000, 2850000, 3000000, 3100000, 3150000, 3200000, 3300000,
  90 };
  91
  92 static const struct i2c_device_id pfuze_device_id[] = {
  93         {.name = "pfuze100", .driver_data = PFUZE100},
  94         {.name = "pfuze200", .driver_data = PFUZE200},
  95         {.name = "pfuze3000", .driver_data = PFUZE3000},
  96         { }
  97 };
  98 MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
  99
 100 static const struct of_device_id pfuze_dt_ids[] = {
 101         { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
 102         { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
 103         { .compatible = "fsl,pfuze3000", .data = (void *)PFUZE3000},
 104         { }
 105 };
 106 MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
 107
 108 static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
 109 {
 110         struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
 111         int id = rdev_get_id(rdev);
 112         unsigned int ramp_bits;
 113         int ret;
 114
 115         if (id < PFUZE100_SWBST) {
 116                 ramp_delay = 12500 / ramp_delay;
 117                 ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
 118                 ret = regmap_update_bits(pfuze100->regmap,
 119                                          rdev->desc->vsel_reg + 4,
 120                                          0xc0, ramp_bits << 6);
 121                 if (ret < 0)
 122                         dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
 123         } else
 124                 ret = -EACCES;
 125
 126         return ret;
 127 }
 128
 129 static struct regulator_ops pfuze100_ldo_regulator_ops = {
 130         .enable = regulator_enable_regmap,
 131         .disable = regulator_disable_regmap,
 132         .is_enabled = regulator_is_enabled_regmap,
 133         .list_voltage = regulator_list_voltage_linear,
 134         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 135         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 136 };
 137
 138 static struct regulator_ops pfuze100_fixed_regulator_ops = {
 139         .enable = regulator_enable_regmap,
 140         .disable = regulator_disable_regmap,
 141         .is_enabled = regulator_is_enabled_regmap,
 142         .list_voltage = regulator_list_voltage_linear,
 143 };
 144
 145 static struct regulator_ops pfuze100_sw_regulator_ops = {
 146         .list_voltage = regulator_list_voltage_linear,
 147         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 148         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 149         .set_voltage_time_sel = regulator_set_voltage_time_sel,
 150         .set_ramp_delay = pfuze100_set_ramp_delay,
 151 };
 152
 153 static struct regulator_ops pfuze100_swb_regulator_ops = {
 154         .enable = regulator_enable_regmap,
 155         .disable = regulator_disable_regmap,
 156         .list_voltage = regulator_list_voltage_table,
 157         .map_voltage = regulator_map_voltage_ascend,
 158         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 159         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 160
 161 };
 162
 163 #define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
 164         [_chip ## _ ## _name] = {       \
 165                 .desc = {       \
 166                         .name = #_name, \
 167                         .n_voltages = 1,        \
 168                         .ops = &pfuze100_fixed_regulator_ops,   \
 169                         .type = REGULATOR_VOLTAGE,      \
 170                         .id = _chip ## _ ## _name,      \
 171                         .owner = THIS_MODULE,   \
 172                         .min_uV = (voltage),    \
 173                         .enable_reg = (base),   \
 174                         .enable_mask = 0x10,    \
 175                 },      \
 176         }
 177
 178 #define PFUZE100_SW_REG(_chip, _name, base, min, max, step)     \
 179         [_chip ## _ ## _name] = {       \
 180                 .desc = {       \
 181                         .name = #_name,\
 182                         .n_voltages = ((max) - (min)) / (step) + 1,     \
 183                         .ops = &pfuze100_sw_regulator_ops,      \
 184                         .type = REGULATOR_VOLTAGE,      \
 185                         .id = _chip ## _ ## _name,      \
 186                         .owner = THIS_MODULE,   \
 187                         .min_uV = (min),        \
 188                         .uV_step = (step),      \
 189                         .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
 190                         .vsel_mask = 0x3f,      \
 191                 },      \
 192                 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
 193                 .stby_mask = 0x3f,      \
 194         }
 195
 196 #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages)    \
 197         [_chip ## _ ##  _name] = {      \
 198                 .desc = {       \
 199                         .name = #_name, \
 200                         .n_voltages = ARRAY_SIZE(voltages),     \
 201                         .ops = &pfuze100_swb_regulator_ops,     \
 202                         .type = REGULATOR_VOLTAGE,      \
 203                         .id = _chip ## _ ## _name,      \
 204                         .owner = THIS_MODULE,   \
 205                         .volt_table = voltages, \
 206                         .vsel_reg = (base),     \
 207                         .vsel_mask = (mask),    \
 208                         .enable_reg = (base),   \
 209                         .enable_mask = 0x48,    \
 210                 },      \
 211         }
 212
 213 #define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step)   \
 214         [_chip ## _ ## _name] = {       \
 215                 .desc = {       \
 216                         .name = #_name, \
 217                         .n_voltages = ((max) - (min)) / (step) + 1,     \
 218                         .ops = &pfuze100_ldo_regulator_ops,     \
 219                         .type = REGULATOR_VOLTAGE,      \
 220                         .id = _chip ## _ ## _name,      \
 221                         .owner = THIS_MODULE,   \
 222                         .min_uV = (min),        \
 223                         .uV_step = (step),      \
 224                         .vsel_reg = (base),     \
 225                         .vsel_mask = 0xf,       \
 226                         .enable_reg = (base),   \
 227                         .enable_mask = 0x10,    \
 228                 },      \
 229                 .stby_reg = (base),     \
 230                 .stby_mask = 0x20,      \
 231         }
 232
 233 #define PFUZE3000_VCC_REG(_chip, _name, base, min, max, step)   {       \
 234         .desc = {       \
 235                 .name = #_name, \
 236                 .n_voltages = ((max) - (min)) / (step) + 1,     \
 237                 .ops = &pfuze100_ldo_regulator_ops,     \
 238                 .type = REGULATOR_VOLTAGE,      \
 239                 .id = _chip ## _ ## _name,      \
 240                 .owner = THIS_MODULE,   \
 241                 .min_uV = (min),        \
 242                 .uV_step = (step),      \
 243                 .vsel_reg = (base),     \
 244                 .vsel_mask = 0x3,       \
 245                 .enable_reg = (base),   \
 246                 .enable_mask = 0x10,    \
 247         },      \
 248         .stby_reg = (base),     \
 249         .stby_mask = 0x20,      \
 250 }
 251
 252
 253 #define PFUZE3000_SW2_REG(_chip, _name, base, min, max, step)   {       \
 254         .desc = {       \
 255                 .name = #_name,\
 256                 .n_voltages = ((max) - (min)) / (step) + 1,     \
 257                 .ops = &pfuze100_sw_regulator_ops,      \
 258                 .type = REGULATOR_VOLTAGE,      \
 259                 .id = _chip ## _ ## _name,      \
 260                 .owner = THIS_MODULE,   \
 261                 .min_uV = (min),        \
 262                 .uV_step = (step),      \
 263                 .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
 264                 .vsel_mask = 0x7,       \
 265         },      \
 266         .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
 267         .stby_mask = 0x7,       \
 268 }
 269
 270 #define PFUZE3000_SW3_REG(_chip, _name, base, min, max, step)   {       \
 271         .desc = {       \
 272                 .name = #_name,\
 273                 .n_voltages = ((max) - (min)) / (step) + 1,     \
 274                 .ops = &pfuze100_sw_regulator_ops,      \
 275                 .type = REGULATOR_VOLTAGE,      \
 276                 .id = _chip ## _ ## _name,      \
 277                 .owner = THIS_MODULE,   \
 278                 .min_uV = (min),        \
 279                 .uV_step = (step),      \
 280                 .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
 281                 .vsel_mask = 0xf,       \
 282         },      \
 283         .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
 284         .stby_mask = 0xf,       \
 285 }
 286
 287 /* PFUZE100 */
 288 static struct pfuze_regulator pfuze100_regulators[] = {
 289         PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
 290         PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
 291         PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
 292         PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
 293         PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
 294         PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
 295         PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
 296         PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 297         PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
 298         PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
 299         PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
 300         PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
 301         PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
 302         PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
 303         PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
 304 };
 305
 306 static struct pfuze_regulator pfuze200_regulators[] = {
 307         PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
 308         PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
 309         PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
 310         PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
 311         PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
 312         PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 313         PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
 314         PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
 315         PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
 316         PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
 317         PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
 318         PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
 319         PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
 320 };
 321
 322 static struct pfuze_regulator pfuze3000_regulators[] = {
 323         PFUZE100_SW_REG(PFUZE3000, SW1A, PFUZE100_SW1ABVOL, 700000, 1475000, 25000),
 324         PFUZE100_SW_REG(PFUZE3000, SW1B, PFUZE100_SW1CVOL, 700000, 1475000, 25000),
 325         PFUZE100_SWB_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
 326         PFUZE3000_SW3_REG(PFUZE3000, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000),
 327         PFUZE100_SWB_REG(PFUZE3000, SWBST, PFUZE100_SWBSTCON1, 0x3, pfuze100_swbst),
 328         PFUZE100_SWB_REG(PFUZE3000, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 329         PFUZE100_FIXED_REG(PFUZE3000, VREFDDR, PFUZE100_VREFDDRCON, 750000),
 330         PFUZE100_VGEN_REG(PFUZE3000, VLDO1, PFUZE100_VGEN1VOL, 1800000, 3300000, 100000),
 331         PFUZE100_VGEN_REG(PFUZE3000, VLDO2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
 332         PFUZE3000_VCC_REG(PFUZE3000, VCCSD, PFUZE100_VGEN3VOL, 2850000, 3300000, 150000),
 333         PFUZE3000_VCC_REG(PFUZE3000, V33, PFUZE100_VGEN4VOL, 2850000, 3300000, 150000),
 334         PFUZE100_VGEN_REG(PFUZE3000, VLDO3, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
 335         PFUZE100_VGEN_REG(PFUZE3000, VLDO4, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
 336 };
 337
 338 #ifdef CONFIG_OF
 339 /* PFUZE100 */
 340 static struct of_regulator_match pfuze100_matches[] = {
 341         { .name = "sw1ab",      },
 342         { .name = "sw1c",       },
 343         { .name = "sw2",        },
 344         { .name = "sw3a",       },
 345         { .name = "sw3b",       },
 346         { .name = "sw4",        },
 347         { .name = "swbst",      },
 348         { .name = "vsnvs",      },
 349         { .name = "vrefddr",    },
 350         { .name = "vgen1",      },
 351         { .name = "vgen2",      },
 352         { .name = "vgen3",      },
 353         { .name = "vgen4",      },
 354         { .name = "vgen5",      },
 355         { .name = "vgen6",      },
 356 };
 357
 358 /* PFUZE200 */
 359 static struct of_regulator_match pfuze200_matches[] = {
 360
 361         { .name = "sw1ab",      },
 362         { .name = "sw2",        },
 363         { .name = "sw3a",       },
 364         { .name = "sw3b",       },
 365         { .name = "swbst",      },
 366         { .name = "vsnvs",      },
 367         { .name = "vrefddr",    },
 368         { .name = "vgen1",      },
 369         { .name = "vgen2",      },
 370         { .name = "vgen3",      },
 371         { .name = "vgen4",      },
 372         { .name = "vgen5",      },
 373         { .name = "vgen6",      },
 374 };
 375
 376 /* PFUZE3000 */
 377 static struct of_regulator_match pfuze3000_matches[] = {
 378
 379         { .name = "sw1a",       },
 380         { .name = "sw1b",       },
 381         { .name = "sw2",        },
 382         { .name = "sw3",        },
 383         { .name = "swbst",      },
 384         { .name = "vsnvs",      },
 385         { .name = "vrefddr",    },
 386         { .name = "vldo1",      },
 387         { .name = "vldo2",      },
 388         { .name = "vccsd",      },
 389         { .name = "v33",        },
 390         { .name = "vldo3",      },
 391         { .name = "vldo4",      },
 392 };
 393
 394 static struct of_regulator_match *pfuze_matches;
 395
 396 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
 397 {
 398         struct device *dev = chip->dev;
 399         struct device_node *np, *parent;
 400         int ret;
 401
 402         np = of_node_get(dev->of_node);
 403         if (!np)
 404                 return -EINVAL;
 405
 406         parent = of_get_child_by_name(np, "regulators");
 407         if (!parent) {
 408                 dev_err(dev, "regulators node not found\n");
 409                 return -EINVAL;
 410         }
 411
 412         switch (chip->chip_id) {
 413         case PFUZE3000:
 414                 pfuze_matches = pfuze3000_matches;
 415                 ret = of_regulator_match(dev, parent, pfuze3000_matches,
 416                                          ARRAY_SIZE(pfuze3000_matches));
 417                 break;
 418         case PFUZE200:
 419                 pfuze_matches = pfuze200_matches;
 420                 ret = of_regulator_match(dev, parent, pfuze200_matches,
 421                                          ARRAY_SIZE(pfuze200_matches));
 422                 break;
 423
 424         case PFUZE100:
 425         default:
 426                 pfuze_matches = pfuze100_matches;
 427                 ret = of_regulator_match(dev, parent, pfuze100_matches,
 428                                          ARRAY_SIZE(pfuze100_matches));
 429                 break;
 430         }
 431
 432         of_node_put(parent);
 433         if (ret < 0) {
 434                 dev_err(dev, "Error parsing regulator init data: %d\n",
 435                         ret);
 436                 return ret;
 437         }
 438
 439         return 0;
 440 }
 441
 442 static inline struct regulator_init_data *match_init_data(int index)
 443 {
 444         return pfuze_matches[index].init_data;
 445 }
 446
 447 static inline struct device_node *match_of_node(int index)
 448 {
 449         return pfuze_matches[index].of_node;
 450 }
 451 #else
 452 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
 453 {
 454         return 0;
 455 }
 456
 457 static inline struct regulator_init_data *match_init_data(int index)
 458 {
 459         return NULL;
 460 }
 461
 462 static inline struct device_node *match_of_node(int index)
 463 {
 464         return NULL;
 465 }
 466 #endif
 467
 468 static int pfuze_identify(struct pfuze_chip *pfuze_chip)
 469 {
 470         unsigned int value;
 471         int ret;
 472
 473         ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
 474         if (ret)
 475                 return ret;
 476
 477         if (((value & 0x0f) == 0x8) && (pfuze_chip->chip_id == PFUZE100)) {
 478                 /*
 479                  * Freescale misprogrammed 1-3% of parts prior to week 8 of 2013
 480                  * as ID=8 in PFUZE100
 481                  */
 482                 dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
 483         } else if ((value & 0x0f) != pfuze_chip->chip_id &&
 484                    (value & 0xf0) >> 4 != pfuze_chip->chip_id) {
 485                 /* device id NOT match with your setting */
 486                 dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
 487                 return -ENODEV;
 488         }
 489
 490         ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
 491         if (ret)
 492                 return ret;
 493         dev_info(pfuze_chip->dev,
 494                  "Full layer: %x, Metal layer: %x\n",
 495                  (value & 0xf0) >> 4, value & 0x0f);
 496
 497         ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
 498         if (ret)
 499                 return ret;
 500         dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
 501                  (value & 0xc) >> 2, value & 0x3);
 502
 503         return 0;
 504 }
 505
 506 static const struct regmap_config pfuze_regmap_config = {
 507         .reg_bits = 8,
 508         .val_bits = 8,
 509         .max_register = PFUZE_NUMREGS - 1,
 510         .cache_type = REGCACHE_RBTREE,
 511 };
 512
 513 static int pfuze100_regulator_probe(struct i2c_client *client,
 514                                     const struct i2c_device_id *id)
 515 {
 516         struct pfuze_chip *pfuze_chip;
 517         struct pfuze_regulator_platform_data *pdata =
 518             dev_get_platdata(&client->dev);
 519         struct regulator_config config = { };
 520         int i, ret;
 521         const struct of_device_id *match;
 522         u32 regulator_num;
 523         u32 sw_check_start, sw_check_end, sw_hi = 0x40;
 524
 525         pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
 526                         GFP_KERNEL);
 527         if (!pfuze_chip)
 528                 return -ENOMEM;
 529
 530         if (client->dev.of_node) {
 531                 match = of_match_device(of_match_ptr(pfuze_dt_ids),
 532                                 &client->dev);
 533                 if (!match) {
 534                         dev_err(&client->dev, "Error: No device match found\n");
 535                         return -ENODEV;
 536                 }
 537                 pfuze_chip->chip_id = (int)(long)match->data;
 538         } else if (id) {
 539                 pfuze_chip->chip_id = id->driver_data;
 540         } else {
 541                 dev_err(&client->dev, "No dts match or id table match found\n");
 542                 return -ENODEV;
 543         }
 544
 545         i2c_set_clientdata(client, pfuze_chip);
 546         pfuze_chip->dev = &client->dev;
 547
 548         pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
 549         if (IS_ERR(pfuze_chip->regmap)) {
 550                 ret = PTR_ERR(pfuze_chip->regmap);
 551                 dev_err(&client->dev,
 552                         "regmap allocation failed with err %d\n", ret);
 553                 return ret;
 554         }
 555
 556         ret = pfuze_identify(pfuze_chip);
 557         if (ret) {
 558                 dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
 559                 return ret;
 560         }
 561
 562         /* use the right regulators after identify the right device */
 563         switch (pfuze_chip->chip_id) {
 564         case PFUZE3000:
 565                 pfuze_chip->pfuze_regulators = pfuze3000_regulators;
 566                 regulator_num = ARRAY_SIZE(pfuze3000_regulators);
 567                 sw_check_start = PFUZE3000_SW2;
 568                 sw_check_end = PFUZE3000_SW2;
 569                 sw_hi = 1 << 3;
 570                 break;
 571         case PFUZE200:
 572                 pfuze_chip->pfuze_regulators = pfuze200_regulators;
 573                 regulator_num = ARRAY_SIZE(pfuze200_regulators);
 574                 sw_check_start = PFUZE200_SW2;
 575                 sw_check_end = PFUZE200_SW3B;
 576                 break;
 577         case PFUZE100:
 578         default:
 579                 pfuze_chip->pfuze_regulators = pfuze100_regulators;
 580                 regulator_num = ARRAY_SIZE(pfuze100_regulators);
 581                 sw_check_start = PFUZE100_SW2;
 582                 sw_check_end = PFUZE100_SW4;
 583                 break;
 584         }
 585         dev_info(&client->dev, "pfuze%s found.\n",
 586                 (pfuze_chip->chip_id == PFUZE100) ? "100" :
 587                 ((pfuze_chip->chip_id == PFUZE200) ? "200" : "3000"));
 588
 589         memcpy(pfuze_chip->regulator_descs, pfuze_chip->pfuze_regulators,
 590                 sizeof(pfuze_chip->regulator_descs));
 591
 592         ret = pfuze_parse_regulators_dt(pfuze_chip);
 593         if (ret)
 594                 return ret;
 595
 596         for (i = 0; i < regulator_num; i++) {
 597                 struct regulator_init_data *init_data;
 598                 struct regulator_desc *desc;
 599                 int val;
 600
 601                 desc = &pfuze_chip->regulator_descs[i].desc;
 602
 603                 if (pdata)
 604                         init_data = pdata->init_data[i];
 605                 else
 606                         init_data = match_init_data(i);
 607
 608                 /* SW2~SW4 high bit check and modify the voltage value table */
 609                 if (i >= sw_check_start && i <= sw_check_end) {
 610                         regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
 611                         if (val & sw_hi) {
 612                                 if (pfuze_chip->chip_id == PFUZE3000) {
 613                                         desc->volt_table = pfuze3000_sw2hi;
 614                                         desc->n_voltages = ARRAY_SIZE(pfuze3000_sw2hi);
 615                                 } else {
 616                                         desc->min_uV = 800000;
 617                                         desc->uV_step = 50000;
 618                                         desc->n_voltages = 51;
 619                                 }
 620                         }
 621                 }
 622
 623                 config.dev = &client->dev;
 624                 config.init_data = init_data;
 625                 config.driver_data = pfuze_chip;
 626                 config.of_node = match_of_node(i);
 627                 config.ena_gpio = -EINVAL;
 628
 629                 pfuze_chip->regulators[i] =
 630                         devm_regulator_register(&client->dev, desc, &config);
 631                 if (IS_ERR(pfuze_chip->regulators[i])) {
 632                         dev_err(&client->dev, "register regulator%s failed\n",
 633                                 pfuze_chip->pfuze_regulators[i].desc.name);
 634                         return PTR_ERR(pfuze_chip->regulators[i]);
 635                 }
 636         }
 637
 638         return 0;
 639 }
 640
 641 static struct i2c_driver pfuze_driver = {
 642         .id_table = pfuze_device_id,
 643         .driver = {
 644                 .name = "pfuze100-regulator",
 645                 .of_match_table = pfuze_dt_ids,
 646         },
 647         .probe = pfuze100_regulator_probe,
 648 };
 649 module_i2c_driver(pfuze_driver);
 650
 651 MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
 652 MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/200/3000 PMIC");
 653 MODULE_LICENSE("GPL v2");