drivers/regulator/qcom_smd-regulator.c

   1 /*
   2  * Copyright (c) 2015, Sony Mobile Communications AB.
   3  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 and
   7  * only version 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/of_device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/regulator/driver.h>
  20 #include <linux/regulator/machine.h>
  21 #include <linux/regulator/of_regulator.h>
  22 #include <linux/soc/qcom/smd-rpm.h>
  23 #include <linux/regulator/qcom_smd-regulator.h>
  24
  25 #include "internal.h"
  26
  27 struct qcom_rpm_reg {
  28         struct device *dev;
  29
  30         struct qcom_smd_rpm *rpm;
  31
  32         u32 type;
  33         u32 id;
  34
  35         struct regulator_desc desc;
  36
  37         int is_enabled;
  38         int uV;
  39 };
  40
  41 struct rpm_regulator_req {
  42         __le32 key;
  43         __le32 nbytes;
  44         __le32 value;
  45 };
  46
  47 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
  48 #define RPM_KEY_UV      0x00007675 /* "uv" */
  49 #define RPM_KEY_MA      0x0000616d /* "ma" */
  50 #define RPM_KEY_FLOOR   0x00636676 /* "vfc" */
  51 #define RPM_KEY_CORNER  0x6e726f63 /* "corn" */
  52
  53 #define RPM_MIN_FLOOR_CORNER    0
  54 #define RPM_MAX_FLOOR_CORNER    6
  55
  56 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
  57                                 struct rpm_regulator_req *req,
  58                                 size_t size)
  59 {
  60         return qcom_rpm_smd_write(vreg->rpm,
  61                                   QCOM_SMD_RPM_ACTIVE_STATE,
  62                                   vreg->type,
  63                                   vreg->id,
  64                                   req, size);
  65 }
  66
  67 int qcom_rpm_set_floor(struct regulator *regulator, int floor)
  68 {
  69         struct regulator_dev *rdev = regulator->rdev;
  70         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  71         struct rpm_regulator_req req;
  72         int ret;
  73
  74         req.key = RPM_KEY_FLOOR;
  75         req.nbytes = sizeof(u32);
  76         req.value = floor;
  77
  78         if (floor < RPM_MIN_FLOOR_CORNER || floor > RPM_MAX_FLOOR_CORNER)
  79                 return -EINVAL;
  80
  81         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  82         if (ret)
  83                 dev_err(rdev_get_dev(rdev), "Failed to set floor %d\n", floor);
  84
  85         return ret;
  86 }
  87 EXPORT_SYMBOL(qcom_rpm_set_floor);
  88
  89 int qcom_rpm_set_corner(struct regulator *regulator, int corner)
  90 {
  91         struct regulator_dev *rdev = regulator->rdev;
  92         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  93         struct rpm_regulator_req req;
  94         int ret;
  95
  96         req.key = RPM_KEY_CORNER;
  97         req.nbytes = sizeof(u32);
  98         req.value = corner;
  99
 100         if (corner < RPM_MIN_FLOOR_CORNER || corner > RPM_MAX_FLOOR_CORNER)
 101                 return -EINVAL;
 102
 103         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 104         if (ret)
 105                 dev_err(rdev_get_dev(rdev), "Failed to set corner %d\n", corner);
 106
 107         return ret;
 108 }
 109 EXPORT_SYMBOL(qcom_rpm_set_corner);
 110
 111 static int rpm_reg_enable(struct regulator_dev *rdev)
 112 {
 113         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 114         struct rpm_regulator_req req;
 115         int ret;
 116
 117         req.key = cpu_to_le32(RPM_KEY_SWEN);
 118         req.nbytes = cpu_to_le32(sizeof(u32));
 119         req.value = cpu_to_le32(1);
 120
 121         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 122         if (!ret)
 123                 vreg->is_enabled = 1;
 124
 125         return ret;
 126 }
 127
 128 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
 129 {
 130         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 131
 132         return vreg->is_enabled;
 133 }
 134
 135 static int rpm_reg_disable(struct regulator_dev *rdev)
 136 {
 137         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 138         struct rpm_regulator_req req;
 139         int ret;
 140
 141         req.key = cpu_to_le32(RPM_KEY_SWEN);
 142         req.nbytes = cpu_to_le32(sizeof(u32));
 143         req.value = 0;
 144
 145         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 146         if (!ret)
 147                 vreg->is_enabled = 0;
 148
 149         return ret;
 150 }
 151
 152 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
 153 {
 154         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 155
 156         return vreg->uV;
 157 }
 158
 159 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
 160                                int min_uV,
 161                                int max_uV,
 162                                unsigned *selector)
 163 {
 164         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 165         struct rpm_regulator_req req;
 166         int ret = 0;
 167
 168         req.key = cpu_to_le32(RPM_KEY_UV);
 169         req.nbytes = cpu_to_le32(sizeof(u32));
 170         req.value = cpu_to_le32(min_uV);
 171
 172         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 173         if (!ret)
 174                 vreg->uV = min_uV;
 175
 176         return ret;
 177 }
 178
 179 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
 180 {
 181         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 182         struct rpm_regulator_req req;
 183
 184         req.key = cpu_to_le32(RPM_KEY_MA);
 185         req.nbytes = cpu_to_le32(sizeof(u32));
 186         req.value = cpu_to_le32(load_uA / 1000);
 187
 188         return rpm_reg_write_active(vreg, &req, sizeof(req));
 189 }
 190
 191 static const struct regulator_ops rpm_smps_ldo_ops = {
 192         .enable = rpm_reg_enable,
 193         .disable = rpm_reg_disable,
 194         .is_enabled = rpm_reg_is_enabled,
 195         .list_voltage = regulator_list_voltage_linear_range,
 196
 197         .get_voltage = rpm_reg_get_voltage,
 198         .set_voltage = rpm_reg_set_voltage,
 199
 200         .set_load = rpm_reg_set_load,
 201 };
 202
 203 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
 204         .enable = rpm_reg_enable,
 205         .disable = rpm_reg_disable,
 206         .is_enabled = rpm_reg_is_enabled,
 207
 208         .get_voltage = rpm_reg_get_voltage,
 209         .set_voltage = rpm_reg_set_voltage,
 210
 211         .set_load = rpm_reg_set_load,
 212 };
 213
 214 static const struct regulator_ops rpm_switch_ops = {
 215         .enable = rpm_reg_enable,
 216         .disable = rpm_reg_disable,
 217         .is_enabled = rpm_reg_is_enabled,
 218 };
 219
 220 static const struct regulator_desc pma8084_hfsmps = {
 221         .linear_ranges = (struct regulator_linear_range[]) {
 222                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
 223                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 224         },
 225         .n_linear_ranges = 2,
 226         .n_voltages = 159,
 227         .ops = &rpm_smps_ldo_ops,
 228 };
 229
 230 static const struct regulator_desc pma8084_ftsmps = {
 231         .linear_ranges = (struct regulator_linear_range[]) {
 232                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 233                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 234         },
 235         .n_linear_ranges = 2,
 236         .n_voltages = 262,
 237         .ops = &rpm_smps_ldo_ops,
 238 };
 239
 240 static const struct regulator_desc pma8084_pldo = {
 241         .linear_ranges = (struct regulator_linear_range[]) {
 242                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 243                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 244                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 245         },
 246         .n_linear_ranges = 3,
 247         .n_voltages = 164,
 248         .ops = &rpm_smps_ldo_ops,
 249 };
 250
 251 static const struct regulator_desc pma8084_nldo = {
 252         .linear_ranges = (struct regulator_linear_range[]) {
 253                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 254         },
 255         .n_linear_ranges = 1,
 256         .n_voltages = 64,
 257         .ops = &rpm_smps_ldo_ops,
 258 };
 259
 260 static const struct regulator_desc pma8084_switch = {
 261         .ops = &rpm_switch_ops,
 262 };
 263
 264 static const struct regulator_desc pm8x41_hfsmps = {
 265         .linear_ranges = (struct regulator_linear_range[]) {
 266                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 267                 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
 268         },
 269         .n_linear_ranges = 2,
 270         .n_voltages = 159,
 271         .ops = &rpm_smps_ldo_ops,
 272 };
 273
 274 static const struct regulator_desc pm8841_ftsmps = {
 275         .linear_ranges = (struct regulator_linear_range[]) {
 276                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 277                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 278         },
 279         .n_linear_ranges = 2,
 280         .n_voltages = 262,
 281         .ops = &rpm_smps_ldo_ops,
 282 };
 283
 284 static const struct regulator_desc pm8941_boost = {
 285         .linear_ranges = (struct regulator_linear_range[]) {
 286                 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
 287         },
 288         .n_linear_ranges = 1,
 289         .n_voltages = 31,
 290         .ops = &rpm_smps_ldo_ops,
 291 };
 292
 293 static const struct regulator_desc pm8941_pldo = {
 294         .linear_ranges = (struct regulator_linear_range[]) {
 295                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 296                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 297                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 298         },
 299         .n_linear_ranges = 3,
 300         .n_voltages = 164,
 301         .ops = &rpm_smps_ldo_ops,
 302 };
 303
 304 static const struct regulator_desc pm8941_nldo = {
 305         .linear_ranges = (struct regulator_linear_range[]) {
 306                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 307         },
 308         .n_linear_ranges = 1,
 309         .n_voltages = 64,
 310         .ops = &rpm_smps_ldo_ops,
 311 };
 312
 313 static const struct regulator_desc pm8941_lnldo = {
 314         .fixed_uV = 1740000,
 315         .n_voltages = 1,
 316         .ops = &rpm_smps_ldo_ops_fixed,
 317 };
 318
 319 static const struct regulator_desc pm8941_switch = {
 320         .ops = &rpm_switch_ops,
 321 };
 322
 323 static const struct regulator_desc pm8916_pldo = {
 324         .linear_ranges = (struct regulator_linear_range[]) {
 325                 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
 326         },
 327         .n_linear_ranges = 1,
 328         .n_voltages = 209,
 329         .ops = &rpm_smps_ldo_ops,
 330 };
 331
 332 static const struct regulator_desc pm8916_nldo = {
 333         .linear_ranges = (struct regulator_linear_range[]) {
 334                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 335         },
 336         .n_linear_ranges = 1,
 337         .n_voltages = 94,
 338         .ops = &rpm_smps_ldo_ops,
 339 };
 340
 341 static const struct regulator_desc pm8916_buck_lvo_smps = {
 342         .linear_ranges = (struct regulator_linear_range[]) {
 343                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 344                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
 345         },
 346         .n_linear_ranges = 2,
 347         .n_voltages = 128,
 348         .ops = &rpm_smps_ldo_ops,
 349 };
 350
 351 static const struct regulator_desc pm8916_buck_hvo_smps = {
 352         .linear_ranges = (struct regulator_linear_range[]) {
 353                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
 354         },
 355         .n_linear_ranges = 1,
 356         .n_voltages = 32,
 357         .ops = &rpm_smps_ldo_ops,
 358 };
 359
 360 static const struct regulator_desc pm8994_hfsmps = {
 361         .linear_ranges = (struct regulator_linear_range[]) {
 362                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 363                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 364         },
 365         .n_linear_ranges = 2,
 366         .n_voltages = 159,
 367         .ops = &rpm_smps_ldo_ops,
 368 };
 369
 370 static const struct regulator_desc pm8994_ftsmps = {
 371         .linear_ranges = (struct regulator_linear_range[]) {
 372                 REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
 373                 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
 374         },
 375         .n_linear_ranges = 2,
 376         .n_voltages = 350,
 377         .ops = &rpm_smps_ldo_ops,
 378 };
 379
 380 static const struct regulator_desc pm8994_nldo = {
 381         .linear_ranges = (struct regulator_linear_range[]) {
 382                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 383         },
 384         .n_linear_ranges = 1,
 385         .n_voltages = 64,
 386         .ops = &rpm_smps_ldo_ops,
 387 };
 388
 389 static const struct regulator_desc pm8994_pldo = {
 390         .linear_ranges = (struct regulator_linear_range[]) {
 391                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 392                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 393                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 394         },
 395         .n_linear_ranges = 3,
 396         .n_voltages = 164,
 397         .ops = &rpm_smps_ldo_ops,
 398 };
 399
 400 static const struct regulator_desc pm8994_switch = {
 401         .ops = &rpm_switch_ops,
 402 };
 403
 404 static const struct regulator_desc pm8994_lnldo = {
 405         .fixed_uV = 1740000,
 406         .n_voltages = 1,
 407         .ops = &rpm_smps_ldo_ops_fixed,
 408 };
 409
 410 struct rpm_regulator_data {
 411         const char *name;
 412         u32 type;
 413         u32 id;
 414         const struct regulator_desc *desc;
 415         const char *supply;
 416 };
 417
 418 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
 419         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
 420         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
 421         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
 422         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
 423         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
 424         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
 425         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
 426         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
 427         {}
 428 };
 429
 430 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
 431         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 432         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
 433         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
 434         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
 435         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
 436         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
 437         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
 438         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
 439         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
 440         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
 441         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
 442         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 443         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 444         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 445         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 446         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 447         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 448         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 449         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 450         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 451         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 452         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 453         {}
 454 };
 455
 456 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
 457         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
 458         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
 459         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
 460         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
 461
 462         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
 463         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
 464         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
 465         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
 466         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
 467         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 468         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
 469         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 470         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 471         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 472         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
 473         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 474         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 475         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 476         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 477         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 478         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 479         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 480         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 481         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 482         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
 483         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 484         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 485         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 486
 487         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 488         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 489         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 490
 491         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
 492         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
 493
 494         {}
 495 };
 496
 497 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
 498         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
 499         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
 500         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
 501         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
 502         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
 503         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
 504         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
 505         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
 506         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
 507         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
 508         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
 509         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
 510
 511         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
 512         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 513         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 514         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 515         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
 516         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 517         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
 518         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
 519         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 520         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 521         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
 522         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 523         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 524         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 525         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 526         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
 527         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
 528         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
 529         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
 530         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 531         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
 532         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
 533         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 534         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 535         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
 536         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 537         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 538
 539         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
 540         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
 541         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
 542         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
 543         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
 544
 545         {}
 546 };
 547
 548 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
 549         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
 550         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
 551         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
 552         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
 553         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
 554         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
 555         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
 556         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
 557         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
 558         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
 559         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
 560         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
 561         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
 562         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
 563         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
 564         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
 565         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
 566         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
 567         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
 568         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
 569         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 570         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 571         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
 572         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
 573         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 574         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
 575         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
 576         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
 577         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
 578         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 579         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 580         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
 581         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
 582         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 583         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 584         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 585         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
 586         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
 587         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
 588         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
 589         { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
 590         { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
 591         { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
 592         { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
 593         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
 594         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
 595
 596         {}
 597 };
 598
 599 static const struct of_device_id rpm_of_match[] = {
 600         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
 601         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
 602         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
 603         { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
 604         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
 605         {}
 606 };
 607 MODULE_DEVICE_TABLE(of, rpm_of_match);
 608
 609 static int rpm_reg_probe(struct platform_device *pdev)
 610 {
 611         const struct rpm_regulator_data *reg;
 612         const struct of_device_id *match;
 613         struct regulator_config config = { };
 614         struct regulator_dev *rdev;
 615         struct qcom_rpm_reg *vreg;
 616         struct qcom_smd_rpm *rpm;
 617
 618         rpm = dev_get_drvdata(pdev->dev.parent);
 619         if (!rpm) {
 620                 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
 621                 return -ENODEV;
 622         }
 623
 624         match = of_match_device(rpm_of_match, &pdev->dev);
 625         if (!match) {
 626                 dev_err(&pdev->dev, "failed to match device\n");
 627                 return -ENODEV;
 628         }
 629
 630         for (reg = match->data; reg->name; reg++) {
 631                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
 632                 if (!vreg)
 633                         return -ENOMEM;
 634
 635                 vreg->dev = &pdev->dev;
 636                 vreg->type = reg->type;
 637                 vreg->id = reg->id;
 638                 vreg->rpm = rpm;
 639
 640                 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
 641
 642                 vreg->desc.id = -1;
 643                 vreg->desc.owner = THIS_MODULE;
 644                 vreg->desc.type = REGULATOR_VOLTAGE;
 645                 vreg->desc.name = reg->name;
 646                 vreg->desc.supply_name = reg->supply;
 647                 vreg->desc.of_match = reg->name;
 648
 649                 config.dev = &pdev->dev;
 650                 config.driver_data = vreg;
 651                 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
 652                 if (IS_ERR(rdev)) {
 653                         dev_err(&pdev->dev, "failed to register %s\n", reg->name);
 654                         return PTR_ERR(rdev);
 655                 }
 656         }
 657
 658         return 0;
 659 }
 660
 661 static struct platform_driver rpm_reg_driver = {
 662         .probe = rpm_reg_probe,
 663         .driver = {
 664                 .name  = "qcom_rpm_smd_regulator",
 665                 .of_match_table = rpm_of_match,
 666         },
 667 };
 668
 669 static int __init rpm_reg_init(void)
 670 {
 671         return platform_driver_register(&rpm_reg_driver);
 672 }
 673 subsys_initcall(rpm_reg_init);
 674
 675 static void __exit rpm_reg_exit(void)
 676 {
 677         platform_driver_unregister(&rpm_reg_driver);
 678 }
 679 module_exit(rpm_reg_exit)
 680
 681 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
 682 MODULE_LICENSE("GPL v2");